arch/common/hidd.intelG33/intelG33_intern.h

   1 #ifndef INTELG33_H
   2 #define INTELG33_H
   3
   4 #define DEBUG 1
   5 #include <aros/debug.h>
   6 #include <aros/libcall.h>
   7 #include <aros/asmcall.h>
   8 #include <aros/symbolsets.h>
   9
  10 #include <exec/semaphores.h>
  11 #include <exec/memory.h>
  12 #include <exec/nodes.h>
  13 #include <exec/types.h>
  14
  15 #include <hidd/graphics.h>
  16 #include <hidd/irq.h>
  17
  18 #include "intelG33_regs.h"
  19
  20 #undef HiddPCIDeviceAttrBase
  21 #undef HiddGfxAttrBase
  22 #undef HiddPixFmtAttrBase
  23 #undef HiddSyncAttrBase
  24 #undef HiddBitMapAttrBase
  25 #undef HiddG33BitMapAttrBase
  26 #undef __IHidd_PlanarBM
  27 #define HiddPCIDeviceAttrBase (sd->pciAttrBase)
  28 #define HiddBitMapAttrBase    (sd->bitMapAttrBase)
  29 #define HiddPixFmtAttrBase    (sd->pixFmtAttrBase)
  30 #define HiddGfxAttrBase       (sd->gfxAttrBase)
  31 #define HiddSyncAttrBase      (sd->syncAttrBase)
  32 #define HiddG33BitMapAttrBase (sd->G33BitMapAttrBase)
  33 #define __IHidd_PlanarBM      (sd->planarAttrBase)
  34
  35 #define IID_Hidd_Gfx_IntelG33   "IntelG33"
  36 #define CLID_Hidd_Gfx_IntelG33  "IntelG33"
  37 #define IID_Hidd_G33BitMap      "IntelG33Bitmap"
  38
  39 /*
  40   Divide semaphores so that registers not related to some other locked registers could still be used.
  41   Hopefully no Global lock is ever needed, otherwise needs to get ALL semaphores...
  42 */
  43 struct Locks {
  44     struct SignalSemaphore DPMS;
  45 };
  46
  47 struct Chipset {
  48
  49     struct        Locks Locks;
  50
  51     UWORD             VendorID;
  52     UWORD         ProductID;
  53
  54     APTR          MMADR;
  55     APTR          GMADR;
  56     APTR          GTTADR;
  57     IPTR          sizeGTT;
  58
  59     APTR         *VMemory;
  60     IPTR          sizeVMemory;
  61
  62     APTR         *StolenMemory;
  63     IPTR          sizeStolenMemory;
  64
  65     /*
  66       (MMADR) is used to access graphics control registers.
  67       (GMADR) is used to access graphics memory allocated via the graphics translation table.
  68       (GTTADR) is used to access the translation table.
  69       (GMCH) Graphics Control Register
  70       (BSM) Base of Stolen Memory
  71     */
  72
  73 };
  74
  75 struct staticdata {
  76
  77     APTR          memPool;
  78     struct        MemHeader  mh;
  79     struct        MemHeader *G33Mem;
  80
  81     OOP_Object   *pci;
  82     OOP_Object   *pciG33;
  83     OOP_Object   *pciDriver;
  84
  85     IPTR          G33IntLine;
  86     HIDDT_IRQ_Handler *G33IRQ;
  87
  88     OOP_AttrBase  pciAttrBase;
  89     OOP_AttrBase  bitMapAttrBase;
  90     OOP_AttrBase  pixFmtAttrBase;
  91     OOP_AttrBase  gfxAttrBase;
  92     OOP_AttrBase  syncAttrBase;
  93     OOP_AttrBase  planarAttrBase;
  94     OOP_AttrBase  G33BitMapAttrBase;
  95
  96     OOP_Object   *IntelG33Object;
  97     OOP_Class    *IntelG33Class;
  98     OOP_Class    *OnBMClass;
  99     OOP_Class    *OffBMClass;
 100     OOP_Class    *PlanarBMClass;
 101
 102     OOP_MethodID  mid_ReadLong;
 103     OOP_MethodID  mid_ReadWord;
 104     OOP_MethodID  mid_ReadByte;
 105
 106     struct        Chipset Chipset;
 107
 108 };
 109
 110 struct IntelG33Base {
 111     struct        Library LibNode;
 112     struct        staticdata sd;
 113 };
 114
 115 #define XSD(cl) (&((struct IntelG33Base *)cl->UserData)->sd)
 116
 117 #define CSLOCK(a)   { ObtainSemaphore(&sd->Chipset.Locks.a); }
 118 #define CSUNLOCK(a) { ReleaseSemaphore(&sd->Chipset.Locks.a); }
 119
 120
 121 void init_GMBus(struct staticdata *sd);
 122 UWORD status_GMBus(struct staticdata *sd);
 123
 124 #endif