arch/common/hidd.vmwaresvga/vmwaresvgahardware.c

   1 /*
   2     Copyright © 1995-2008, The AROS Development Team. All rights reserved.
   3     $Id$
   4
   5     Desc: vmware svga hardware functions
   6     Lang: English
   7 */
   8
   9 #define DEBUG 1 /* no SysBase */
  10 #include <aros/debug.h>
  11
  12 #include <asm/io.h>
  13
  14 #include "vmwaresvgahardware.h"
  15 #include "svga_reg.h"
  16 #include "vmwaresvgaclass.h"
  17
  18 ULONG vmwareReadReg(struct HWData *data, ULONG reg)
  19 {
  20     outl(reg, data->indexReg);
  21     return inl(data->valueReg);
  22 }
  23
  24 void vmwareWriteReg(struct HWData *data, ULONG reg, ULONG val)
  25 {
  26     outl(reg, data->indexReg);
  27     outl(val, data->valueReg);
  28 }
  29
  30 #undef SysBase
  31 extern struct ExecBase *SysBase;
  32
  33 ULONG getVMWareSVGAID(struct HWData *data)
  34 {
  35     ULONG id;
  36
  37     vmwareWriteReg(data, SVGA_REG_ID, SVGA_ID_2);
  38     id = vmwareReadReg(data, SVGA_REG_ID);
  39     if (id == SVGA_ID_2)
  40         return id;
  41     vmwareWriteReg(data, SVGA_REG_ID, SVGA_ID_1);
  42     id = vmwareReadReg(data, SVGA_REG_ID);
  43     if (id == SVGA_ID_1)
  44         return id;
  45     if (id == SVGA_ID_0)
  46         return id;
  47     return SVGA_ID_INVALID;
  48 }
  49
  50 VOID initVMWareSVGAFIFO(struct HWData *data)
  51 {
  52     ULONG *fifo;
  53     ULONG fifomin;
  54
  55     vmwareWriteReg(data, SVGA_REG_CONFIG_DONE, 0);              //Stop vmware from reading the fifo
  56
  57     fifo = data->mmiobase = vmwareReadReg(data, SVGA_REG_MEM_START);
  58     data->mmiosize = vmwareReadReg(data, SVGA_REG_MEM_SIZE) & ~3;
  59
  60     if (data->capabilities & SVGA_CAP_EXTENDED_FIFO)
  61         fifomin = vmwareReadReg(data, SVGA_REG_MEM_REGS);
  62     else
  63         fifomin =4;
  64
  65     fifo[SVGA_FIFO_MIN] = fifomin * sizeof(ULONG);
  66
  67     /* reduce size of FIFO queue to prevent VMWare from failing */
  68     fifo[SVGA_FIFO_MAX] = (data->mmiosize > 65536) ? 65536 : data->mmiosize;
  69     fifo[SVGA_FIFO_NEXT_CMD] = fifomin * sizeof(ULONG);
  70     fifo[SVGA_FIFO_STOP] = fifomin * sizeof(ULONG);
  71
  72     vmwareWriteReg(data, SVGA_REG_CONFIG_DONE, 1);
  73 }
  74
  75 VOID syncVMWareSVGAFIFO(struct HWData *data)
  76 {
  77     vmwareWriteReg(data, SVGA_REG_SYNC, 1);
  78     while (vmwareReadReg(data, SVGA_REG_BUSY) != 0);
  79 #warning "maybe wait (delay) some time"
  80 }
  81
  82 VOID writeVMWareSVGAFIFO(struct HWData *data, ULONG val)
  83 {
  84     ULONG *fifo;
  85
  86     fifo = data->mmiobase;
  87     if (
  88             (fifo[SVGA_FIFO_NEXT_CMD]+4 == fifo[SVGA_FIFO_STOP]) ||
  89             (
  90                 (fifo[SVGA_FIFO_NEXT_CMD] == (fifo[SVGA_FIFO_MAX]-4)) &&
  91                 (fifo[SVGA_FIFO_STOP] == fifo[SVGA_FIFO_MIN])
  92             )
  93         )
  94         syncVMWareSVGAFIFO(data);
  95
  96     fifo[fifo[SVGA_FIFO_NEXT_CMD] / 4] = val;
  97     fifo[SVGA_FIFO_NEXT_CMD] += 4;
  98
  99     if (fifo[SVGA_FIFO_NEXT_CMD] == fifo[SVGA_FIFO_MAX])
 100         fifo[SVGA_FIFO_NEXT_CMD] = fifo[SVGA_FIFO_MIN];
 101 }
 102
 103 BOOL initVMWareSVGAHW(struct HWData *data, OOP_Object *device)
 104 {
 105     ULONG *ba;
 106     ULONG id;
 107
 108     id = getVMWareSVGAID(data);
 109     if ((id == SVGA_ID_0) || (id == SVGA_ID_INVALID))
 110     {
 111         return FALSE;
 112     }
 113
 114     initVMWareSVGAFIFO(data);
 115
 116     data->capabilities = vmwareReadReg(data, SVGA_REG_CAPABILITIES);
 117
 118     if (data->capabilities & SVGA_CAP_8BIT_EMULATION)
 119     {
 120         data->bitsperpixel = vmwareReadReg(data, SVGA_REG_HOST_BITS_PER_PIXEL);
 121         vmwareWriteReg(data,SVGA_REG_BITS_PER_PIXEL, data->bitsperpixel);
 122     }
 123     data->bitsperpixel = vmwareReadReg(data, SVGA_REG_BITS_PER_PIXEL);
 124
 125     data->depth = vmwareReadReg(data, SVGA_REG_DEPTH);
 126     data->maxwidth = vmwareReadReg(data, SVGA_REG_MAX_WIDTH);
 127     data->maxheight = vmwareReadReg(data, SVGA_REG_MAX_HEIGHT);
 128     data->redmask = vmwareReadReg(data, SVGA_REG_RED_MASK);
 129     data->greenmask = vmwareReadReg(data, SVGA_REG_GREEN_MASK);
 130     data->bluemask = vmwareReadReg(data, SVGA_REG_BLUE_MASK);
 131     data->bytesperpixel = 1;
 132
 133     if (data->depth>16)
 134         data->bytesperpixel = 4;
 135     else if (data->depth>8)
 136         data->bytesperpixel = 2;
 137
 138     if (data->capabilities & SVGA_CAP_MULTIMON)
 139     {
 140         data->displaycount = vmwareReadReg(data, SVGA_REG_NUM_DISPLAYS);
 141     }
 142     else
 143     {
 144         data->displaycount = 1;
 145     }
 146
 147     data->vramsize = vmwareReadReg(data, SVGA_REG_VRAM_SIZE);
 148     data->vrambase = vmwareReadReg(data, SVGA_REG_FB_START);
 149     data->pseudocolor = vmwareReadReg(data, SVGA_REG_PSEUDOCOLOR);
 150
 151     D(bug("[VMWareSVGA] Init: VRAM at 0x%08x size %d\n",data->vrambase, data->vramsize));
 152     D(bug("[VMWareSVGA] Init: no.displays: %d\n",data->displaycount));
 153     D(bug("[VMWareSVGA] Init: caps : 0x%08x\n",data->capabilities));
 154     D(bug("[VMWareSVGA] Init: no.displays: %d\n",data->displaycount));
 155     D(bug("[VMWareSVGA] Init: depth: %d\n",data->depth));
 156     D(bug("[VMWareSVGA] Init: bpp  : %d\n",data->bitsperpixel));
 157     D(bug("[VMWareSVGA] Init: maxw: %d\n",data->maxwidth));
 158     D(bug("[VMWareSVGA] Init: maxh: %d\n",data->maxheight));
 159
 160     return TRUE;
 161 }
 162
 163 VOID setModeVMWareSVGA(struct HWData *data, ULONG width, ULONG height)
 164 {
 165     D(bug("[VMWareSVGA] SetMode: %dx%d\n",width,height));
 166     vmwareWriteReg(data, SVGA_REG_ENABLE, 0);
 167     vmwareWriteReg(data, SVGA_REG_WIDTH, width);
 168     vmwareWriteReg(data, SVGA_REG_HEIGHT, height);
 169
 170     if (data->capabilities & SVGA_CAP_8BIT_EMULATION)
 171         vmwareWriteReg(data, SVGA_REG_BITS_PER_PIXEL,data->bitsperpixel);
 172
 173     vmwareWriteReg(data, SVGA_REG_ENABLE, 1);
 174
 175     data->fboffset = vmwareReadReg(data, SVGA_REG_FB_OFFSET);
 176     data->bytesperline = vmwareReadReg(data, SVGA_REG_BYTES_PER_LINE);
 177     data->depth = vmwareReadReg(data, SVGA_REG_DEPTH);
 178     data->redmask = vmwareReadReg(data, SVGA_REG_RED_MASK);
 179     data->greenmask = vmwareReadReg(data, SVGA_REG_GREEN_MASK);
 180     data->bluemask = vmwareReadReg(data, SVGA_REG_BLUE_MASK);
 181     data->pseudocolor = vmwareReadReg(data, SVGA_REG_PSEUDOCOLOR);
 182 }
 183
 184 VOID refreshAreaVMWareSVGA(struct HWData *data, struct Box *box)
 185 {
 186     writeVMWareSVGAFIFO(data, SVGA_CMD_UPDATE);
 187     writeVMWareSVGAFIFO(data, box->x1);
 188     writeVMWareSVGAFIFO(data, box->y1);
 189     writeVMWareSVGAFIFO(data, box->x2-box->x1+1);
 190     writeVMWareSVGAFIFO(data, box->y2-box->y1+1);
 191 }
 192
 193 VOID rectFillVMWareSVGA(struct HWData *data, ULONG color, LONG x, LONG y, LONG width, LONG height)
 194 {
 195     writeVMWareSVGAFIFO(data, SVGA_CMD_RECT_FILL);
 196     writeVMWareSVGAFIFO(data, color);
 197     writeVMWareSVGAFIFO(data, x);
 198     writeVMWareSVGAFIFO(data, y);
 199     writeVMWareSVGAFIFO(data, width);
 200     writeVMWareSVGAFIFO(data, height);
 201     syncVMWareSVGAFIFO(data);
 202 }
 203
 204 VOID ropFillVMWareSVGA(struct HWData *data, ULONG color, LONG x, LONG y, LONG width, LONG height, ULONG mode)
 205 {
 206     writeVMWareSVGAFIFO(data, SVGA_CMD_RECT_ROP_FILL);
 207     writeVMWareSVGAFIFO(data, color);
 208     writeVMWareSVGAFIFO(data, x);
 209     writeVMWareSVGAFIFO(data, y);
 210     writeVMWareSVGAFIFO(data, width);
 211     writeVMWareSVGAFIFO(data, height);
 212     writeVMWareSVGAFIFO(data, mode);
 213     syncVMWareSVGAFIFO(data);
 214 }
 215
 216 VOID ropCopyVMWareSVGA(struct HWData *data, LONG sx, LONG sy, LONG dx, LONG dy, ULONG width, ULONG height, ULONG mode)
 217 {
 218     writeVMWareSVGAFIFO(data, SVGA_CMD_RECT_ROP_COPY);
 219     writeVMWareSVGAFIFO(data, sx);
 220     writeVMWareSVGAFIFO(data, sy);
 221     writeVMWareSVGAFIFO(data, dx);
 222     writeVMWareSVGAFIFO(data, dy);
 223     writeVMWareSVGAFIFO(data, width);
 224     writeVMWareSVGAFIFO(data, height);
 225     writeVMWareSVGAFIFO(data, mode);
 226     syncVMWareSVGAFIFO(data);
 227 }
 228
 229 VOID defineCursorVMWareSVGA(struct HWData *data, struct MouseData *mouse)
 230 {
 231     int i;
 232     ULONG *cshape = mouse->shape;
 233     struct Box box;
 234     ULONG andmask[SVGA_PIXMAP_SIZE(mouse->width, mouse->height, data->bitsperpixel)];
 235     ULONG *a;
 236     ULONG *b;
 237
 238 #warning "convert mouse shape to current depth"
 239     writeVMWareSVGAFIFO(data, SVGA_CMD_DEFINE_CURSOR);
 240     writeVMWareSVGAFIFO(data, 1);
 241     writeVMWareSVGAFIFO(data, 0); /* hot x value */
 242     writeVMWareSVGAFIFO(data, 0); /* hot y value */
 243     writeVMWareSVGAFIFO(data, mouse->width); /* width */
 244     writeVMWareSVGAFIFO(data, mouse->height); /* height */
 245     writeVMWareSVGAFIFO(data, data->bitsperpixel); /* bits per pixel */
 246     writeVMWareSVGAFIFO(data, data->bitsperpixel); /* bits per pixel */
 247     b = cshape;
 248     a = andmask;
 249     for (i = 0; i<(SVGA_PIXMAP_SIZE(mouse->width, mouse->height, data->bitsperpixel)*2);i++)
 250     {
 251         *((UWORD *)a) = *((UWORD *)b) ? 0 : ~0;
 252
 253         a = ((UWORD *)a) + 1;
 254         b = ((UWORD *)b) + 1;
 255     }
 256     a = andmask;
 257     for (i = 0; i<SVGA_PIXMAP_SIZE(mouse->width, mouse->height, data->bitsperpixel);i++)
 258         writeVMWareSVGAFIFO(data, *a++);
 259     for (i = 0; i<SVGA_PIXMAP_SIZE(mouse->width, mouse->height, data->bitsperpixel);i++)
 260         writeVMWareSVGAFIFO(data, *cshape++);
 261     syncVMWareSVGAFIFO(data);
 262 }
 263
 264 VOID displayCursorVMWareSVGA(struct HWData *data, LONG mode)
 265 {
 266 #if 0
 267     writeVMWareSVGAFIFO(data, SVGA_CMD_DISPLAY_CURSOR);
 268     writeVMWareSVGAFIFO(data, 1);
 269     writeVMWareSVGAFIFO(data, mode);
 270     syncVMWareSVGAFIFO(data);
 271 #else
 272     vmwareWriteReg(data, SVGA_REG_CURSOR_ID, 1);
 273     vmwareWriteReg(data, SVGA_REG_CURSOR_ON, mode);
 274 #endif
 275 }
 276
 277 VOID moveCursorVMWareSVGA(struct HWData *data, LONG x, LONG y)
 278 {
 279 #if 0
 280     writeVMWareSVGAFIFO(data, SVGA_CMD_MOVE_CURSOR);
 281     writeVMWareSVGAFIFO(data, x);
 282     writeVMWareSVGAFIFO(data, y);
 283     syncVMWareSVGAFIFO(data);
 284 #else
 285     vmwareWriteReg(data, SVGA_REG_CURSOR_ID, 1);
 286     vmwareWriteReg(data, SVGA_REG_CURSOR_X, x);
 287     vmwareWriteReg(data, SVGA_REG_CURSOR_Y, y);
 288     vmwareWriteReg(data, SVGA_REG_CURSOR_ON, 1);
 289 #endif
 290 }