ocfs2: Make the left masklogs compat.
[taoma-kernel.git] / drivers / net / fsl_pq_mdio.h
blobbd17a2a0139bf6dd30e000582c5e8e43826e42ce
1 /*
2 * Freescale PowerQUICC MDIO Driver -- MII Management Bus Implementation
3 * Driver for the MDIO bus controller on Freescale PowerQUICC processors
5 * Author: Andy Fleming
6 * Modifier: Sandeep Gopalpet
8 * Copyright 2002-2004, 2008-2009 Freescale Semiconductor, Inc.
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
16 #ifndef __FSL_PQ_MDIO_H
17 #define __FSL_PQ_MDIO_H
19 #define MIIMIND_BUSY 0x00000001
20 #define MIIMIND_NOTVALID 0x00000004
21 #define MIIMCFG_INIT_VALUE 0x00000007
22 #define MIIMCFG_RESET 0x80000000
24 #define MII_READ_COMMAND 0x00000001
26 struct fsl_pq_mdio {
27 u8 res1[16];
28 u32 ieventm; /* MDIO Interrupt event register (for etsec2)*/
29 u32 imaskm; /* MDIO Interrupt mask register (for etsec2)*/
30 u8 res2[4];
31 u32 emapm; /* MDIO Event mapping register (for etsec2)*/
32 u8 res3[1280];
33 u32 miimcfg; /* MII management configuration reg */
34 u32 miimcom; /* MII management command reg */
35 u32 miimadd; /* MII management address reg */
36 u32 miimcon; /* MII management control reg */
37 u32 miimstat; /* MII management status reg */
38 u32 miimind; /* MII management indication reg */
39 u8 reserved[28]; /* Space holder */
40 u32 utbipar; /* TBI phy address reg (only on UCC) */
41 u8 res4[2728];
42 } __packed;
44 int fsl_pq_mdio_read(struct mii_bus *bus, int mii_id, int regnum);
45 int fsl_pq_mdio_write(struct mii_bus *bus, int mii_id, int regnum, u16 value);
46 int fsl_pq_local_mdio_write(struct fsl_pq_mdio __iomem *regs, int mii_id,
47 int regnum, u16 value);
48 int fsl_pq_local_mdio_read(struct fsl_pq_mdio __iomem *regs, int mii_id, int regnum);
49 int __init fsl_pq_mdio_init(void);
50 void fsl_pq_mdio_exit(void);
51 void fsl_pq_mdio_bus_name(char *name, struct device_node *np);
52 #endif /* FSL_PQ_MDIO_H */