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ocfs2: Make the left masklogs compat.
[taoma-kernel.git] / drivers / watchdog / omap_wdt.c
blob3dd4971160ef3efb6e3c485ef94af38641f16bdf
1 /*
2 * omap_wdt.c
3 *
4 * Watchdog driver for the TI OMAP 16xx & 24xx/34xx 32KHz (non-secure) watchdog
5 *
6 * Author: MontaVista Software, Inc.
7 * <gdavis@mvista.com> or <source@mvista.com>
8 *
9 * 2003 (c) MontaVista Software, Inc. This file is licensed under the
10 * terms of the GNU General Public License version 2. This program is
11 * licensed "as is" without any warranty of any kind, whether express
12 * or implied.
13 *
14 * History:
15 *
16 * 20030527: George G. Davis <gdavis@mvista.com>
17 * Initially based on linux-2.4.19-rmk7-pxa1/drivers/char/sa1100_wdt.c
18 * (c) Copyright 2000 Oleg Drokin <green@crimea.edu>
19 * Based on SoftDog driver by Alan Cox <alan@lxorguk.ukuu.org.uk>
20 *
21 * Copyright (c) 2004 Texas Instruments.
22 * 1. Modified to support OMAP1610 32-KHz watchdog timer
23 * 2. Ported to 2.6 kernel
24 *
25 * Copyright (c) 2005 David Brownell
26 * Use the driver model and standard identifiers; handle bigger timeouts.
27 */
28
29 #include <linux/module.h>
30 #include <linux/types.h>
31 #include <linux/kernel.h>
32 #include <linux/fs.h>
33 #include <linux/mm.h>
34 #include <linux/miscdevice.h>
35 #include <linux/watchdog.h>
36 #include <linux/reboot.h>
37 #include <linux/init.h>
38 #include <linux/err.h>
39 #include <linux/platform_device.h>
40 #include <linux/moduleparam.h>
41 #include <linux/bitops.h>
42 #include <linux/io.h>
43 #include <linux/uaccess.h>
44 #include <linux/slab.h>
45 #include <linux/pm_runtime.h>
46 #include <mach/hardware.h>
47 #include <plat/prcm.h>
48
49 #include "omap_wdt.h"
50
51 static struct platform_device *omap_wdt_dev;
52
53 static unsigned timer_margin;
54 module_param(timer_margin, uint, 0);
55 MODULE_PARM_DESC(timer_margin, "initial watchdog timeout (in seconds)");
56
57 static unsigned int wdt_trgr_pattern = 0x1234;
58 static spinlock_t wdt_lock;
59
60 struct omap_wdt_dev {
61 void __iomem *base; /* physical */
62 struct device *dev;
63 int omap_wdt_users;
64 struct resource *mem;
65 struct miscdevice omap_wdt_miscdev;
66 };
67
68 static void omap_wdt_ping(struct omap_wdt_dev *wdev)
69 {
70 void __iomem *base = wdev->base;
71
72 /* wait for posted write to complete */
73 while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x08)
74 cpu_relax();
75
76 wdt_trgr_pattern = ~wdt_trgr_pattern;
77 __raw_writel(wdt_trgr_pattern, (base + OMAP_WATCHDOG_TGR));
78
79 /* wait for posted write to complete */
80 while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x08)
81 cpu_relax();
82 /* reloaded WCRR from WLDR */
83 }
84
85 static void omap_wdt_enable(struct omap_wdt_dev *wdev)
86 {
87 void __iomem *base = wdev->base;
88
89 /* Sequence to enable the watchdog */
90 __raw_writel(0xBBBB, base + OMAP_WATCHDOG_SPR);
91 while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x10)
92 cpu_relax();
93
94 __raw_writel(0x4444, base + OMAP_WATCHDOG_SPR);
95 while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x10)
96 cpu_relax();
97 }
98
99 static void omap_wdt_disable(struct omap_wdt_dev *wdev)
100 {
101 void __iomem *base = wdev->base;
102
103 /* sequence required to disable watchdog */
104 __raw_writel(0xAAAA, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */
105 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x10)
106 cpu_relax();
107
108 __raw_writel(0x5555, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */
109 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x10)
110 cpu_relax();
111 }
112
113 static void omap_wdt_adjust_timeout(unsigned new_timeout)
114 {
115 if (new_timeout < TIMER_MARGIN_MIN)
116 new_timeout = TIMER_MARGIN_DEFAULT;
117 if (new_timeout > TIMER_MARGIN_MAX)
118 new_timeout = TIMER_MARGIN_MAX;
119 timer_margin = new_timeout;
120 }
121
122 static void omap_wdt_set_timeout(struct omap_wdt_dev *wdev)
123 {
124 u32 pre_margin = GET_WLDR_VAL(timer_margin);
125 void __iomem *base = wdev->base;
126
127 /* just count up at 32 KHz */
128 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x04)
129 cpu_relax();
130
131 __raw_writel(pre_margin, base + OMAP_WATCHDOG_LDR);
132 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x04)
133 cpu_relax();
134 }
135
136 /*
137 * Allow only one task to hold it open
138 */
139 static int omap_wdt_open(struct inode *inode, struct file *file)
140 {
141 struct omap_wdt_dev *wdev = platform_get_drvdata(omap_wdt_dev);
142 void __iomem *base = wdev->base;
143
144 if (test_and_set_bit(1, (unsigned long *)&(wdev->omap_wdt_users)))
145 return -EBUSY;
146
147 pm_runtime_get_sync(wdev->dev);
148
149 /* initialize prescaler */
150 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x01)
151 cpu_relax();
152
153 __raw_writel((1 << 5) | (PTV << 2), base + OMAP_WATCHDOG_CNTRL);
154 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x01)
155 cpu_relax();
156
157 file->private_data = (void *) wdev;
158
159 omap_wdt_set_timeout(wdev);
160 omap_wdt_ping(wdev); /* trigger loading of new timeout value */
161 omap_wdt_enable(wdev);
162
163 return nonseekable_open(inode, file);
164 }
165
166 static int omap_wdt_release(struct inode *inode, struct file *file)
167 {
168 struct omap_wdt_dev *wdev = file->private_data;
169
170 /*
171 * Shut off the timer unless NOWAYOUT is defined.
172 */
173 #ifndef CONFIG_WATCHDOG_NOWAYOUT
174
175 omap_wdt_disable(wdev);
176
177 pm_runtime_put_sync(wdev->dev);
178 #else
179 printk(KERN_CRIT "omap_wdt: Unexpected close, not stopping!\n");
180 #endif
181 wdev->omap_wdt_users = 0;
182
183 return 0;
184 }
185
186 static ssize_t omap_wdt_write(struct file *file, const char __user *data,
187 size_t len, loff_t *ppos)
188 {
189 struct omap_wdt_dev *wdev = file->private_data;
190
191 /* Refresh LOAD_TIME. */
192 if (len) {
193 spin_lock(&wdt_lock);
194 omap_wdt_ping(wdev);
195 spin_unlock(&wdt_lock);
196 }
197 return len;
198 }
199
200 static long omap_wdt_ioctl(struct file *file, unsigned int cmd,
201 unsigned long arg)
202 {
203 struct omap_wdt_dev *wdev;
204 int new_margin;
205 static const struct watchdog_info ident = {
206 .identity = "OMAP Watchdog",
207 .options = WDIOF_SETTIMEOUT,
208 .firmware_version = 0,
209 };
210
211 wdev = file->private_data;
212
213 switch (cmd) {
214 case WDIOC_GETSUPPORT:
215 return copy_to_user((struct watchdog_info __user *)arg, &ident,
216 sizeof(ident));
217 case WDIOC_GETSTATUS:
218 return put_user(0, (int __user *)arg);
219 case WDIOC_GETBOOTSTATUS:
220 if (cpu_is_omap16xx())
221 return put_user(__raw_readw(ARM_SYSST),
222 (int __user *)arg);
223 if (cpu_is_omap24xx())
224 return put_user(omap_prcm_get_reset_sources(),
225 (int __user *)arg);
226 case WDIOC_KEEPALIVE:
227 spin_lock(&wdt_lock);
228 omap_wdt_ping(wdev);
229 spin_unlock(&wdt_lock);
230 return 0;
231 case WDIOC_SETTIMEOUT:
232 if (get_user(new_margin, (int __user *)arg))
233 return -EFAULT;
234 omap_wdt_adjust_timeout(new_margin);
235
236 spin_lock(&wdt_lock);
237 omap_wdt_disable(wdev);
238 omap_wdt_set_timeout(wdev);
239 omap_wdt_enable(wdev);
240
241 omap_wdt_ping(wdev);
242 spin_unlock(&wdt_lock);
243 /* Fall */
244 case WDIOC_GETTIMEOUT:
245 return put_user(timer_margin, (int __user *)arg);
246 default:
247 return -ENOTTY;
248 }
249 }
250
251 static const struct file_operations omap_wdt_fops = {
252 .owner = THIS_MODULE,
253 .write = omap_wdt_write,
254 .unlocked_ioctl = omap_wdt_ioctl,
255 .open = omap_wdt_open,
256 .release = omap_wdt_release,
257 .llseek = no_llseek,
258 };
259
260 static int __devinit omap_wdt_probe(struct platform_device *pdev)
261 {
262 struct resource *res, *mem;
263 struct omap_wdt_dev *wdev;
264 int ret;
265
266 /* reserve static register mappings */
267 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
268 if (!res) {
269 ret = -ENOENT;
270 goto err_get_resource;
271 }
272
273 if (omap_wdt_dev) {
274 ret = -EBUSY;
275 goto err_busy;
276 }
277
278 mem = request_mem_region(res->start, resource_size(res), pdev->name);
279 if (!mem) {
280 ret = -EBUSY;
281 goto err_busy;
282 }
283
284 wdev = kzalloc(sizeof(struct omap_wdt_dev), GFP_KERNEL);
285 if (!wdev) {
286 ret = -ENOMEM;
287 goto err_kzalloc;
288 }
289
290 wdev->omap_wdt_users = 0;
291 wdev->mem = mem;
292 wdev->dev = &pdev->dev;
293
294 wdev->base = ioremap(res->start, resource_size(res));
295 if (!wdev->base) {
296 ret = -ENOMEM;
297 goto err_ioremap;
298 }
299
300 platform_set_drvdata(pdev, wdev);
301
302 pm_runtime_enable(wdev->dev);
303 pm_runtime_get_sync(wdev->dev);
304
305 omap_wdt_disable(wdev);
306 omap_wdt_adjust_timeout(timer_margin);
307
308 wdev->omap_wdt_miscdev.parent = &pdev->dev;
309 wdev->omap_wdt_miscdev.minor = WATCHDOG_MINOR;
310 wdev->omap_wdt_miscdev.name = "watchdog";
311 wdev->omap_wdt_miscdev.fops = &omap_wdt_fops;
312
313 ret = misc_register(&(wdev->omap_wdt_miscdev));
314 if (ret)
315 goto err_misc;
316
317 pr_info("OMAP Watchdog Timer Rev 0x%02x: initial timeout %d sec\n",
318 __raw_readl(wdev->base + OMAP_WATCHDOG_REV) & 0xFF,
319 timer_margin);
320
321 pm_runtime_put_sync(wdev->dev);
322
323 omap_wdt_dev = pdev;
324
325 return 0;
326
327 err_misc:
328 platform_set_drvdata(pdev, NULL);
329 iounmap(wdev->base);
330
331 err_ioremap:
332 wdev->base = NULL;
333 kfree(wdev);
334
335 err_kzalloc:
336 release_mem_region(res->start, resource_size(res));
337
338 err_busy:
339 err_get_resource:
340
341 return ret;
342 }
343
344 static void omap_wdt_shutdown(struct platform_device *pdev)
345 {
346 struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
347
348 if (wdev->omap_wdt_users)
349 omap_wdt_disable(wdev);
350 }
351
352 static int __devexit omap_wdt_remove(struct platform_device *pdev)
353 {
354 struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
355 struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
356
357 if (!res)
358 return -ENOENT;
359
360 misc_deregister(&(wdev->omap_wdt_miscdev));
361 release_mem_region(res->start, resource_size(res));
362 platform_set_drvdata(pdev, NULL);
363
364 iounmap(wdev->base);
365
366 kfree(wdev);
367 omap_wdt_dev = NULL;
368
369 return 0;
370 }
371
372 #ifdef CONFIG_PM
373
374 /* REVISIT ... not clear this is the best way to handle system suspend; and
375 * it's very inappropriate for selective device suspend (e.g. suspending this
376 * through sysfs rather than by stopping the watchdog daemon). Also, this
377 * may not play well enough with NOWAYOUT...
378 */
379
380 static int omap_wdt_suspend(struct platform_device *pdev, pm_message_t state)
381 {
382 struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
383
384 if (wdev->omap_wdt_users)
385 omap_wdt_disable(wdev);
386
387 return 0;
388 }
389
390 static int omap_wdt_resume(struct platform_device *pdev)
391 {
392 struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
393
394 if (wdev->omap_wdt_users) {
395 omap_wdt_enable(wdev);
396 omap_wdt_ping(wdev);
397 }
398
399 return 0;
400 }
401
402 #else
403 #define omap_wdt_suspend NULL
404 #define omap_wdt_resume NULL
405 #endif
406
407 static struct platform_driver omap_wdt_driver = {
408 .probe = omap_wdt_probe,
409 .remove = __devexit_p(omap_wdt_remove),
410 .shutdown = omap_wdt_shutdown,
411 .suspend = omap_wdt_suspend,
412 .resume = omap_wdt_resume,
413 .driver = {
414 .owner = THIS_MODULE,
415 .name = "omap_wdt",
416 },
417 };
418
419 static int __init omap_wdt_init(void)
420 {
421 spin_lock_init(&wdt_lock);
422 return platform_driver_register(&omap_wdt_driver);
423 }
424
425 static void __exit omap_wdt_exit(void)
426 {
427 platform_driver_unregister(&omap_wdt_driver);
428 }
429
430 module_init(omap_wdt_init);
431 module_exit(omap_wdt_exit);
432
433 MODULE_AUTHOR("George G. Davis");
434 MODULE_LICENSE("GPL");
435 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
436 MODULE_ALIAS("platform:omap_wdt");
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