2 * A64 code generator for TCC
4 * Copyright (c) 2014-2015 Edmund Grimley Evans
6 * Copying and distribution of this file, with or without modification,
7 * are permitted in any medium without royalty provided the copyright
8 * notice and this notice are preserved. This file is offered as-is,
9 * without any warranty.
12 #ifdef TARGET_DEFS_ONLY
14 // Number of registers available to allocator:
15 #define NB_REGS 28 // x0-x18, x30, v0-v7
17 #define TREG_R(x) (x) // x = 0..18
19 #define TREG_F(x) (x + 20) // x = 0..7
21 // Register classes sorted from more general to more precise:
22 #define RC_INT (1 << 0)
23 #define RC_FLOAT (1 << 1)
24 #define RC_R(x) (1 << (2 + (x))) // x = 0..18
25 #define RC_R30 (1 << 21)
26 #define RC_F(x) (1 << (22 + (x))) // x = 0..7
28 #define RC_IRET (RC_R(0)) // int return register class
29 #define RC_FRET (RC_F(0)) // float return register class
31 #define REG_IRET (TREG_R(0)) // int return register number
32 #define REG_FRET (TREG_F(0)) // float return register number
36 #define LDOUBLE_SIZE 16
37 #define LDOUBLE_ALIGN 16
41 #define CHAR_IS_UNSIGNED
43 /******************************************************/
44 #else /* ! TARGET_DEFS_ONLY */
45 /******************************************************/
49 ST_DATA
const int reg_classes
[NB_REGS
] = {
69 RC_R30
, // not in RC_INT as we make special use of x30
80 #define IS_FREG(x) ((x) >= TREG_F(0))
82 static uint32_t intr(int r
)
84 assert(TREG_R(0) <= r
&& r
<= TREG_R30
);
85 return r
< TREG_R30
? r
: 30;
88 static uint32_t fltr(int r
)
90 assert(TREG_F(0) <= r
&& r
<= TREG_F(7));
94 // Add an instruction to text section:
95 ST_FUNC
void o(unsigned int c
)
98 if (ind1
> cur_text_section
->data_allocated
)
99 section_realloc(cur_text_section
, ind1
);
100 write32le(cur_text_section
->data
+ ind
, c
);
104 static int arm64_encode_bimm64(uint64_t x
)
114 if (x
>> 2 == (x
& (((uint64_t)1 << (64 - 2)) - 1)))
115 rep
= 2, x
&= ((uint64_t)1 << 2) - 1;
116 else if (x
>> 4 == (x
& (((uint64_t)1 << (64 - 4)) - 1)))
117 rep
= 4, x
&= ((uint64_t)1 << 4) - 1;
118 else if (x
>> 8 == (x
& (((uint64_t)1 << (64 - 8)) - 1)))
119 rep
= 8, x
&= ((uint64_t)1 << 8) - 1;
120 else if (x
>> 16 == (x
& (((uint64_t)1 << (64 - 16)) - 1)))
121 rep
= 16, x
&= ((uint64_t)1 << 16) - 1;
122 else if (x
>> 32 == (x
& (((uint64_t)1 << (64 - 32)) - 1)))
123 rep
= 32, x
&= ((uint64_t)1 << 32) - 1;
128 if (!(x
& (((uint64_t)1 << 32) - 1))) x
>>= 32, pos
+= 32;
129 if (!(x
& (((uint64_t)1 << 16) - 1))) x
>>= 16, pos
+= 16;
130 if (!(x
& (((uint64_t)1 << 8) - 1))) x
>>= 8, pos
+= 8;
131 if (!(x
& (((uint64_t)1 << 4) - 1))) x
>>= 4, pos
+= 4;
132 if (!(x
& (((uint64_t)1 << 2) - 1))) x
>>= 2, pos
+= 2;
133 if (!(x
& (((uint64_t)1 << 1) - 1))) x
>>= 1, pos
+= 1;
136 if (!(~x
& (((uint64_t)1 << 32) - 1))) x
>>= 32, len
+= 32;
137 if (!(~x
& (((uint64_t)1 << 16) - 1))) x
>>= 16, len
+= 16;
138 if (!(~x
& (((uint64_t)1 << 8) - 1))) x
>>= 8, len
+= 8;
139 if (!(~x
& (((uint64_t)1 << 4) - 1))) x
>>= 4, len
+= 4;
140 if (!(~x
& (((uint64_t)1 << 2) - 1))) x
>>= 2, len
+= 2;
141 if (!(~x
& (((uint64_t)1 << 1) - 1))) x
>>= 1, len
+= 1;
146 pos
= (pos
+ len
) & (rep
- 1);
149 return ((0x1000 & rep
<< 6) | (((rep
- 1) ^ 31) << 1 & 63) |
150 ((rep
- pos
) & (rep
- 1)) << 6 | (len
- 1));
153 static uint32_t arm64_movi(int r
, uint64_t x
)
158 return 0x52800000 | r
| x
<< 5; // movz w(r),#(x)
159 if (!(x
& ~(m
<< 16)))
160 return 0x52a00000 | r
| x
>> 11; // movz w(r),#(x >> 16),lsl #16
161 if (!(x
& ~(m
<< 32)))
162 return 0xd2c00000 | r
| x
>> 27; // movz x(r),#(x >> 32),lsl #32
163 if (!(x
& ~(m
<< 48)))
164 return 0xd2e00000 | r
| x
>> 43; // movz x(r),#(x >> 48),lsl #48
165 if ((x
& ~m
) == m
<< 16)
166 return (0x12800000 | r
|
167 (~x
<< 5 & 0x1fffe0)); // movn w(r),#(~x)
168 if ((x
& ~(m
<< 16)) == m
)
169 return (0x12a00000 | r
|
170 (~x
>> 11 & 0x1fffe0)); // movn w(r),#(~x >> 16),lsl #16
172 return (0x92800000 | r
|
173 (~x
<< 5 & 0x1fffe0)); // movn x(r),#(~x)
175 return (0x92a00000 | r
|
176 (~x
>> 11 & 0x1fffe0)); // movn x(r),#(~x >> 16),lsl #16
178 return (0x92c00000 | r
|
179 (~x
>> 27 & 0x1fffe0)); // movn x(r),#(~x >> 32),lsl #32
181 return (0x92e00000 | r
|
182 (~x
>> 43 & 0x1fffe0)); // movn x(r),#(~x >> 32),lsl #32
183 if (!(x
>> 32) && (e
= arm64_encode_bimm64(x
| x
<< 32)) >= 0)
184 return 0x320003e0 | r
| (uint32_t)e
<< 10; // movi w(r),#(x)
185 if ((e
= arm64_encode_bimm64(x
)) >= 0)
186 return 0xb20003e0 | r
| (uint32_t)e
<< 10; // movi x(r),#(x)
190 static void arm64_movimm(int r
, uint64_t x
)
193 if ((i
= arm64_movi(r
, x
)))
194 o(i
); // a single MOV
196 // MOVZ/MOVN and 1-3 MOVKs
198 uint32_t mov1
= 0xd2800000; // movz
200 for (i
= 0; i
< 64; i
+= 16) {
201 z
+= !(x
>> i
& 0xffff);
202 m
+= !(~x
>> i
& 0xffff);
206 mov1
= 0x92800000; // movn
208 for (i
= 0; i
< 64; i
+= 16)
209 if (x1
>> i
& 0xffff) {
210 o(mov1
| r
| (x1
>> i
& 0xffff) << 5 | i
<< 17);
211 // movz/movn x(r),#(*),lsl #(i)
214 for (i
+= 16; i
< 64; i
+= 16)
215 if (x1
>> i
& 0xffff)
216 o(0xf2800000 | r
| (x
>> i
& 0xffff) << 5 | i
<< 17);
217 // movk x(r),#(*),lsl #(i)
221 // Patch all branches in list pointed to by t to branch to a:
222 ST_FUNC
void gsym_addr(int t_
, int a_
)
227 unsigned char *ptr
= cur_text_section
->data
+ t
;
228 uint32_t next
= read32le(ptr
);
229 if (a
- t
+ 0x8000000 >= 0x10000000)
230 tcc_error("branch out of range");
231 write32le(ptr
, (a
- t
== 4 ? 0xd503201f : // nop
232 0x14000000 | ((a
- t
) >> 2 & 0x3ffffff))); // b
237 // Patch all branches in list pointed to by t to branch to current location:
238 ST_FUNC
void gsym(int t
)
243 static int arm64_type_size(int t
)
245 switch (t
& VT_BTYPE
) {
246 case VT_INT
: return 2;
247 case VT_BYTE
: return 0;
248 case VT_SHORT
: return 1;
249 case VT_PTR
: return 3;
250 case VT_ENUM
: return 2;
251 case VT_FUNC
: return 3;
252 case VT_FLOAT
: return 2;
253 case VT_DOUBLE
: return 3;
254 case VT_LDOUBLE
: return 4;
255 case VT_BOOL
: return 0;
256 case VT_LLONG
: return 3;
262 static void arm64_spoff(int reg
, uint64_t off
)
264 uint32_t sub
= off
>> 63;
268 o(0x910003e0 | sub
<< 30 | reg
| off
<< 10);
269 // (add|sub) x(reg),sp,#(off)
271 arm64_movimm(30, off
); // use x30 for offset
272 o(0x8b3e63e0 | sub
<< 30 | reg
); // (add|sub) x(reg),sp,x30
276 static void arm64_ldrx(int sg
, int sz_
, int dst
, int bas
, uint64_t off
)
281 if (!(off
& ~((uint32_t)0xfff << sz
)))
282 o(0x39400000 | dst
| bas
<< 5 | off
<< (10 - sz
) |
283 (uint32_t)!!sg
<< 23 | sz
<< 30); // ldr(*) x(dst),[x(bas),#(off)]
284 else if (off
< 256 || -off
<= 256)
285 o(0x38400000 | dst
| bas
<< 5 | (off
& 511) << 12 |
286 (uint32_t)!!sg
<< 23 | sz
<< 30); // ldur(*) x(dst),[x(bas),#(off)]
288 arm64_movimm(30, off
); // use x30 for offset
289 o(0x38206800 | dst
| bas
<< 5 | (uint32_t)30 << 16 |
290 (uint32_t)(!!sg
+ 1) << 22 | sz
<< 30); // ldr(*) x(dst),[x(bas),x30]
294 static void arm64_ldrv(int sz_
, int dst
, int bas
, uint64_t off
)
297 if (!(off
& ~((uint32_t)0xfff << sz
)))
298 o(0x3d400000 | dst
| bas
<< 5 | off
<< (10 - sz
) |
299 (sz
& 4) << 21 | (sz
& 3) << 30); // ldr (s|d|q)(dst),[x(bas),#(off)]
300 else if (off
< 256 || -off
<= 256)
301 o(0x3c400000 | dst
| bas
<< 5 | (off
& 511) << 12 |
302 (sz
& 4) << 21 | (sz
& 3) << 30); // ldur (s|d|q)(dst),[x(bas),#(off)]
304 arm64_movimm(30, off
); // use x30 for offset
305 o(0x3c606800 | dst
| bas
<< 5 | (uint32_t)30 << 16 |
306 sz
<< 30 | (sz
& 4) << 21); // ldr (s|d|q)(dst),[x(bas),x30]
310 static void arm64_ldrs(int reg_
, int size
)
313 // Use x30 for intermediate value in some cases.
315 default: assert(0); break;
317 arm64_ldrx(0, 0, reg
, reg
, 0);
320 arm64_ldrx(0, 1, reg
, reg
, 0);
323 arm64_ldrx(0, 1, 30, reg
, 0);
324 arm64_ldrx(0, 0, reg
, reg
, 2);
325 o(0x2a0043c0 | reg
| reg
<< 16); // orr x(reg),x30,x(reg),lsl #16
328 arm64_ldrx(0, 2, reg
, reg
, 0);
331 arm64_ldrx(0, 2, 30, reg
, 0);
332 arm64_ldrx(0, 0, reg
, reg
, 4);
333 o(0xaa0083c0 | reg
| reg
<< 16); // orr x(reg),x30,x(reg),lsl #32
336 arm64_ldrx(0, 2, 30, reg
, 0);
337 arm64_ldrx(0, 1, reg
, reg
, 4);
338 o(0xaa0083c0 | reg
| reg
<< 16); // orr x(reg),x30,x(reg),lsl #32
341 arm64_ldrx(0, 2, 30, reg
, 0);
342 arm64_ldrx(0, 2, reg
, reg
, 3);
343 o(0x53087c00 | reg
| reg
<< 5); // lsr w(reg), w(reg), #8
344 o(0xaa0083c0 | reg
| reg
<< 16); // orr x(reg),x30,x(reg),lsl #32
347 arm64_ldrx(0, 3, reg
, reg
, 0);
350 arm64_ldrx(0, 0, reg
+ 1, reg
, 8);
351 arm64_ldrx(0, 3, reg
, reg
, 0);
354 arm64_ldrx(0, 1, reg
+ 1, reg
, 8);
355 arm64_ldrx(0, 3, reg
, reg
, 0);
358 arm64_ldrx(0, 2, reg
+ 1, reg
, 7);
359 o(0x53087c00 | (reg
+1) | (reg
+1) << 5); // lsr w(reg+1), w(reg+1), #8
360 arm64_ldrx(0, 3, reg
, reg
, 0);
363 arm64_ldrx(0, 2, reg
+ 1, reg
, 8);
364 arm64_ldrx(0, 3, reg
, reg
, 0);
367 arm64_ldrx(0, 3, reg
+ 1, reg
, 5);
368 o(0xd358fc00 | (reg
+1) | (reg
+1) << 5); // lsr x(reg+1), x(reg+1), #24
369 arm64_ldrx(0, 3, reg
, reg
, 0);
372 arm64_ldrx(0, 3, reg
+ 1, reg
, 6);
373 o(0xd350fc00 | (reg
+1) | (reg
+1) << 5); // lsr x(reg+1), x(reg+1), #16
374 arm64_ldrx(0, 3, reg
, reg
, 0);
377 arm64_ldrx(0, 3, reg
+ 1, reg
, 7);
378 o(0xd348fc00 | (reg
+1) | (reg
+1) << 5); // lsr x(reg+1), x(reg+1), #8
379 arm64_ldrx(0, 3, reg
, reg
, 0);
382 o(0xa9400000 | reg
| (reg
+1) << 10 | reg
<< 5);
383 // ldp x(reg),x(reg+1),[x(reg)]
388 static void arm64_strx(int sz_
, int dst
, int bas
, uint64_t off
)
391 if (!(off
& ~((uint32_t)0xfff << sz
)))
392 o(0x39000000 | dst
| bas
<< 5 | off
<< (10 - sz
) | sz
<< 30);
393 // str(*) x(dst),[x(bas],#(off)]
394 else if (off
< 256 || -off
<= 256)
395 o(0x38000000 | dst
| bas
<< 5 | (off
& 511) << 12 | sz
<< 30);
396 // stur(*) x(dst),[x(bas],#(off)]
398 arm64_movimm(30, off
); // use x30 for offset
399 o(0x38206800 | dst
| bas
<< 5 | (uint32_t)30 << 16 | sz
<< 30);
400 // str(*) x(dst),[x(bas),x30]
404 static void arm64_strv(int sz_
, int dst
, int bas
, uint64_t off
)
407 if (!(off
& ~((uint32_t)0xfff << sz
)))
408 o(0x3d000000 | dst
| bas
<< 5 | off
<< (10 - sz
) |
409 (sz
& 4) << 21 | (sz
& 3) << 30); // str (s|d|q)(dst),[x(bas),#(off)]
410 else if (off
< 256 || -off
<= 256)
411 o(0x3c000000 | dst
| bas
<< 5 | (off
& 511) << 12 |
412 (sz
& 4) << 21 | (sz
& 3) << 30); // stur (s|d|q)(dst),[x(bas),#(off)]
414 arm64_movimm(30, off
); // use x30 for offset
415 o(0x3c206800 | dst
| bas
<< 5 | (uint32_t)30 << 16 |
416 sz
<< 30 | (sz
& 4) << 21); // str (s|d|q)(dst),[x(bas),x30]
420 static void arm64_sym(int r
, Sym
*sym
, unsigned long addend
)
422 // Currently TCC's linker does not generate COPY relocations for
423 // STT_OBJECTs when tcc is invoked with "-run". This typically
424 // results in "R_AARCH64_ADR_PREL_PG_HI21 relocation failed" when
425 // a program refers to stdin. A workaround is to avoid that
426 // relocation and use only relocations with unlimited range.
429 if (avoid_adrp
|| (sym
->type
.t
& VT_WEAK
)) {
430 // (GCC uses a R_AARCH64_ABS64 in this case.)
431 greloca(cur_text_section
, sym
, ind
, R_AARCH64_MOVW_UABS_G0_NC
, addend
);
432 o(0xd2800000 | r
); // mov x(rt),#0,lsl #0
433 greloca(cur_text_section
, sym
, ind
, R_AARCH64_MOVW_UABS_G1_NC
, addend
);
434 o(0xf2a00000 | r
); // movk x(rt),#0,lsl #16
435 greloca(cur_text_section
, sym
, ind
, R_AARCH64_MOVW_UABS_G2_NC
, addend
);
436 o(0xf2c00000 | r
); // movk x(rt),#0,lsl #32
437 greloca(cur_text_section
, sym
, ind
, R_AARCH64_MOVW_UABS_G3
, addend
);
438 o(0xf2e00000 | r
); // movk x(rt),#0,lsl #48
441 greloca(cur_text_section
, sym
, ind
, R_AARCH64_ADR_PREL_PG_HI21
, addend
);
443 greloca(cur_text_section
, sym
, ind
, R_AARCH64_ADD_ABS_LO12_NC
, addend
);
444 o(0x91000000 | r
| r
<< 5);
448 ST_FUNC
void load(int r
, SValue
*sv
)
450 int svtt
= sv
->type
.t
;
451 int svr
= sv
->r
& ~VT_LVAL_TYPE
;
452 int svrv
= svr
& VT_VALMASK
;
453 uint64_t svcul
= (uint32_t)sv
->c
.i
;
454 svcul
= svcul
>> 31 & 1 ? svcul
- ((uint64_t)1 << 32) : svcul
;
456 if (svr
== (VT_LOCAL
| VT_LVAL
)) {
458 arm64_ldrv(arm64_type_size(svtt
), fltr(r
), 29, svcul
);
460 arm64_ldrx(!(svtt
& VT_UNSIGNED
), arm64_type_size(svtt
),
465 if ((svr
& ~VT_VALMASK
) == VT_LVAL
&& svrv
< VT_CONST
) {
467 arm64_ldrv(arm64_type_size(svtt
), fltr(r
), intr(svrv
), 0);
469 arm64_ldrx(!(svtt
& VT_UNSIGNED
), arm64_type_size(svtt
),
470 intr(r
), intr(svrv
), 0);
474 if (svr
== (VT_CONST
| VT_LVAL
| VT_SYM
)) {
475 arm64_sym(30, sv
->sym
, svcul
); // use x30 for address
477 arm64_ldrv(arm64_type_size(svtt
), fltr(r
), 30, 0);
479 arm64_ldrx(!(svtt
& VT_UNSIGNED
), arm64_type_size(svtt
),
484 if (svr
== (VT_CONST
| VT_SYM
)) {
485 arm64_sym(intr(r
), sv
->sym
, svcul
);
489 if (svr
== VT_CONST
) {
490 if ((svtt
& VT_BTYPE
) != VT_VOID
)
491 arm64_movimm(intr(r
), arm64_type_size(svtt
) == 3 ?
492 sv
->c
.i
: (uint32_t)svcul
);
496 if (svr
< VT_CONST
) {
497 if (IS_FREG(r
) && IS_FREG(svr
))
498 if (svtt
== VT_LDOUBLE
)
499 o(0x4ea01c00 | fltr(r
) | fltr(svr
) << 5);
500 // mov v(r).16b,v(svr).16b
502 o(0x1e604000 | fltr(r
) | fltr(svr
) << 5); // fmov d(r),d(svr)
503 else if (!IS_FREG(r
) && !IS_FREG(svr
))
504 o(0xaa0003e0 | intr(r
) | intr(svr
) << 16); // mov x(r),x(svr)
510 if (svr
== VT_LOCAL
) {
512 o(0xd10003a0 | intr(r
) | -svcul
<< 10); // sub x(r),x29,#...
514 arm64_movimm(30, -svcul
); // use x30 for offset
515 o(0xcb0003a0 | intr(r
) | (uint32_t)30 << 16); // sub x(r),x29,x30
520 if (svr
== VT_JMP
|| svr
== VT_JMPI
) {
521 int t
= (svr
== VT_JMPI
);
522 arm64_movimm(intr(r
), t
);
523 o(0x14000002); // b .+8
525 arm64_movimm(intr(r
), t
^ 1);
529 if (svr
== (VT_LLOCAL
| VT_LVAL
)) {
530 arm64_ldrx(0, 3, 30, 29, svcul
); // use x30 for offset
532 arm64_ldrv(arm64_type_size(svtt
), fltr(r
), 30, 0);
534 arm64_ldrx(!(svtt
& VT_UNSIGNED
), arm64_type_size(svtt
),
539 printf("load(%x, (%x, %x, %llx))\n", r
, svtt
, sv
->r
, (long long)svcul
);
543 ST_FUNC
void store(int r
, SValue
*sv
)
545 int svtt
= sv
->type
.t
;
546 int svr
= sv
->r
& ~VT_LVAL_TYPE
;
547 int svrv
= svr
& VT_VALMASK
;
548 uint64_t svcul
= (uint32_t)sv
->c
.i
;
549 svcul
= svcul
>> 31 & 1 ? svcul
- ((uint64_t)1 << 32) : svcul
;
551 if (svr
== (VT_LOCAL
| VT_LVAL
)) {
553 arm64_strv(arm64_type_size(svtt
), fltr(r
), 29, svcul
);
555 arm64_strx(arm64_type_size(svtt
), intr(r
), 29, svcul
);
559 if ((svr
& ~VT_VALMASK
) == VT_LVAL
&& svrv
< VT_CONST
) {
561 arm64_strv(arm64_type_size(svtt
), fltr(r
), intr(svrv
), 0);
563 arm64_strx(arm64_type_size(svtt
), intr(r
), intr(svrv
), 0);
567 if (svr
== (VT_CONST
| VT_LVAL
| VT_SYM
)) {
568 arm64_sym(30, sv
->sym
, svcul
); // use x30 for address
570 arm64_strv(arm64_type_size(svtt
), fltr(r
), 30, 0);
572 arm64_strx(arm64_type_size(svtt
), intr(r
), 30, 0);
576 printf("store(%x, (%x, %x, %llx))\n", r
, svtt
, sv
->r
, (long long)svcul
);
580 static void arm64_gen_bl_or_b(int b
)
582 if ((vtop
->r
& (VT_VALMASK
| VT_LVAL
)) == VT_CONST
) {
583 assert(!b
&& (vtop
->r
& VT_SYM
));
584 greloc(cur_text_section
, vtop
->sym
, ind
, R_AARCH64_CALL26
);
585 o(0x94000000); // bl .
588 o(0xd61f0000 | (uint32_t)!b
<< 21 | intr(gv(RC_R30
)) << 5); // br/blr
591 static int arm64_hfa_aux(CType
*type
, int *fsize
, int num
)
593 if (is_float(type
->t
)) {
594 int a
, n
= type_size(type
, &a
);
595 if (num
>= 4 || (*fsize
&& *fsize
!= n
))
600 else if ((type
->t
& VT_BTYPE
) == VT_STRUCT
) {
601 int is_struct
= 0; // rather than union
603 for (field
= type
->ref
->next
; field
; field
= field
->next
)
610 for (field
= type
->ref
->next
; field
; field
= field
->next
) {
611 if (field
->c
!= (num
- num0
) * *fsize
)
613 num
= arm64_hfa_aux(&field
->type
, fsize
, num
);
617 if (type
->ref
->c
!= (num
- num0
) * *fsize
)
623 for (field
= type
->ref
->next
; field
; field
= field
->next
) {
624 int num1
= arm64_hfa_aux(&field
->type
, fsize
, num0
);
627 num
= num1
< num
? num
: num1
;
629 if (type
->ref
->c
!= (num
- num0
) * *fsize
)
634 else if (type
->t
& VT_ARRAY
) {
638 num1
= arm64_hfa_aux(&type
->ref
->type
, fsize
, num
);
639 if (num1
== -1 || (num1
!= num
&& type
->ref
->c
> 4))
641 num1
= num
+ type
->ref
->c
* (num1
- num
);
649 static int arm64_hfa(CType
*type
, int *fsize
)
651 if ((type
->t
& VT_BTYPE
) == VT_STRUCT
|| (type
->t
& VT_ARRAY
)) {
653 int n
= arm64_hfa_aux(type
, &sz
, 0);
654 if (0 < n
&& n
<= 4) {
663 static unsigned long arm64_pcs_aux(int n
, CType
**type
, unsigned long *a
)
665 int nx
= 0; // next integer register
666 int nv
= 0; // next vector register
667 unsigned long ns
= 32; // next stack offset
670 for (i
= 0; i
< n
; i
++) {
671 int hfa
= arm64_hfa(type
[i
], 0);
674 if ((type
[i
]->t
& VT_ARRAY
) ||
675 (type
[i
]->t
& VT_BTYPE
) == VT_FUNC
)
678 size
= type_size(type
[i
], &align
);
683 else if (size
> 16) {
684 // B.3: replace with pointer
686 a
[i
] = nx
++ << 1 | 1;
694 else if ((type
[i
]->t
& VT_BTYPE
) == VT_STRUCT
)
696 size
= (size
+ 7) & ~7;
699 if (is_float(type
[i
]->t
) && nv
< 8) {
700 a
[i
] = 16 + (nv
++ << 1);
705 if (hfa
&& nv
+ hfa
<= 8) {
706 a
[i
] = 16 + (nv
<< 1);
714 size
= (size
+ 7) & ~7;
718 if (hfa
|| (type
[i
]->t
& VT_BTYPE
) == VT_LDOUBLE
) {
720 ns
= (ns
+ align
- 1) & -align
;
724 if ((type
[i
]->t
& VT_BTYPE
) == VT_FLOAT
)
728 if (hfa
|| is_float(type
[i
]->t
)) {
735 if ((type
[i
]->t
& VT_BTYPE
) != VT_STRUCT
&& size
<= 8 && nx
< 8) {
745 if ((type
[i
]->t
& VT_BTYPE
) != VT_STRUCT
&& size
== 16 && nx
< 7) {
752 if ((type
[i
]->t
& VT_BTYPE
) == VT_STRUCT
&& size
<= (8 - nx
) * 8) {
754 nx
+= (size
+ 7) >> 3;
763 ns
= (ns
+ align
- 1) & -align
;
766 if ((type
[i
]->t
& VT_BTYPE
) == VT_STRUCT
) {
784 static unsigned long arm64_pcs(int n
, CType
**type
, unsigned long *a
)
789 if ((type
[0]->t
& VT_BTYPE
) == VT_VOID
)
792 arm64_pcs_aux(1, type
, a
);
793 assert(a
[0] == 0 || a
[0] == 1 || a
[0] == 16);
797 stack
= arm64_pcs_aux(n
, type
+ 1, a
+ 1);
801 for (i
= 0; i
<= n
; i
++) {
803 printf("arm64_pcs return: ");
805 printf("arm64_pcs arg %d: ", i
);
806 if (a
[i
] == (unsigned long)-1)
808 else if (a
[i
] == 1 && !i
)
809 printf("X8 pointer\n");
811 printf("X%lu%s\n", a
[i
] / 2, a
[i
] & 1 ? " pointer" : "");
813 printf("V%lu\n", a
[i
] / 2 - 8);
815 printf("stack %lu%s\n",
816 (a
[i
] - 32) & ~1, a
[i
] & 1 ? " pointer" : "");
823 ST_FUNC
void gfunc_call(int nb_args
)
827 unsigned long *a
, *a1
;
831 return_type
= &vtop
[-nb_args
].type
.ref
->type
;
832 if ((return_type
->t
& VT_BTYPE
) == VT_STRUCT
)
835 t
= tcc_malloc((nb_args
+ 1) * sizeof(*t
));
836 a
= tcc_malloc((nb_args
+ 1) * sizeof(*a
));
837 a1
= tcc_malloc((nb_args
+ 1) * sizeof(*a1
));
840 for (i
= 0; i
< nb_args
; i
++)
841 t
[nb_args
- i
] = &vtop
[-i
].type
;
843 stack
= arm64_pcs(nb_args
, t
, a
);
845 // Allocate space for structs replaced by pointer:
846 for (i
= nb_args
; i
; i
--)
848 SValue
*arg
= &vtop
[i
- nb_args
];
849 int align
, size
= type_size(&arg
->type
, &align
);
850 assert((arg
->type
.t
& VT_BTYPE
) == VT_STRUCT
);
851 stack
= (stack
+ align
- 1) & -align
;
856 stack
= (stack
+ 15) >> 4 << 4;
858 assert(stack
< 0x1000);
860 o(0xd10003ff | stack
<< 10); // sub sp,sp,#(n)
862 // First pass: set all values on stack
863 for (i
= nb_args
; i
; i
--) {
864 vpushv(vtop
- nb_args
+ i
);
867 // struct replaced by pointer
868 int r
= get_reg(RC_INT
);
869 arm64_spoff(intr(r
), a1
[i
]);
870 vset(&vtop
->type
, r
| VT_LVAL
, 0);
876 arm64_spoff(intr(r
), a1
[i
]);
877 arm64_strx(3, intr(r
), 31, (a
[i
] - 32) >> 1 << 1);
880 else if (a
[i
] >= 32) {
882 if ((vtop
->type
.t
& VT_BTYPE
) == VT_STRUCT
) {
883 int r
= get_reg(RC_INT
);
884 arm64_spoff(intr(r
), a
[i
] - 32);
885 vset(&vtop
->type
, r
| VT_LVAL
, 0);
889 else if (is_float(vtop
->type
.t
)) {
891 arm64_strv(arm64_type_size(vtop
[0].type
.t
),
892 fltr(vtop
[0].r
), 31, a
[i
] - 32);
896 arm64_strx(arm64_type_size(vtop
[0].type
.t
),
897 intr(vtop
[0].r
), 31, a
[i
] - 32);
904 // Second pass: assign values to registers
905 for (i
= nb_args
; i
; i
--, vtop
--) {
906 if (a
[i
] < 16 && !(a
[i
] & 1)) {
907 // value in general-purpose registers
908 if ((vtop
->type
.t
& VT_BTYPE
) == VT_STRUCT
) {
909 int align
, size
= type_size(&vtop
->type
, &align
);
910 vtop
->type
.t
= VT_PTR
;
913 arm64_ldrs(a
[i
] / 2, size
);
919 // struct replaced by pointer in register
920 arm64_spoff(a
[i
] / 2, a1
[i
]);
921 else if (a
[i
] < 32) {
922 // value in floating-point registers
923 if ((vtop
->type
.t
& VT_BTYPE
) == VT_STRUCT
) {
924 uint32_t j
, sz
, n
= arm64_hfa(&vtop
->type
, &sz
);
925 vtop
->type
.t
= VT_PTR
;
928 for (j
= 0; j
< n
; j
++)
930 (sz
& 16) << 19 | -(sz
& 8) << 27 | (sz
& 4) << 29 |
932 j
<< 10); // ldr ([sdq])(*),[x30,#(j * sz)]
935 gv(RC_F(a
[i
] / 2 - 8));
939 if ((return_type
->t
& VT_BTYPE
) == VT_STRUCT
) {
941 // indirect return: set x8 and discard the stack value
946 // return in registers: keep the address for after the call
951 arm64_gen_bl_or_b(0);
954 o(0x910003ff | stack
<< 10); // add sp,sp,#(n)
957 int rt
= return_type
->t
;
958 int bt
= rt
& VT_BTYPE
;
959 if (bt
== VT_BYTE
|| bt
== VT_SHORT
)
960 // Promote small integers:
961 o(0x13001c00 | (bt
== VT_SHORT
) << 13 |
962 (uint32_t)!!(rt
& VT_UNSIGNED
) << 30); // [su]xt[bh] w0,w0
963 else if (bt
== VT_STRUCT
&& !(a
[0] & 1)) {
964 // A struct was returned in registers, so write it out:
968 int align
, size
= type_size(return_type
, &align
);
971 o(0xa9000500); // stp x0,x1,[x8]
973 arm64_strx(size
> 4 ? 3 : size
> 2 ? 2 : size
> 1, 0, 8, 0);
976 else if (a
[0] == 16) {
977 uint32_t j
, sz
, n
= arm64_hfa(return_type
, &sz
);
978 for (j
= 0; j
< n
; j
++)
980 (sz
& 16) << 19 | -(sz
& 8) << 27 | (sz
& 4) << 29 |
982 j
<< 10); // str ([sdq])(*),[x8,#(j * sz)]
992 static unsigned long arm64_func_va_list_stack
;
993 static int arm64_func_va_list_gr_offs
;
994 static int arm64_func_va_list_vr_offs
;
995 static int arm64_func_sub_sp_offset
;
997 ST_FUNC
void gfunc_prolog(CType
*func_type
)
1005 // Why doesn't the caller (gen_function) set func_vt?
1006 func_vt
= func_type
->ref
->type
;
1007 func_vc
= 144; // offset of where x8 is stored
1009 for (sym
= func_type
->ref
; sym
; sym
= sym
->next
)
1011 t
= tcc_malloc(n
* sizeof(*t
));
1012 a
= tcc_malloc(n
* sizeof(*a
));
1014 for (sym
= func_type
->ref
; sym
; sym
= sym
->next
)
1015 t
[i
++] = &sym
->type
;
1017 arm64_func_va_list_stack
= arm64_pcs(n
- 1, t
, a
);
1019 o(0xa9b27bfd); // stp x29,x30,[sp,#-224]!
1020 o(0xad0087e0); // stp q0,q1,[sp,#16]
1021 o(0xad018fe2); // stp q2,q3,[sp,#48]
1022 o(0xad0297e4); // stp q4,q5,[sp,#80]
1023 o(0xad039fe6); // stp q6,q7,[sp,#112]
1024 o(0xa90923e8); // stp x8,x8,[sp,#144]
1025 o(0xa90a07e0); // stp x0,x1,[sp,#160]
1026 o(0xa90b0fe2); // stp x2,x3,[sp,#176]
1027 o(0xa90c17e4); // stp x4,x5,[sp,#192]
1028 o(0xa90d1fe6); // stp x6,x7,[sp,#208]
1030 arm64_func_va_list_gr_offs
= -64;
1031 arm64_func_va_list_vr_offs
= -128;
1033 for (i
= 1, sym
= func_type
->ref
->next
; sym
; i
++, sym
= sym
->next
) {
1034 int off
= (a
[i
] < 16 ? 160 + a
[i
] / 2 * 8 :
1035 a
[i
] < 32 ? 16 + (a
[i
] - 16) / 2 * 16 :
1036 224 + ((a
[i
] - 32) >> 1 << 1));
1037 sym_push(sym
->v
& ~SYM_FIELD
, &sym
->type
,
1038 (a
[i
] & 1 ? VT_LLOCAL
: VT_LOCAL
) | lvalue_type(sym
->type
.t
),
1042 int align
, size
= type_size(&sym
->type
, &align
);
1043 arm64_func_va_list_gr_offs
= (a
[i
] / 2 - 7 +
1044 (!(a
[i
] & 1) && size
> 8)) * 8;
1046 else if (a
[i
] < 32) {
1047 uint32_t hfa
= arm64_hfa(&sym
->type
, 0);
1048 arm64_func_va_list_vr_offs
= (a
[i
] / 2 - 16 +
1049 (hfa
? hfa
: 1)) * 16;
1052 // HFAs of float and double need to be written differently:
1053 if (16 <= a
[i
] && a
[i
] < 32 && (sym
->type
.t
& VT_BTYPE
) == VT_STRUCT
) {
1054 uint32_t j
, sz
, k
= arm64_hfa(&sym
->type
, &sz
);
1056 for (j
= 0; j
< k
; j
++) {
1057 o(0x3d0003e0 | -(sz
& 8) << 27 | (sz
& 4) << 29 |
1058 ((a
[i
] - 16) / 2 + j
) | (off
/ sz
+ j
) << 10);
1059 // str ([sdq])(*),[sp,#(j * sz)]
1067 o(0x910003fd); // mov x29,sp
1068 arm64_func_sub_sp_offset
= ind
;
1069 // In gfunc_epilog these will be replaced with code to decrement SP:
1070 o(0xd503201f); // nop
1071 o(0xd503201f); // nop
1075 ST_FUNC
void gen_va_start(void)
1078 --vtop
; // we don't need the "arg"
1080 r
= intr(gv(RC_INT
));
1082 if (arm64_func_va_list_stack
) {
1083 //xx could use add (immediate) here
1084 arm64_movimm(30, arm64_func_va_list_stack
+ 224);
1085 o(0x8b1e03be); // add x30,x29,x30
1088 o(0x910383be); // add x30,x29,#224
1089 o(0xf900001e | r
<< 5); // str x30,[x(r)]
1091 if (arm64_func_va_list_gr_offs
) {
1092 if (arm64_func_va_list_stack
)
1093 o(0x910383be); // add x30,x29,#224
1094 o(0xf900041e | r
<< 5); // str x30,[x(r),#8]
1097 if (arm64_func_va_list_vr_offs
) {
1098 o(0x910243be); // add x30,x29,#144
1099 o(0xf900081e | r
<< 5); // str x30,[x(r),#16]
1102 arm64_movimm(30, arm64_func_va_list_gr_offs
);
1103 o(0xb900181e | r
<< 5); // str w30,[x(r),#24]
1105 arm64_movimm(30, arm64_func_va_list_vr_offs
);
1106 o(0xb9001c1e | r
<< 5); // str w30,[x(r),#28]
1111 ST_FUNC
void gen_va_arg(CType
*t
)
1113 int align
, size
= type_size(t
, &align
);
1114 int fsize
, hfa
= arm64_hfa(t
, &fsize
);
1117 if (is_float(t
->t
)) {
1123 r0
= intr(gv(RC_INT
));
1124 r1
= get_reg(RC_INT
);
1125 vtop
[0].r
= r1
| lvalue_type(t
->t
);
1129 uint32_t n
= size
> 16 ? 8 : (size
+ 7) & -8;
1130 o(0xb940181e | r0
<< 5); // ldr w30,[x(r0),#24] // __gr_offs
1132 assert(0); // this path untested but needed for __uint128_t
1133 o(0x11003fde); // add w30,w30,#15
1134 o(0x121c6fde); // and w30,w30,#-16
1136 o(0x310003c0 | r1
| n
<< 10); // adds w(r1),w30,#(n)
1137 o(0x540000ad); // b.le .+20
1138 o(0xf9400000 | r1
| r0
<< 5); // ldr x(r1),[x(r0)] // __stack
1139 o(0x9100001e | r1
<< 5 | n
<< 10); // add x30,x(r1),#(n)
1140 o(0xf900001e | r0
<< 5); // str x30,[x(r0)] // __stack
1141 o(0x14000004); // b .+16
1142 o(0xb9001800 | r1
| r0
<< 5); // str w(r1),[x(r0),#24] // __gr_offs
1143 o(0xf9400400 | r1
| r0
<< 5); // ldr x(r1),[x(r0),#8] // __gr_top
1144 o(0x8b3ec000 | r1
| r1
<< 5); // add x(r1),x(r1),w30,sxtw
1146 o(0xf9400000 | r1
| r1
<< 5); // ldr x(r1),[x(r1)]
1149 uint32_t rsz
= hfa
<< 4;
1150 uint32_t ssz
= (size
+ 7) & -(uint32_t)8;
1152 o(0xb9401c1e | r0
<< 5); // ldr w30,[x(r0),#28] // __vr_offs
1153 o(0x310003c0 | r1
| rsz
<< 10); // adds w(r1),w30,#(rsz)
1154 b1
= ind
; o(0x5400000d); // b.le lab1
1155 o(0xf9400000 | r1
| r0
<< 5); // ldr x(r1),[x(r0)] // __stack
1157 o(0x91003c00 | r1
| r1
<< 5); // add x(r1),x(r1),#15
1158 o(0x927cec00 | r1
| r1
<< 5); // and x(r1),x(r1),#-16
1160 o(0x9100001e | r1
<< 5 | ssz
<< 10); // add x30,x(r1),#(ssz)
1161 o(0xf900001e | r0
<< 5); // str x30,[x(r0)] // __stack
1162 b2
= ind
; o(0x14000000); // b lab2
1164 write32le(cur_text_section
->data
+ b1
, 0x5400000d | (ind
- b1
) << 3);
1165 o(0xb9001c00 | r1
| r0
<< 5); // str w(r1),[x(r0),#28] // __vr_offs
1166 o(0xf9400800 | r1
| r0
<< 5); // ldr x(r1),[x(r0),#16] // __vr_top
1167 if (hfa
== 1 || fsize
== 16)
1168 o(0x8b3ec000 | r1
| r1
<< 5); // add x(r1),x(r1),w30,sxtw
1170 // We need to change the layout of this HFA.
1171 // Get some space on the stack using global variable "loc":
1172 loc
= (loc
- size
) & -(uint32_t)align
;
1173 o(0x8b3ec000 | 30 | r1
<< 5); // add x30,x(r1),w30,sxtw
1174 arm64_movimm(r1
, loc
);
1175 o(0x8b0003a0 | r1
| r1
<< 16); // add x(r1),x29,x(r1)
1176 o(0x4c402bdc | (uint32_t)fsize
<< 7 |
1177 (uint32_t)(hfa
== 2) << 15 |
1178 (uint32_t)(hfa
== 3) << 14); // ld1 {v28.(4s|2d),...},[x30]
1179 o(0x0d00801c | r1
<< 5 | (fsize
== 8) << 10 |
1180 (uint32_t)(hfa
!= 2) << 13 |
1181 (uint32_t)(hfa
!= 3) << 21); // st(hfa) {v28.(s|d),...}[0],[x(r1)]
1184 write32le(cur_text_section
->data
+ b2
, 0x14000000 | (ind
- b2
) >> 2);
1188 ST_FUNC
int gfunc_sret(CType
*vt
, int variadic
, CType
*ret
,
1189 int *align
, int *regsize
)
1194 ST_FUNC
void greturn(void)
1196 CType
*t
= &func_vt
;
1199 arm64_pcs(0, &t
, &a
);
1204 if ((func_vt
.t
& VT_BTYPE
) == VT_STRUCT
) {
1205 int align
, size
= type_size(&func_vt
, &align
);
1208 arm64_ldrs(0, size
);
1214 CType type
= func_vt
;
1216 vset(&type
, VT_LOCAL
| VT_LVAL
, func_vc
);
1223 if ((func_vt
.t
& VT_BTYPE
) == VT_STRUCT
) {
1224 uint32_t j
, sz
, n
= arm64_hfa(&vtop
->type
, &sz
);
1227 for (j
= 0; j
< n
; j
++)
1229 (sz
& 16) << 19 | -(sz
& 8) << 27 | (sz
& 4) << 29 |
1230 j
| j
<< 10); // ldr ([sdq])(*),[x0,#(j * sz)]
1240 ST_FUNC
void gfunc_epilog(void)
1243 // Insert instructions to subtract size of stack frame from SP.
1244 unsigned char *ptr
= cur_text_section
->data
+ arm64_func_sub_sp_offset
;
1245 uint64_t diff
= (-loc
+ 15) & ~15;
1246 if (!(diff
>> 24)) {
1247 if (diff
& 0xfff) // sub sp,sp,#(diff & 0xfff)
1248 write32le(ptr
, 0xd10003ff | (diff
& 0xfff) << 10);
1249 if (diff
>> 12) // sub sp,sp,#(diff >> 12),lsl #12
1250 write32le(ptr
+ 4, 0xd14003ff | (diff
>> 12) << 10);
1253 // In this case we may subtract more than necessary,
1254 // but always less than 17/16 of what we were aiming for.
1257 while (diff
>> 20) {
1258 diff
= (diff
+ 0xffff) >> 16;
1261 while (diff
>> 16) {
1262 diff
= (diff
+ 1) >> 1;
1265 write32le(ptr
, 0xd2800010 | diff
<< 5 | i
<< 21);
1266 // mov x16,#(diff),lsl #(16 * i)
1267 write32le(ptr
+ 4, 0xcb3063ff | j
<< 10);
1268 // sub sp,sp,x16,lsl #(j)
1271 o(0x910003bf); // mov sp,x29
1272 o(0xa8ce7bfd); // ldp x29,x30,[sp],#224
1274 o(0xd65f03c0); // ret
1277 // Generate forward branch to label:
1278 ST_FUNC
int gjmp(int t
)
1285 // Generate branch to known address:
1286 ST_FUNC
void gjmp_addr(int a
)
1288 assert(a
- ind
+ 0x8000000 < 0x10000000);
1289 o(0x14000000 | ((a
- ind
) >> 2 & 0x3ffffff));
1292 ST_FUNC
int gtst(int inv
, int t
)
1294 int bt
= vtop
->type
.t
& VT_BTYPE
;
1295 if (bt
== VT_LDOUBLE
) {
1296 uint32_t a
, b
, f
= fltr(gv(RC_FLOAT
));
1297 a
= get_reg(RC_INT
);
1300 b
= get_reg(RC_INT
);
1303 o(0x4e083c00 | a
| f
<< 5); // mov x(a),v(f).d[0]
1304 o(0x4e183c00 | b
| f
<< 5); // mov x(b),v(f).d[1]
1305 o(0xaa000400 | a
| a
<< 5 | b
<< 16); // orr x(a),x(a),x(b),lsl #1
1306 o(0xb4000040 | a
| !!inv
<< 24); // cbz/cbnz x(a),.+8
1309 else if (bt
== VT_FLOAT
|| bt
== VT_DOUBLE
) {
1310 uint32_t a
= fltr(gv(RC_FLOAT
));
1311 o(0x1e202008 | a
<< 5 | (bt
!= VT_FLOAT
) << 22); // fcmp
1312 o(0x54000040 | !!inv
); // b.eq/b.ne .+8
1315 uint32_t ll
= (bt
== VT_PTR
|| bt
== VT_LLONG
);
1316 uint32_t a
= intr(gv(RC_INT
));
1317 o(0x34000040 | a
| !!inv
<< 24 | ll
<< 31); // cbz/cbnz wA,.+8
1323 static int arm64_iconst(uint64_t *val
, SValue
*sv
)
1325 if ((sv
->r
& (VT_VALMASK
| VT_LVAL
| VT_SYM
)) != VT_CONST
)
1329 *val
= ((t
& VT_BTYPE
) == VT_LLONG
? sv
->c
.i
:
1331 (t
& VT_UNSIGNED
? 0 : -(sv
->c
.i
& 0x80000000)));
1336 static int arm64_gen_opic(int op
, uint32_t l
, int rev
, uint64_t val
,
1337 uint32_t x
, uint32_t a
)
1339 if (op
== '-' && !rev
) {
1343 val
= l
? val
: (uint32_t)val
;
1348 uint32_t s
= l
? val
>> 63 : val
>> 31;
1349 val
= s
? -val
: val
;
1350 val
= l
? val
: (uint32_t)val
;
1351 if (!(val
& ~(uint64_t)0xfff))
1352 o(0x11000000 | l
<< 31 | s
<< 30 | x
| a
<< 5 | val
<< 10);
1353 else if (!(val
& ~(uint64_t)0xfff000))
1354 o(0x11400000 | l
<< 31 | s
<< 30 | x
| a
<< 5 | val
>> 12 << 10);
1356 arm64_movimm(30, val
); // use x30
1357 o(0x0b1e0000 | l
<< 31 | s
<< 30 | x
| a
<< 5);
1364 o(0x4b0003e0 | l
<< 31 | x
| a
<< 16); // neg
1365 else if (val
== (l
? (uint64_t)-1 : (uint32_t)-1))
1366 o(0x2a2003e0 | l
<< 31 | x
| a
<< 16); // mvn
1368 arm64_movimm(30, val
); // use x30
1369 o(0x4b0003c0 | l
<< 31 | x
| a
<< 16); // sub
1374 if (val
== -1 || (val
== 0xffffffff && !l
)) {
1375 o(0x2a2003e0 | l
<< 31 | x
| a
<< 16); // mvn
1381 int e
= arm64_encode_bimm64(l
? val
: val
| val
<< 32);
1384 o((op
== '&' ? 0x12000000 :
1385 op
== '|' ? 0x32000000 : 0x52000000) |
1386 l
<< 31 | x
| a
<< 5 | (uint32_t)e
<< 10);
1393 uint32_t n
= 32 << l
;
1394 val
= val
& (n
- 1);
1399 else if (op
== TOK_SHL
)
1400 o(0x53000000 | l
<< 31 | l
<< 22 | x
| a
<< 5 |
1401 (n
- val
) << 16 | (n
- 1 - val
) << 10); // lsl
1403 o(0x13000000 | (op
== TOK_SHR
) << 30 | l
<< 31 | l
<< 22 |
1404 x
| a
<< 5 | val
<< 16 | (n
- 1) << 10); // lsr/asr
1412 static void arm64_gen_opil(int op
, uint32_t l
)
1416 // Special treatment for operations with a constant operand:
1421 if (arm64_iconst(0, &vtop
[0])) {
1425 if (arm64_iconst(&val
, &vtop
[-1])) {
1427 a
= intr(vtop
[0].r
);
1429 x
= get_reg(RC_INT
);
1431 if (arm64_gen_opic(op
, l
, rev
, val
, intr(x
), a
)) {
1442 gv2(RC_INT
, RC_INT
);
1443 assert(vtop
[-1].r
< VT_CONST
&& vtop
[0].r
< VT_CONST
);
1444 a
= intr(vtop
[-1].r
);
1445 b
= intr(vtop
[0].r
);
1447 x
= get_reg(RC_INT
);
1454 // Use x30 for quotient:
1455 o(0x1ac00c00 | l
<< 31 | 30 | a
<< 5 | b
<< 16); // sdiv
1456 o(0x1b008000 | l
<< 31 | x
| (uint32_t)30 << 5 |
1457 b
<< 16 | a
<< 10); // msub
1460 o(0x0a000000 | l
<< 31 | x
| a
<< 5 | b
<< 16); // and
1463 o(0x1b007c00 | l
<< 31 | x
| a
<< 5 | b
<< 16); // mul
1466 o(0x0b000000 | l
<< 31 | x
| a
<< 5 | b
<< 16); // add
1469 o(0x4b000000 | l
<< 31 | x
| a
<< 5 | b
<< 16); // sub
1472 o(0x1ac00c00 | l
<< 31 | x
| a
<< 5 | b
<< 16); // sdiv
1475 o(0x4a000000 | l
<< 31 | x
| a
<< 5 | b
<< 16); // eor
1478 o(0x2a000000 | l
<< 31 | x
| a
<< 5 | b
<< 16); // orr
1481 o(0x6b00001f | l
<< 31 | a
<< 5 | b
<< 16); // cmp
1482 o(0x1a9f17e0 | x
); // cset wA,eq
1485 o(0x6b00001f | l
<< 31 | a
<< 5 | b
<< 16); // cmp
1486 o(0x1a9fb7e0 | x
); // cset wA,ge
1489 o(0x6b00001f | l
<< 31 | a
<< 5 | b
<< 16); // cmp
1490 o(0x1a9fd7e0 | x
); // cset wA,gt
1493 o(0x6b00001f | l
<< 31 | a
<< 5 | b
<< 16); // cmp
1494 o(0x1a9fc7e0 | x
); // cset wA,le
1497 o(0x6b00001f | l
<< 31 | a
<< 5 | b
<< 16); // cmp
1498 o(0x1a9fa7e0 | x
); // cset wA,lt
1501 o(0x6b00001f | l
<< 31 | a
<< 5 | b
<< 16); // cmp
1502 o(0x1a9f07e0 | x
); // cset wA,ne
1505 o(0x1ac02800 | l
<< 31 | x
| a
<< 5 | b
<< 16); // asr
1508 o(0x1ac02000 | l
<< 31 | x
| a
<< 5 | b
<< 16); // lsl
1511 o(0x1ac02400 | l
<< 31 | x
| a
<< 5 | b
<< 16); // lsr
1515 o(0x1ac00800 | l
<< 31 | x
| a
<< 5 | b
<< 16); // udiv
1518 o(0x6b00001f | l
<< 31 | a
<< 5 | b
<< 16); // cmp
1519 o(0x1a9f37e0 | x
); // cset wA,cs
1522 o(0x6b00001f | l
<< 31 | a
<< 5 | b
<< 16); // cmp
1523 o(0x1a9f97e0 | x
); // cset wA,hi
1526 o(0x6b00001f | l
<< 31 | a
<< 5 | b
<< 16); // cmp
1527 o(0x1a9f27e0 | x
); // cset wA,cc
1530 o(0x6b00001f | l
<< 31 | a
<< 5 | b
<< 16); // cmp
1531 o(0x1a9f87e0 | x
); // cset wA,ls
1534 // Use x30 for quotient:
1535 o(0x1ac00800 | l
<< 31 | 30 | a
<< 5 | b
<< 16); // udiv
1536 o(0x1b008000 | l
<< 31 | x
| (uint32_t)30 << 5 |
1537 b
<< 16 | a
<< 10); // msub
1544 ST_FUNC
void gen_opi(int op
)
1546 arm64_gen_opil(op
, 0);
1549 ST_FUNC
void gen_opl(int op
)
1551 arm64_gen_opil(op
, 1);
1554 ST_FUNC
void gen_opf(int op
)
1556 uint32_t x
, a
, b
, dbl
;
1558 if (vtop
[0].type
.t
== VT_LDOUBLE
) {
1559 CType type
= vtop
[0].type
;
1563 case '*': func
= TOK___multf3
; break;
1564 case '+': func
= TOK___addtf3
; break;
1565 case '-': func
= TOK___subtf3
; break;
1566 case '/': func
= TOK___divtf3
; break;
1567 case TOK_EQ
: func
= TOK___eqtf2
; cond
= 1; break;
1568 case TOK_NE
: func
= TOK___netf2
; cond
= 0; break;
1569 case TOK_LT
: func
= TOK___lttf2
; cond
= 10; break;
1570 case TOK_GE
: func
= TOK___getf2
; cond
= 11; break;
1571 case TOK_LE
: func
= TOK___letf2
; cond
= 12; break;
1572 case TOK_GT
: func
= TOK___gttf2
; cond
= 13; break;
1573 default: assert(0); break;
1575 vpush_global_sym(&func_old_type
, func
);
1579 vtop
->r
= cond
< 0 ? REG_FRET
: REG_IRET
;
1583 o(0x7100001f); // cmp w0,#0
1584 o(0x1a9f07e0 | (uint32_t)cond
<< 12); // cset w0,(cond)
1589 dbl
= vtop
[0].type
.t
!= VT_FLOAT
;
1590 gv2(RC_FLOAT
, RC_FLOAT
);
1591 assert(vtop
[-1].r
< VT_CONST
&& vtop
[0].r
< VT_CONST
);
1592 a
= fltr(vtop
[-1].r
);
1593 b
= fltr(vtop
[0].r
);
1596 case TOK_EQ
: case TOK_NE
:
1597 case TOK_LT
: case TOK_GE
: case TOK_LE
: case TOK_GT
:
1598 x
= get_reg(RC_INT
);
1604 x
= get_reg(RC_FLOAT
);
1613 o(0x1e200800 | dbl
<< 22 | x
| a
<< 5 | b
<< 16); // fmul
1616 o(0x1e202800 | dbl
<< 22 | x
| a
<< 5 | b
<< 16); // fadd
1619 o(0x1e203800 | dbl
<< 22 | x
| a
<< 5 | b
<< 16); // fsub
1622 o(0x1e201800 | dbl
<< 22 | x
| a
<< 5 | b
<< 16); // fdiv
1625 o(0x1e202000 | dbl
<< 22 | a
<< 5 | b
<< 16); // fcmp
1626 o(0x1a9f17e0 | x
); // cset w(x),eq
1629 o(0x1e202000 | dbl
<< 22 | a
<< 5 | b
<< 16); // fcmp
1630 o(0x1a9fb7e0 | x
); // cset w(x),ge
1633 o(0x1e202000 | dbl
<< 22 | a
<< 5 | b
<< 16); // fcmp
1634 o(0x1a9fd7e0 | x
); // cset w(x),gt
1637 o(0x1e202000 | dbl
<< 22 | a
<< 5 | b
<< 16); // fcmp
1638 o(0x1a9f87e0 | x
); // cset w(x),ls
1641 o(0x1e202000 | dbl
<< 22 | a
<< 5 | b
<< 16); // fcmp
1642 o(0x1a9f57e0 | x
); // cset w(x),mi
1645 o(0x1e202000 | dbl
<< 22 | a
<< 5 | b
<< 16); // fcmp
1646 o(0x1a9f07e0 | x
); // cset w(x),ne
1653 // Generate sign extension from 32 to 64 bits:
1654 ST_FUNC
void gen_cvt_sxtw(void)
1656 uint32_t r
= intr(gv(RC_INT
));
1657 o(0x93407c00 | r
| r
<< 5); // sxtw x(r),w(r)
1660 ST_FUNC
void gen_cvt_itof(int t
)
1662 if (t
== VT_LDOUBLE
) {
1663 int f
= vtop
->type
.t
;
1664 int func
= (f
& VT_BTYPE
) == VT_LLONG
?
1665 (f
& VT_UNSIGNED
? TOK___floatunditf
: TOK___floatditf
) :
1666 (f
& VT_UNSIGNED
? TOK___floatunsitf
: TOK___floatsitf
);
1667 vpush_global_sym(&func_old_type
, func
);
1676 int d
, n
= intr(gv(RC_INT
));
1677 int s
= !(vtop
->type
.t
& VT_UNSIGNED
);
1678 uint32_t l
= ((vtop
->type
.t
& VT_BTYPE
) == VT_LLONG
);
1680 d
= get_reg(RC_FLOAT
);
1683 o(0x1e220000 | (uint32_t)!s
<< 16 |
1684 (uint32_t)(t
!= VT_FLOAT
) << 22 | fltr(d
) |
1685 l
<< 31 | n
<< 5); // [us]cvtf [sd](d),[wx](n)
1689 ST_FUNC
void gen_cvt_ftoi(int t
)
1691 if ((vtop
->type
.t
& VT_BTYPE
) == VT_LDOUBLE
) {
1692 int func
= (t
& VT_BTYPE
) == VT_LLONG
?
1693 (t
& VT_UNSIGNED
? TOK___fixunstfdi
: TOK___fixtfdi
) :
1694 (t
& VT_UNSIGNED
? TOK___fixunstfsi
: TOK___fixtfsi
);
1695 vpush_global_sym(&func_old_type
, func
);
1704 int d
, n
= fltr(gv(RC_FLOAT
));
1705 uint32_t l
= ((vtop
->type
.t
& VT_BTYPE
) != VT_FLOAT
);
1707 d
= get_reg(RC_INT
);
1711 (uint32_t)!!(t
& VT_UNSIGNED
) << 16 |
1712 (uint32_t)((t
& VT_BTYPE
) == VT_LLONG
) << 31 | intr(d
) |
1713 l
<< 22 | n
<< 5); // fcvtz[su] [wx](d),[sd](n)
1717 ST_FUNC
void gen_cvt_ftof(int t
)
1719 int f
= vtop
[0].type
.t
;
1720 assert(t
== VT_FLOAT
|| t
== VT_DOUBLE
|| t
== VT_LDOUBLE
);
1721 assert(f
== VT_FLOAT
|| f
== VT_DOUBLE
|| f
== VT_LDOUBLE
);
1725 if (t
== VT_LDOUBLE
|| f
== VT_LDOUBLE
) {
1726 int func
= (t
== VT_LDOUBLE
) ?
1727 (f
== VT_FLOAT
? TOK___extendsftf2
: TOK___extenddftf2
) :
1728 (t
== VT_FLOAT
? TOK___trunctfsf2
: TOK___trunctfdf2
);
1729 vpush_global_sym(&func_old_type
, func
);
1739 assert(vtop
[0].r
< VT_CONST
);
1740 a
= fltr(vtop
[0].r
);
1742 x
= get_reg(RC_FLOAT
);
1748 o(0x1e22c000 | x
| a
<< 5); // fcvt d(x),s(a)
1750 o(0x1e624000 | x
| a
<< 5); // fcvt s(x),d(a)
1754 ST_FUNC
void ggoto(void)
1756 arm64_gen_bl_or_b(1);
1760 ST_FUNC
void gen_clear_cache(void)
1762 uint32_t beg
, end
, dsz
, isz
, p
, lab1
, b1
;
1763 gv2(RC_INT
, RC_INT
);
1765 vtop
->r
= get_reg(RC_INT
);
1767 vtop
->r
= get_reg(RC_INT
);
1769 vtop
->r
= get_reg(RC_INT
);
1770 beg
= intr(vtop
[-4].r
); // x0
1771 end
= intr(vtop
[-3].r
); // x1
1772 dsz
= intr(vtop
[-2].r
); // x2
1773 isz
= intr(vtop
[-1].r
); // x3
1774 p
= intr(vtop
[0].r
); // x4
1777 o(0xd53b0020 | isz
); // mrs x(isz),ctr_el0
1778 o(0x52800080 | p
); // mov w(p),#4
1779 o(0x53104c00 | dsz
| isz
<< 5); // ubfx w(dsz),w(isz),#16,#4
1780 o(0x1ac02000 | dsz
| p
<< 5 | dsz
<< 16); // lsl w(dsz),w(p),w(dsz)
1781 o(0x12000c00 | isz
| isz
<< 5); // and w(isz),w(isz),#15
1782 o(0x1ac02000 | isz
| p
<< 5 | isz
<< 16); // lsl w(isz),w(p),w(isz)
1783 o(0x51000400 | p
| dsz
<< 5); // sub w(p),w(dsz),#1
1784 o(0x8a240004 | p
| beg
<< 5 | p
<< 16); // bic x(p),x(beg),x(p)
1785 b1
= ind
; o(0x14000000); // b
1787 o(0xd50b7b20 | p
); // dc cvau,x(p)
1788 o(0x8b000000 | p
| p
<< 5 | dsz
<< 16); // add x(p),x(p),x(dsz)
1789 write32le(cur_text_section
->data
+ b1
, 0x14000000 | (ind
- b1
) >> 2);
1790 o(0xeb00001f | p
<< 5 | end
<< 16); // cmp x(p),x(end)
1791 o(0x54ffffa3 | ((lab1
- ind
) << 3 & 0xffffe0)); // b.cc lab1
1792 o(0xd5033b9f); // dsb ish
1793 o(0x51000400 | p
| isz
<< 5); // sub w(p),w(isz),#1
1794 o(0x8a240004 | p
| beg
<< 5 | p
<< 16); // bic x(p),x(beg),x(p)
1795 b1
= ind
; o(0x14000000); // b
1797 o(0xd50b7520 | p
); // ic ivau,x(p)
1798 o(0x8b000000 | p
| p
<< 5 | isz
<< 16); // add x(p),x(p),x(isz)
1799 write32le(cur_text_section
->data
+ b1
, 0x14000000 | (ind
- b1
) >> 2);
1800 o(0xeb00001f | p
<< 5 | end
<< 16); // cmp x(p),x(end)
1801 o(0x54ffffa3 | ((lab1
- ind
) << 3 & 0xffffe0)); // b.cc lab1
1802 o(0xd5033b9f); // dsb ish
1803 o(0xd5033fdf); // isb
1806 ST_FUNC
void gen_vla_sp_save(int addr
) {
1807 uint32_t r
= intr(get_reg(RC_INT
));
1808 o(0x910003e0 | r
); // mov x(r),sp
1809 arm64_strx(3, r
, 29, addr
);
1812 ST_FUNC
void gen_vla_sp_restore(int addr
) {
1813 // Use x30 because this function can be called when there
1814 // is a live return value in x0 but there is nothing on
1815 // the value stack to prevent get_reg from returning x0.
1817 arm64_ldrx(0, 3, r
, 29, addr
);
1818 o(0x9100001f | r
<< 5); // mov sp,x(r)
1821 ST_FUNC
void gen_vla_alloc(CType
*type
, int align
) {
1822 uint32_t r
= intr(gv(RC_INT
));
1823 o(0x91003c00 | r
| r
<< 5); // add x(r),x(r),#15
1824 o(0x927cec00 | r
| r
<< 5); // bic x(r),x(r),#15
1825 o(0xcb2063ff | r
<< 16); // sub sp,sp,x(r)
1829 /* end of A64 code generator */
1830 /*************************************************************/
1832 /*************************************************************/