release/src/router/nettle/arm/neon/umac-nh.asm

   1 C nettle, low-level cryptographics library
   2 C
   3 C Copyright (C) 2013 Niels Möller
   4 C
   5 C The nettle library is free software; you can redistribute it and/or modify
   6 C it under the terms of the GNU Lesser General Public License as published by
   7 C the Free Software Foundation; either version 2.1 of the License, or (at your
   8 C option) any later version.
   9 C
  10 C The nettle library is distributed in the hope that it will be useful, but
  11 C WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  12 C or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU Lesser General Public
  13 C License for more details.
  14 C
  15 C You should have received a copy of the GNU Lesser General Public License
  16 C along with the nettle library; see the file COPYING.LIB.  If not, write to
  17 C the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  18 C MA 02111-1301, USA.
  19
  20         .file "umac-nh.asm"
  21         .fpu    neon
  22
  23 define(<KEY>, <r0>)
  24 define(<LENGTH>, <r1>)
  25 define(<MSG>, <r2>)
  26 define(<SHIFT>, <r3>)
  27
  28 define(<QA>, <q0>)
  29 define(<QB>, <q1>)
  30 define(<DM>, <d16>)
  31 define(<QLEFT>, <q9>)
  32 define(<QRIGHT>, <q10>)
  33 define(<QY>, <q11>)
  34 define(<QT0>, <q12>)
  35 define(<QT1>, <q13>)
  36 define(<QK0>, <q14>)
  37 define(<QK1>, <q15>)
  38
  39         .text
  40         .align  3
  41
  42 PROLOGUE(_nettle_umac_nh)
  43         C Setup for 64-bit aligned reads
  44         ands    SHIFT, MSG, #7
  45         and     MSG, MSG, #-8
  46         vld1.8  {DM}, [MSG :64]
  47         addne   MSG, MSG, #8
  48         addeq   SHIFT, SHIFT, #8
  49
  50         C FIXME: Combine as rsb ?
  51         lsl     SHIFT, SHIFT, #3
  52         neg     SHIFT, SHIFT
  53
  54         C Right shift in QRIGHT (both halves)
  55         vmov.i32 D0REG(QRIGHT)[0], SHIFT
  56         vmov.32  D1REG(QRIGHT), D0REG(QRIGHT)
  57         add     SHIFT, SHIFT, #64
  58
  59         vmov.i32 D0REG(QLEFT)[0], SHIFT
  60         vmov.32  D1REG(QLEFT), D0REG(QLEFT)
  61
  62         vmov.i64 QY, #0
  63
  64         vshl.u64 DM, DM, D0REG(QRIGHT)
  65 .Loop:
  66         C Set m[i] <-- m[i-1] >> RSHIFT + m[i] << LSHIFT
  67         vld1.8 {QA, QB}, [MSG :64]!
  68         vshl.u64 QT0, QA, QRIGHT
  69         vshl.u64 QT1, QB, QRIGHT
  70         vshl.u64 QA, QA, QLEFT
  71         vshl.u64 QB, QB, QLEFT
  72         veor    D0REG(QA), D0REG(QA), DM
  73         veor    D1REG(QA), D1REG(QA), D0REG(QT0)
  74         veor    D0REG(QB), D0REG(QB), D1REG(QT0)
  75         veor    D1REG(QB), D1REG(QB), D0REG(QT1)
  76         vmov    DM, D1REG(QT1)
  77
  78         vld1.i32 {QK0, QK1}, [KEY]!
  79         vadd.i32 QA, QA, QK0
  80         vadd.i32 QB, QB, QK1
  81         subs    LENGTH, LENGTH, #32
  82         vmlal.u32 QY, D0REG(QA), D0REG(QB)
  83         vmlal.u32 QY, D1REG(QA), D1REG(QB)
  84         bhi     .Loop
  85
  86         vadd.i64 D0REG(QY), D0REG(QY), D1REG(QY)
  87         vmov    r0, r1, D0REG(QY)
  88         bx      lr
  89 EPILOGUE(_nettle_umac_nh)