release/src/router/nettle/arm/v6/sha256-compress.asm

   1 C nettle, low-level cryptographics library
   2 C
   3 C Copyright (C) 2013 Niels Möller
   4 C
   5 C The nettle library is free software; you can redistribute it and/or modify
   6 C it under the terms of the GNU Lesser General Public License as published by
   7 C the Free Software Foundation; either version 2.1 of the License, or (at your
   8 C option) any later version.
   9 C
  10 C The nettle library is distributed in the hope that it will be useful, but
  11 C WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  12 C or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU Lesser General Public
  13 C License for more details.
  14 C
  15 C You should have received a copy of the GNU Lesser General Public License
  16 C along with the nettle library; see the file COPYING.LIB.  If not, write to
  17 C the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  18 C MA 02111-1301, USA.
  19
  20         .file "sha256-compress.asm"
  21
  22 define(<STATE>, <r0>)
  23 define(<INPUT>, <r1>)
  24 define(<K>, <r2>)
  25 define(<SA>, <r3>)
  26 define(<SB>, <r4>)
  27 define(<SC>, <r5>)
  28 define(<SD>, <r6>)
  29 define(<SE>, <r7>)
  30 define(<SF>, <r8>)
  31 define(<SG>, <r10>)
  32 define(<SH>, <r11>)
  33 define(<T0>, <r12>)
  34 define(<T1>, <r1>)      C Overlap INPUT
  35 define(<COUNT>, <r0>)   C Overlap STATE
  36 define(<W>, <r14>)
  37
  38 C Used for data load
  39 define(<I0>, <r3>)
  40 define(<I1>, <r4>)
  41 define(<I2>, <r5>)
  42 define(<I3>, <r6>)
  43 define(<I4>, <r7>)
  44 define(<DST>, <r8>)
  45 define(<SHIFT>, <r10>)
  46 define(<ILEFT>, <r11>)
  47
  48 define(<EXPN>, <
  49         ldr     W, [sp, #+eval(4*$1)]
  50         ldr     T0, [sp, #+eval(4*(($1 + 14) % 16))]
  51         ror     T1, T0, #17
  52         eor     T1, T1, T0, ror #19
  53         eor     T1, T1, T0, lsr #10
  54         add     W, W, T1
  55         ldr     T0, [sp, #+eval(4*(($1 + 9) % 16))]
  56         add     W, W, T0
  57         ldr     T0, [sp, #+eval(4*(($1 + 1) % 16))]
  58         ror     T1, T0, #7
  59         eor     T1, T1, T0, ror #18
  60         eor     T1, T1, T0, lsr #3
  61         add     W, W, T1
  62         str     W, [sp, #+eval(4*$1)]
  63 >)
  64
  65 C ROUND(A,B,C,D,E,F,G,H)
  66 C
  67 C H += S1(E) + Choice(E,F,G) + K + W
  68 C D += H
  69 C H += S0(A) + Majority(A,B,C)
  70 C
  71 C Where
  72 C
  73 C S1(E) = E<<<26 ^ E<<<21 ^ E<<<7
  74 C S0(A) = A<<<30 ^ A<<<19 ^ A<<<10
  75 C Choice (E, F, G) = G^(E&(F^G))
  76 C Majority (A,B,C) = (A&B) + (C&(A^B))
  77
  78 define(<ROUND>, <
  79         ror     T0, $5, #6
  80         eor     T0, T0, $5, ror #11
  81         eor     T0, T0, $5, ror #25
  82         add     $8, $8, T0
  83         eor     T0, $6, $7
  84         and     T0, T0, $5
  85         eor     T0, T0, $7
  86         add     $8,$8, T0
  87         ldr     T0, [K], #+4
  88         add     $8, $8, W
  89         add     $8, $8, T0
  90         add     $4, $4, $8
  91         ror     T0, $1, #2
  92         eor     T0, T0, $1, ror #13
  93         eor     T0, T0, $1, ror #22
  94         add     $8, $8, T0
  95         and     T0, $1, $2
  96         add     $8, $8, T0
  97         eor     T0, $1, $2
  98         and     T0, T0, $3
  99         add     $8, $8, T0
 100 >)
 101
 102 define(<NOEXPN>, <
 103         ldr     W, [sp, + $1]
 104         add     $1, $1, #4
 105 >)
 106         C void
 107         C _nettle_sha256_compress(uint32_t *state, const uint8_t *input, const uint32_t *k)
 108
 109         .text
 110         .align 2
 111
 112 PROLOGUE(_nettle_sha256_compress)
 113         push    {r4,r5,r6,r7,r8,r10,r11,r14}
 114         sub     sp, sp, #68
 115         str     STATE, [sp, +#64]
 116
 117         C Load data up front, since we don't have enough registers
 118         C to load and shift on-the-fly
 119         ands    SHIFT, INPUT, #3
 120         and     INPUT, INPUT, $-4
 121         ldr     I0, [INPUT]
 122         addne   INPUT, INPUT, #4
 123         lsl     SHIFT, SHIFT, #3
 124         mov     T0, #0
 125         movne   T0, #-1
 126         lsl     I1, T0, SHIFT
 127         uadd8   T0, T0, I1              C Sets APSR.GE bits
 128
 129         mov     DST, sp
 130         mov     ILEFT, #4
 131 .Lcopy:
 132         ldm     INPUT!, {I1,I2,I3,I4}
 133         sel     I0, I0, I1
 134         ror     I0, I0, SHIFT
 135         rev     I0, I0
 136         sel     I1, I1, I2
 137         ror     I1, I1, SHIFT
 138         rev     I1, I1
 139         sel     I2, I2, I3
 140         ror     I2, I2, SHIFT
 141         rev     I2, I2
 142         sel     I3, I3, I4
 143         ror     I3, I3, SHIFT
 144         rev     I3, I3
 145         subs    ILEFT, ILEFT, #1
 146         stm     DST!, {I0,I1,I2,I3}
 147         mov     I0, I4
 148         bne     .Lcopy
 149
 150         ldm     STATE, {SA,SB,SC,SD,SE,SF,SG,SH}
 151
 152         mov     COUNT,#0
 153
 154 .Loop1:
 155         NOEXPN(COUNT) ROUND(SA,SB,SC,SD,SE,SF,SG,SH)
 156         NOEXPN(COUNT) ROUND(SH,SA,SB,SC,SD,SE,SF,SG)
 157         NOEXPN(COUNT) ROUND(SG,SH,SA,SB,SC,SD,SE,SF)
 158         NOEXPN(COUNT) ROUND(SF,SG,SH,SA,SB,SC,SD,SE)
 159         NOEXPN(COUNT) ROUND(SE,SF,SG,SH,SA,SB,SC,SD)
 160         NOEXPN(COUNT) ROUND(SD,SE,SF,SG,SH,SA,SB,SC)
 161         NOEXPN(COUNT) ROUND(SC,SD,SE,SF,SG,SH,SA,SB)
 162         NOEXPN(COUNT) ROUND(SB,SC,SD,SE,SF,SG,SH,SA)
 163         cmp     COUNT,#64
 164         bne     .Loop1
 165
 166         mov     COUNT, #3
 167 .Loop2:
 168
 169         EXPN( 0) ROUND(SA,SB,SC,SD,SE,SF,SG,SH)
 170         EXPN( 1) ROUND(SH,SA,SB,SC,SD,SE,SF,SG)
 171         EXPN( 2) ROUND(SG,SH,SA,SB,SC,SD,SE,SF)
 172         EXPN( 3) ROUND(SF,SG,SH,SA,SB,SC,SD,SE)
 173         EXPN( 4) ROUND(SE,SF,SG,SH,SA,SB,SC,SD)
 174         EXPN( 5) ROUND(SD,SE,SF,SG,SH,SA,SB,SC)
 175         EXPN( 6) ROUND(SC,SD,SE,SF,SG,SH,SA,SB)
 176         EXPN( 7) ROUND(SB,SC,SD,SE,SF,SG,SH,SA)
 177         EXPN( 8) ROUND(SA,SB,SC,SD,SE,SF,SG,SH)
 178         EXPN( 9) ROUND(SH,SA,SB,SC,SD,SE,SF,SG)
 179         EXPN(10) ROUND(SG,SH,SA,SB,SC,SD,SE,SF)
 180         EXPN(11) ROUND(SF,SG,SH,SA,SB,SC,SD,SE)
 181         EXPN(12) ROUND(SE,SF,SG,SH,SA,SB,SC,SD)
 182         EXPN(13) ROUND(SD,SE,SF,SG,SH,SA,SB,SC)
 183         EXPN(14) ROUND(SC,SD,SE,SF,SG,SH,SA,SB)
 184         subs    COUNT, COUNT, #1
 185         EXPN(15) ROUND(SB,SC,SD,SE,SF,SG,SH,SA)
 186         bne     .Loop2
 187
 188         ldr     STATE, [sp, +#64]
 189         C No longer needed registers
 190         ldm     STATE, {r1,r2,r12,r14}
 191         add     SA, SA, r1
 192         add     SB, SB, r2
 193         add     SC, SC, r12
 194         add     SD, SD, r14
 195         stm     STATE!, {SA,SB,SC,SD}
 196         ldm     STATE, {r1,r2,r12,r14}
 197         add     SE, SE, r1
 198         add     SF, SF, r2
 199         add     SG, SG, r12
 200         add     SH, SH, r14
 201         stm     STATE!, {SE,SF,SG,SH}
 202         add     sp, sp, #68
 203         pop     {r4,r5,r6,r7,r8,r10,r11,pc}
 204 EPILOGUE(_nettle_sha256_compress)