Correct PPTP server firewall rules chain.
[tomato/davidwu.git] / release / src / router / nettle / x86 / md5-compress.asm
blobac0cd900e3146504b17771b60b15c28e07408399
1 C nettle, low-level cryptographics library
2 C
3 C Copyright (C) 2005, Niels Möller
4 C
5 C The nettle library is free software; you can redistribute it and/or modify
6 C it under the terms of the GNU Lesser General Public License as published by
7 C the Free Software Foundation; either version 2.1 of the License, or (at your
8 C option) any later version.
9 C
10 C The nettle library is distributed in the hope that it will be useful, but
11 C WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
12 C or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
13 C License for more details.
15 C You should have received a copy of the GNU Lesser General Public License
16 C along with the nettle library; see the file COPYING.LIB. If not, write to
17 C the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
18 C MA 02111-1301, USA.
20 C Register usage
21 define(<SA>,<%eax>)
22 define(<SB>,<%ebx>)
23 define(<SC>,<%ecx>)
24 define(<SD>,<%edx>)
25 define(<TMP>,<%ebp>)
26 define(<INPUT>,<%esi>)
28 C %edi is unused
30 C F1(x,y,z) = (z ^ (x & (y ^ z)))
31 define(<F1>, <
32 movl $3, TMP
33 xorl $2, TMP
34 andl $1, TMP
35 xorl $3, TMP>)
37 define(<F2>,<F1($3, $1, $2)>)
39 C F3(x,y,z) = x ^ y ^ z
40 define(<F3>,<
41 movl $1, TMP
42 xorl $2, TMP
43 xorl $3, TMP>)
45 C F4(x,y,z) = y ^ (x | ~z)
46 define(<F4>,<
47 movl $3, TMP
48 notl TMP
49 orl $1, TMP
50 xorl $2, TMP>)
52 define(<REF>,<OFFSET($1)(INPUT)>)
54 C ROUND(f, w, x, y, z, k, data, s):
55 C w += f(x,y,z) + data + k
56 C w <<< s
57 C w += x
58 define(<ROUND>,<
59 addl $7, $2
60 $1($3, $4, $5)
61 addl $6, $2
62 addl TMP, $2
63 roll <$>$8, $2
64 addl $3, $2>)
66 .file "md5-compress.asm"
68 C _nettle_md5_compress(uint32_t *state, uint8_t *data)
70 .text
71 ALIGN(16)
72 PROLOGUE(_nettle_md5_compress)
73 C save all registers that need to be saved
75 C 24(%esp) input
76 C 20(%esp) state
77 C 16(%esp) Return address
78 pushl %ebx C 12(%esp)
79 pushl %ebp C 8(%esp)
80 pushl %esi C 4(%esp)
81 pushl %edi C (%esp)
83 C load the state vector
84 movl 20(%esp),TMP
85 movl (TMP), SA
86 movl 4(TMP), SB
87 movl 8(TMP), SC
88 movl 12(TMP), SD
90 C Pointer to source data.
91 C Note that if unaligned, we suffer unaligned accesses
92 movl 24(%esp), INPUT
94 ROUND(<F1>, SA, SB, SC, SD, REF( 0), $0xd76aa478, 7)
95 ROUND(<F1>, SD, SA, SB, SC, REF( 1), $0xe8c7b756, 12)
96 ROUND(<F1>, SC, SD, SA, SB, REF( 2), $0x242070db, 17)
97 ROUND(<F1>, SB, SC, SD, SA, REF( 3), $0xc1bdceee, 22)
98 ROUND(<F1>, SA, SB, SC, SD, REF( 4), $0xf57c0faf, 7)
99 ROUND(<F1>, SD, SA, SB, SC, REF( 5), $0x4787c62a, 12)
100 ROUND(<F1>, SC, SD, SA, SB, REF( 6), $0xa8304613, 17)
101 ROUND(<F1>, SB, SC, SD, SA, REF( 7), $0xfd469501, 22)
102 ROUND(<F1>, SA, SB, SC, SD, REF( 8), $0x698098d8, 7)
103 ROUND(<F1>, SD, SA, SB, SC, REF( 9), $0x8b44f7af, 12)
104 ROUND(<F1>, SC, SD, SA, SB, REF(10), $0xffff5bb1, 17)
105 ROUND(<F1>, SB, SC, SD, SA, REF(11), $0x895cd7be, 22)
106 ROUND(<F1>, SA, SB, SC, SD, REF(12), $0x6b901122, 7)
107 ROUND(<F1>, SD, SA, SB, SC, REF(13), $0xfd987193, 12)
108 ROUND(<F1>, SC, SD, SA, SB, REF(14), $0xa679438e, 17)
109 ROUND(<F1>, SB, SC, SD, SA, REF(15), $0x49b40821, 22)
111 ROUND(<F2>, SA, SB, SC, SD, REF( 1), $0xf61e2562, 5)
112 ROUND(<F2>, SD, SA, SB, SC, REF( 6), $0xc040b340, 9)
113 ROUND(<F2>, SC, SD, SA, SB, REF(11), $0x265e5a51, 14)
114 ROUND(<F2>, SB, SC, SD, SA, REF( 0), $0xe9b6c7aa, 20)
115 ROUND(<F2>, SA, SB, SC, SD, REF( 5), $0xd62f105d, 5)
116 ROUND(<F2>, SD, SA, SB, SC, REF(10), $0x02441453, 9)
117 ROUND(<F2>, SC, SD, SA, SB, REF(15), $0xd8a1e681, 14)
118 ROUND(<F2>, SB, SC, SD, SA, REF( 4), $0xe7d3fbc8, 20)
119 ROUND(<F2>, SA, SB, SC, SD, REF( 9), $0x21e1cde6, 5)
120 ROUND(<F2>, SD, SA, SB, SC, REF(14), $0xc33707d6, 9)
121 ROUND(<F2>, SC, SD, SA, SB, REF( 3), $0xf4d50d87, 14)
122 ROUND(<F2>, SB, SC, SD, SA, REF( 8), $0x455a14ed, 20)
123 ROUND(<F2>, SA, SB, SC, SD, REF(13), $0xa9e3e905, 5)
124 ROUND(<F2>, SD, SA, SB, SC, REF( 2), $0xfcefa3f8, 9)
125 ROUND(<F2>, SC, SD, SA, SB, REF( 7), $0x676f02d9, 14)
126 ROUND(<F2>, SB, SC, SD, SA, REF(12), $0x8d2a4c8a, 20)
128 ROUND(<F3>, SA, SB, SC, SD, REF( 5), $0xfffa3942, 4)
129 ROUND(<F3>, SD, SA, SB, SC, REF( 8), $0x8771f681, 11)
130 ROUND(<F3>, SC, SD, SA, SB, REF(11), $0x6d9d6122, 16)
131 ROUND(<F3>, SB, SC, SD, SA, REF(14), $0xfde5380c, 23)
132 ROUND(<F3>, SA, SB, SC, SD, REF( 1), $0xa4beea44, 4)
133 ROUND(<F3>, SD, SA, SB, SC, REF( 4), $0x4bdecfa9, 11)
134 ROUND(<F3>, SC, SD, SA, SB, REF( 7), $0xf6bb4b60, 16)
135 ROUND(<F3>, SB, SC, SD, SA, REF(10), $0xbebfbc70, 23)
136 ROUND(<F3>, SA, SB, SC, SD, REF(13), $0x289b7ec6, 4)
137 ROUND(<F3>, SD, SA, SB, SC, REF( 0), $0xeaa127fa, 11)
138 ROUND(<F3>, SC, SD, SA, SB, REF( 3), $0xd4ef3085, 16)
139 ROUND(<F3>, SB, SC, SD, SA, REF( 6), $0x04881d05, 23)
140 ROUND(<F3>, SA, SB, SC, SD, REF( 9), $0xd9d4d039, 4)
141 ROUND(<F3>, SD, SA, SB, SC, REF(12), $0xe6db99e5, 11)
142 ROUND(<F3>, SC, SD, SA, SB, REF(15), $0x1fa27cf8, 16)
143 ROUND(<F3>, SB, SC, SD, SA, REF( 2), $0xc4ac5665, 23)
145 ROUND(<F4>, SA, SB, SC, SD, REF( 0), $0xf4292244, 6)
146 ROUND(<F4>, SD, SA, SB, SC, REF( 7), $0x432aff97, 10)
147 ROUND(<F4>, SC, SD, SA, SB, REF(14), $0xab9423a7, 15)
148 ROUND(<F4>, SB, SC, SD, SA, REF( 5), $0xfc93a039, 21)
149 ROUND(<F4>, SA, SB, SC, SD, REF(12), $0x655b59c3, 6)
150 ROUND(<F4>, SD, SA, SB, SC, REF( 3), $0x8f0ccc92, 10)
151 ROUND(<F4>, SC, SD, SA, SB, REF(10), $0xffeff47d, 15)
152 ROUND(<F4>, SB, SC, SD, SA, REF( 1), $0x85845dd1, 21)
153 ROUND(<F4>, SA, SB, SC, SD, REF( 8), $0x6fa87e4f, 6)
154 ROUND(<F4>, SD, SA, SB, SC, REF(15), $0xfe2ce6e0, 10)
155 ROUND(<F4>, SC, SD, SA, SB, REF( 6), $0xa3014314, 15)
156 ROUND(<F4>, SB, SC, SD, SA, REF(13), $0x4e0811a1, 21)
157 ROUND(<F4>, SA, SB, SC, SD, REF( 4), $0xf7537e82, 6)
158 ROUND(<F4>, SD, SA, SB, SC, REF(11), $0xbd3af235, 10)
159 ROUND(<F4>, SC, SD, SA, SB, REF( 2), $0x2ad7d2bb, 15)
160 ROUND(<F4>, SB, SC, SD, SA, REF( 9), $0xeb86d391, 21)
162 C Update the state vector
163 movl 20(%esp),TMP
164 addl SA, (TMP)
165 addl SB, 4(TMP)
166 addl SC, 8(TMP)
167 addl SD, 12(TMP)
169 popl %edi
170 popl %esi
171 popl %ebp
172 popl %ebx
174 EPILOGUE(_nettle_md5_compress)