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resolved conflict before merge
[tomato/tomato-dir865l.git] / release / src / router / rc / init.c
blob4b0be239e0b2f543a8b9888577f7dbab776bd1c9
1 /*
2
3 Copyright 2005, Broadcom Corporation
4 All Rights Reserved.
5
6 THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
7 KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
8 SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
9 FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
10
11 */
12
13 #include "rc.h"
14
15 #include <termios.h>
16 #include <dirent.h>
17 #include <sys/ioctl.h>
18 #include <sys/mount.h>
19 #include <time.h>
20 #include <errno.h>
21 #include <paths.h>
22 #include <sys/wait.h>
23 #include <sys/reboot.h>
24 #include <sys/klog.h>
25 #ifdef LINUX26
26 #include <sys/types.h>
27 #include <sys/stat.h>
28 #include <sys/sysinfo.h>
29 #endif
30 #include <wlutils.h>
31 #include <bcmdevs.h>
32
33 #define SHELL "/bin/sh"
34
35 static int fatalsigs[] = {
36 SIGILL,
37 SIGABRT,
38 SIGFPE,
39 SIGPIPE,
40 SIGBUS,
41 SIGSYS,
42 SIGTRAP,
43 SIGPWR
44 };
45
46 static int initsigs[] = {
47 SIGHUP,
48 SIGUSR1,
49 SIGUSR2,
50 SIGINT,
51 SIGQUIT,
52 SIGALRM,
53 SIGTERM
54 };
55
56 static char *defenv[] = {
57 "TERM=vt100",
58 "HOME=/",
59 "PATH=/usr/bin:/bin:/usr/sbin:/sbin",
60 "SHELL=" SHELL,
61 "USER=root",
62 NULL
63 };
64
65 /* set pci/#/#/ccode,regrev, wl#_country_code,regrev, bwq518 */
66 static void set_regulation(int card, char *code, char *rev)
67 {
68 char path[32];
69 sprintf(path, "pci/%d/1/regrev", card + 1);
70 nvram_set(path, rev);
71 sprintf(path, "pci/%d/1/ccode", card + 1);
72 nvram_set(path, code);
73 sprintf(path, "wl%d_country_rev", card);
74 nvram_set(path, rev);
75 sprintf(path, "wl%d_country_code", card);
76 nvram_set(path, code);
77 if (!card) {
78 nvram_set("wl_country_rev", rev);
79 nvram_set("wl_country_code", code);
80 }
81 }/* bwq518 end */
82
83 /* Set terminal settings to reasonable defaults */
84 static void set_term(int fd)
85 {
86 struct termios tty;
87
88 tcgetattr(fd, &tty);
89
90 /* set control chars */
91 tty.c_cc[VINTR] = 3; /* C-c */
92 tty.c_cc[VQUIT] = 28; /* C-\ */
93 tty.c_cc[VERASE] = 127; /* C-? */
94 tty.c_cc[VKILL] = 21; /* C-u */
95 tty.c_cc[VEOF] = 4; /* C-d */
96 tty.c_cc[VSTART] = 17; /* C-q */
97 tty.c_cc[VSTOP] = 19; /* C-s */
98 tty.c_cc[VSUSP] = 26; /* C-z */
99
100 /* use line dicipline 0 */
101 tty.c_line = 0;
102
103 /* Make it be sane */
104 tty.c_cflag &= CBAUD|CBAUDEX|CSIZE|CSTOPB|PARENB|PARODD;
105 tty.c_cflag |= CREAD|HUPCL|CLOCAL;
106
107
108 /* input modes */
109 tty.c_iflag = ICRNL | IXON | IXOFF;
110
111 /* output modes */
112 tty.c_oflag = OPOST | ONLCR;
113
114 /* local modes */
115 tty.c_lflag =
116 ISIG | ICANON | ECHO | ECHOE | ECHOK | ECHOCTL | ECHOKE | IEXTEN;
117
118 tcsetattr(fd, TCSANOW, &tty);
119 }
120
121 static int console_init(void)
122 {
123 int fd;
124
125 /* Clean up */
126 ioctl(0, TIOCNOTTY, 0);
127 close(0);
128 close(1);
129 close(2);
130 setsid();
131
132 /* Reopen console */
133 if ((fd = open(_PATH_CONSOLE, O_RDWR)) < 0) {
134 /* Avoid debug messages is redirected to socket packet if no exist a UART chip, added by honor, 2003-12-04 */
135 open("/dev/null", O_RDONLY);
136 open("/dev/null", O_WRONLY);
137 open("/dev/null", O_WRONLY);
138 perror(_PATH_CONSOLE);
139 return errno;
140 }
141 dup2(fd, 0);
142 dup2(fd, 1);
143 dup2(fd, 2);
144
145 ioctl(0, TIOCSCTTY, 1);
146 tcsetpgrp(0, getpgrp());
147 set_term(0);
148
149 return 0;
150 }
151
152 /*
153 * Waits for a file descriptor to change status or unblocked signal
154 * @param fd file descriptor
155 * @param timeout seconds to wait before timing out or 0 for no timeout
156 * @return 1 if descriptor changed status or 0 if timed out or -1 on error
157 */
158 static int waitfor(int fd, int timeout)
159 {
160 fd_set rfds;
161 struct timeval tv = { timeout, 0 };
162
163 FD_ZERO(&rfds);
164 FD_SET(fd, &rfds);
165 return select(fd + 1, &rfds, NULL, NULL, (timeout > 0) ? &tv : NULL);
166 }
167
168 static pid_t run_shell(int timeout, int nowait)
169 {
170 pid_t pid;
171 int sig;
172
173 /* Wait for user input */
174 if (waitfor(STDIN_FILENO, timeout) <= 0) return 0;
175
176 switch (pid = fork()) {
177 case -1:
178 perror("fork");
179 return 0;
180 case 0:
181 /* Reset signal handlers set for parent process */
182 for (sig = 0; sig < (_NSIG-1); sig++)
183 signal(sig, SIG_DFL);
184
185 /* Reopen console */
186 console_init();
187 printf("\n\nTomato %s\n\n", tomato_version);
188
189 /* Now run it. The new program will take over this PID,
190 * so nothing further in init.c should be run. */
191 execve(SHELL, (char *[]) { SHELL, NULL }, defenv);
192
193 /* We're still here? Some error happened. */
194 perror(SHELL);
195 exit(errno);
196 default:
197 if (nowait) {
198 return pid;
199 }
200 else {
201 waitpid(pid, NULL, 0);
202 return 0;
203 }
204 }
205 }
206
207 int console_main(int argc, char *argv[])
208 {
209 for (;;) run_shell(0, 0);
210
211 return 0;
212 }
213
214 static void shutdn(int rb)
215 {
216 int i;
217 int act;
218 sigset_t ss;
219
220 _dprintf("shutdn rb=%d\n", rb);
221
222 sigemptyset(&ss);
223 for (i = 0; i < sizeof(fatalsigs) / sizeof(fatalsigs[0]); i++)
224 sigaddset(&ss, fatalsigs[i]);
225 for (i = 0; i < sizeof(initsigs) / sizeof(initsigs[0]); i++)
226 sigaddset(&ss, initsigs[i]);
227 sigprocmask(SIG_BLOCK, &ss, NULL);
228
229 for (i = 30; i > 0; --i) {
230 if (((act = check_action()) == ACT_IDLE) || (act == ACT_REBOOT)) break;
231 _dprintf("Busy with %d. Waiting before shutdown... %d\n", act, i);
232 sleep(1);
233 }
234 set_action(ACT_REBOOT);
235
236 // Disconnect pppd - need this for PPTP/L2TP to finish gracefully
237 stop_pptp();
238 stop_l2tp();
239
240 _dprintf("TERM\n");
241 kill(-1, SIGTERM);
242 sleep(3);
243 sync();
244
245 _dprintf("KILL\n");
246 kill(-1, SIGKILL);
247 sleep(1);
248 sync();
249
250 umount("/jffs"); // may hang if not
251 sleep(1);
252
253 if (rb != -1) {
254 led(LED_WLAN, 0);
255 if (rb == 0) {
256 for (i = 4; i > 0; --i) {
257 led(LED_DMZ, 1);
258 led(LED_WHITE, 1);
259 usleep(250000);
260 led(LED_DMZ, 0);
261 led(LED_WHITE, 0);
262 usleep(250000);
263 }
264 }
265 }
266
267 reboot(rb ? RB_AUTOBOOT : RB_HALT_SYSTEM);
268
269 do {
270 sleep(1);
271 } while (1);
272 }
273
274 static void handle_fatalsigs(int sig)
275 {
276 _dprintf("fatal sig=%d\n", sig);
277 shutdn(-1);
278 }
279
280 /* Fixed the race condition & incorrect code by using sigwait()
281 * instead of pause(). But SIGCHLD is a problem, since other
282 * code: 1) messes with it and 2) depends on CHLD being caught so
283 * that the pid gets immediately reaped instead of left a zombie.
284 * Pidof still shows the pid, even though it's in zombie state.
285 * So this SIGCHLD handler reaps and then signals the mainline by
286 * raising ALRM.
287 */
288 static void handle_reap(int sig)
289 {
290 chld_reap(sig);
291 raise(SIGALRM);
292 }
293
294 static int check_nv(const char *name, const char *value)
295 {
296 const char *p;
297 if (!nvram_match("manual_boot_nv", "1")) {
298 if (((p = nvram_get(name)) == NULL) || (strcmp(p, value) != 0)) {
299 _dprintf("Error: Critical variable %s is invalid. Resetting.\n", name);
300 nvram_set(name, value);
301 return 1;
302 }
303 }
304 return 0;
305 }
306
307 static inline int invalid_mac(const char *mac)
308 {
309 return (!mac || !(*mac) || strncasecmp(mac, "00:90:4c", 8) == 0);
310 }
311
312 static int find_sercom_mac_addr(void)
313 {
314 FILE *fp;
315 unsigned char m[6], s[18];
316
317 sprintf(s, MTD_DEV(%dro), 0);
318 if ((fp = fopen(s, "rb"))) {
319 fseek(fp, 0x1ffa0, SEEK_SET);
320 fread(m, sizeof(m), 1, fp);
321 fclose(fp);
322 sprintf(s, "%02X:%02X:%02X:%02X:%02X:%02X",
323 m[0], m[1], m[2], m[3], m[4], m[5]);
324 nvram_set("et0macaddr", s);
325 return !invalid_mac(s);
326 }
327 return 0;
328 }
329
330 static int find_dir320_mac_addr(void)
331 {
332 FILE *fp;
333 char *buffer, s[18];
334 int i, part, size, found = 0;
335
336 if (!mtd_getinfo("board_data", &part, &size))
337 goto out;
338 sprintf(s, MTD_DEV(%dro), part);
339
340 if ((fp = fopen(s, "rb"))) {
341 buffer = malloc(size);
342 memset(buffer, 0, size);
343 fread(buffer, size, 1, fp);
344 if (!memcmp(buffer, "RGCFG1", 6)) {
345 for (i = 6; i < size - 24; i++) {
346 if (!memcmp(buffer + i, "lanmac=", 7)) {
347 memcpy(s, buffer + i + 7, 17);
348 s[17] = 0;
349 nvram_set("et0macaddr", s);
350 found = 1;
351 }
352 else if (!memcmp(buffer + i, "wanmac=", 7)) {
353 memcpy(s, buffer + i + 7, 17);
354 s[17] = 0;
355 nvram_set("il0macaddr", s);
356 if (!found) {
357 inc_mac(s, -1);
358 nvram_set("et0macaddr", s);
359 }
360 found = 1;
361 }
362 }
363 }
364 free(buffer);
365 fclose(fp);
366 }
367 out:
368 if (!found) {
369 strcpy(s, nvram_safe_get("wl0_hwaddr"));
370 inc_mac(s, -2);
371 nvram_set("et0macaddr", s);
372 }
373 return 1;
374 }
375
376 static int init_vlan_ports(void)
377 {
378 int dirty = 0;
379 int model = get_model();
380
381 switch (model) {
382 case MODEL_WRT54G:
383 switch (check_hw_type()) {
384 case HW_BCM5352E: // G v4, GS v3, v4
385 dirty |= check_nv("vlan0ports", "3 2 1 0 5*");
386 break;
387 }
388 break;
389 case MODEL_WTR54GS:
390 dirty |= check_nv("vlan0ports", "0 5*");
391 dirty |= check_nv("vlan1ports", "1 5");
392 dirty |= check_nv("vlan_enable", "1");
393 break;
394 case MODEL_WL500GP:
395 case MODEL_WL500GE:
396 case MODEL_WL500GPv2:
397 case MODEL_WL520GU:
398 case MODEL_WL330GE:
399 if (nvram_match("vlan1ports", "0 5u")) // 520GU or 330GE or WL500GE?
400 dirty |= check_nv("vlan1ports", "0 5");
401 else if (nvram_match("vlan1ports", "4 5u"))
402 dirty |= check_nv("vlan1ports", "4 5");
403 break;
404 case MODEL_WL500GD:
405 dirty |= check_nv("vlan0ports", "1 2 3 4 5*");
406 dirty |= check_nv("vlan1ports", "0 5");
407 break;
408 case MODEL_DIR320:
409 case MODEL_H618B:
410 dirty |= (nvram_get("vlan2ports") != NULL);
411 nvram_unset("vlan2ports");
412 dirty |= check_nv("vlan0ports", "1 2 3 4 5*");
413 dirty |= check_nv("vlan1ports", "0 5");
414 break;
415 case MODEL_WRT310Nv1:
416 dirty |= check_nv("vlan1ports", "1 2 3 4 8*");
417 dirty |= check_nv("vlan2ports", "0 8");
418 break;
419 case MODEL_WL1600GL:
420 dirty |= check_nv("vlan0ports", "0 1 2 3 5*");
421 dirty |= check_nv("vlan1ports", "4 5");
422 break;
423 #ifdef CONFIG_BCMWL5
424 case MODEL_WNR3500L:
425 case MODEL_WRT320N:
426 case MODEL_WNR3500LV2:
427 case MODEL_RTN16:
428 case MODEL_RTN66U:
429 dirty |= check_nv("vlan1ports", "4 3 2 1 8*");
430 dirty |= check_nv("vlan2ports", "0 8");
431 break;
432 case MODEL_EA6500V1:
433 dirty |= check_nv("vlan1ports", "0 1 2 3 8*");
434 dirty |= check_nv("vlan2ports", "4 8");
435 dirty |= check_nv("boot_wait", "on");
436 dirty |= check_nv("wait_time", "5");
437 break;
438 case MODEL_DIR865L:
439 case MODEL_W1800R:
440 dirty |= check_nv("vlan1ports", "1 2 3 4 8*");
441 dirty |= check_nv("vlan2ports", "0 8");
442 dirty |= check_nv("boot_wait", "on");
443 dirty |= check_nv("wait_time", "5");
444 break;
445 case MODEL_TDN80:
446 dirty |= check_nv("vlan1ports", "0 1 2 3 8*");
447 dirty |= check_nv("vlan2ports", "4 8");
448 dirty |= check_nv("boot_wait", "on");
449 dirty |= check_nv("wait_time", "5");
450 break;
451 case MODEL_R6300V1:
452 case MODEL_WNDR4500:
453 case MODEL_WNDR4500V2:
454 dirty |= check_nv("vlan1ports", "0 1 2 3 8*");
455 dirty |= check_nv("vlan2ports", "4 8");
456 // must flash tt through tftp.
457 dirty |= check_nv("boot_wait", "on");
458 dirty |= check_nv("wait_time", "5");
459 break;
460 case MODEL_D1800H:
461 dirty |= check_nv("vlan1ports", "1 2 3 4 8*");
462 dirty |= check_nv("vlan2ports", "0 8");
463 dirty |= check_nv("ledbh0", "11");
464 dirty |= check_nv("ledbh1", "11");
465 dirty |= check_nv("ledbh2", "11");
466 dirty |= check_nv("ledbh11", "136");
467 // must flash tt through tftp.
468 dirty |= check_nv("boot_wait", "on");
469 dirty |= check_nv("wait_time", "5");
470 break;
471 case MODEL_RTN53:
472 dirty |= check_nv("vlan2ports", "0 1 2 3 5*");
473 dirty |= check_nv("vlan1ports", "4 5");
474 break;
475 case MODEL_RTN53A1:
476 dirty |= check_nv("vlan1ports", "4 5");
477 dirty |= check_nv("vlan2ports", "3 2 1 0 5*");
478 break;
479 case MODEL_WNR2000v2:
480 dirty |= check_nv("vlan1ports", "4 3 2 1 5*");
481 dirty |= check_nv("vlan2ports", "0 5");
482 break;
483 case MODEL_HG320:
484 case MODEL_H218N:
485 dirty |= check_nv("vlan1ports", "1 2 3 4 5*");
486 dirty |= check_nv("vlan2ports", "0 5");
487 break;
488 case MODEL_RG200E_CA:
489 dirty |= check_nv("vlan1ports", "4 3 2 1 5*");
490 dirty |= check_nv("vlan2ports", "0 5");
491 break;
492 case MODEL_RTN10:
493 dirty |= check_nv("vlan1ports", "4 5");
494 break;
495 case MODEL_RTN10U:
496 case MODEL_CW5358U:
497 dirty |= check_nv("vlan0ports", "1 2 3 4 5*");
498 dirty |= check_nv("vlan1ports", "0 5");
499 break;
500 case MODEL_RTN10P:
501 case MODEL_RTN12:
502 case MODEL_RTN12B1:
503 dirty |= check_nv("vlan0ports", "3 2 1 0 5*");
504 dirty |= check_nv("vlan1ports", "4 5");
505 break;
506 case MODEL_WRT610Nv2:
507 case MODEL_F5D8235v3:
508 dirty |= check_nv("vlan1ports", "1 2 3 4 8*");
509 dirty |= check_nv("vlan2ports", "0 8");
510 break;
511 case MODEL_F7D3301:
512 case MODEL_F7D4301:
513 dirty |= check_nv("vlan1ports", "3 2 1 0 8*");
514 dirty |= check_nv("vlan2ports", "4 8");
515 break;
516 case MODEL_E900:
517 case MODEL_E1500:
518 case MODEL_E1550:
519 case MODEL_E2500:
520 case MODEL_F7D3302:
521 case MODEL_F7D4302:
522 case MODEL_DIR620C1:
523 dirty |= check_nv("vlan1ports", "0 1 2 3 5*");
524 dirty |= check_nv("vlan2ports", "4 5");
525 break;
526 case MODEL_E1000v2:
527 case MODEL_L600N:
528 dirty |= check_nv("vlan1ports", "1 2 3 4 5*");
529 dirty |= check_nv("vlan2ports", "0 5");
530 break;
531 case MODEL_RTN15U:
532 case MODEL_E3200:
533 case MODEL_E4200:
534 case MODEL_WNDR4000:
535 case MODEL_WNDR3700v3:
536 dirty |= check_nv("vlan1ports", "0 1 2 3 8*");
537 dirty |= check_nv("vlan2ports", "4 8");
538 break;
539 case MODEL_WNDR3400:
540 case MODEL_WNDR3400v2:
541 // Note port order is important (or reversed display, if "0 1 2 3 5*" used for vlan1ports) -> doesn't work, invert in Web GUI
542 dirty |= check_nv("vlan1ports", "0 1 2 3 5*");
543 // And change "4 5u" to "4 5" to make WAN port work
544 dirty |= check_nv("vlan2ports", "4 5");
545 break;
546 case MODEL_TDN60:
547 dirty |= check_nv("vlan1ports", "1 2 3 4 8*");
548 dirty |= check_nv("vlan2ports", "0 8");
549 dirty |= check_nv("boot_wait", "on");
550 dirty |= check_nv("wait_time", "5");
551 break;
552 case MODEL_TDN6: //bwq518
553 dirty |= check_nv("vlan1ports", "1 2 3 4 5*");
554 dirty |= check_nv("vlan2ports", "0 5");
555 dirty |= check_nv("boot_wait", "on");
556 dirty |= check_nv("wait_time", "5");
557 break;
558 case MODEL_WRT160Nv3:
559 if (nvram_match("vlan1ports", "1 2 3 4 5*")) {
560 // fix lan port numbering on CSE41, CSE51
561 dirty |= check_nv("vlan1ports", "4 3 2 1 5*");
562 }
563 else if (nvram_match("vlan1ports", "1 2 3 4 8*")) {
564 // WRT310Nv2 ?
565 dirty |= check_nv("vlan1ports", "4 3 2 1 8*");
566 }
567 break;
568 #endif
569 }
570
571 return dirty;
572 }
573
574 static void check_bootnv(void)
575 {
576 int dirty;
577 int hardware;
578 int model;
579 char mac[18];
580 int i;
581
582 model = get_model();
583 dirty = check_nv("wl0_leddc", "0x640000") | check_nv("wl1_leddc", "0x640000");
584
585 switch (model) {
586 case MODEL_WTR54GS:
587 dirty |= check_nv("vlan0hwname", "et0");
588 dirty |= check_nv("vlan1hwname", "et0");
589 break;
590 case MODEL_WBRG54:
591 dirty |= check_nv("wl0gpio0", "130");
592 break;
593 case MODEL_WR850GV1:
594 case MODEL_WR850GV2:
595 // need to cleanup some variables...
596 if ((nvram_get("t_model") == NULL) && (nvram_get("MyFirmwareVersion") != NULL)) {
597 nvram_unset("MyFirmwareVersion");
598 nvram_set("restore_defaults", "1");
599 }
600 break;
601 case MODEL_WL330GE:
602 dirty |= check_nv("wl0gpio1", "0x02");
603 break;
604 case MODEL_WL500W:
605 /* fix WL500W mac adresses for WAN port */
606 if (invalid_mac(nvram_get("et1macaddr"))) {
607 strcpy(mac, nvram_safe_get("et0macaddr"));
608 inc_mac(mac, 1);
609 dirty |= check_nv("et1macaddr", mac);
610 }
611 dirty |= check_nv("wl0gpio0", "0x88");
612 break;
613 case MODEL_WL500GP:
614 dirty |= check_nv("sdram_init", "0x0009"); // 32MB; defaults: 0x000b, 0x0009
615 dirty |= check_nv("wl0gpio0", "136");
616 break;
617 case MODEL_WL500GPv2:
618 case MODEL_WL520GU:
619 dirty |= check_nv("wl0gpio1", "136");
620 break;
621 case MODEL_WL500GD:
622 dirty |= check_nv("vlan0hwname", "et0");
623 dirty |= check_nv("vlan1hwname", "et0");
624 dirty |= check_nv("boardflags", "0x00000100"); // set BFL_ENETVLAN
625 nvram_unset("wl0gpio0");
626 break;
627 case MODEL_DIR320:
628 if (strlen(nvram_safe_get("et0macaddr")) == 12 ||
629 strlen(nvram_safe_get("il0macaddr")) == 12) {
630 dirty |= find_dir320_mac_addr();
631 }
632 if (nvram_get("vlan2hwname") != NULL) {
633 nvram_unset("vlan2hwname");
634 dirty = 1;
635 }
636 dirty |= check_nv("wandevs", "vlan1");
637 dirty |= check_nv("vlan1hwname", "et0");
638 dirty |= check_nv("wl0gpio0", "8");
639 dirty |= check_nv("wl0gpio1", "0");
640 dirty |= check_nv("wl0gpio2", "0");
641 dirty |= check_nv("wl0gpio3", "0");
642 break;
643 case MODEL_H618B:
644 dirty |= check_nv("wandevs", "vlan1");
645 dirty |= check_nv("vlan0hwname", "et0");
646 dirty |= check_nv("vlan1hwname", "et0");
647 break;
648 case MODEL_WL1600GL:
649 if (invalid_mac(nvram_get("et0macaddr"))) {
650 dirty |= find_sercom_mac_addr();
651 }
652 break;
653 case MODEL_WRT160Nv1:
654 case MODEL_WRT310Nv1:
655 case MODEL_WRT300N:
656 dirty |= check_nv("wl0gpio0", "8");
657 break;
658 #ifdef CONFIG_BCMWL5
659 case MODEL_WNR3500L:
660 dirty |= check_nv("boardflags", "0x00000710"); // needed to enable USB
661 dirty |= check_nv("vlan2hwname", "et0");
662 dirty |= check_nv("ledbh0", "7");
663 break;
664 case MODEL_WNR3500LV2:
665 dirty |= check_nv("vlan2hwname", "et0");
666 break;
667 case MODEL_WNR2000v2:
668 dirty |= check_nv("ledbh5", "8");
669 break;
670 case MODEL_WRT320N:
671 dirty |= check_nv("reset_gpio", "5");
672 dirty |= check_nv("ledbh0", "136");
673 dirty |= check_nv("ledbh1", "11");
674 /* fall through, same as RT-N16 */
675 case MODEL_RTN16:
676 dirty |= check_nv("vlan2hwname", "et0");
677 break;
678 case MODEL_HG320:
679 case MODEL_RG200E_CA:
680 case MODEL_H218N:
681 dirty |= check_nv("vlan1hwname", "et0");
682 dirty |= check_nv("vlan2hwname", "et0");
683 dirty |= check_nv("boardflags", "0x710"); // set BFL_ENETVLAN, enable VLAN
684 dirty |= check_nv("reset_gpio", "30");
685 break;
686 case MODEL_WRT610Nv2:
687 dirty |= check_nv("vlan2hwname", "et0");
688 dirty |= check_nv("pci/1/1/ledbh2", "8");
689 dirty |= check_nv("sb/1/ledbh1", "8");
690 if (invalid_mac(nvram_get("pci/1/1/macaddr"))) {
691 strcpy(mac, nvram_safe_get("et0macaddr"));
692 inc_mac(mac, 3);
693 dirty |= check_nv("pci/1/1/macaddr", mac);
694 }
695 break;
696 case MODEL_F7D3301:
697 case MODEL_F7D3302:
698 case MODEL_F7D4301:
699 case MODEL_F7D4302:
700 case MODEL_F5D8235v3:
701 if (nvram_match("sb/1/macaddr", nvram_safe_get("et0macaddr"))) {
702 strcpy(mac, nvram_safe_get("et0macaddr"));
703 inc_mac(mac, 2);
704 dirty |= check_nv("sb/1/macaddr", mac);
705 inc_mac(mac, 1);
706 dirty |= check_nv("pci/1/1/macaddr", mac);
707 }
708 case MODEL_R6300V1: //bwq518
709 case MODEL_WNDR4500:
710 case MODEL_WNDR4500V2:
711 dirty |= check_nv("vlan1hwname", "et0");
712 dirty |= check_nv("vlan2hwname", "et0");
713 strcpy(mac, nvram_safe_get("et0macaddr"));
714 for (i = 0; i < strlen(mac); i ++)
715 {
716 if (mac[i] =='-') mac[i] = ':';
717 mac[i] = toupper(mac[i]);
718 }
719 nvram_set("et0macaddr",mac);
720 inc_mac(mac, 3);
721 dirty |= check_nv("pci/1/1/macaddr", mac);
722 inc_mac(mac, 2);
723 dirty |= check_nv("pci/2/1/macaddr", mac);
724 nvram_unset("vlan0hwname");
725 break;
726 case MODEL_EA6500V1:
727 dirty |= check_nv("vlan2hwname", "et0");
728 if (strncasecmp(nvram_safe_get("pci/2/1/macaddr"), "00:90:4c", 8) == 0) {
729 strcpy(mac, nvram_safe_get("et0macaddr"));
730 inc_mac(mac, 3);
731 dirty |= check_nv("pci/2/1/macaddr", mac);
732 }
733 break;
734 case MODEL_E4200:
735 dirty |= check_nv("vlan2hwname", "et0");
736 if (strncasecmp(nvram_safe_get("pci/1/1/macaddr"), "00:90:4c", 8) == 0 ||
737 strncasecmp(nvram_safe_get("sb/1/macaddr"), "00:90:4c", 8) == 0) {
738 strcpy(mac, nvram_safe_get("et0macaddr"));
739 inc_mac(mac, 2);
740 dirty |= check_nv("sb/1/macaddr", mac);
741 inc_mac(mac, 1);
742 dirty |= check_nv("pci/1/1/macaddr", mac);
743 }
744 break;
745 case MODEL_WNDR4000:
746 case MODEL_WNDR3700v3:
747 // Have to check MAC addresses, specific configuration needed:
748 // Part of MAC information is in CFE, the rest in board_data (which easily gets broken when playing with firmware ... :-))
749 // Note that after a clean (30/30/30) reset, addresses are "broken" ... but the code below fixes them, tied to et0macaddr!
750 // Also, CFE will update what it sees based on NVRAM ...
751 // so after 30/30/30 reset it sees different values than after a full Tomato boot (that fixes these, updating NVRAM)
752 // Use this approach for all WNDR routers (here, and below)
753 dirty |= check_nv("vlan2hwname", "et0");
754 strcpy(mac, nvram_safe_get("et0macaddr"));
755 // inc_mac(mac, 2);
756 dirty |= check_nv("sb/1/macaddr", mac);
757 inc_mac(mac, -1);
758 dirty |= check_nv("pci/1/1/macaddr", mac);
759 break;
760 case MODEL_WNDR3400:
761 case MODEL_WNDR3400v2:
762 dirty |= check_nv("vlan2hwname", "et0");
763 strcpy(mac, nvram_safe_get("et0macaddr"));
764 // inc_mac(mac, 2);
765 dirty |= check_nv("sb/1/macaddr", mac);
766 inc_mac(mac, -1);
767 if (model == MODEL_WNDR3400)
768 dirty |= check_nv("pci/1/1/macaddr", mac);
769 else
770 dirty |= check_nv("wl1_hwaddr", mac);
771 // Have to check wl ifname(s) ... if not set before eth config, 5 GHz radio does not come up properly
772 //dirty |= check_nv("wl0_ifname", "eth1");
773 dirty |= check_nv("wl1_ifname", "eth2");
774 break;
775 case MODEL_E900:
776 case MODEL_E1000v2:
777 case MODEL_E1500:
778 case MODEL_E1550:
779 case MODEL_E2500:
780 case MODEL_E3200:
781 case MODEL_WRT160Nv3:
782 case MODEL_L600N:
783 case MODEL_DIR620C1:
784 dirty |= check_nv("vlan2hwname", "et0");
785 break;
786 #endif
787
788 case MODEL_WRT54G:
789 if (strncmp(nvram_safe_get("pmon_ver"), "CFE", 3) != 0) return;
790
791 hardware = check_hw_type();
792 if (!nvram_get("boardtype") ||
793 !nvram_get("boardnum") ||
794 !nvram_get("boardflags") ||
795 !nvram_get("clkfreq") ||
796 !nvram_get("os_flash_addr") ||
797 !nvram_get("dl_ram_addr") ||
798 !nvram_get("os_ram_addr") ||
799 !nvram_get("scratch") ||
800 !nvram_get("et0macaddr") ||
801 ((hardware != HW_BCM4704_BCM5325F) && (!nvram_get("vlan0ports") || !nvram_get("vlan0hwname")))) {
802 _dprintf("Unable to find critical settings, erasing NVRAM\n");
803 mtd_erase("nvram");
804 goto REBOOT;
805 }
806
807 dirty |= check_nv("aa0", "3");
808 dirty |= check_nv("wl0gpio0", "136");
809 dirty |= check_nv("wl0gpio2", "0");
810 dirty |= check_nv("wl0gpio3", "0");
811 dirty |= check_nv("cctl", "0");
812 dirty |= check_nv("ccode", "0");
813
814 switch (hardware) {
815 case HW_BCM5325E:
816 /* Lower the DDR ram drive strength , the value will be stable for all boards
817 Latency 3 is more stable for all ddr 20050420 by honor */
818 dirty |= check_nv("sdram_init", "0x010b");
819 dirty |= check_nv("sdram_config", "0x0062");
820 if (!nvram_match("debug_clkfix", "0")) {
821 dirty |= check_nv("clkfreq", "216");
822 }
823 if (dirty) {
824 nvram_set("sdram_ncdl", "0x0");
825 }
826 dirty |= check_nv("pa0itssit", "62");
827 dirty |= check_nv("pa0b0", "0x15eb");
828 dirty |= check_nv("pa0b1", "0xfa82");
829 dirty |= check_nv("pa0b2", "0xfe66");
830 //dirty |= check_nv("pa0maxpwr", "0x4e");
831 break;
832 case HW_BCM5352E: // G v4, GS v3, v4
833 dirty |= check_nv("sdram_init", "0x010b");
834 dirty |= check_nv("sdram_config", "0x0062");
835 if (dirty) {
836 nvram_set("sdram_ncdl", "0x0");
837 }
838 dirty |= check_nv("pa0itssit", "62");
839 dirty |= check_nv("pa0b0", "0x168b");
840 dirty |= check_nv("pa0b1", "0xfabf");
841 dirty |= check_nv("pa0b2", "0xfeaf");
842 //dirty |= check_nv("pa0maxpwr", "0x4e");
843 break;
844 case HW_BCM5354G:
845 dirty |= check_nv("pa0itssit", "62");
846 dirty |= check_nv("pa0b0", "0x1326");
847 dirty |= check_nv("pa0b1", "0xFB51");
848 dirty |= check_nv("pa0b2", "0xFE87");
849 //dirty |= check_nv("pa0maxpwr", "0x4e");
850 break;
851 case HW_BCM4704_BCM5325F:
852 // nothing to do
853 break;
854 default:
855 dirty |= check_nv("pa0itssit", "62");
856 dirty |= check_nv("pa0b0", "0x170c");
857 dirty |= check_nv("pa0b1", "0xfa24");
858 dirty |= check_nv("pa0b2", "0xfe70");
859 //dirty |= check_nv("pa0maxpwr", "0x48");
860 break;
861 }
862 break;
863
864 } // switch (model)
865
866 dirty |= init_vlan_ports();
867
868 if (dirty) {
869 nvram_commit();
870 REBOOT: // do a simple reboot
871 sync();
872 reboot(RB_AUTOBOOT);
873 exit(0);
874 }
875 }
876
877 static int init_nvram(void)
878 {
879 unsigned long features;
880 int model;
881 const char *mfr;
882 const char *name;
883 const char *ver;
884 char s[256];
885 unsigned long bf;
886 unsigned long n;
887
888 model = get_model();
889 sprintf(s, "%d", model);
890 nvram_set("t_model", s);
891
892 mfr = "Broadcom";
893 name = NULL;
894 ver = NULL;
895 features = 0;
896 switch (model) {
897 case MODEL_WRT54G:
898 mfr = "Linksys";
899 name = "WRT54G/GS/GL";
900 switch (check_hw_type()) {
901 case HW_BCM4712:
902 nvram_set("gpio2", "adm_eecs");
903 nvram_set("gpio3", "adm_eesk");
904 nvram_unset("gpio4");
905 nvram_set("gpio5", "adm_eedi");
906 nvram_set("gpio6", "adm_rc");
907 break;
908 case HW_BCM4702:
909 nvram_unset("gpio2");
910 nvram_unset("gpio3");
911 nvram_unset("gpio4");
912 nvram_unset("gpio5");
913 nvram_unset("gpio6");
914 break;
915 case HW_BCM5352E:
916 nvram_set("opo", "0x0008");
917 nvram_set("ag0", "0x02");
918 // drop
919 default:
920 nvram_set("gpio2", "ses_led");
921 nvram_set("gpio3", "ses_led2");
922 nvram_set("gpio4", "ses_button");
923 features = SUP_SES | SUP_WHAM_LED;
924 break;
925 }
926 break;
927 case MODEL_WTR54GS:
928 mfr = "Linksys";
929 name = "WTR54GS";
930 if (!nvram_match("t_fix1", (char *)name)) {
931 nvram_set("lan_ifnames", "vlan0 eth1");
932 nvram_set("gpio2", "ses_button");
933 nvram_set("reset_gpio", "7");
934 }
935 nvram_set("pa0itssit", "62");
936 nvram_set("pa0b0", "0x1542");
937 nvram_set("pa0b1", "0xfacb");
938 nvram_set("pa0b2", "0xfec7");
939 //nvram_set("pa0maxpwr", "0x4c");
940 gpio_write(1 << 2, 1); // By BaoWeiQuan Clear power light blinking
941 features = SUP_SES;
942 break;
943 case MODEL_WRTSL54GS:
944 mfr = "Linksys";
945 name = "WRTSL54GS";
946 features = SUP_SES | SUP_WHAM_LED;
947 break;
948 case MODEL_WHRG54S:
949 mfr = "Buffalo";
950 name = "WHR-G54S";
951 features = SUP_SES | SUP_AOSS_LED | SUP_BRAU;
952 break;
953 case MODEL_WHRHPG54:
954 case MODEL_WZRRSG54HP:
955 case MODEL_WZRHPG54:
956 mfr = "Buffalo";
957 features = SUP_SES | SUP_AOSS_LED | SUP_HPAMP;
958 switch (model) {
959 case MODEL_WZRRSG54HP:
960 name = "WZR-RS-G54HP";
961 break;
962 case MODEL_WZRHPG54:
963 name = "WZR-HP-G54";
964 break;
965 default:
966 name = "WHR-HP-G54";
967 features = SUP_SES | SUP_AOSS_LED | SUP_BRAU | SUP_HPAMP;
968 break;
969 }
970
971 bf = strtoul(nvram_safe_get("boardflags"), NULL, 0);
972 switch (bf) {
973 case 0x0758:
974 case 0x1758:
975 case 0x2758:
976 case 0x3758:
977 if ( nvram_is_empty("wlx_hpamp") || nvram_match("wlx_hpamp", "")) {
978 if (nvram_get_int("wl_txpwr") > 10) nvram_set("wl_txpwr", "10");
979 nvram_set("wlx_hpamp", "1");
980 nvram_set("wlx_hperx", "0");
981 }
982
983 n = bf;
984 if (nvram_match("wlx_hpamp", "0")) {
985 n &= ~0x2000UL;
986 }
987 else {
988 n |= 0x2000UL;
989 }
990 if (nvram_match("wlx_hperx", "0")) {
991 n |= 0x1000UL;
992 }
993 else {
994 n &= ~0x1000UL;
995 }
996 if (bf != n) {
997 sprintf(s, "0x%lX", n);
998 nvram_set("boardflags", s);
999 }
1000 break;
1001 default:
1002 syslog(LOG_WARNING, "Unexpected: boardflag=%lX", bf);
1003 break;
1004 }
1005 break;
1006 case MODEL_WBRG54:
1007 mfr = "Buffalo";
1008 name = "WBR-G54";
1009 break;
1010 case MODEL_WBR2G54:
1011 mfr = "Buffalo";
1012 name = "WBR2-G54";
1013 features = SUP_SES | SUP_AOSS_LED;
1014 break;
1015 case MODEL_WHR2A54G54:
1016 mfr = "Buffalo";
1017 name = "WHR2-A54G54";
1018 features = SUP_SES | SUP_AOSS_LED | SUP_BRAU;
1019 break;
1020 case MODEL_WHR3AG54:
1021 mfr = "Buffalo";
1022 name = "WHR3-AG54";
1023 features = SUP_SES | SUP_AOSS_LED;
1024 break;
1025 case MODEL_WZRG54:
1026 mfr = "Buffalo";
1027 name = "WZR-G54";
1028 features = SUP_SES | SUP_AOSS_LED;
1029 break;
1030 case MODEL_WZRRSG54:
1031 mfr = "Buffalo";
1032 name = "WZR-RS-G54";
1033 features = SUP_SES | SUP_AOSS_LED;
1034 break;
1035 case MODEL_WVRG54NF:
1036 mfr = "Buffalo";
1037 name = "WVR-G54-NF";
1038 features = SUP_SES;
1039 break;
1040 case MODEL_WZRG108:
1041 mfr = "Buffalo";
1042 name = "WZR-G108";
1043 features = SUP_SES | SUP_AOSS_LED;
1044 break;
1045 case MODEL_RT390W:
1046 mfr = "Fuji";
1047 name = "RT390W";
1048 break;
1049 case MODEL_WR850GV1:
1050 mfr = "Motorola";
1051 name = "WR850G v1";
1052 features = SUP_NONVE;
1053 break;
1054 case MODEL_WR850GV2:
1055 mfr = "Motorola";
1056 name = "WR850G v2/v3";
1057 features = SUP_NONVE;
1058 break;
1059 case MODEL_WL500GP:
1060 mfr = "Asus";
1061 name = "WL-500gP";
1062 features = SUP_SES;
1063 #ifdef TCONFIG_USB
1064 nvram_set("usb_ohci", "-1");
1065 #endif
1066 if (!nvram_match("t_fix1", (char *)name)) {
1067 nvram_set("lan_ifnames", "vlan0 eth1 eth2 eth3"); // set to "vlan0 eth2" by DD-WRT; default: vlan0 eth1
1068 }
1069 break;
1070 case MODEL_WL500W:
1071 mfr = "Asus";
1072 name = "WL-500W";
1073 features = SUP_SES | SUP_80211N;
1074 #ifdef TCONFIG_USB
1075 nvram_set("usb_ohci", "-1");
1076 #endif
1077 break;
1078 case MODEL_WL500GE:
1079 mfr = "Asus";
1080 name = "WL-550gE";
1081 // features = ?
1082 #ifdef TCONFIG_USB
1083 nvram_set("usb_uhci", "-1");
1084 #endif
1085 break;
1086 case MODEL_WX6615GT:
1087 mfr = "SparkLAN";
1088 name = "WX-6615GT";
1089 // features = ?
1090 break;
1091 case MODEL_MN700:
1092 mfr = "Microsoft";
1093 name = "MN-700";
1094 break;
1095 case MODEL_WR100:
1096 mfr = "Viewsonic";
1097 name = "WR100";
1098 break;
1099 case MODEL_WLA2G54L:
1100 mfr = "Buffalo";
1101 name = "WLA2-G54L";
1102 if (!nvram_match("t_fix1", (char *)name)) {
1103 nvram_set("lan_ifnames", "vlan0 eth1 eth2");
1104 nvram_set("wl_ifname", "eth1");
1105 nvram_set("wan_ifname", "none");
1106 }
1107 break;
1108 case MODEL_TM2300:
1109 mfr = "Dell";
1110 name = "TrueMobile 2300";
1111 break;
1112
1113 /*
1114
1115 ...
1116
1117 */
1118
1119 #ifndef WL_BSS_INFO_VERSION
1120 #error WL_BSS_INFO_VERSION
1121 #endif
1122 #if WL_BSS_INFO_VERSION >= 108
1123 /*
1124 case MODEL_WRH54G:
1125 mfr = "Linksys";
1126 name = "WRH54G";
1127
1128 nvram_set("opo", "12");
1129 break;
1130 */
1131 case MODEL_WHRG125:
1132 mfr = "Buffalo";
1133 name = "WHR-G125";
1134 features = SUP_SES | SUP_AOSS_LED | SUP_BRAU;
1135
1136 nvram_set("opo", "0x0008");
1137 nvram_set("ag0", "0x0C");
1138 break;
1139 #ifdef CONFIG_BCMWL5
1140 case MODEL_L600N:
1141 mfr = "Rosewill";
1142 name = "L600N";
1143 features = SUP_SES | SUP_80211N;
1144 if (!nvram_match("t_fix1", (char *)name)) {
1145 #ifdef TCONFIG_USBAP
1146 nvram_set("wl1_hwaddr", nvram_safe_get("0:macaddr"));
1147 nvram_set("ehciirqt", "3");
1148 nvram_set("qtdc_pid", "48407");
1149 nvram_set("qtdc_vid", "2652");
1150 nvram_set("qtdc0_ep", "4");
1151 nvram_set("qtdc0_sz", "0");
1152 nvram_set("qtdc1_ep", "18");
1153 nvram_set("qtdc1_sz", "10");
1154 nvram_set("lan_ifnames", "vlan1 eth1 eth2");
1155 nvram_set("landevs", "vlan1 wl0 wl1");
1156 nvram_set("wl0_ifname", "wl0");
1157 nvram_set("wl1_ifname", "wl1");
1158 #else
1159 nvram_set("lan_ifnames", "vlan1 eth1");
1160 nvram_set("landevs", "vlan1 wl0");
1161 #endif
1162 nvram_set("wl_ifname", "eth1");
1163 nvram_set("wan_ifnameX", "vlan2");
1164 nvram_set("wandevs", "vlan2");
1165 }
1166 break;
1167 case MODEL_DIR620C1:
1168 mfr = "D-Link";
1169 name = "Dir-620 C1";
1170 features = SUP_SES | SUP_80211N;
1171 if (!nvram_match("t_fix1", (char *)name)) {
1172 #ifdef TCONFIG_USBAP
1173 nvram_set("lan_ifnames", "vlan1 eth1 eth2");
1174 nvram_set("landevs", "vlan1 wl0 wl1");
1175 nvram_set("wl0_ifname", "eth1");
1176 nvram_set("wl1_ifname", "eth2");
1177 #else
1178 nvram_set("lan_ifnames", "vlan1 eth1");
1179 nvram_set("landevs", "vlan1 wl0");
1180 #endif
1181 nvram_set("wan_ifnameX", "vlan2");
1182 nvram_set("wl_ifname", "eth1");
1183
1184 }
1185 break;
1186 case MODEL_CW5358U:
1187 mfr = "Catchtech";
1188 name = "CW-5358U";
1189 features = SUP_SES | SUP_80211N;
1190 #ifdef TCONFIG_USB
1191 nvram_set("usb_uhci", "-1");
1192 #endif
1193 if (!nvram_match("t_fix1", (char *)name)) {
1194 nvram_set("lan_ifnames", "vlan1 eth1");
1195 nvram_set("wan_ifname", "vlan2");
1196 nvram_set("wan_ifnames", "vlan2");
1197 nvram_set("wan_ifnameX", "vlan2");
1198 nvram_set("wl_ifname", "eth1");
1199 }
1200 break;
1201 case MODEL_HG320:
1202 mfr = "FiberHome";
1203 name = "HG320";
1204 features = SUP_SES | SUP_80211N;
1205 #ifdef TCONFIG_USB
1206 nvram_set("usb_uhci", "-1");
1207 #endif
1208 if (!nvram_match("t_fix1", (char *)name)) {
1209 nvram_set("lan_ifnames", "vlan1 eth1");
1210 nvram_set("wan_ifname", "vlan2");
1211 nvram_set("wan_ifnames", "vlan2");
1212 nvram_set("wan_ifnameX", "vlan2");
1213 nvram_set("wl_ifname", "eth1");
1214 }
1215 break;
1216 case MODEL_RG200E_CA:
1217 mfr = "ChinaNet";
1218 name = "RG200E-CA";
1219 features = SUP_SES | SUP_80211N;
1220 #ifdef TCONFIG_USB
1221 nvram_set("usb_uhci", "-1");
1222 #endif
1223 if (!nvram_match("t_fix1", (char *)name)) {
1224 nvram_set("lan_ifnames", "vlan1 eth1");
1225 nvram_set("wan_ifname", "vlan2");
1226 nvram_set("wan_ifnames", "vlan2");
1227 nvram_set("wan_ifnameX", "vlan2");
1228 nvram_set("wl_ifname", "eth1");
1229 }
1230 break;
1231 case MODEL_H218N:
1232 mfr = "ZTE";
1233 name = "H218N";
1234 features = SUP_SES | SUP_80211N;
1235 #ifdef TCONFIG_USB
1236 nvram_set("usb_uhci", "-1");
1237 #endif
1238 if (!nvram_match("t_fix1", (char *)name)) {
1239 nvram_set("lan_ifnames", "vlan1 eth1");
1240 nvram_set("wan_ifname", "vlan2");
1241 nvram_set("wan_ifnames", "vlan2");
1242 nvram_set("wan_ifnameX", "vlan2");
1243 nvram_set("wl_ifname", "eth1");
1244 }
1245 break;
1246 case MODEL_TDN80:
1247 mfr = "Tenda";
1248 name = "N80";
1249 features = SUP_SES | SUP_80211N | SUP_1000ET | SUP_80211AC;
1250 #ifdef TCONFIG_USB
1251 nvram_set("usb_uhci", "-1");
1252 #endif
1253 if (!nvram_match("t_fix1", (char *)name)) {
1254 nvram_set("lan_ifnames", "vlan1 eth1 eth2");
1255 nvram_set("wan_ifnameX", "vlan2");
1256 nvram_set("wan_ifnames", "vlan2");
1257 nvram_set("wan_ifnameX", "vlan2");
1258 nvram_set("wl_ifnames", "eth1 eth2");
1259 nvram_set("wl_ifname", "eth1");
1260 nvram_set("wl0_ifname", "eth2");
1261 nvram_set("wl1_ifname", "eth1");
1262 nvram_set("wl0_bw_cap","7");
1263 nvram_set("wl0_chanspec","36/80");
1264 nvram_set("wl1_bw_cap","3");
1265 nvram_set("wl1_chanspec","1l");
1266 nvram_set("blink_5g_interface","eth1");
1267 //nvram_set("landevs", "vlan1 wl0 wl1");
1268 //nvram_set("wandevs", "vlan2");
1269
1270 // fix WL mac`s
1271 nvram_set("wl0_hwaddr", nvram_safe_get("pci/1/1/macaddr"));
1272 nvram_set("wl1_hwaddr", nvram_safe_get("pci/2/1/macaddr"));
1273
1274 // fix ssid according to 5G(eth2) and 2.4G(eth1)
1275 nvram_set("wl_ssid","Tomato50");
1276 nvram_set("wl0_ssid","Tomato50");
1277 nvram_set("wl1_ssid","Tomato24");
1278 }
1279 break;
1280 case MODEL_TDN60:
1281 mfr = "Tenda";
1282 name = "N60";
1283 features = SUP_SES | SUP_80211N | SUP_1000ET;
1284 #ifdef TCONFIG_USB
1285 nvram_set("usb_uhci", "-1");
1286 #endif
1287 if (!nvram_match("t_fix1", (char *)name)) {
1288 nvram_set("lan_ifnames", "vlan1 eth1 eth2");
1289 nvram_set("wan_ifnameX", "vlan2");
1290 nvram_set("wan_ifnames", "vlan2");
1291 nvram_set("wan_ifnameX", "vlan2");
1292 nvram_set("wl_ifnames", "eth1 eth2");
1293 nvram_set("wl_ifname", "eth1");
1294 nvram_set("wl0_ifname", "eth1");
1295 nvram_set("wl1_ifname", "eth2");
1296 nvram_set("wl0_bw_cap","3");
1297 nvram_set("wl0_chanspec","1l");
1298 nvram_set("wl1_bw_cap","7");
1299 nvram_set("wl1_chanspec","36/80");
1300 nvram_set("blink_5g_interface","eth2");
1301 //nvram_set("landevs", "vlan1 wl0 wl1");
1302 //nvram_set("wandevs", "vlan2");
1303
1304 // fix WL mac`s
1305 nvram_set("wl0_hwaddr", nvram_safe_get("sb/1/macaddr"));
1306 nvram_set("wl1_hwaddr", nvram_safe_get("0:macaddr"));
1307 }
1308 break;
1309 case MODEL_TDN6:
1310 mfr = "Tenda";
1311 name = "N6";
1312 features = SUP_SES | SUP_80211N;
1313 #ifdef TCONFIG_USB
1314 nvram_set("usb_uhci", "-1");
1315 #endif
1316 if (!nvram_match("t_fix1", (char *)name)) {
1317 nvram_set("lan_ifnames", "vlan1 eth1 eth2");
1318 nvram_set("wan_ifnameX", "vlan2");
1319 nvram_set("wan_ifnames", "vlan2");
1320 nvram_set("wan_ifnameX", "vlan2");
1321 nvram_set("wl_ifnames", "eth1 eth2");
1322 nvram_set("wl_ifname", "eth1");
1323 nvram_set("wl0_ifname", "eth1");
1324 nvram_set("wl1_ifname", "eth2");
1325 nvram_set("wl0_bw_cap","3");
1326 nvram_set("wl0_chanspec","1l");
1327 nvram_set("wl1_bw_cap","7");
1328 nvram_set("wl1_chanspec","36/80");
1329 nvram_set("blink_5g_interface","eth2");
1330
1331 // fix WL mac`s
1332 nvram_set("wl0_hwaddr", nvram_safe_get("sb/1/macaddr"));
1333 nvram_set("wl1_hwaddr", nvram_safe_get("0:macaddr"));
1334 }
1335 break;
1336 case MODEL_RTN10:
1337 case MODEL_RTN10P:
1338 mfr = "Asus";
1339 name = nvram_match("boardrev", "0x1153") ? "RT-N10P" : "RT-N10";
1340 features = SUP_SES | SUP_80211N;
1341 if (!nvram_match("t_fix1", (char *)name)) {
1342 nvram_set("lan_ifnames", "vlan0 eth1");
1343 nvram_set("wan_ifnameX", "vlan1");
1344 nvram_set("wl_ifname", "eth1");
1345 }
1346 break;
1347 case MODEL_RTN10U:
1348 mfr = "Asus";
1349 name = "RT-N10U";
1350 features = SUP_SES | SUP_80211N;
1351 #ifdef TCONFIG_USB
1352 nvram_set("usb_uhci", "-1");
1353 #endif
1354 if (!nvram_match("t_fix1", (char *)name)) {
1355 nvram_set("lan_ifnames", "vlan0 eth1");
1356 nvram_set("wan_ifnameX", "vlan1");
1357 nvram_set("wl_ifname", "eth1");
1358 }
1359 break;
1360 case MODEL_RTN12:
1361 mfr = "Asus";
1362 name = "RT-N12";
1363 features = SUP_SES | SUP_BRAU | SUP_80211N;
1364 if (!nvram_match("t_fix1", (char *)name)) {
1365 nvram_set("lan_ifnames", "vlan0 eth1");
1366 nvram_set("wan_ifnameX", "vlan1");
1367 nvram_set("wl_ifname", "eth1");
1368 }
1369 break;
1370 case MODEL_RTN12B1:
1371 mfr = "Asus";
1372 name = "RT-N12 B1";
1373 features = SUP_80211N;
1374 if (!nvram_match("t_fix1", (char *)name)) {
1375 nvram_set("lan_ifnames", "vlan0 eth1");
1376 nvram_set("wan_ifnameX", "vlan1");
1377 nvram_set("wl_ifname", "eth1");
1378 }
1379 break;
1380 case MODEL_RTN15U:
1381 mfr = "Asus";
1382 name = "RT-N15U";
1383 features = SUP_SES | SUP_80211N | SUP_1000ET;
1384 #ifdef TCONFIG_USB
1385 nvram_set("usb_uhci", "-1");
1386 #endif
1387 if (!nvram_match("t_fix1", (char *)name)) {
1388 nvram_set("lan_ifnames", "vlan1 eth1");
1389 nvram_set("wan_iface", "vlan2");
1390 nvram_set("wan_ifname", "vlan2");
1391 nvram_set("wan_ifnameX", "vlan2");
1392 nvram_set("wan_ifnames", "vlan2");
1393 nvram_set("wl_ifname", "eth1");
1394 }
1395 break;
1396 case MODEL_RTN16:
1397 mfr = "Asus";
1398 name = "RT-N16";
1399 features = SUP_SES | SUP_80211N | SUP_1000ET;
1400 #ifdef TCONFIG_USB
1401 nvram_set("usb_uhci", "-1");
1402 #endif
1403 if (!nvram_match("t_fix1", (char *)name)) {
1404 nvram_set("lan_ifnames", "vlan1 eth1");
1405 nvram_set("wan_ifnameX", "vlan2");
1406 nvram_set("wl_ifname", "eth1");
1407 nvram_set("vlan_enable", "1");
1408 }
1409 break;
1410 case MODEL_RTN53:
1411 case MODEL_RTN53A1:
1412 mfr = "Asus";
1413 name = nvram_match("boardrev", "0x1446") ? "RT-N53 A1" : "RT-N53";
1414 features = SUP_SES | SUP_80211N;
1415 #if defined(LINUX26) && defined(TCONFIG_USBAP)
1416 if (nvram_get_int("usb_storage") == 1) nvram_set("usb_storage", "-1");
1417 #endif
1418 if (!nvram_match("t_fix1", (char *)name)) {
1419 #ifdef TCONFIG_USBAP
1420 nvram_set("wl1_hwaddr", nvram_safe_get("0:macaddr"));
1421 nvram_set("ehciirqt", "3");
1422 nvram_set("qtdc_pid", "48407");
1423 nvram_set("qtdc_vid", "2652");
1424 nvram_set("qtdc0_ep", "4");
1425 nvram_set("qtdc0_sz", "0");
1426 nvram_set("qtdc1_ep", "18");
1427 nvram_set("qtdc1_sz", "10");
1428 nvram_set("lan_ifnames", "vlan2 eth1 eth2");
1429 nvram_set("landevs", "vlan2 wl0 wl1");
1430 nvram_set("wl1_ifname", "eth2");
1431 #else
1432 nvram_set("lan_ifnames", "vlan2 eth1");
1433 nvram_set("landevs", "vlan2 wl0");
1434 #endif
1435 nvram_set("lan_ifname", "br0");
1436 nvram_set("wl_ifname", "eth1");
1437 nvram_set("wl0_ifname", "eth1");
1438 nvram_set("wan_ifnameX", "vlan1");
1439 nvram_set("wandevs", "vlan1");
1440 nvram_unset("vlan0ports");
1441 }
1442 break;
1443 case MODEL_RTN66U:
1444 mfr = "Asus";
1445 #ifdef TCONFIG_AC66U
1446 name = "RT-AC66U";
1447 features = SUP_SES | SUP_80211N | SUP_1000ET | SUP_80211AC;
1448 #else
1449 name = "RT-N66U";
1450 features = SUP_SES | SUP_80211N | SUP_1000ET;
1451 #if defined(LINUX26) && defined(TCONFIG_MICROSD)
1452 if (nvram_get_int("usb_mmc") == -1) nvram_set("usb_mmc", "1");
1453 #endif
1454 #endif
1455
1456 #ifdef TCONFIG_USB
1457 nvram_set("usb_uhci", "-1");
1458 #endif
1459 if (!nvram_match("t_fix1", (char *)name)) {
1460 nvram_set("lan_ifnames", "vlan1 eth1 eth2");
1461 nvram_set("wan_ifnameX", "vlan2");
1462 nvram_set("wl_ifnames", "eth1 eth2");
1463 #ifdef TCONFIG_AC66U
1464 nvram_set("wl_ifname", "eth1");
1465 nvram_set("wl0_ifname", "eth1");
1466 nvram_set("wl1_ifname", "eth2");
1467 #endif
1468 nvram_set("landevs", "vlan1 wl0 wl1");
1469 nvram_set("wandevs", "vlan2");
1470 #ifndef TCONFIG_AC66U
1471 #if defined(LINUX26) && defined(TCONFIG_USB)
1472 nvram_set("usb_noled", "1-1.4"); /* SD/MMC Card */
1473 #endif
1474 #else
1475 nvram_set("wl1_bw_cap","7");
1476 nvram_set("wl1_chanspec","36/80");
1477 nvram_set("wl0_bw_cap","3");
1478 nvram_set("wl0_chanspec","1l");
1479 nvram_set("blink_5g_interface","eth2");
1480
1481 // fix WL mac`s
1482 strcpy(s, nvram_safe_get("et0macaddr"));
1483 inc_mac(s, +2);
1484 nvram_set("wl0_hwaddr", s);
1485 inc_mac(s, +1);
1486 nvram_set("wl1_hwaddr", s);
1487
1488 // bcm4360ac_defaults
1489 nvram_set("pci/2/1/aa2g", "0");
1490 nvram_set("pci/2/1/aa5g", "7");
1491 nvram_set("pci/2/1/aga0", "71");
1492 nvram_set("pci/2/1/aga1", "71");
1493 nvram_set("pci/2/1/aga2", "71");
1494 nvram_set("pci/2/1/agbg0", "133");
1495 nvram_set("pci/2/1/agbg1", "133");
1496 nvram_set("pci/2/1/agbg2", "133");
1497 nvram_set("pci/2/1/antswitch", "0");
1498 nvram_set("pci/2/1/cckbw202gpo", "0");
1499 nvram_set("pci/2/1/cckbw20ul2gpo", "0");
1500 nvram_set("pci/2/1/dot11agofdmhrbw202gpo", "0");
1501 nvram_set("pci/2/1/femctrl", "3");
1502 nvram_set("pci/2/1/papdcap2g", "0");
1503 nvram_set("pci/2/1/tworangetssi2g", "0");
1504 nvram_set("pci/2/1/pdgain2g", "4");
1505 nvram_set("pci/2/1/epagain2g", "0");
1506 nvram_set("pci/2/1/tssiposslope2g", "1");
1507 nvram_set("pci/2/1/gainctrlsph", "0");
1508 nvram_set("pci/2/1/papdcap5g", "0");
1509 nvram_set("pci/2/1/tworangetssi5g", "0");
1510 nvram_set("pci/2/1/pdgain5g", "4");
1511 nvram_set("pci/2/1/epagain5g", "0");
1512 nvram_set("pci/2/1/tssiposslope5g", "1");
1513 nvram_set("pci/2/1/maxp2ga0", "76");
1514 nvram_set("pci/2/1/maxp2ga1", "76");
1515 nvram_set("pci/2/1/maxp2ga2", "76");
1516 nvram_set("pci/2/1/mcsbw202gpo", "0");
1517 nvram_set("pci/2/1/mcsbw402gpo", "0");
1518 nvram_set("pci/2/1/measpower", "0x7f");
1519 nvram_set("pci/2/1/measpower1", "0x7f");
1520 nvram_set("pci/2/1/measpower2", "0x7f");
1521 nvram_set("pci/2/1/noiselvl2ga0", "31");
1522 nvram_set("pci/2/1/noiselvl2ga1", "31");
1523 nvram_set("pci/2/1/noiselvl2ga2", "31");
1524 nvram_set("pci/2/1/noiselvl5gha0", "31");
1525 nvram_set("pci/2/1/noiselvl5gha1", "31");
1526 nvram_set("pci/2/1/noiselvl5gha2", "31");
1527 nvram_set("pci/2/1/noiselvl5gla0", "31");
1528 nvram_set("pci/2/1/noiselvl5gla1", "31");
1529 nvram_set("pci/2/1/noiselvl5gla2", "31");
1530 nvram_set("pci/2/1/noiselvl5gma0", "31");
1531 nvram_set("pci/2/1/noiselvl5gma1", "31");
1532 nvram_set("pci/2/1/noiselvl5gma2", "31");
1533 nvram_set("pci/2/1/noiselvl5gua0", "31");
1534 nvram_set("pci/2/1/noiselvl5gua1", "31");
1535 nvram_set("pci/2/1/noiselvl5gua2", "31");
1536 nvram_set("pci/2/1/ofdmlrbw202gpo", "0");
1537 nvram_set("pci/2/1/pa2ga0", "0xfe72,0x14c0,0xfac7");
1538 nvram_set("pci/2/1/pa2ga1", "0xfe80,0x1472,0xfabc");
1539 nvram_set("pci/2/1/pa2ga2", "0xfe82,0x14bf,0xfad9");
1540 nvram_set("pci/2/1/pcieingress_war", "15");
1541 nvram_set("pci/2/1/phycal_tempdelta", "255");
1542 nvram_set("pci/2/1/rawtempsense", "0x1ff");
1543 nvram_set("pci/2/1/rxchain", "7");
1544 nvram_set("pci/2/1/rxgainerr2g", "0xffff");
1545 nvram_set("pci/2/1/rxgainerr5g", "0xffff,0xffff,0xffff,0xffff");
1546 nvram_set("pci/2/1/rxgains2gelnagaina0", "0");
1547 nvram_set("pci/2/1/rxgains2gelnagaina1", "0");
1548 nvram_set("pci/2/1/rxgains2gelnagaina2", "0");
1549 nvram_set("pci/2/1/rxgains2gtrelnabypa0", "0");
1550 nvram_set("pci/2/1/rxgains2gtrelnabypa1", "0");
1551 nvram_set("pci/2/1/rxgains2gtrelnabypa2", "0");
1552 nvram_set("pci/2/1/rxgains2gtrisoa0", "0");
1553 nvram_set("pci/2/1/rxgains2gtrisoa1", "0");
1554 nvram_set("pci/2/1/rxgains2gtrisoa2", "0");
1555 nvram_set("pci/2/1/sar2g", "18");
1556 nvram_set("pci/2/1/sar5g", "15");
1557 nvram_set("pci/2/1/sromrev", "11");
1558 nvram_set("pci/2/1/subband5gver", "0x4");
1559 nvram_set("pci/2/1/tempcorrx", "0x3f");
1560 nvram_set("pci/2/1/tempoffset", "255");
1561 nvram_set("pci/2/1/temps_hysteresis", "15");
1562 nvram_set("pci/2/1/temps_period", "15");
1563 nvram_set("pci/2/1/tempsense_option", "0x3");
1564 nvram_set("pci/2/1/tempsense_slope", "0xff");
1565 nvram_set("pci/2/1/tempthresh", "255");
1566 nvram_set("pci/2/1/txchain", "7");
1567 nvram_set("pci/2/1/ledbh0", "2");
1568 nvram_set("pci/2/1/ledbh1", "5");
1569 nvram_set("pci/2/1/ledbh2", "4");
1570 nvram_set("pci/2/1/ledbh3", "11");
1571 nvram_set("pci/2/1/ledbh10", "7");
1572
1573 //force EU country for eth2
1574 nvram_set("pci/2/1/ccode", "EU");
1575 #endif // TCONFIG_AC66U
1576 }
1577 break;
1578
1579 case MODEL_DIR865L:
1580 mfr = "D-link";
1581 name = "DIR-865L";
1582 features = SUP_SES | SUP_80211N | SUP_1000ET | SUP_80211AC;
1583 #ifdef TCONFIG_USB
1584 nvram_set("usb_uhci", "-1");
1585 #endif
1586 //default nvram setting extracted from original router
1587 if (!nvram_match("t_fix1", (char *)name)) {
1588 nvram_set("lan_ifnames", "vlan1 eth1 eth2");
1589 nvram_set("wan_ifnameX", "vlan2");
1590 nvram_set("wl_ifnames", "eth1 eth2");
1591 nvram_set("wl_ifname", "eth1");
1592 nvram_set("wl0_ifname", "eth1");
1593 nvram_set("wl1_ifname", "eth2");
1594 nvram_set("wl0_bw_cap","7");
1595 nvram_set("wl0_chanspec","36/80");
1596 nvram_set("wl1_bw_cap","3");
1597 nvram_set("wl1_chanspec","1l");
1598 nvram_set("blink_5g_interface","eth1");
1599 //nvram_set("landevs", "vlan1 wl0 wl1");
1600 //nvram_set("wandevs", "vlan2");
1601
1602 // init wireless power DIR865L defaults
1603 // 2.4 G
1604 nvram_set("pci/2/1/maxp2ga0","0x64");
1605 nvram_set("pci/2/1/maxp2ga1","0x64");
1606 nvram_set("pci/2/1/maxp2ga2","0x64");
1607 nvram_set("pci/2/1/cckbw202gpo","0x7777");
1608 nvram_set("pci/2/1/cckbw20ul2gpo","0x7777");
1609 nvram_set("pci/2/1/legofdmbw202gpo","0x77777777");
1610 nvram_set("pci/2/1/legofdmbw20ul2gpo","0x77777777");
1611 nvram_set("pci/2/1/mcsbw202gpo","0x77777777");
1612 nvram_set("pci/2/1/mcsbw20ul2gpo","0x77777777");
1613 nvram_set("pci/2/1/mcsbw402gpo","0x99999999");
1614
1615 nvram_set("pci/2/1/pa2gw0a0","0xFE61");
1616 nvram_set("pci/2/1/pa2gw1a0","0x1E65");
1617 nvram_set("pci/2/1/pa2gw2a0","0xF89E");
1618 nvram_set("pci/2/1/pa2gw0a1","0xFE5F");
1619 nvram_set("pci/2/1/pa2gw1a1","0x1DA5");
1620 nvram_set("pci/2/1/pa2gw2a1","0xF8C3");
1621 nvram_set("pci/2/1/pa2gw0a2","0xFE50");
1622 nvram_set("pci/2/1/pa2gw1a2","0x1D68");
1623 nvram_set("pci/2/1/pa2gw2a2","0xF8B7");
1624
1625 // 5 G
1626 nvram_set("pci/1/1/devid","0x43a2");
1627 nvram_set("pci/1/1/sromrev","11");
1628 nvram_set("pci/1/1/boardrev","0x1307");
1629 nvram_set("pci/1/1/boardflags","0x10000000");
1630 nvram_set("pci/1/1/boardflags2","0x300002");
1631 nvram_set("pci/1/1/boardtype","0x621");
1632 nvram_set("pci/1/1/boardflags3","0x300030");
1633 nvram_set("pci/1/1/boardnum","0");
1634 //nvram_set("pci/1/1/macaddr","00:90:4c:d4:00:00");
1635 //nvram_set("pci/1/1/ccode","0");
1636 //nvram_set("pci/1/1/regrev","0");
1637 nvram_set("pci/1/1/aa2g","0");
1638 nvram_set("pci/1/1/aa5g","7");
1639 nvram_set("pci/1/1/agbg0","71");
1640 nvram_set("pci/1/1/agbg1","71");
1641 nvram_set("pci/1/1/agbg2","133");
1642 nvram_set("pci/1/1/aga0","71");
1643 nvram_set("pci/1/1/aga1","133");
1644 nvram_set("pci/1/1/aga2","133");
1645 nvram_set("pci/1/1/txchain","7");
1646 nvram_set("pci/1/1/rxchain","7");
1647 nvram_set("pci/1/1/antswitch","0");
1648 nvram_set("pci/1/1/tssiposslope2g","1");
1649 nvram_set("pci/1/1/epagain2g","0");
1650 nvram_set("pci/1/1/pdgain2g","4");
1651 nvram_set("pci/1/1/tworangetssi2g","0");
1652 nvram_set("pci/1/1/papdcap2g","0");
1653 nvram_set("pci/1/1/femctrl","3");
1654 nvram_set("pci/1/1/tssiposslope5g","1");
1655 nvram_set("pci/1/1/epagain5g","0");
1656 nvram_set("pci/1/1/pdgain5g","4");
1657 nvram_set("pci/1/1/tworangetssi5g","0");
1658 nvram_set("pci/1/1/papdcap5g","0");
1659 nvram_set("pci/1/1/gainctrlsph","0");
1660 nvram_set("pci/1/1/tempthresh","255");
1661 nvram_set("pci/1/1/tempoffset","255");
1662 nvram_set("pci/1/1/rawtempsense","0x1ff");
1663 nvram_set("pci/1/1/measpower","0x7f");
1664 nvram_set("pci/1/1/tempsense_slope","0xff");
1665 nvram_set("pci/1/1/tempcorrx","0x3f");
1666 nvram_set("pci/1/1/tempsense_option","0x3");
1667 nvram_set("pci/1/1/phycal_tempdelta","255");
1668 nvram_set("pci/1/1/temps_period","15");
1669 nvram_set("pci/1/1/temps_hysteresis","15");
1670 nvram_set("pci/1/1/measpower1","0x7f");
1671 nvram_set("pci/1/1/measpower2","0x7f");
1672 nvram_set("pci/1/1/pdoffset40ma0","0");
1673 nvram_set("pci/1/1/pdoffset40ma1","0");
1674 nvram_set("pci/1/1/pdoffset40ma2","0");
1675 nvram_set("pci/1/1/pdoffset80ma0","0");
1676 nvram_set("pci/1/1/pdoffset80ma1","0");
1677 nvram_set("pci/1/1/pdoffset80ma2","0");
1678 nvram_set("pci/1/1/subband5gver","0x4");
1679 nvram_set("pci/1/1/cckbw202gpo","0");
1680 nvram_set("pci/1/1/cckbw20ul2gpo","0");
1681 nvram_set("pci/1/1/mcsbw202gpo","0");
1682 nvram_set("pci/1/1/mcsbw402gpo","0");
1683 nvram_set("pci/1/1/dot11agofdmhrbw202gpo","0");
1684 nvram_set("pci/1/1/ofdmlrbw202gpo","0");
1685 nvram_set("pci/1/1/mcsbw205glpo","572662306");
1686 nvram_set("pci/1/1/mcsbw405glpo","572662306");
1687 nvram_set("pci/1/1/mcsbw805glpo","572662306");
1688 nvram_set("pci/1/1/mcsbw1605glpo","0");
1689 nvram_set("pci/1/1/mcsbw205gmpo","572662306");
1690 nvram_set("pci/1/1/mcsbw405gmpo","572662306");
1691 nvram_set("pci/1/1/mcsbw805gmpo","572662306");
1692 nvram_set("pci/1/1/mcsbw1605gmpo","0");
1693 nvram_set("pci/1/1/mcsbw205ghpo","572662306");
1694 nvram_set("pci/1/1/mcsbw405ghpo","572662306");
1695 nvram_set("pci/1/1/mcsbw805ghpo","572662306");
1696 nvram_set("pci/1/1/mcsbw1605ghpo","0");
1697 nvram_set("pci/1/1/mcslr5glpo","0");
1698 nvram_set("pci/1/1/mcslr5gmpo","0");
1699 nvram_set("pci/1/1/mcslr5ghpo","0");
1700 nvram_set("pci/1/1/sb20in40hrrpo","0");
1701 nvram_set("pci/1/1/sb20in80and160hr5glpo","0");
1702 nvram_set("pci/1/1/sb40and80hr5glpo","0");
1703 nvram_set("pci/1/1/sb20in80and160hr5gmpo","0");
1704 nvram_set("pci/1/1/sb40and80hr5gmpo","0");
1705 nvram_set("pci/1/1/sb20in80and160hr5ghpo","0");
1706 nvram_set("pci/1/1/sb40and80hr5ghpo","0");
1707 nvram_set("pci/1/1/sb20in40lrpo","0");
1708 nvram_set("pci/1/1/sb20in80and160lr5glpo","0");
1709 nvram_set("pci/1/1/sb40and80lr5glpo","0");
1710 nvram_set("pci/1/1/sb20in80and160lr5gmpo","0");
1711 nvram_set("pci/1/1/sb40and80lr5gmpo","0");
1712 nvram_set("pci/1/1/sb20in80and160lr5ghpo","0");
1713 nvram_set("pci/1/1/sb40and80lr5ghpo","0");
1714 nvram_set("pci/1/1/dot11agduphrpo","0");
1715 nvram_set("pci/1/1/dot11agduplrpo","0");
1716 nvram_set("pci/1/1/pcieingress_war","15");
1717 nvram_set("pci/1/1/sar2g","18");
1718 nvram_set("pci/1/1/sar5g","15");
1719 nvram_set("pci/1/1/noiselvl2ga0","31");
1720 nvram_set("pci/1/1/noiselvl2ga1","31");
1721 nvram_set("pci/1/1/noiselvl2ga2","31");
1722 nvram_set("pci/1/1/noiselvl5gla0","31");
1723 nvram_set("pci/1/1/noiselvl5gla1","31");
1724 nvram_set("pci/1/1/noiselvl5gla2","31");
1725 nvram_set("pci/1/1/noiselvl5gma0","31");
1726 nvram_set("pci/1/1/noiselvl5gma1","31");
1727 nvram_set("pci/1/1/noiselvl5gma2","31");
1728 nvram_set("pci/1/1/noiselvl5gha0","31");
1729 nvram_set("pci/1/1/noiselvl5gha1","31");
1730 nvram_set("pci/1/1/noiselvl5gha2","31");
1731 nvram_set("pci/1/1/noiselvl5gua0","31");
1732 nvram_set("pci/1/1/noiselvl5gua1","31");
1733 nvram_set("pci/1/1/noiselvl5gua2","31");
1734 nvram_set("pci/1/1/rxgainerr2g","0xffff");
1735 nvram_set("pci/1/1/rxgainerr5g","0xffff,0xffff,0xffff,0xffff");
1736 nvram_set("pci/1/1/maxp2ga0","76");
1737 nvram_set("pci/1/1/pa2ga0","0xfe72,0x14c0,0xfac7");
1738 nvram_set("pci/1/1/rxgains5gmelnagaina0","2");
1739 nvram_set("pci/1/1/rxgains5gmtrisoa0","5");
1740 nvram_set("pci/1/1/rxgains5gmtrelnabypa0","1");
1741 nvram_set("pci/1/1/rxgains5ghelnagaina0","2");
1742 nvram_set("pci/1/1/rxgains5ghtrisoa0","5");
1743 nvram_set("pci/1/1/rxgains5ghtrelnabypa0","1");
1744 nvram_set("pci/1/1/rxgains2gelnagaina0","0");
1745 nvram_set("pci/1/1/rxgains2gtrisoa0","0");
1746 nvram_set("pci/1/1/rxgains2gtrelnabypa0","0");
1747 nvram_set("pci/1/1/rxgains5gelnagaina0","1");
1748 nvram_set("pci/1/1/rxgains5gtrisoa0","7");
1749 nvram_set("pci/1/1/rxgains5gtrelnabypa0","1");
1750 nvram_set("pci/1/1/maxp5ga0","92,92,92,92");
1751 nvram_set("pci/1/1/pa5ga0","0xff26,0x188e,0xfcf0,0xff2a,0x18ee,0xfcec,0xff21,0x18b4,0xfcec,0xff23,0x1930,0xfcdd");
1752 nvram_set("pci/1/1/maxp2ga1","76");
1753 nvram_set("pci/1/1/pa2ga1","0xfe80,0x1472,0xfabc");
1754 nvram_set("pci/1/1/rxgains5gmelnagaina1","2");
1755 nvram_set("pci/1/1/rxgains5gmtrisoa1","4");
1756 nvram_set("pci/1/1/rxgains5gmtrelnabypa1","1");
1757 nvram_set("pci/1/1/rxgains5ghelnagaina1","2");
1758 nvram_set("pci/1/1/rxgains5ghtrisoa1","4");
1759 nvram_set("pci/1/1/rxgains5ghtrelnabypa1","1");
1760 nvram_set("pci/1/1/rxgains2gelnagaina1","0");
1761 nvram_set("pci/1/1/rxgains2gtrisoa1","0");
1762 nvram_set("pci/1/1/rxgains2gtrelnabypa1","0");
1763 nvram_set("pci/1/1/rxgains5gelnagaina1","1");
1764 nvram_set("pci/1/1/rxgains5gtrisoa1","6");
1765 nvram_set("pci/1/1/rxgains5gtrelnabypa1","1");
1766 nvram_set("pci/1/1/maxp5ga1","92,92,92,92");
1767 nvram_set("pci/1/1/pa5ga1","0xff35,0x1a3c,0xfccc,0xff31,0x1a06,0xfccf,0xff2b,0x1a54,0xfcc5,0xff30,0x1ad5,0xfcb9");
1768 nvram_set("pci/1/1/maxp2ga2","76");
1769 nvram_set("pci/1/1/pa2ga2","0xfe82,0x14bf,0xfad9");
1770 nvram_set("pci/1/1/rxgains5gmelnagaina2","3");
1771 nvram_set("pci/1/1/rxgains5gmtrisoa2","4");
1772 nvram_set("pci/1/1/rxgains5gmtrelnabypa2","1");
1773 nvram_set("pci/1/1/rxgains5ghelnagaina2","3");
1774 nvram_set("pci/1/1/rxgains5ghtrisoa2","4");
1775 nvram_set("pci/1/1/rxgains5ghtrelnabypa2","1");
1776 nvram_set("pci/1/1/rxgains2gelnagaina2","0");
1777 nvram_set("pci/1/1/rxgains2gtrisoa2","0");
1778 nvram_set("pci/1/1/rxgains2gtrelnabypa2","0");
1779 nvram_set("pci/1/1/rxgains5gelnagaina2","1");
1780 nvram_set("pci/1/1/rxgains5gtrisoa2","5");
1781 nvram_set("pci/1/1/rxgains5gtrelnabypa2","1");
1782 nvram_set("pci/1/1/maxp5ga2","92,92,92,92");
1783 nvram_set("pci/1/1/pa5ga2","0xff2e,0x197b,0xfcd8,0xff2d,0x196e,0xfcdc,0xff30,0x1a7d,0xfcc2,0xff2e,0x1ac6,0xfcb4");
1784
1785 // fix WL mac`s
1786 //strcpy(s, nvram_safe_get("et0macaddr"));
1787 //nvram_set("wl0_hwaddr", nvram_safe_get("0:macaddr"));
1788 //nvram_set("wl1_hwaddr", nvram_safe_get("1:macaddr"));
1789 strcpy(s, nvram_safe_get("et0macaddr"));
1790 inc_mac(s, +2);
1791 nvram_set("wl0_hwaddr", s);
1792 nvram_set("pci/1/1/macaddr",s);
1793 inc_mac(s, +1);
1794 nvram_set("wl1_hwaddr", s);
1795 nvram_set("pci/2/1/macaddr",s);
1796
1797
1798 // fix ssid according to 5G(eth1) and 2.4G(eth2)
1799 //nvram_set("wl_ssid","TomatoDir50");
1800 nvram_set("wl0_ssid","TomatoDir50");
1801 nvram_set("wl1_ssid","TomatoDir24");
1802 }
1803 break; //DIR-865L
1804
1805 #ifdef CONFIG_BCMWL6
1806 case MODEL_W1800R:
1807 mfr = "Tenda";
1808 name = "W1800R";
1809 features = SUP_SES | SUP_80211N | SUP_1000ET | SUP_80211AC;
1810 #ifdef TCONFIG_USB
1811 nvram_set("usb_uhci", "-1");
1812 #endif
1813 if (!nvram_match("t_fix1", (char *)name)) {
1814 nvram_set("lan_ifnames", "vlan1 eth1 eth2");
1815 nvram_set("wan_ifnameX", "vlan2");
1816 nvram_set("wl_ifnames", "eth1 eth2");
1817 nvram_set("wl_ifname", "eth1");
1818 nvram_set("wl0_ifname", "eth2");
1819 nvram_set("wl1_ifname", "eth1");
1820 nvram_set("wl0_bw_cap","7");
1821 nvram_set("wl0_chanspec","36/80");
1822 nvram_set("wl1_bw_cap","3");
1823 nvram_set("wl1_chanspec","1l");
1824 nvram_set("blink_5g_interface","eth1");
1825 //nvram_set("landevs", "vlan1 wl0 wl1");
1826 //nvram_set("wandevs", "vlan2");
1827
1828 // fix WL mac`s
1829 strcpy(s, nvram_safe_get("et0macaddr"));
1830 nvram_set("wl0_hwaddr", nvram_safe_get("0:macaddr"));
1831 nvram_set("wl1_hwaddr", nvram_safe_get("1:macaddr"));
1832
1833 // fix ssid according to 5G(eth2) and 2.4G(eth1)
1834 nvram_set("wl_ssid","Tomato50");
1835 nvram_set("wl0_ssid","Tomato50");
1836 nvram_set("wl1_ssid","Tomato24");
1837 }
1838 break;
1839 case MODEL_D1800H:
1840 mfr = "Buffalo";
1841 if (nvram_match("product", "WLI-H4-D1300")) {
1842 name = "WLI-H4-D1300";
1843 }
1844 else if (nvram_match("product", "WZR-D1100H")) {
1845 name = "WZR-D1100H";
1846 }
1847 else {
1848 name = "WZR-D1800H";
1849 }
1850 features = SUP_SES | SUP_AOSS_LED | SUP_80211N | SUP_1000ET | SUP_80211AC;
1851 #ifdef TCONFIG_USB
1852 nvram_set("usb_uhci", "-1");
1853 #endif
1854 if (!nvram_match("t_fix1", (char *)name)) {
1855 nvram_set("lan_ifnames", "vlan1 eth1 eth2");
1856 nvram_set("wan_ifnameX", "vlan2");
1857 nvram_set("wl_ifnames", "eth1 eth2");
1858 nvram_set("wl_ifname", "eth1");
1859 nvram_set("wl0_ifname", "eth2");
1860 nvram_set("wl1_ifname", "eth1");
1861 nvram_set("wl0_bw_cap","7");
1862 nvram_set("wl0_chanspec","36/80");
1863 nvram_set("wl1_bw_cap","3");
1864 nvram_set("wl1_chanspec","1l");
1865 nvram_set("blink_5g_interface","eth1");
1866
1867 // fix WL mac`s
1868 strcpy(s, nvram_safe_get("et0macaddr"));
1869 trimstr(s);
1870 int i;
1871 for (i = 0; i < strlen(s); i ++) if ( s[i] == '-') s[i] = ':';
1872 nvram_set("et0macaddr",s);
1873 inc_mac(s, +2);
1874 nvram_set("wl0_hwaddr", s);
1875 inc_mac(s, +1);
1876 nvram_set("wl1_hwaddr", s);
1877
1878 // fix ssid according to 5G(eth2) and 2.4G(eth1)
1879 nvram_set("wl_ssid","Tomato50");
1880 nvram_set("wl0_ssid","Tomato50");
1881 nvram_set("wl1_ssid","Tomato24");
1882
1883 nvram_set("pci/2/1/maxp2ga0", "0x70");
1884 nvram_set("pci/2/1/maxp2ga1", "0x70");
1885 nvram_set("pci/2/1/maxp2ga2", "0x70");
1886 nvram_set("pci/2/1/maxp5ga0", "0x6A");
1887 nvram_set("pci/2/1/maxp5ga1", "0x6A");
1888 nvram_set("pci/2/1/maxp5ga2", "0x6A");
1889 nvram_set("pci/2/1/cckbw202gpo", "0x5555");
1890 nvram_set("pci/2/1/cckbw20ul2gpo", "0x5555");
1891 nvram_set("pci/2/1/legofdmbw202gpo", "0x97555555");
1892 nvram_set("pci/2/1/legofdmbw20ul2gpo", "0x97555555");
1893 nvram_set("pci/2/1/mcsbw202gpo", "0xDA755555");
1894 nvram_set("pci/2/1/mcsbw20ul2gpo", "0xDA755555");
1895 nvram_set("pci/2/1/mcsbw402gpo", "0xFC965555");
1896 nvram_set("pci/2/1/cckbw205gpo", "0x5555");
1897 nvram_set("pci/2/1/cckbw20ul5gpo", "0x5555");
1898 nvram_set("pci/2/1/legofdmbw205gpo", "0x97555555");
1899 nvram_set("pci/2/1/legofdmbw20ul5gpo", "0x97555555");
1900 nvram_set("pci/2/1/legofdmbw205gmpo", "0x77777777");
1901 nvram_set("pci/2/1/legofdmbw20ul5gmpo", "0x77777777");
1902 nvram_set("pci/2/1/legofdmbw205ghpo", "0x77777777");
1903 nvram_set("pci/2/1/legofdmbw20ul5ghpo", "0x77777777");
1904 nvram_set("pci/2/1/mcsbw205ghpo", "0x77777777");
1905 nvram_set("pci/2/1/mcsbw20ul5ghpo", "0x77777777");
1906 nvram_set("pci/2/1/mcsbw205gpo", "0xDA755555");
1907 nvram_set("pci/2/1/mcsbw20ul5gpo", "0xDA755555");
1908 nvram_set("pci/2/1/mcsbw405gpo", "0xFC965555");
1909 nvram_set("pci/2/1/mcsbw405ghpo", "0x77777777");
1910 nvram_set("pci/2/1/mcsbw405ghpo", "0x77777777");
1911 nvram_set("pci/2/1/mcs32po", "0x7777");
1912 nvram_set("pci/2/1/legofdm40duppo", "0x0000");
1913 nvram_set("pci/1/1/maxp5ga0", "104,104,104,104");
1914 nvram_set("pci/1/1/maxp5ga1", "104,104,104,104");
1915 nvram_set("pci/1/1/maxp5ga2", "104,104,104,104");
1916 nvram_set("pci/1/1/mcsbw205glpo", "0xBB975311");
1917 nvram_set("pci/1/1/mcsbw405glpo", "0xBB975311");
1918 nvram_set("pci/1/1/mcsbw805glpo", "0xBB975311");
1919 nvram_set("pci/1/1/mcsbw205gmpo", "0xBB975311");
1920 nvram_set("pci/1/1/mcsbw405gmpo", "0xBB975311");
1921 nvram_set("pci/1/1/mcsbw805gmpo", "0xBB975311");
1922 nvram_set("pci/1/1/mcsbw205ghpo", "0xBB975311");
1923 nvram_set("pci/1/1/mcsbw405ghpo", "0xBB975311");
1924 nvram_set("pci/1/1/mcsbw805ghpo", "0xBB975311");
1925
1926 //force US country for 5G eth1, modified by bwq518
1927 nvram_set("pci/1/1/ccode", "US");
1928 nvram_set("wl1_country_code", "US");
1929 nvram_set("regulation_domain_5G", "US");
1930 }
1931 break;
1932 case MODEL_R6300V1:
1933 mfr = "Netgear";
1934 name = "R6300 V1";
1935 features = SUP_SES | SUP_AOSS_LED | SUP_80211N | SUP_1000ET | SUP_80211AC;
1936 #ifdef TCONFIG_USB
1937 nvram_set("usb_uhci", "-1");
1938 #endif
1939 if (!nvram_match("t_fix1", (char *)name)) {
1940 nvram_set("lan_ifnames", "vlan1 eth1 eth2");
1941 nvram_set("wan_ifnameX", "vlan2");
1942 nvram_set("wl_ifnames", "eth1 eth2");
1943 nvram_set("wl_ifname", "eth1");
1944 //4331, 2.4G
1945 nvram_set("wl0_ifname", "eth1");
1946 nvram_set("wl0_bw_cap","3");
1947 nvram_set("wl0_chanspec","1l");
1948 nvram_set("wl0_country_code", "US");
1949 //4360, 2.4G/5G
1950 nvram_set("wl1_ifname", "eth2");
1951 nvram_set("wl1_bw_cap","7");
1952 nvram_set("wl1_chanspec","36/80");
1953 //nvram_set("blink_5g_interface","eth2");
1954 //blink_wl will let both wlan and 5g blink
1955 nvram_set("blink_wl", "1");
1956 nvram_set("landevs", "vlan1 wl0 wl1");
1957 nvram_set("wandevs", "vlan2");
1958 nvram_set("lan_invert", "1");
1959
1960 nvram_set("wl0_hwaddr", nvram_safe_get("pci/1/1/macaddr"));
1961 nvram_set("wl1_hwaddr", nvram_safe_get("pci/2/1/macaddr"));
1962
1963 struct nvram_tuple r6300_pci_1_1_params[] = {
1964
1965 {"aa2g", "7", 0},
1966 {"ag0", "0", 0},
1967 {"ag1", "0", 0},
1968 {"ag2", "0", 0},
1969 {"antswctl2g", "0", 0},
1970 {"antswitch", "0", 0},
1971 {"boardflags", "0x80003200", 0},
1972 {"boardflags2", "0x4000000", 0},
1973 {"boardtype", "0x59b", 0},
1974 {"boardvendor", "0x14e4", 0},
1975 {"cckbw202gpo", "0x0000", 0},
1976 {"cckbw20ul2gpo", "0x0000", 0},
1977 {"devid", "0x4332", 0},
1978 {"elna2g", "2", 0},
1979 {"extpagain2g", "3", 0},
1980 {"ledbh0", "11", 0},
1981 {"ledbh1", "11", 0},
1982 {"ledbh12", "11", 0},
1983 {"ledbh2", "11", 0},
1984 {"ledbh3", "11", 0},
1985 {"leddc", "0xFFFF", 0},
1986 {"legofdm40duppo", "0x0", 0},
1987 {"legofdmbw202gpo", "0x88000000", 0},
1988 {"legofdmbw20ul2gpo", "0x88000000", 0},
1989 {"maxp2ga0", "0x62", 0},
1990 {"maxp2ga1", "0x62", 0},
1991 {"maxp2ga2", "0x62", 0},
1992 {"mcs32po", "0xA", 0},
1993 {"mcsbw202gpo", "0x88800000", 0},
1994 {"mcsbw20ul2gpo", "0x88800000", 0},
1995 {"mcsbw402gpo", "0x0x88800000", 0},
1996 {"pa2gw0a0", "0xFE56", 0},
1997 {"pa2gw0a1", "0xFEB3", 0},
1998 {"pa2gw0a2", "0xFE6A", 0},
1999 {"pa2gw1a0", "0x1D7C", 0},
2000 {"pa2gw1a1", "0x1F79", 0},
2001 {"pa2gw1a2", "0x1D58", 0},
2002 {"pa2gw2a0", "0xF8A1", 0},
2003 {"pa2gw2a1", "0xF8BF", 0},
2004 {"pa2gw2a2", "0xF8DA", 0},
2005 {"pdetrange2g", "3", 0},
2006 {"rxchain", "7", 0},
2007 {"sromrev", "9", 0},
2008 {"tempoffset", "0", 0},
2009 {"tempthresh", "120", 0},
2010 {"triso2g", "3", 0},
2011 {"tssipos2g", "1", 0},
2012 {"txchain", "7", 0},
2013 {"venid", "0x14e4", 0},
2014
2015 {0, 0, 0}
2016 };
2017
2018 struct nvram_tuple r6300_pci_2_1_params[] = {
2019
2020 {"aa2g", "0", 0},
2021 {"aa5g", "7", 0},
2022 {"ag0", "0", 0},
2023 {"ag1", "0", 0},
2024 {"ag2", "0", 0},
2025 {"aga0", "71", 0},
2026 {"aga1", "133", 0},
2027 {"aga2", "133", 0},
2028 {"agbg0", "71", 0},
2029 {"agbg1", "71", 0},
2030 {"agbg2", "133", 0},
2031 {"antswitch", "0", 0},
2032 {"boardflags", "0x10000000", 0},
2033 {"boardflags2", "0x300002", 0},
2034 {"boardflags3", "0x300030", 0},
2035 {"boardnum", "21059", 0},
2036 {"boardrev", "0x1307", 0},
2037 {"boardtype", "0x621", 0},
2038 {"boardvendor", "0x14e4", 0},
2039 {"cckbw202gpo", "0", 0},
2040 {"cckbw20ul2gpo", "0", 0},
2041 {"devid", "0x43a0", 0},
2042 {"dot11agduphrpo", "0", 0},
2043 {"dot11agduplrpo", "0", 0},
2044 {"dot11agofdmhrbw202gpo", "0", 0},
2045 {"epagain2g", "0", 0},
2046 {"epagain5g", "0", 0},
2047 {"femctrl", "3", 0},
2048 {"gainctrlsph", "0", 0},
2049 {"maxp2ga0", "76", 0},
2050 {"maxp2ga1", "76", 0},
2051 {"maxp2ga2", "76", 0},
2052 {"maxp5ga0", "92,96,96,96", 0},
2053 {"maxp5ga1", "92,96,96,96", 0},
2054 {"maxp5ga2", "92,96,96,96", 0},
2055 {"maxp5gb0a0", "0x60", 0},
2056 {"maxp5gb0a1", "0x60", 0},
2057 {"maxp5gb0a2", "0x60", 0},
2058 {"maxp5gb1a0", "0x64", 0},
2059 {"maxp5gb1a1", "0x64", 0},
2060 {"maxp5gb1a2", "0x64", 0},
2061 {"maxp5gb2a0", "0x64", 0},
2062 {"maxp5gb2a1", "0x64", 0},
2063 {"maxp5gb2a2", "0x64", 0},
2064 {"maxp5gb3a0", "0x64", 0},
2065 {"maxp5gb3a1", "0x64", 0},
2066 {"maxp5gb3a2", "0x64", 0},
2067 {"mcsbw1605ghpo", "0", 0},
2068 {"mcsbw1605glpo", "0", 0},
2069 {"mcsbw1605gmpo", "0", 0},
2070 {"mcsbw202gpo", "0", 0},
2071 {"mcsbw205ghpo", "3429122848", 0},
2072 {"mcsbw205glpo", "3999687200", 0},
2073 {"mcsbw205gmpo", "4001780768", 0},
2074 {"mcsbw402gpo", "0", 0},
2075 {"mcsbw405ghpo", "3429122848", 0},
2076 {"mcsbw405glpo", "3999687200", 0},
2077 {"mcsbw405gmpo", "4001780768", 0},
2078 {"mcsbw805ghpo", "3429122848", 0},
2079 {"mcsbw805glpo", "3999687200", 0},
2080 {"mcsbw805gmpo", "4001780768", 0},
2081 {"mcslr5ghpo", "0", 0},
2082 {"mcslr5glpo", "0", 0},
2083 {"mcslr5gmpo", "0", 0},
2084 {"measpower", "0x7f", 0},
2085 {"measpower1", "0x7f", 0},
2086 {"measpower2", "0x7f", 0},
2087 {"noiselvl2ga0", "31", 0},
2088 {"noiselvl2ga1", "31", 0},
2089 {"noiselvl2ga2", "31", 0},
2090 {"noiselvl5gha0", "31", 0},
2091 {"noiselvl5gha1", "31", 0},
2092 {"noiselvl5gha2", "31", 0},
2093 {"noiselvl5gla0", "31", 0},
2094 {"noiselvl5gla1", "31", 0},
2095 {"noiselvl5gla2", "31", 0},
2096 {"noiselvl5gma0", "31", 0},
2097 {"noiselvl5gma1", "31", 0},
2098 {"noiselvl5gma2", "31", 0},
2099 {"noiselvl5gua0", "31", 0},
2100 {"noiselvl5gua1", "31", 0},
2101 {"noiselvl5gua2", "31", 0},
2102 {"ofdmlrbw202gpo", "0", 0},
2103 {"pa2ga0", "0xfe72,0x14c0,0xfac7", 0},
2104 {"pa2ga1", "0xfe80,0x1472,0xfabc", 0},
2105 {"pa2ga2", "0xfe82,0x14bf,0xfad9", 0},
2106 {"pa5ga0", "0xff39,0x1a55,0xfcc7,0xff38,0x1a7f,0xfcc3,0xff33,0x1a66,0xfcc4,0xff36,0x1a7b,0xfcc2", 0},
2107 {"pa5ga1", "0xff3a,0x1a0b,0xfcd3,0xff38,0x1a37,0xfccd,0xff37,0x1aa1,0xfcc0,0xff37,0x1a6f,0xfcc4", 0},
2108 {"pa5ga2", "0xff3a,0x1a28,0xfccd,0xff38,0x1a2a,0xfcce,0xff35,0x1a93,0xfcc1,0xff38,0x1aab,0xfcbe", 0},
2109 {"papdcap2g", "0", 0},
2110 {"papdcap5g", "0", 0},
2111 {"pcieingress_war", "15", 0},
2112 {"pdgain2g", "4", 0},
2113 {"pdgain5g", "4", 0},
2114 {"phycal_tempdelta", "255", 0},
2115 {"rawtempsense", "0x1ff", 0},
2116 {"rxchain", "7", 0},
2117 {"rxgainerr2g", "0xffff", 0},
2118 {"rxgainerr5g", "0xffff,0xffff,0xffff,0xffff", 0},
2119 {"rxgains2gelnagaina0", "0", 0},
2120 {"rxgains2gelnagaina1", "0", 0},
2121 {"rxgains2gelnagaina2", "0", 0},
2122 {"rxgains2gtrelnabypa0", "0", 0},
2123 {"rxgains2gtrelnabypa1", "0", 0},
2124 {"rxgains2gtrelnabypa2", "0", 0},
2125 {"rxgains2gtrisoa0", "0", 0},
2126 {"rxgains2gtrisoa1", "0", 0},
2127 {"rxgains2gtrisoa2", "0", 0},
2128 {"rxgains5gelnagaina0", "1", 0},
2129 {"rxgains5gelnagaina1", "1", 0},
2130 {"rxgains5gelnagaina2", "1", 0},
2131 {"rxgains5ghelnagaina0", "2", 0},
2132 {"rxgains5ghelnagaina1", "2", 0},
2133 {"rxgains5ghelnagaina2", "3", 0},
2134 {"rxgains5ghtrelnabypa0", "1", 0},
2135 {"rxgains5ghtrelnabypa1", "1", 0},
2136 {"rxgains5ghtrelnabypa2", "1", 0},
2137 {"rxgains5ghtrisoa0", "5", 0},
2138 {"rxgains5ghtrisoa1", "4", 0},
2139 {"rxgains5ghtrisoa2", "4", 0},
2140 {"rxgains5gmelnagaina0", "2", 0},
2141 {"rxgains5gmelnagaina1", "2", 0},
2142 {"rxgains5gmelnagaina2", "3", 0},
2143 {"rxgains5gmtrelnabypa0", "1", 0},
2144 {"rxgains5gmtrelnabypa1", "1", 0},
2145 {"rxgains5gmtrelnabypa2", "1", 0},
2146 {"rxgains5gmtrisoa0", "5", 0},
2147 {"rxgains5gmtrisoa1", "4", 0},
2148 {"rxgains5gmtrisoa2", "4", 0},
2149 {"rxgains5gtrelnabypa0", "1", 0},
2150 {"rxgains5gtrelnabypa1", "1", 0},
2151 {"rxgains5gtrelnabypa2", "1", 0},
2152 {"rxgains5gtrisoa0", "7", 0},
2153 {"rxgains5gtrisoa1", "6", 0},
2154 {"rxgains5gtrisoa2", "5", 0},
2155 {"sar", "0x0F12", 0},
2156 {"sar2g", "18", 0},
2157 {"sar5g", "15", 0},
2158 {"sb20in40hrrpo", "0", 0},
2159 {"sb20in40lrpo", "0", 0},
2160 {"sb20in80and160hr5ghpo", "0", 0},
2161 {"sb20in80and160hr5glpo", "0", 0},
2162 {"sb20in80and160hr5gmpo", "0", 0},
2163 {"sb20in80and160lr5ghpo", "0", 0},
2164 {"sb20in80and160lr5glpo", "0", 0},
2165 {"sb20in80and160lr5gmpo", "0", 0},
2166 {"sb40and80hr5ghpo", "0", 0},
2167 {"sb40and80hr5glpo", "0", 0},
2168 {"sb40and80hr5gmpo", "0", 0},
2169 {"sb40and80lr5ghpo", "0", 0},
2170 {"sb40and80lr5glpo", "0", 0},
2171 {"sb40and80lr5gmpo", "0", 0},
2172 {"sromrev", "11", 0},
2173 {"subband5gver", "0x4", 0},
2174 {"tempcorrx", "0x3f", 0},
2175 {"tempoffset", "255", 0},
2176 {"tempsense_option", "0x3", 0},
2177 {"tempsense_slope", "0xff", 0},
2178 {"temps_hysteresis", "15", 0},
2179 {"temps_period", "15", 0},
2180 {"tempthresh", "255", 0},
2181 {"tssiposslope2g", "1", 0},
2182 {"tssiposslope5g", "1", 0},
2183 {"tworangetssi2g", "0", 0},
2184 {"tworangetssi5g", "0", 0},
2185 {"txchain", "7", 0},
2186 {"venid", "0x14e4", 0},
2187 {"xtalfreq", "40000", 0},
2188
2189 {0, 0, 0}
2190 };
2191
2192 struct nvram_tuple *t;
2193 t = r6300_pci_1_1_params;
2194 while (t->name) {
2195 sprintf(s, "pci/1/1/%s", t->name);
2196 nvram_set(s, t->value);
2197 t++;
2198 }
2199 t = r6300_pci_2_1_params;
2200 while (t->name) {
2201 sprintf(s, "pci/2/1/%s", t->name);
2202 nvram_set(s, t->value);
2203 t++;
2204 }
2205
2206 if (nvram_match("wl0_country_code", "US"))
2207 set_regulation(0, "US", "0");
2208 else if (nvram_match("wl0_country_code", "Q2"))
2209 set_regulation(0, "US", "0");
2210 else if (nvram_match("wl0_country_code", "TW"))
2211 set_regulation(0, "TW", "13");
2212 else if (nvram_match("wl0_country_code", "CN"))
2213 set_regulation(0, "CN", "1");
2214 else
2215 set_regulation(0, "DE", "0");
2216
2217 if (nvram_match("wl1_country_code", "Q2"))
2218 set_regulation(1, "US", "0");
2219 else if (nvram_match("wl1_country_code", "EU"))
2220 set_regulation(1, "EU", "13");
2221 else if (nvram_match("wl1_country_code", "TW"))
2222 set_regulation(1, "TW", "13");
2223 else if (nvram_match("wl1_country_code", "CN"))
2224 set_regulation(1, "CN", "1");
2225 else
2226 set_regulation(1, "US", "0");
2227
2228 }
2229 break;
2230 case MODEL_WNDR4500:
2231 mfr = "Netgear";
2232 name = "WNDR4500 V1";
2233 features = SUP_SES | SUP_AOSS_LED | SUP_80211N | SUP_1000ET | SUP_80211AC;
2234 #ifdef TCONFIG_USB
2235 nvram_set("usb_uhci", "-1");
2236 #endif
2237 if (!nvram_match("t_fix1", (char *)name)) {
2238 nvram_set("lan_ifnames", "vlan1 eth1 eth2");
2239 nvram_set("wan_ifnameX", "vlan2");
2240 nvram_set("wl_ifnames", "eth1 eth2");
2241 nvram_set("wl_ifname", "eth1");
2242 //4331, 2.4G
2243 nvram_set("wl0_ifname", "eth1");
2244 nvram_set("wl0_bw_cap","3");
2245 nvram_set("wl0_chanspec","1l");
2246 nvram_set("wl0_country_code", "US");
2247 //4330, 5G
2248 nvram_set("wl1_ifname", "eth2");
2249 nvram_set("wl1_bw_cap","7");
2250 nvram_set("wl1_chanspec","36/80");
2251 nvram_set("wl1_country_code", "US");
2252 //nvram_set("blink_5g_interface","eth2");
2253 //blink_wl will let both wlan and 5g blink
2254 nvram_set("blink_wl", "1");
2255 nvram_set("landevs", "vlan1 wl0 wl1");
2256 nvram_set("wandevs", "vlan2");
2257 nvram_set("lan_invert", "1");
2258
2259 nvram_set("wl0_hwaddr", nvram_safe_get("pci/1/1/macaddr"));
2260 nvram_set("wl1_hwaddr", nvram_safe_get("pci/2/1/macaddr"));
2261
2262 // fix ssid according to 5G(eth2) and 2.4G(eth1)
2263 //nvram_set("wl_ssid","Tomato50");
2264 //nvram_set("wl0_ssid","Tomato50");
2265 //nvram_set("wl1_ssid","Tomato24");
2266
2267 struct nvram_tuple wndr4500_pci_1_1_params[] = {
2268
2269 {"pa2gw1a0", "0x1DFC", 0},
2270 {"pa2gw1a1", "0x1FF9", 0},
2271 {"pa2gw1a2", "0x1E58", 0},
2272 {"ledbh12", "11", 0},
2273 {"legofdmbw202gpo", "0x88000000", 0},
2274 {"ag0", "0", 0},
2275 {"ag1", "0", 0},
2276 {"ag2", "0", 0},
2277 {"legofdmbw20ul2gpo", "0x88000000", 0},
2278 {"rxchain", "7", 0},
2279 {"cckbw202gpo", "0x0000", 0},
2280 {"mcsbw20ul2gpo", "0x88800000", 0},
2281 {"pa2gw0a0", "0xFE56", 0},
2282 {"pa2gw0a1", "0xFEB3", 0},
2283 {"pa2gw0a2", "0xFE6A", 0},
2284 {"boardflags", "0x80003200", 0},
2285 {"tempoffset", "0", 0},
2286 {"boardvendor", "0x14e4", 0},
2287 {"triso2g", "3", 0},
2288 {"sromrev", "9", 0},
2289 {"extpagain2g", "3", 0},
2290 {"venid", "0x14e4", 0},
2291 {"maxp2ga0", "0x62", 0},
2292 {"maxp2ga1", "0x62", 0},
2293 {"maxp2ga2", "0x62", 0},
2294 {"boardtype", "0x59b", 0},
2295 {"boardflags2", "0x4000000", 0},
2296 {"tssipos2g", "1", 0},
2297 {"ledbh0", "11", 0},
2298 {"ledbh1", "11", 0},
2299 {"ledbh2", "11", 0},
2300 {"ledbh3", "11", 0},
2301 {"mcs32po", "0xA", 0},
2302 {"legofdm40duppo", "0x0", 0},
2303 {"antswctl2g", "0", 0},
2304 {"txchain", "7", 0},
2305 {"elna2g", "2", 0},
2306 {"antswitch", "0", 0},
2307 {"aa2g", "7", 0},
2308 {"cckbw20ul2gpo", "0x0000", 0},
2309 {"leddc", "0xFFFF", 0},
2310 {"pa2gw2a0", "0xF886", 0},
2311 {"pa2gw2a1", "0xF8AA", 0},
2312 {"pa2gw2a2", "0xF8A7", 0},
2313 {"pdetrange2g", "3", 0},
2314 {"devid", "0x4332", 0},
2315 {"tempthresh", "120", 0},
2316 {"mcsbw402gpo", "0x0x88800000", 0},
2317 {"mcsbw202gpo", "0x88800000", 0},
2318
2319 {0, 0, 0}
2320 };
2321
2322 struct nvram_tuple wndr4500_pci_2_1_params[] = {
2323
2324 {"leddc", "0xFFFF", 0},
2325 {"txchain", "7", 0},
2326 {"maxp5gla0", "0x60", 0},
2327 {"elna5g", "1", 0},
2328 {"maxp5gla1", "0x60", 0},
2329 {"maxp5gla2", "0x60", 0},
2330 {"maxp5gha0", "0x72", 0},
2331 {"maxp5gha1", "0x72", 0},
2332 {"maxp5gha2", "0x72", 0},
2333 {"pa5gw0a0", "0xFE6C", 0},
2334 {"pa5gw0a1", "0xFE72", 0},
2335 {"pa5gw0a2", "0xFE75", 0},
2336 {"mcsbw20ul5gmpo", "0x22200000", 0},
2337 {"extpagain5g", "3", 0},
2338 {"pa5glw2a0", "0xFFFF", 0},
2339 {"boardflags", "0x90000200", 0},
2340 {"pa5glw2a1", "0xFFFF", 0},
2341 {"pa5glw2a2", "0xFFFF", 0},
2342 {"triso5g", "3", 0},
2343 {"tempoffset", "0", 0},
2344 {"mcsbw205gmpo", "0x22200000", 0},
2345 {"devid", "0x4333", 0},
2346 {"aa5g", "7", 0},
2347 {"pa5ghw2a0", "0xF8C5", 0},
2348 {"pa5ghw2a1", "0xF8D6", 0},
2349 {"pa5ghw2a2", "0xF8DA", 0},
2350 {"mcsbw20ul5glpo", "0x0", 0},
2351 {"pa5glw1a0", "0xFFFF", 0},
2352 {"pa5glw1a1", "0xFFFF", 0},
2353 {"pa5glw1a2", "0xFFFF", 0},
2354 {"mcsbw205glpo", "0x0", 0},
2355 {"mcsbw20ul5ghpo", "0x88800000", 0},
2356 {"legofdmbw205gmpo", "0x22000000", 0},
2357 {"ledbh12", "11", 0},
2358 {"mcsbw205ghpo", "0x88800000", 0},
2359 {"pa5ghw1a0", "0x1DD1", 0},
2360 {"pa5ghw1a1", "0x1DFF", 0},
2361 {"parefldovoltage", "35", 0},
2362 {"pa5ghw1a2", "0x1D76", 0},
2363 {"pa5gw2a0", "0xF8E9", 0},
2364 {"mcsbw405gmpo", "0x22200000", 0},
2365 {"pa5gw2a1", "0xF907", 0},
2366 {"pa5gw2a2", "0xF8ED", 0},
2367 {"boardtype", "0x5a9", 0},
2368 {"ledbh0", "11", 0},
2369 {"ledbh1", "11", 0},
2370 {"ledbh2", "11", 0},
2371 {"legofdmbw20ul5gmpo", "0x22000000", 0},
2372 {"ledbh3", "11", 0},
2373 {"rxchain", "7", 0},
2374 {"pdetrange5g", "4", 0},
2375 {"legofdm40duppo", "0x0", 0},
2376 {"maxp5ga0", "0x66", 0},
2377 {"pa5glw0a0", "0xFFFF", 0},
2378 {"maxp5ga1", "0x66", 0},
2379 {"pa5glw0a1", "0xFFFF", 0},
2380 {"maxp5ga2", "0x66", 0},
2381 {"pa5glw0a2", "0xFFFF", 0},
2382 {"legofdmbw205glpo", "0x0", 0},
2383 {"venid", "0x14e4", 0},
2384 {"boardvendor", "0x14e4", 0},
2385 {"legofdmbw205ghpo", "0x88000000", 0},
2386 {"antswitch", "0", 0},
2387 {"tempthresh", "120", 0},
2388 {"pa5ghw0a0", "0xFE74", 0},
2389 {"pa5ghw0a1", "0xFE7F", 0},
2390 {"sromrev", "9", 0},
2391 {"pa5ghw0a2", "0xFE72", 0},
2392 {"antswctl5g", "0", 0},
2393 {"pa5gw1a0", "0x1D5E", 0},
2394 {"mcsbw405glpo", "0x0", 0},
2395 {"pa5gw1a1", "0x1D3D", 0},
2396 {"pa5gw1a2", "0x1DA8", 0},
2397 {"legofdmbw20ul5glpo", "0x0", 0},
2398 {"ag0", "0", 0},
2399 {"ag1", "0", 0},
2400 {"ag2", "0", 0},
2401 {"mcsbw405ghpo", "0x88800000", 0},
2402 {"boardflags2", "0x4200000", 0},
2403 {"legofdmbw20ul5ghpo", "0x88000000", 0},
2404 {"mcs32po", "0x9", 0},
2405 {"tssipos5g", "1", 0},
2406
2407 {0, 0, 0}
2408 };
2409
2410 struct nvram_tuple *t;
2411 t = wndr4500_pci_1_1_params;
2412 while (t->name) {
2413 sprintf(s, "pci/1/1/%s", t->name);
2414 nvram_set(s, t->value);
2415 t++;
2416 }
2417 t = wndr4500_pci_2_1_params;
2418 while (t->name) {
2419 sprintf(s, "pci/2/1/%s", t->name);
2420 nvram_set(s, t->value);
2421 t++;
2422 }
2423
2424 if (nvram_match("wl0_country_code", "US"))
2425 set_regulation(0, "US", "0");
2426 else if (nvram_match("wl0_country_code", "Q2"))
2427 set_regulation(0, "US", "0");
2428 else if (nvram_match("wl0_country_code", "TW"))
2429 set_regulation(0, "TW", "13");
2430 else if (nvram_match("wl0_country_code", "CN"))
2431 set_regulation(0, "CN", "1");
2432 else
2433 set_regulation(0, "DE", "0");
2434
2435 if (nvram_match("wl1_country_code", "Q2"))
2436 set_regulation(1, "US", "0");
2437 else if (nvram_match("wl1_country_code", "EU"))
2438 set_regulation(1, "EU", "13");
2439 else if (nvram_match("wl1_country_code", "TW"))
2440 set_regulation(1, "TW", "13");
2441 else if (nvram_match("wl1_country_code", "CN"))
2442 set_regulation(1, "CN", "1");
2443 else
2444 set_regulation(1, "US", "0");
2445
2446 }
2447 break;
2448 case MODEL_WNDR4500V2:
2449 mfr = "Netgear";
2450 name = "WNDR4500 V2";
2451 features = SUP_SES | SUP_AOSS_LED | SUP_80211N | SUP_1000ET | SUP_80211AC;
2452 #ifdef TCONFIG_USB
2453 nvram_set("usb_uhci", "-1");
2454 #endif
2455 if (!nvram_match("t_fix1", (char *)name)) {
2456 nvram_set("lan_ifnames", "vlan1 eth1 eth2");
2457 nvram_set("wan_ifnameX", "vlan2");
2458 nvram_set("wl_ifnames", "eth1 eth2");
2459 nvram_set("wl_ifname", "eth1");
2460 //4331, 2.4G
2461 nvram_set("wl0_ifname", "eth1");
2462 nvram_set("wl0_bw_cap","3");
2463 nvram_set("wl0_chanspec","1l");
2464 nvram_set("wl0_country_code", "US");
2465 //4331, 5G
2466 nvram_set("wl1_ifname", "eth2");
2467 nvram_set("wl0_bw_cap","7");
2468 nvram_set("wl0_chanspec","36/80");
2469 //nvram_set("blink_5g_interface","eth2");
2470 //blink_wl will let both wlan and 5g blink
2471 nvram_set("blink_wl", "1");
2472 nvram_set("landevs", "vlan1 wl0 wl1");
2473 nvram_set("wandevs", "vlan2");
2474 nvram_set("lan_invert", "1");
2475
2476 nvram_set("wl0_hwaddr", nvram_safe_get("pci/1/1/macaddr"));
2477 nvram_set("wl1_hwaddr", nvram_safe_get("pci/2/1/macaddr"));
2478
2479 struct nvram_tuple wndr4500v2_pci_1_1_params[] = {
2480
2481 {"pa2gw1a0", "0x1791", 0},
2482 {"pa2gw1a1", "0x189B", 0},
2483 {"pa2gw1a2", "0x173E", 0},
2484 {"ledbh12", "11", 0},
2485 {"legofdmbw202gpo", "0xECA64200", 0},
2486 {"ag0", "0", 0},
2487 {"ag1", "0", 0},
2488 {"ag2", "0", 0},
2489 {"legofdmbw20ul2gpo", "0xECA64200", 0},
2490 {"rxchain", "7", 0},
2491 {"cckbw202gpo", "0x0000", 0},
2492 {"mcsbw20ul2gpo", "0xECA64200", 0},
2493 {"pa2gw0a0", "0xFE90", 0},
2494 {"pa2gw0a1", "0xFE9F", 0},
2495 {"pa2gw0a2", "0xFE8B", 0},
2496 {"boardflags", "0x80003200", 0},
2497 {"tempoffset", "0", 0},
2498 {"boardvendor", "0x14e4", 0},
2499 {"triso2g", "3", 0},
2500 {"sromrev", "9", 0},
2501 {"extpagain2g", "1", 0},
2502 {"venid", "0x14e4", 0},
2503 {"maxp2ga0", "0x5E", 0},
2504 {"maxp2ga1", "0x5E", 0},
2505 {"maxp2ga2", "0x5E", 0},
2506 {"boardtype", "0x59b", 0},
2507 {"boardflags2", "0x4100000", 0},
2508 {"tssipos2g", "1", 0},
2509 {"ledbh0", "11", 0},
2510 {"ledbh1", "11", 0},
2511 {"ledbh2", "11", 0},
2512 {"ledbh3", "11", 0},
2513 {"mcs32po", "0xA", 0},
2514 {"legofdm40duppo", "0x0", 0},
2515 {"antswctl2g", "0", 0},
2516 {"txchain", "7", 0},
2517 {"elna2g", "2", 0},
2518 {"antswitch", "0", 0},
2519 {"aa2g", "7", 0},
2520 {"cckbw20ul2gpo", "0x0000", 0},
2521 {"leddc", "0xFFFF", 0},
2522 {"pa2gw2a0", "0xFA5C", 0},
2523 {"pa2gw2a1", "0xFA22", 0},
2524 {"pa2gw2a2", "0xFA7A", 0},
2525 {"pdetrange2g", "3", 0},
2526 {"devid", "0x4332", 0},
2527 {"tempthresh", "120", 0},
2528 {"mcsbw402gpo", "0xECAAAAAA", 0},
2529 {"mcsbw202gpo", "0xECA64200", 0},
2530
2531 {0, 0, 0}
2532 };
2533
2534 struct nvram_tuple wndr4500v2_pci_2_1_params[] = {
2535
2536 {"leddc", "0xFFFF", 0},
2537 {"txchain", "7", 0},
2538 {"maxp5gla0", "0x64", 0},
2539 {"elna5g", "1", 0},
2540 {"maxp5gla1", "0x64", 0},
2541 {"maxp5gla2", "0x64", 0},
2542 {"maxp5gha0", "0x5E", 0},
2543 {"maxp5gha1", "0x5E", 0},
2544 {"maxp5gha2", "0x5E", 0},
2545 {"pa5gw0a0", "0xFEB2", 0},
2546 {"pa5gw0a1", "0xFE7D", 0},
2547 {"pa5gw0a2", "0xFE78", 0},
2548 {"mcsbw20ul5gmpo", "0x42000000", 0},
2549 {"extpagain5g", "3", 0},
2550 {"pa5glw2a0", "0xF98F", 0},
2551 {"boardflags", "0x90000200", 0},
2552 {"pa5glw2a1", "0xF9C1", 0},
2553 {"pa5glw2a2", "0xF99D", 0},
2554 {"triso5g", "3", 0},
2555 {"tempoffset", "0", 0},
2556 {"mcsbw205gmpo", "0x42000000", 0},
2557 {"devid", "0x4333", 0},
2558 {"aa5g", "7", 0},
2559 {"pa5ghw2a0", "0xF9DC", 0},
2560 {"pa5ghw2a1", "0xFA04", 0},
2561 {"pa5ghw2a2", "0xF9EE", 0},
2562 {"mcsbw20ul5glpo", "0x42000000", 0},
2563 {"pa5glw1a0", "0x1A5D", 0},
2564 {"pa5glw1a1", "0x1962", 0},
2565 {"pa5glw1a2", "0x19EC", 0},
2566 {"mcsbw205glpo", "0x20000000", 0},
2567 {"mcsbw20ul5ghpo", "0xECA64200", 0},
2568 {"legofdmbw205gmpo", "0x42000000", 0},
2569 {"ledbh12", "11", 0},
2570 {"mcsbw205ghpo", "0xECA64200", 0},
2571 {"pa5ghw1a0", "0x1896", 0},
2572 {"pa5ghw1a1", "0x1870", 0},
2573 {"parefldovoltage", "35", 0},
2574 {"pa5ghw1a2", "0x1883", 0},
2575 {"pa5gw2a0", "0xF93C", 0},
2576 {"mcsbw405gmpo", "0x42000000 ", 0},
2577 {"pa5gw2a1", "0xF99B", 0},
2578 {"pa5gw2a2", "0xF995", 0},
2579 {"boardtype", "0x5a9", 0},
2580 {"ledbh0", "11", 0},
2581 {"ledbh1", "11", 0},
2582 {"ledbh2", "11", 0},
2583 {"legofdmbw20ul5gmpo", "0x42000000", 0},
2584 {"ledbh3", "11", 0},
2585 {"rxchain", "7", 0},
2586 {"pdetrange5g", "4", 0},
2587 {"legofdm40duppo", "0x0", 0},
2588 {"maxp5ga0", "0x4A", 0},
2589 {"pa5glw0a0", "0xFE7F", 0},
2590 {"maxp5ga1", "0x4A", 0},
2591 {"pa5glw0a1", "0xFE66", 0},
2592 {"maxp5ga2", "0x4A", 0},
2593 {"pa5glw0a2", "0xFE6B", 0},
2594 {"legofdmbw205glpo", "0x20000000", 0},
2595 {"venid", "0x14e4", 0},
2596 {"boardvendor", "0x14e4", 0},
2597 {"legofdmbw205ghpo", "0xECA64200", 0},
2598 {"antswitch", "0", 0},
2599 {"tempthresh", "120", 0},
2600 {"pa5ghw0a0", "0xFE53", 0},
2601 {"pa5ghw0a1", "0xFE68", 0},
2602 {"sromrev", "9", 0},
2603 {"pa5ghw0a2", "0xFE5D", 0},
2604 {"antswctl5g", "0", 0},
2605 {"pa5gw1a0", "0x1C6A", 0},
2606 {"mcsbw405glpo", "0x42000000", 0},
2607 {"pa5gw1a1", "0x1A47", 0},
2608 {"pa5gw1a2", "0x1A39", 0},
2609 {"legofdmbw20ul5glpo", "0x42000000", 0},
2610 {"ag0", "0", 0},
2611 {"ag1", "0", 0},
2612 {"ag2", "0", 0},
2613 {"mcsbw405ghpo", "0xECA64200", 0},
2614 {"boardflags2", "0x4200000", 0},
2615 {"legofdmbw20ul5ghpo", "0xECA64200", 0},
2616 {"mcs32po", "0x9", 0},
2617 {"tssipos5g", "1", 0},
2618
2619 {0, 0, 0}
2620 };
2621
2622 struct nvram_tuple *t;
2623 t = wndr4500v2_pci_1_1_params;
2624 while (t->name) {
2625 sprintf(s, "pci/1/1/%s", t->name);
2626 nvram_set(s, t->value);
2627 t++;
2628 }
2629 t = wndr4500v2_pci_2_1_params;
2630 while (t->name) {
2631 sprintf(s, "pci/2/1/%s", t->name);
2632 nvram_set(s, t->value);
2633 t++;
2634 }
2635
2636 if (nvram_match("wl0_country_code", "US"))
2637 set_regulation(0, "US", "0");
2638 else if (nvram_match("wl0_country_code", "Q2"))
2639 set_regulation(0, "US", "0");
2640 else if (nvram_match("wl0_country_code", "TW"))
2641 set_regulation(0, "TW", "13");
2642 else if (nvram_match("wl0_country_code", "CN"))
2643 set_regulation(0, "CN", "1");
2644 else
2645 set_regulation(0, "DE", "0");
2646
2647 if (nvram_match("wl1_country_code", "Q2"))
2648 set_regulation(1, "US", "0");
2649 else if (nvram_match("wl1_country_code", "EU"))
2650 set_regulation(1, "EU", "13");
2651 else if (nvram_match("wl1_country_code", "TW"))
2652 set_regulation(1, "TW", "13");
2653 else if (nvram_match("wl1_country_code", "CN"))
2654 set_regulation(1, "CN", "1");
2655 else
2656 set_regulation(1, "US", "0");
2657
2658 }
2659 break;
2660 case MODEL_EA6500V1:
2661 mfr = "Linksys";
2662 name = "EA6500v1";
2663 features = SUP_SES | SUP_80211N | SUP_1000ET | SUP_80211AC;
2664 #ifdef TCONFIG_USB
2665 nvram_set("usb_uhci", "-1");
2666 #endif
2667 if (!nvram_match("t_fix1", (char *)name)) {
2668 nvram_set("lan_ifnames", "vlan1 eth1 eth2");
2669 nvram_set("wan_ifnameX", "vlan2");
2670 nvram_set("wl_ifnames", "eth1 eth2");
2671 nvram_set("wl_ifname", "eth1");
2672 nvram_set("wl0_ifname", "eth1");
2673 nvram_set("wl1_ifname", "eth2");
2674 nvram_set("wl0_bw_cap","7");
2675 nvram_set("wl0_chanspec","36/80");
2676 nvram_set("wl1_bw_cap","3");
2677 nvram_set("wl1_chanspec","1l");
2678 nvram_set("blink_5g_interface","eth1");
2679
2680 // fix ssid according to 5G(eth1) and 2.4G(eth2)
2681 nvram_set("wl_ssid","Tomato50");
2682 nvram_set("wl0_ssid","Tomato50");
2683 nvram_set("wl1_ssid","Tomato24");
2684
2685 //force US country for 5G eth1, modified by bwq518
2686 nvram_set("pci/1/1/ccode", nvram_safe_get("ccode"));
2687 nvram_set("regulation_domain_5G", nvram_safe_get("ccode"));
2688 }
2689 break;
2690 #endif // CONFIG_BCMWL6
2691 case MODEL_WNR3500L:
2692 mfr = "Netgear";
2693 name = "WNR3500L/U/v2";
2694 features = SUP_SES | SUP_AOSS_LED | SUP_80211N | SUP_1000ET;
2695 if (!nvram_match("t_fix1", (char *)name)) {
2696 nvram_set("sromrev", "3");
2697 nvram_set("lan_ifnames", "vlan1 eth1");
2698 nvram_set("wan_ifnameX", "vlan2");
2699 nvram_set("wl_ifname", "eth1");
2700 }
2701 break;
2702 case MODEL_WNR3500LV2:
2703 mfr = "Netgear";
2704 name = "WNR3500L v2";
2705 features = SUP_SES | SUP_AOSS_LED | SUP_80211N | SUP_1000ET;
2706 if (!nvram_match("t_fix1", (char *)name)) {
2707 nvram_set("lan_ifnames", "vlan1 eth1");
2708 nvram_set("wan_ifnameX", "vlan2");
2709 nvram_set("wl_ifname", "eth1");
2710 }
2711 break;
2712 case MODEL_WNR2000v2:
2713 mfr = "Netgear";
2714 name = "WNR2000 v2";
2715 features = SUP_SES | SUP_AOSS_LED | SUP_80211N;
2716 if (!nvram_match("t_fix1", (char *)name)) {
2717 nvram_set("lan_ifnames", "vlan0 eth1");
2718 nvram_set("wan_ifnameX", "vlan1");
2719 nvram_set("wl_ifname", "eth1");
2720 }
2721 break;
2722 case MODEL_F7D3301:
2723 case MODEL_F7D3302:
2724 case MODEL_F7D4301:
2725 case MODEL_F7D4302:
2726 case MODEL_F5D8235v3:
2727 mfr = "Belkin";
2728 features = SUP_SES | SUP_80211N;
2729 switch (model) {
2730 case MODEL_F7D3301:
2731 name = "Share Max N300 (F7D3301/F7D7301) v1";
2732 break;
2733 case MODEL_F7D3302:
2734 name = "Share N300 (F7D3302/F7D7302) v1";
2735 break;
2736 case MODEL_F7D4301:
2737 name = "Play Max / N600 HD (F7D4301/F7D8301) v1";
2738 break;
2739 case MODEL_F7D4302:
2740 name = "Play N600 (F7D4302/F7D8302) v1";
2741 break;
2742 case MODEL_F5D8235v3:
2743 name = "N F5D8235-4 v3";
2744 break;
2745 }
2746 #ifdef TCONFIG_USB
2747 nvram_set("usb_uhci", "-1");
2748 #endif
2749 if (!nvram_match("t_fix1", (char *)name)) {
2750 nvram_set("lan_ifnames", "vlan1 eth1 eth2");
2751 nvram_set("wan_ifnameX", "vlan2");
2752 nvram_set("landevs", "vlan1 wl0 wl1");
2753 nvram_set("wandevs", "vlan2");
2754 }
2755 break;
2756 case MODEL_E900:
2757 case MODEL_E1500:
2758 mfr = "Linksys";
2759 name = nvram_safe_get("boot_hw_model");
2760 ver = nvram_safe_get("boot_hw_ver");
2761 features = SUP_SES | SUP_80211N;
2762 if (!nvram_match("t_fix1", (char *)name)) {
2763 nvram_set("lan_ifnames", "vlan1 eth1");
2764 nvram_set("wan_ifnameX", "vlan2");
2765 nvram_set("wl_ifname", "eth1");
2766 }
2767 break;
2768 case MODEL_E1550:
2769 mfr = "Linksys";
2770 name = nvram_safe_get("boot_hw_model");
2771 ver = nvram_safe_get("boot_hw_ver");
2772 features = SUP_SES | SUP_80211N;
2773 #ifdef TCONFIG_USB
2774 nvram_set("usb_uhci", "-1");
2775 #endif
2776 if (!nvram_match("t_fix1", (char *)name)) {
2777 nvram_set("lan_ifnames", "vlan1 eth1");
2778 nvram_set("wan_ifnameX", "vlan2");
2779 nvram_set("wl_ifname", "eth1");
2780 }
2781 break;
2782 case MODEL_E2500:
2783 mfr = "Linksys";
2784 name = "E2500 v1/v2/v3";
2785 /* NOTE: E2500v1 & v2 have 8 MB flash, no external USB
2786 E2500v3 has 16 MB flash, external USB
2787 all three have the same boot_hw_ver */
2788 features = SUP_SES | SUP_80211N;
2789 if (!nvram_match("t_fix1", (char *)name)) {
2790 #ifdef TCONFIG_USBAP
2791 nvram_set("wl1_hwaddr", nvram_safe_get("0:macaddr"));
2792 nvram_set("ehciirqt", "3");
2793 nvram_set("qtdc_pid", "48407");
2794 nvram_set("qtdc_vid", "2652");
2795 nvram_set("qtdc0_ep", "4");
2796 nvram_set("qtdc0_sz", "0");
2797 nvram_set("qtdc1_ep", "18");
2798 nvram_set("qtdc1_sz", "10");
2799 nvram_set("lan_ifnames", "vlan1 eth1 eth2");
2800 nvram_set("landevs", "vlan1 wl0 wl1");
2801 nvram_set("wl0_ifname", "eth1");
2802 nvram_set("wl1_ifname", "eth2");
2803 #else
2804 nvram_set("lan_ifnames", "vlan1 eth1");
2805 nvram_set("landevs", "vlan1 wl0");
2806 #endif
2807 nvram_set("wan_ifnameX", "vlan2");
2808 nvram_set("wl_ifname", "eth1");
2809
2810 }
2811 break;
2812 case MODEL_E3200:
2813 mfr = "Linksys";
2814 name = nvram_safe_get("boot_hw_model");
2815 ver = nvram_safe_get("boot_hw_ver");
2816 features = SUP_SES | SUP_80211N | SUP_1000ET;
2817 #ifdef TCONFIG_USB
2818 nvram_set("usb_uhci", "-1");
2819 #endif
2820 if (!nvram_match("t_fix1", (char *)name)) {
2821 #ifdef TCONFIG_USBAP
2822 nvram_set("wl1_hwaddr", nvram_safe_get("usb/0xBD17/macaddr"));
2823 nvram_set("ehciirqt", "3");
2824 nvram_set("qtdc_pid", "48407");
2825 nvram_set("qtdc_vid", "2652");
2826 nvram_set("qtdc0_ep", "4");
2827 nvram_set("qtdc0_sz", "0");
2828 nvram_set("qtdc1_ep", "18");
2829 nvram_set("qtdc1_sz", "10");
2830 nvram_set("lan_ifnames", "vlan1 eth1 eth2");
2831 nvram_set("landevs", "vlan1 wl0 wl1");
2832 nvram_set("wl0_ifname", "eth1");
2833 nvram_set("wl1_ifname", "eth2");
2834 #else
2835 nvram_set("lan_ifnames", "vlan1 eth1");
2836 nvram_set("landevs", "vlan1 wl0");
2837 #endif
2838 nvram_set("wl_ifname", "eth1");
2839 nvram_set("wan_ifnameX", "vlan2");
2840 }
2841 break;
2842 case MODEL_E1000v2:
2843 case MODEL_WRT160Nv3:
2844 // same as M10, M20, WRT310Nv2, E1000v1
2845 mfr = "Linksys";
2846 name = nvram_safe_get("boot_hw_model");
2847 ver = nvram_safe_get("boot_hw_ver");
2848 if (nvram_match("boot_hw_model", "E100")){
2849 name = "E1000";
2850 }
2851 if (nvram_match("boot_hw_model", "M10") || nvram_match("boot_hw_model", "M20")){
2852 mfr = "Cisco";
2853 }
2854 features = SUP_SES | SUP_80211N | SUP_WHAM_LED;
2855 if (!nvram_match("t_fix1", (char *)name)) {
2856 nvram_set("lan_ifnames", "vlan1 eth1");
2857 nvram_set("wan_ifnameX", "vlan2");
2858 nvram_set("wl_ifname", "eth1");
2859 }
2860 break;
2861 case MODEL_WRT320N:
2862 mfr = "Linksys";
2863 name = nvram_match("boardrev", "0x1307") ? "E2000" : "WRT320N";
2864 features = SUP_SES | SUP_80211N | SUP_WHAM_LED | SUP_1000ET;
2865 if (!nvram_match("t_fix1", (char *)name)) {
2866 nvram_set("lan_ifnames", "vlan1 eth1");
2867 nvram_set("wan_ifnameX", "vlan2");
2868 nvram_set("wl_ifname", "eth1");
2869 }
2870 break;
2871 case MODEL_WRT610Nv2:
2872 mfr = "Linksys";
2873 name = nvram_match("boot_hw_model", "E300") ? "E3000" : "WRT610N v2";
2874 features = SUP_SES | SUP_80211N | SUP_WHAM_LED | SUP_1000ET;
2875 #ifdef TCONFIG_USB
2876 nvram_set("usb_uhci", "-1");
2877 #endif
2878 if (!nvram_match("t_fix1", (char *)name)) {
2879 nvram_set("lan_ifnames", "vlan1 eth1 eth2");
2880 nvram_set("wan_ifnameX", "vlan2");
2881 nvram_set("wl_ifname", "eth1");
2882 }
2883 break;
2884 case MODEL_E4200:
2885 mfr = "Linksys";
2886 name = "E4200 v1";
2887 features = SUP_SES | SUP_80211N | SUP_1000ET;
2888 #ifdef TCONFIG_USB
2889 nvram_set("usb_uhci", "-1");
2890 #endif
2891 if (!nvram_match("t_fix1", (char *)name)) {
2892 nvram_set("lan_ifnames", "vlan1 eth1 eth2");
2893 nvram_set("wan_ifnameX", "vlan2");
2894 nvram_set("wl_ifname", "eth1");
2895 }
2896 break;
2897 case MODEL_WNDR4000:
2898 mfr = "Netgear";
2899 name = "WNDR4000";
2900 features = SUP_SES | SUP_80211N | SUP_1000ET;
2901 // Don't auto-start blink, as shift register causes other LED's to blink slightly because of this.
2902 // Rather, turn on in startup script if desired ... so disable the line below.
2903 // nvram_set("blink_wl", "1");
2904 #ifdef TCONFIG_USB
2905 nvram_set("usb_uhci", "-1");
2906 #endif
2907 if (!nvram_match("t_fix1", (char *)name)) {
2908 nvram_set("lan_ifnames", "vlan1 eth1 eth2");
2909 nvram_set("wan_ifnameX", "vlan2");
2910 nvram_set("wl_ifname", "eth1");
2911 }
2912
2913 // Set Key Parameters for Wireless Interfaces: SB (Southbridge) and PCI, to configure HW (as Netgear intends)
2914 // Credit for the nvram_tuple approach below goes to DD-WRT (borrowed here for simplicity)!
2915 // Parameters optimized based on clean Netgear build (NVRAM extracted and checked vs. Tomato 30/30/30 Reset version of NVRAM)
2916 struct nvram_tuple wndr4000_sb_1_params[] = {
2917
2918 {"cck2gpo", "0x1111", 0},
2919 //{"ccode", "EU", 0},
2920 {"cddpo", "0x1111", 0},
2921 {"extpagain2g", "3", 0},
2922 {"maxp2ga0", "0x56", 0},
2923 {"maxp2ga1", "0x56", 0},
2924 {"mcs2gpo0", "0x1000", 0},
2925 {"mcs2gpo1", "0x7531", 0},
2926 {"mcs2gpo2", "0x2111", 0},
2927 {"mcs2gpo3", "0xA864", 0},
2928 {"mcs2gpo4", "0x3333", 0},
2929 {"mcs2gpo5", "0x9864", 0},
2930 {"mcs2gpo6", "0x3333", 0},
2931 {"mcs2gpo7", "0xB975", 0},
2932 {"ofdm2gpo", "0x75331111", 0},
2933 {"pa2gw0a0", "0xFEA6", 0},
2934 {"pa2gw0a1", "0xFE9E", 0},
2935 {"pa2gw1a0", "0x191D", 0},
2936 {"pa2gw1a1", "0x1809", 0},
2937 {"pa2gw2a0", "0xFA18", 0},
2938 {"pa2gw2a1", "0xFA4B", 0},
2939 //{"regrev", "15", 0},
2940 {"stbcpo", "0x1111", 0},
2941
2942 {0, 0, 0}
2943 };
2944
2945 /*
2946 * set router's extra parameters
2947 */
2948 struct nvram_tuple *basic_params = NULL;
2949 struct nvram_tuple *extra_params = NULL;
2950 extra_params = wndr4000_sb_1_params;
2951 while (extra_params->name) {
2952 sprintf(s, "sb/1/%s", extra_params->name);
2953 nvram_set(s, extra_params->value);
2954 extra_params++;
2955 }
2956
2957 struct nvram_tuple wndr4000_pci_1_1_params[] = {
2958
2959 {"boardflags2", "0x04000000", 0},
2960 //{"ccode", "EU", 0},
2961 {"extpagain2g", "0", 0},
2962 {"extpagain5g", "0", 0},
2963 {"legofdm40duppo", "0x2222", 0},
2964 {"legofdmbw205ghpo", "0x88642100", 0},
2965 {"legofdmbw205gmpo", "0x33221100", 0},
2966 {"legofdmbw20ul5ghpo", "0x88642100", 0},
2967 {"legofdmbw20ul5gmpo", "0x33221100", 0},
2968 {"maxp5ga0", "0x4E", 0},
2969 {"maxp5ga1", "0x4E", 0},
2970 {"maxp5ga2", "0x4E", 0},
2971 {"maxp5gha0", "0x4E", 0},
2972 {"maxp5gha1", "0x4E", 0},
2973 {"maxp5gha2", "0x4E", 0},
2974 {"maxp5gla0", "0x48", 0},
2975 {"maxp5gla1", "0x48", 0},
2976 {"maxp5gla2", "0x48", 0},
2977 {"mcs32po", "0x2222", 0},
2978 {"mcsbw205ghpo", "0x88642100", 0},
2979 {"mcsbw205glpo", "0x11000000", 0},
2980 {"mcsbw205gmpo", "0x44221100", 0},
2981 {"mcsbw20ul5ghpo", "0x88642100", 0},
2982 {"mcsbw20ul5glpo", "0x11000000", 0},
2983 {"mcsbw20ul5gmpo", "0x44221100", 0},
2984 {"mcsbw405ghpo", "0x99875310", 0},
2985 {"mcsbw405glpo", "0x33222222", 0},
2986 {"mcsbw405gmpo", "0x66443322", 0},
2987 {"pa5ghw1a1", "0x155F", 0},
2988 {"pa5ghw2a1", "0xFAB0", 0},
2989 //{"regrev", "15", 0},
2990
2991 {0, 0, 0}
2992 };
2993 /*
2994 * set router's extra parameters
2995 */
2996 extra_params = wndr4000_pci_1_1_params;
2997 while (extra_params->name) {
2998 sprintf(s, "pci/1/1/%s", extra_params->name);
2999 nvram_set(s, extra_params->value);
3000 extra_params++;
3001 }
3002 break;
3003 case MODEL_WNDR3700v3:
3004 mfr = "Netgear";
3005 name = "WNDR3700v3";
3006 features = SUP_SES | SUP_80211N | SUP_1000ET;
3007 // Don't auto-start blink, as shift register causes other LED's to blink slightly because of this.
3008 // Rather, turn on in startup script if desired ... so disable the line below.
3009 // nvram_set("blink_wl", "1");
3010 #ifdef TCONFIG_USB
3011 nvram_set("usb_uhci", "-1");
3012 #endif
3013 if (!nvram_match("t_fix1", (char *)name)) {
3014 nvram_set("lan_ifnames", "vlan1 eth1 eth2");
3015 nvram_set("wan_ifnameX", "vlan2");
3016 nvram_set("wl_ifname", "eth1");
3017 }
3018
3019 // Set Key Parameters for Wireless Interfaces: SB (Southbridge) and PCI, to configure HW (as Netgear intends)
3020 // Credit for the nvram_tuple approach below goes to DD-WRT (borrowed here for simplicity)!
3021 // Parameters optimized based on clean Netgear build (NVRAM extracted and checked vs. Tomato 30/30/30 Reset version of NVRAM)
3022 struct nvram_tuple wndr3700v3_sb_1_params[] = {
3023
3024 {"cck2gpo", "0x1111", 0},
3025 //{"ccode", "EU", 0},
3026 {"cddpo", "0x1111", 0},
3027 {"extpagain2g", "3", 0},
3028 {"maxp2ga0", "0x56", 0},
3029 {"maxp2ga1", "0x56", 0},
3030 {"mcs2gpo0", "0x1000", 0},
3031 {"mcs2gpo1", "0x7531", 0},
3032 {"mcs2gpo2", "0x2111", 0},
3033 {"mcs2gpo3", "0xA864", 0},
3034 {"mcs2gpo4", "0x3333", 0},
3035 {"mcs2gpo5", "0x9864", 0},
3036 {"mcs2gpo6", "0x3333", 0},
3037 {"mcs2gpo7", "0xB975", 0},
3038 {"ofdm2gpo", "0x75331111", 0},
3039 {"pa2gw0a0", "0xFEA6", 0},
3040 {"pa2gw0a1", "0xFE9E", 0},
3041 {"pa2gw1a0", "0x191D", 0},
3042 {"pa2gw1a1", "0x1809", 0},
3043 {"pa2gw2a0", "0xFA18", 0},
3044 {"pa2gw2a1", "0xFA4B", 0},
3045 //{"regrev", "15", 0},
3046 {"stbcpo", "0x1111", 0},
3047
3048 {0, 0, 0}
3049 };
3050
3051 /*
3052 * set router's extra parameters
3053 */
3054 extra_params = wndr3700v3_sb_1_params;
3055 while (extra_params->name) {
3056 sprintf(s, "sb/1/%s", extra_params->name);
3057 nvram_set(s, extra_params->value);
3058 extra_params++;
3059 }
3060
3061 struct nvram_tuple wndr3700v3_pci_1_1_params[] = {
3062
3063 {"boardflags2", "0x04000000", 0},
3064 //{"ccode", "EU", 0},
3065 {"extpagain2g", "0", 0},
3066 {"extpagain5g", "0", 0},
3067 {"legofdm40duppo", "0x2222", 0},
3068 {"legofdmbw205ghpo", "0x88642100", 0},
3069 {"legofdmbw205gmpo", "0x33221100", 0},
3070 {"legofdmbw20ul5ghpo", "0x88642100", 0},
3071 {"legofdmbw20ul5gmpo", "0x33221100", 0},
3072 {"maxp5ga0", "0x4E", 0},
3073 {"maxp5ga1", "0x4E", 0},
3074 {"maxp5ga2", "0x4E", 0},
3075 {"maxp5gha0", "0x4E", 0},
3076 {"maxp5gha1", "0x4E", 0},
3077 {"maxp5gha2", "0x4E", 0},
3078 {"maxp5gla0", "0x48", 0},
3079 {"maxp5gla1", "0x48", 0},
3080 {"maxp5gla2", "0x48", 0},
3081 {"mcs32po", "0x2222", 0},
3082 {"mcsbw205ghpo", "0x88642100", 0},
3083 {"mcsbw205glpo", "0x11000000", 0},
3084 {"mcsbw205gmpo", "0x44221100", 0},
3085 {"mcsbw20ul5ghpo", "0x88642100", 0},
3086 {"mcsbw20ul5glpo", "0x11000000", 0},
3087 {"mcsbw20ul5gmpo", "0x44221100", 0},
3088 {"mcsbw405ghpo", "0x99875310", 0},
3089 {"mcsbw405glpo", "0x33222222", 0},
3090 {"mcsbw405gmpo", "0x66443322", 0},
3091 {"pa5ghw1a1", "0x155F", 0},
3092 {"pa5ghw2a1", "0xFAB0", 0},
3093 //{"regrev", "15", 0},
3094
3095 {0, 0, 0}
3096 };
3097 /*
3098 * set router's extra parameters
3099 */
3100 extra_params = wndr3700v3_pci_1_1_params;
3101 while (extra_params->name) {
3102 sprintf(s, "pci/1/1/%s", extra_params->name);
3103 nvram_set(s, extra_params->value);
3104 extra_params++;
3105 }
3106 break;
3107 case MODEL_WNDR3400:
3108 mfr = "Netgear";
3109 name = "WNDR3400";
3110 features = SUP_SES | SUP_80211N;
3111 // Don't auto-start blink, as shift register causes other LED's to blink slightly because of this.
3112 // Rather, turn on in startup script if desired ... so disable the line below.
3113 // nvram_set("blink_wl", "1");
3114 #ifdef TCONFIG_USB
3115 nvram_set("usb_uhci", "-1");
3116 #endif
3117 if (!nvram_match("t_fix1", (char *)name)) {
3118 nvram_set("lan_ifnames", "vlan1 eth1 eth2");
3119 nvram_set("wan_ifnameX", "vlan2");
3120 nvram_set("wl_ifname", "eth1");
3121 }
3122
3123 // Set Key Parameters for Wireless Interfaces: SB (Southbridge) and PCI, to configure HW (as Netgear intends)
3124 // Credit for the nvram_tuple approach below goes to DD-WRT (borrowed here for simplicity)!
3125 // Parameters optimized based on clean Netgear build (NVRAM extracted and checked vs. Tomato 30/30/30 Reset version of NVRAM)
3126 struct nvram_tuple wndr3400_sb_1_params[] = {
3127
3128 {"aa2g", "3", 0},
3129 {"ag0", "2", 0},
3130 {"ag1", "2", 0},
3131 {"antswctl2g", "2", 0},
3132 {"antswitch", "0", 0},
3133 {"bw40po", "0", 0},
3134 {"bwduppo", "0", 0},
3135 {"cck2gpo", "0x0000", 0},
3136 {"ccode", "US", 0},
3137 {"cddpo", "0", 0},
3138 {"extpagain2g", "2", 0},
3139 {"itt2ga0", "0x20", 0},
3140 {"itt2ga1", "0x20", 0},
3141 {"ledbh0", "2", 0},
3142 {"ledbh1", "11", 0},
3143 {"ledbh2", "11", 0},
3144 {"ledbh3", "11", 0},
3145 {"leddc", "0xffff", 0},
3146 {"maxp2ga0", "0x56", 0},
3147 {"maxp2ga1", "0x56", 0},
3148 {"mcs2gpo0", "0x2222", 0},
3149 {"mcs2gpo1", "0xa642", 0},
3150 {"mcs2gpo2", "0x6666", 0},
3151 {"mcs2gpo3", "0xa866", 0},
3152 {"mcs2gpo4", "0x8888", 0},
3153 {"mcs2gpo5", "0xa888", 0},
3154 {"mcs2gpo6", "0x8888", 0},
3155 {"mcs2gpo7", "0xcc88", 0},
3156 {"ofdm2gpo", "0x54400000", 0},
3157 {"pa2gw0a0", "0xfeca", 0},
3158 {"pa2gw0a1", "0xfebd", 0},
3159 {"pa2gw1a0", "0x17dd", 0},
3160 {"pa2gw1a1", "0x16ba", 0},
3161 {"pa2gw2a0", "0xfa8e", 0},
3162 {"pa2gw2a1", "0xfab1", 0},
3163 {"pdetrange2g", "2", 0},
3164 {"regrev", "39", 0},
3165 {"rxchain", "3", 0},
3166 {"sromrev", "8", 0},
3167 {"stbcpo", "0", 0},
3168 {"triso2g", "3", 0},
3169 {"tssipos2g", "1", 0},
3170 {"txchain", "3", 0},
3171
3172 /* {"sromrev", "8", 0},
3173 {"ccode", "ALL", 0},
3174 {"regrev", "0", 0},
3175 {"ledbh0", "11", 0},
3176 {"ledbh1", "11", 0},
3177 {"ledbh2", "11", 0},
3178 {"ledbh3", "11", 0},
3179 {"ledbh9", "8", 0},
3180 {"leddc", "0xffff", 0},
3181 {"txchain", "3", 0},
3182 {"rxchain", "3", 0},
3183 {"antswitch", "0", 0},
3184 {"aa2g", "3", 0},
3185 {"ag0", "2", 0},
3186 {"ag1", "2", 0},
3187 {"itt2ga0", "0x20", 0},
3188 {"maxp2ga0", "0x48", 0},
3189 {"pa2gw0a0", "0xFEA5", 0},
3190 {"pa2gw1a0", "0x17B2", 0},
3191 {"pa2gw2a0", "0xFA73", 0},
3192 {"itt2ga1", "0x20", 0},
3193 {"maxp2ga1", "0x48", 0},
3194 {"pa2gw0a1", "0xfeba", 0},
3195 {"pa2gw1a1", "0x173c", 0},
3196 {"pa2gw2a1", "0xfa9b", 0},
3197 {"tssipos2g", "1", 0},
3198 {"extpagain2g", "2", 0},
3199 {"pdetrange2g", "2", 0},
3200 {"triso2g", "3", 0},
3201 {"antswctl2g", "2", 0},
3202 {"cck2gpo", "0x0000", 0},
3203 {"ofdm2gpo", "0x66666666", 0},
3204 {"mcs2gpo0", "0x6666", 0},
3205 {"mcs2gpo1", "0x6666", 0},
3206 {"mcs2gpo2", "0x6666", 0},
3207 {"mcs2gpo3", "0x6666", 0},
3208 {"mcs2gpo4", "0x6666", 0},
3209 {"mcs2gpo5", "0x6666", 0},
3210 {"mcs2gpo6", "0x6666", 0},
3211 {"mcs2gpo7", "0x6666", 0},
3212 {"cddpo", "0", 0},
3213 {"stbcpo", "0", 0},
3214 {"bw40po", "0", 0},
3215 {"bwduppo", "0", 0},
3216 */
3217 {0, 0, 0}
3218 };
3219 /*
3220 * set router's extra parameters
3221 */
3222 extra_params = wndr3400_sb_1_params;
3223 while (extra_params->name) {
3224 sprintf(s, "sb/1/%s", extra_params->name);
3225 nvram_set(s, extra_params->value);
3226 extra_params++;
3227 }
3228
3229 struct nvram_tuple wndr3400_pci_1_1_params[] = {
3230
3231 {"aa5g", "3", 0},
3232 {"ag0", "2", 0},
3233 {"ag1", "2", 0},
3234 {"antswctl2g", "0", 0},
3235 {"antswctl5g", "0", 0},
3236 {"antswitch", "0", 0},
3237 {"bw405ghpo/bw405glpo/bw405gpo/bw402gpo", "0x2", 0},
3238 {"bw40po", "0", 0},
3239 {"bwduppo", "0", 0},
3240 {"ccode", "US", 0},
3241 {"cdd5ghpo/cdd5glpo/cdd5gpo/cdd2gpo", "0x0", 0},
3242 {"cddpo", "0", 0},
3243 {"extpagain5g", "2", 0},
3244 {"itt5ga0", "0x3e", 0},
3245 {"itt5ga1", "0x3e", 0},
3246 {"ledbh0", "0", 0},
3247 {"ledbh1", "0xffff", 0},
3248 {"ledbh2", "0xffff", 0},
3249 {"ledbh3", "0xffff", 0},
3250 {"leddc", "0xffff", 0},
3251 {"maxp5ga0", "0x4E", 0},
3252 {"maxp5ga1", "0x4E", 0},
3253 {"maxp5gha0", "0x4A", 0},
3254 {"maxp5gha1", "0x4A", 0},
3255 {"maxp5gla0", "0x3E", 0},
3256 {"maxp5gla1", "0x3E", 0},
3257 {"mcs5ghpo0", "0x4200", 0},
3258 {"mcs5ghpo1", "0x6664", 0},
3259 {"mcs5ghpo2", "0x4200", 0},
3260 {"mcs5ghpo3", "0x6664", 0},
3261 {"mcs5ghpo4", "0x4200", 0},
3262 {"mcs5ghpo5", "0x6664", 0},
3263 {"mcs5ghpo6", "0x4200", 0},
3264 {"mcs5ghpo7", "0x6664", 0},
3265 {"mcs5glpo0", "0x0000", 0},
3266 {"mcs5glpo1", "0x2200", 0},
3267 {"mcs5glpo2", "0x0000", 0},
3268 {"mcs5glpo3", "0x2200", 0},
3269 {"mcs5glpo4", "0x0000", 0},
3270 {"mcs5glpo5", "0x2200", 0},
3271 {"mcs5glpo6", "0x0000", 0},
3272 {"mcs5glpo7", "0x2200", 0},
3273 {"mcs5gpo0", "0x4200", 0},
3274 {"mcs5gpo1", "0x6664", 0},
3275 {"mcs5gpo2", "0x4200", 0},
3276 {"mcs5gpo3", "0x6664", 0},
3277 {"mcs5gpo4", "0x4200", 0},
3278 {"mcs5gpo5", "0x6664", 0},
3279 {"mcs5gpo6", "0x4200", 0},
3280 {"mcs5gpo7", "0x6664", 0},
3281 {"ofdm5ghpo0", "0x0000", 0},
3282 {"ofdm5ghpo1", "0x2000", 0},
3283 {"ofdm5glpo0", "0x0000", 0},
3284 {"ofdm5glpo1", "0x0000", 0},
3285 {"ofdm5gpo0", "0x0000", 0},
3286 {"ofdm5gpo1", "0x2000", 0},
3287 {"pa5ghw0a0", "0xfe98", 0},
3288 {"pa5ghw0a1", "0xfead", 0},
3289 {"pa5ghw1a0", "0x15c0", 0},
3290 {"pa5ghw1a1", "0x1539", 0},
3291 {"pa5ghw2a0", "0xfa9c", 0},
3292 {"pa5ghw2a1", "0xfab9", 0},
3293 {"pa5glw0a0", "0xfe87", 0},
3294 {"pa5glw0a1", "0xfe9a", 0},
3295 {"pa5glw1a0", "0x1637", 0},
3296 {"pa5glw1a1", "0x1591", 0},
3297 {"pa5glw2a0", "0xfa8e", 0},
3298 {"pa5glw2a1", "0xfabc", 0},
3299 {"pa5gw0a0", "0xfe9b", 0},
3300 {"pa5gw0a1", "0xfe9b", 0},
3301 {"pa5gw1a0", "0x153f", 0},
3302 {"pa5gw1a1", "0x1576", 0},
3303 {"pa5gw2a0", "0xfaae", 0},
3304 {"pa5gw2a1", "0xfaa5", 0},
3305 {"pdetrange5g", "4", 0},
3306 {"regrev", "39", 0},
3307 {"rxchain", "3", 0},
3308 {"sromrev", "8", 0},
3309 {"stbc5ghpo/stbc5glpo/stbc5gpo/stbc2gpo", "0x0", 0},
3310 {"stbcpo", "0", 0},
3311 {"triso5g", "3", 0},
3312 {"tssipos5g", "1", 0},
3313 {"txchain", "3", 0},
3314 {"wdup405ghpo/wdup405glpo/wdup405gpo/wdup402gpo", "0x0", 0},
3315
3316 /* {"sromrev", "8", 0},
3317 {"ccode", "ALL", 0},
3318 {"regrev", "0", 0},
3319 {"ledbh0", "8", 0},
3320 {"ledbh1", "0x11", 0},
3321 {"ledbh2", "0x11", 0},
3322 {"ledbh3", "0x11", 0},
3323 {"leddc", "0xffff", 0},
3324 {"txchain", "3", 0},
3325 {"rxchain", "3", 0},
3326 {"antswitch", "0", 0},
3327 {"cddpo", "0", 0},
3328 {"stbcpo", "0", 0},
3329 {"bw40po", "0", 0},
3330 {"bwduppo", "0", 0},
3331 {"aa5g", "3", 0},
3332 {"ag0", "2", 0},
3333 {"ag1", "2", 0},
3334 {"itt5ga0", "0x3e", 0},
3335 {"maxp5ga0", "0x4A", 0},
3336 {"maxp5gha0", "0x4A", 0},
3337 {"maxp5gla0", "0x4A", 0},
3338 {"pa5gw0a0", "0xFEF9", 0},
3339 {"pa5gw1a0", "0x164B", 0},
3340 {"pa5gw2a0", "0xFADD", 0},
3341 {"pa5glw0a0", "0xFEF9", 0},
3342 {"pa5glw1a0", "0x154B", 0},
3343 {"pa5glw2a0", "0xFAFD", 0},
3344 {"pa5ghw0a0", "0xfeda", 0},
3345 {"pa5ghw1a0", "0x1612", 0},
3346 {"pa5ghw2a0", "0xfabe", 0},
3347 {"tssipos5g", "1", 0},
3348 {"extpagain5g", "2", 0},
3349 {"pdetrange5g", "4", 0},
3350 {"triso5g", "3", 0},
3351 {"antswctl2g", "0", 0},
3352 {"antswctl5g", "0", 0},
3353 {"itt5ga1", "0x3e", 0},
3354 {"maxp5ga1", "0x4A", 0},
3355 {"maxp5gha1", "0x4A", 0},
3356 {"maxp5gla1", "0x4A", 0},
3357 {"pa5gw0a1", "0xff31", 0},
3358 {"pa5gw1a1", "0x1697", 0},
3359 {"pa5gw2a1", "0xfb08", 0},
3360 {"pa5glw0a1", "0xFF31", 0},
3361 {"pa5glw1a1", "0x1517", 0},
3362 {"pa5glw2a1", "0xFB2F", 0},
3363 {"pa5ghw0a1", "0xff18", 0},
3364 {"pa5ghw1a1", "0x1661", 0},
3365 {"pa5ghw2a1", "0xfafe", 0},
3366 {"ofdm5gpo0", "0x0000", 0},
3367 {"ofdm5gpo1", "0x2000", 0},
3368 {"ofdm5glpo0", "0x0000", 0},
3369 {"ofdm5glpo1", "0x2000", 0},
3370 {"ofdm5ghpo0", "0x0000", 0},
3371 {"ofdm5ghpo1", "0x2000", 0},
3372 {"mcs5gpo0", "0x4200", 0},
3373 {"mcs5gpo1", "0x6664", 0},
3374 {"mcs5gpo2", "0x4200", 0},
3375 {"mcs5gpo3", "0x6664", 0},
3376 {"mcs5gpo4", "0x4200", 0},
3377 {"mcs5gpo5", "0x6664", 0},
3378 {"mcs5gpo6", "0x4200", 0},
3379 {"mcs5gpo7", "0x6664", 0},
3380 {"mcs5glpo0", "0x4200", 0},
3381 {"mcs5glpo1", "0x6664", 0},
3382 {"mcs5glpo2", "0x4200", 0},
3383 {"mcs5glpo3", "0x6664", 0},
3384 {"mcs5glpo4", "0x4200", 0},
3385 {"mcs5glpo5", "0x6664", 0},
3386 {"mcs5glpo6", "0x4200", 0},
3387 {"mcs5glpo7", "0x6664", 0},
3388 {"mcs5ghpo0", "0x4200", 0},
3389 {"mcs5ghpo1", "0x6664", 0},
3390 {"mcs5ghpo2", "0x4200", 0},
3391 {"mcs5ghpo3", "0x6664", 0},
3392 {"mcs5ghpo4", "0x4200", 0},
3393 {"mcs5ghpo5", "0x6664", 0},
3394 {"mcs5ghpo6", "0x4200", 0},
3395 {"mcs5ghpo7", "0x6664", 0},
3396 {"cdd5ghpo/cdd5glpo/cdd5gpo/cdd2gpo", "0x0", 0},
3397 {"stbc5ghpo/stbc5glpo/stbc5gpo/stbc2gpo", "0x0", 0},
3398 {"bw405ghpo/bw405glpo/bw405gpo/bw402gpo", "0x2", 0},
3399 {"wdup405ghpo/wdup405glpo/wdup405gpo/wdup402gpo", "0x0",
3400 0},
3401 */
3402 {0, 0, 0}
3403 };
3404 /*
3405 * set router's extra parameters
3406 */
3407 extra_params = wndr3400_pci_1_1_params;
3408 while (extra_params->name) {
3409 sprintf(s, "pci/1/1/%s", extra_params->name);
3410 nvram_set(s, extra_params->value);
3411 extra_params++;
3412 }
3413
3414 break;
3415
3416 case MODEL_WNDR3400v2:
3417 mfr = "Netgear";
3418 name = "WNDR3400v2";
3419 features = SUP_SES | SUP_80211N;
3420 // Don't auto-start blink, as shift register causes other LED's to blink slightly because of this.
3421 // Rather, turn on in startup script if desired ... so disable the line below.
3422 // nvram_set("blink_wl", "1");
3423 #ifdef TCONFIG_USB
3424 nvram_set("usb_uhci", "-1");
3425 #endif
3426 if (!nvram_match("t_fix1", (char *)name)) {
3427 nvram_set("lan_ifnames", "vlan1 eth1 eth2");
3428 nvram_set("wan_ifnameX", "vlan2");
3429 nvram_set("wl_ifname", "eth1");
3430 }
3431 break;
3432 #endif // CONFIG_BCMWL5
3433
3434 case MODEL_WL330GE:
3435 mfr = "Asus";
3436 name = "WL-330gE";
3437 // The 330gE has only one wired port which can act either as WAN or LAN.
3438 // Failsafe mode is to have it start as a LAN port so you can get an IP
3439 // address via DHCP and access the router config page.
3440 if (!nvram_match("t_fix1", (char *)name)) {
3441 nvram_set("wl_ifname", "eth1");
3442 nvram_set("lan_ifnames", "eth1");
3443 nvram_set("wan_ifnameX", "eth0");
3444 nvram_set("wan_islan", "1");
3445 nvram_set("wan_proto", "disabled");
3446 }
3447 break;
3448 case MODEL_WL500GPv2:
3449 mfr = "Asus";
3450 name = "WL-500gP v2";
3451 features = SUP_SES;
3452 #ifdef TCONFIG_USB
3453 nvram_set("usb_uhci", "-1");
3454 #endif
3455 break;
3456 case MODEL_WL520GU:
3457 mfr = "Asus";
3458 name = "WL-520GU";
3459 features = SUP_SES;
3460 #ifdef TCONFIG_USB
3461 nvram_set("usb_uhci", "-1");
3462 #endif
3463 break;
3464 case MODEL_WL500GD:
3465 mfr = "Asus";
3466 name = "WL-500g Deluxe";
3467 // features = SUP_SES;
3468 #ifdef TCONFIG_USB
3469 nvram_set("usb_ohci", "-1");
3470 #endif
3471 if (!nvram_match("t_fix1", (char *)name)) {
3472 nvram_set("wl_ifname", "eth1");
3473 nvram_set("lan_ifnames", "vlan0 eth1");
3474 nvram_set("wan_ifnameX", "vlan1");
3475 nvram_unset("wl0gpio0");
3476 }
3477 break;
3478 case MODEL_DIR320:
3479 mfr = "D-Link";
3480 name = "DIR-320";
3481 features = SUP_SES;
3482 if (!nvram_match("t_fix1", (char *)name)) {
3483 nvram_set("wan_ifnameX", "vlan1");
3484 nvram_set("wl_ifname", "eth1");
3485 }
3486 break;
3487 case MODEL_H618B:
3488 mfr = "ZTE";
3489 name = "ZXV10 H618B";
3490 features = SUP_SES | SUP_AOSS_LED;
3491 #ifdef TCONFIG_USB
3492 nvram_set("usb_uhci", "-1");
3493 #endif
3494 if (!nvram_match("t_fix1", (char *)name)) {
3495 nvram_set("lan_ifnames", "vlan0 eth1");
3496 nvram_set("wan_ifname", "vlan1");
3497 nvram_set("wan_ifnames", "vlan1");
3498 nvram_set("wan_ifnameX", "vlan1");
3499 nvram_set("wl_ifname", "eth1");
3500 }
3501 break;
3502 case MODEL_WL1600GL:
3503 mfr = "Ovislink";
3504 name = "WL1600GL";
3505 features = SUP_SES;
3506 break;
3507 #endif // WL_BSS_INFO_VERSION >= 108
3508 case MODEL_WZRG300N:
3509 mfr = "Buffalo";
3510 name = "WZR-G300N";
3511 features = SUP_SES | SUP_AOSS_LED | SUP_BRAU | SUP_80211N;
3512 break;
3513 case MODEL_WRT160Nv1:
3514 case MODEL_WRT300N:
3515 mfr = "Linksys";
3516 name = (model == MODEL_WRT300N) ? "WRT300N v1" : "WRT160N v1";
3517 features = SUP_SES | SUP_80211N;
3518 if (!nvram_match("t_fix1", (char *)name)) {
3519 nvram_set("wan_ifnameX", "eth1");
3520 nvram_set("lan_ifnames", "eth0 eth2");
3521 }
3522 break;
3523 case MODEL_WRT310Nv1:
3524 mfr = "Linksys";
3525 name = "WRT310N v1";
3526 features = SUP_SES | SUP_80211N | SUP_WHAM_LED | SUP_1000ET;
3527 if (!nvram_match("t_fix1", (char *)name)) {
3528 nvram_set("lan_ifnames", "vlan1 eth1");
3529 nvram_set("wan_ifnameX", "vlan2");
3530 nvram_set("wl_ifname", "eth1");
3531 }
3532 break;
3533 }
3534
3535 if (name) {
3536 nvram_set("t_fix1", name);
3537 if (ver && strcmp(ver, "")) {
3538 sprintf(s, "%s %s v%s", mfr, name, ver);
3539 } else {
3540 sprintf(s, "%s %s", mfr, name);
3541 }
3542 }
3543 else {
3544 snprintf(s, sizeof(s), "%s %d/%s/%s/%s/%s", mfr, check_hw_type(),
3545 nvram_safe_get("boardtype"), nvram_safe_get("boardnum"), nvram_safe_get("boardrev"), nvram_safe_get("boardflags"));
3546 s[64] = 0;
3547 }
3548 nvram_set("t_model_name", s);
3549
3550 nvram_set("pa0maxpwr", "400"); // allow Tx power up tp 400 mW, needed for ND only
3551
3552 sprintf(s, "0x%lX", features);
3553 nvram_set("t_features", s);
3554
3555 /*
3556 note: set wan_ifnameX if wan_ifname needs to be overriden
3557
3558 */
3559 if (nvram_is_empty("wan_ifnameX")) {
3560 #if 1
3561 nvram_set("wan_ifnameX", ((strtoul(nvram_safe_get("boardflags"), NULL, 0) & BFL_ENETVLAN) ||
3562 (check_hw_type() == HW_BCM4712)) ? "vlan1" : "eth1");
3563 #else
3564 p = nvram_safe_get("wan_ifname");
3565 if ((*p == 0) || (nvram_match("wl_ifname", p))) {
3566 p = ((strtoul(nvram_safe_get("boardflags"), NULL, 0) & BFL_ENETVLAN) ||
3567 (check_hw_type() == HW_BCM4712)) ? "vlan1" : "eth1";
3568 }
3569 nvram_set("wan_ifnameX", p);
3570 #endif
3571 }
3572
3573 //!!TB - do not force country code here to allow nvram override
3574 //nvram_set("wl_country", "JP");
3575 //nvram_set("wl_country_code", "JP");
3576 nvram_set("wan_get_dns", "");
3577 nvram_set("wan_get_domain", "");
3578 nvram_set("ppp_get_ip", "");
3579 nvram_set("action_service", "");
3580 nvram_set("jffs2_format", "0");
3581 nvram_set("rrules_radio", "-1");
3582 nvram_unset("https_crt_gen");
3583 nvram_unset("log_wmclear");
3584 #ifdef TCONFIG_IPV6
3585 nvram_set("ipv6_get_dns", "");
3586 #endif
3587 #ifdef TCONFIG_MEDIA_SERVER
3588 nvram_unset("ms_rescan");
3589 #endif
3590 if (nvram_get_int("http_id_gen") == 1) nvram_unset("http_id");
3591
3592 nvram_unset("sch_rboot_last");
3593 nvram_unset("sch_rcon_last");
3594 nvram_unset("sch_c1_last");
3595 nvram_unset("sch_c2_last");
3596 nvram_unset("sch_c3_last");
3597
3598 nvram_set("brau_state", "");
3599 if ((features & SUP_BRAU) == 0) nvram_set("script_brau", "");
3600 if ((features & SUP_SES) == 0) nvram_set("sesx_script", "");
3601
3602 if ((features & SUP_1000ET) == 0) nvram_set("jumbo_frame_enable", "0");
3603
3604 // compatibility with old versions
3605 if (nvram_match("wl_net_mode", "disabled")) {
3606 nvram_set("wl_radio", "0");
3607 nvram_set("wl_net_mode", "mixed");
3608 }
3609
3610 return 0;
3611 }
3612
3613 /* Get the special files from nvram and copy them to disc.
3614 * These were files saved with "nvram setfile2nvram <filename>".
3615 * Better hope that they were saved with full pathname.
3616 */
3617 static void load_files_from_nvram(void)
3618 {
3619 char *name, *cp;
3620 int ar_loaded = 0;
3621 char buf[NVRAM_SPACE];
3622
3623 if (nvram_getall(buf, sizeof(buf)) != 0)
3624 return;
3625
3626 for (name = buf; *name; name += strlen(name) + 1) {
3627 if (strncmp(name, "FILE:", 5) == 0) { /* This special name marks a file to get. */
3628 if ((cp = strchr(name, '=')) == NULL)
3629 continue;
3630 *cp = 0;
3631 syslog(LOG_INFO, "Loading file '%s' from nvram", name + 5);
3632 nvram_nvram2file(name, name + 5);
3633 if (memcmp(".autorun", cp - 8, 9) == 0)
3634 ++ar_loaded;
3635 }
3636 }
3637 /* Start any autorun files that may have been loaded into one of the standard places. */
3638 if (ar_loaded != 0)
3639 run_nvscript(".autorun", NULL, 3);
3640 }
3641
3642 #if defined(LINUX26) && defined(TCONFIG_USB)
3643 static inline void tune_min_free_kbytes(void)
3644 {
3645 struct sysinfo info;
3646
3647 memset(&info, 0, sizeof(struct sysinfo));
3648 sysinfo(&info);
3649 if (info.totalram >= 55 * 1024 * 1024) {
3650 // If we have 64MB+ RAM, tune min_free_kbytes
3651 // to reduce page allocation failure errors.
3652 f_write_string("/proc/sys/vm/min_free_kbytes", "8192", 0, 0);
3653 }
3654 }
3655 #endif
3656
3657 static void sysinit(void)
3658 {
3659 static int noconsole = 0;
3660 static const time_t tm = 0;
3661 int hardware;
3662 int i;
3663 DIR *d;
3664 struct dirent *de;
3665 char s[256];
3666 char t[256];
3667
3668 mount("proc", "/proc", "proc", 0, NULL);
3669 mount("tmpfs", "/tmp", "tmpfs", 0, NULL);
3670
3671 #ifdef LINUX26
3672 mount("devfs", "/dev", "tmpfs", MS_MGC_VAL | MS_NOATIME, NULL);
3673 mknod("/dev/null", S_IFCHR | 0666, makedev(1, 3));
3674 mknod("/dev/console", S_IFCHR | 0600, makedev(5, 1));
3675 mount("sysfs", "/sys", "sysfs", MS_MGC_VAL, NULL);
3676 mkdir("/dev/shm", 0777);
3677 mkdir("/dev/pts", 0777);
3678 mknod("/dev/pts/ptmx", S_IRWXU|S_IFCHR, makedev(5, 2));
3679 mknod("/dev/pts/0", S_IRWXU|S_IFCHR, makedev(136, 0));
3680 mknod("/dev/pts/1", S_IRWXU|S_IFCHR, makedev(136, 1));
3681 mount("devpts", "/dev/pts", "devpts", MS_MGC_VAL, NULL);
3682 #endif
3683
3684 if (console_init()) noconsole = 1;
3685
3686 stime(&tm);
3687
3688 static const char *mkd[] = {
3689 "/tmp/etc", "/tmp/var", "/tmp/home", "/tmp/mnt",
3690 "/tmp/splashd", //!!Victek
3691 "/tmp/share", "/var/webmon", // !!TB
3692 "/var/log", "/var/run", "/var/tmp", "/var/lib", "/var/lib/misc",
3693 "/var/spool", "/var/spool/cron", "/var/spool/cron/crontabs",
3694 "/tmp/var/wwwext", "/tmp/var/wwwext/cgi-bin", // !!TB - CGI support
3695 NULL
3696 };
3697 umask(0);
3698 for (i = 0; mkd[i]; ++i) {
3699 mkdir(mkd[i], 0755);
3700 }
3701 mkdir("/var/lock", 0777);
3702 mkdir("/var/tmp/dhcp", 0777);
3703 mkdir("/home/root", 0700);
3704 chmod("/tmp", 0777);
3705 f_write("/etc/hosts", NULL, 0, 0, 0644); // blank
3706 f_write("/etc/fstab", NULL, 0, 0, 0644); // !!TB - blank
3707 simple_unlock("cron");
3708 simple_unlock("firewall");
3709 simple_unlock("restrictions");
3710 umask(022);
3711
3712 if ((d = opendir("/rom/etc")) != NULL) {
3713 while ((de = readdir(d)) != NULL) {
3714 if (de->d_name[0] == '.') continue;
3715 snprintf(s, sizeof(s), "%s/%s", "/rom/etc", de->d_name);
3716 snprintf(t, sizeof(t), "%s/%s", "/etc", de->d_name);
3717 symlink(s, t);
3718 }
3719 closedir(d);
3720 }
3721 symlink("/proc/mounts", "/etc/mtab");
3722
3723 #ifdef TCONFIG_SAMBASRV
3724 if ((d = opendir("/usr/codepages")) != NULL) {
3725 while ((de = readdir(d)) != NULL) {
3726 if (de->d_name[0] == '.') continue;
3727 snprintf(s, sizeof(s), "/usr/codepages/%s", de->d_name);
3728 snprintf(t, sizeof(t), "/usr/share/%s", de->d_name);
3729 symlink(s, t);
3730 }
3731 closedir(d);
3732 }
3733 #endif
3734
3735 #ifdef LINUX26
3736 static const char *dn[] = {
3737 "null", "zero", "random", "urandom", "full", "ptmx", "nvram",
3738 NULL
3739 };
3740 for (i = 0; dn[i]; ++i) {
3741 snprintf(s, sizeof(s), "/dev/%s", dn[i]);
3742 chmod(s, 0666);
3743 }
3744 chmod("/dev/gpio", 0660);
3745 #endif
3746
3747 set_action(ACT_IDLE);
3748
3749 for (i = 0; defenv[i]; ++i) {
3750 putenv(defenv[i]);
3751 }
3752
3753 #ifdef LINUX26
3754 eval("hotplug2", "--coldplug");
3755 start_hotplug2();
3756 #endif
3757
3758 if (!noconsole) {
3759 printf("\n\nHit ENTER for console...\n\n");
3760 run_shell(1, 0);
3761 }
3762
3763 check_bootnv();
3764
3765 #ifdef TCONFIG_IPV6
3766 // disable IPv6 by default on all interfaces
3767 f_write_string("/proc/sys/net/ipv6/conf/default/disable_ipv6", "1", 0, 0);
3768 #endif
3769
3770 for (i = 0; i < sizeof(fatalsigs) / sizeof(fatalsigs[0]); i++) {
3771 signal(fatalsigs[i], handle_fatalsigs);
3772 }
3773 signal(SIGCHLD, handle_reap);
3774
3775 #ifdef CONFIG_BCMWL5
3776 // ctf must be loaded prior to any other modules
3777 if (nvram_invmatch("ctf_disable", "1"))
3778 modprobe("ctf");
3779 #endif
3780
3781 #ifdef TCONFIG_EMF
3782 modprobe("emf");
3783 modprobe("igs");
3784 #endif
3785
3786 switch (hardware = check_hw_type()) {
3787 case HW_BCM4785:
3788 modprobe("bcm57xx");
3789 break;
3790 default:
3791 modprobe("et");
3792 break;
3793 }
3794
3795 //load after initnvram as Broadcom Wl require pci/x/1/devid and pci/x/1/macaddr nvram to be set first for DIR-865L
3796 //else 5G interface will not start!
3797 //must be tested on other routers to determine if loading nvram 1st will cause problems!
3798 //load_wl();
3799
3800 //config_loopback();
3801
3802 eval("nvram", "defaults", "--initcheck");
3803 init_nvram();
3804
3805 // set the packet size
3806 if (nvram_get_int("jumbo_frame_enable")) {
3807 // only set the size here - 'enable' flag is set by the driver
3808 // eval("et", "robowr", "0x40", "0x01", "0x1F"); // (1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) | (1 << 4)
3809 eval("et", "robowr", "0x40", "0x05", nvram_safe_get("jumbo_frame_size"));
3810 }
3811
3812 //load after init_nvram
3813 load_wl();
3814
3815 config_loopback();
3816
3817 klogctl(8, NULL, nvram_get_int("console_loglevel"));
3818
3819 #if defined(LINUX26) && defined(TCONFIG_USB)
3820 tune_min_free_kbytes();
3821 #endif
3822 setup_conntrack();
3823 set_host_domain_name();
3824
3825 set_tz();
3826
3827 eval("buttons");
3828
3829 #ifdef CONFIG_BCMWL6
3830 eval("blink_5g");
3831 #endif
3832
3833 if (!noconsole) xstart("console");
3834
3835 i = nvram_get_int("sesx_led");
3836 led(LED_AMBER, (i & 1) != 0);
3837 led(LED_WHITE, (i & 2) != 0);
3838 led(LED_AOSS, (i & 4) != 0);
3839 led(LED_BRIDGE, (i & 8) != 0);
3840 led(LED_DIAG, 1);
3841 }
3842
3843 int init_main(int argc, char *argv[])
3844 {
3845 int state, i;
3846 sigset_t sigset;
3847
3848 // AB - failsafe?
3849 nvram_unset("debug_rc_svc");
3850
3851 sysinit();
3852
3853 sigemptyset(&sigset);
3854 for (i = 0; i < sizeof(initsigs) / sizeof(initsigs[0]); i++) {
3855 sigaddset(&sigset, initsigs[i]);
3856 }
3857 sigprocmask(SIG_BLOCK, &sigset, NULL);
3858
3859 #if defined(DEBUG_NOISY)
3860 nvram_set("debug_logeval", "1");
3861 nvram_set("debug_cprintf", "1");
3862 nvram_set("debug_cprintf_file", "1");
3863 nvram_set("debug_ddns", "1");
3864 #endif
3865
3866 start_jffs2();
3867
3868 state = SIGUSR2; /* START */
3869
3870 for (;;) {
3871 TRACE_PT("main loop signal/state=%d\n", state);
3872
3873 switch (state) {
3874 case SIGUSR1: /* USER1: service handler */
3875 exec_service();
3876 break;
3877
3878 case SIGHUP: /* RESTART */
3879 case SIGINT: /* STOP */
3880 case SIGQUIT: /* HALT */
3881 case SIGTERM: /* REBOOT */
3882 led(LED_DIAG, 1);
3883 unlink("/var/notice/sysup");
3884
3885 if( nvram_match( "webmon_bkp", "1" ) )
3886 xstart( "/usr/sbin/webmon_bkp", "hourly" ); // make a copy before halt/reboot router
3887
3888 run_nvscript("script_shut", NULL, 10);
3889
3890 stop_services();
3891 stop_wan();
3892 stop_lan();
3893 stop_vlan();
3894 stop_syslog();
3895
3896 if ((state == SIGTERM /* REBOOT */) ||
3897 (state == SIGQUIT /* HALT */)) {
3898 remove_storage_main(1);
3899 stop_usb();
3900
3901 shutdn(state == SIGTERM /* REBOOT */);
3902 exit(0);
3903 }
3904 if (state == SIGINT /* STOP */) {
3905 break;
3906 }
3907
3908 // SIGHUP (RESTART) falls through
3909
3910 case SIGUSR2: /* START */
3911 SET_LED(RELEASE_WAN_CONTROL);
3912 start_syslog();
3913
3914 load_files_from_nvram();
3915
3916 int fd = -1;
3917 fd = file_lock("usb"); // hold off automount processing
3918 start_usb();
3919
3920 xstart("/usr/sbin/mymotd", "init");
3921 run_nvscript("script_init", NULL, 2);
3922
3923 file_unlock(fd); // allow to process usb hotplug events
3924 #ifdef TCONFIG_USB
3925 /*
3926 * On RESTART some partitions can stay mounted if they are busy at the moment.
3927 * In that case USB drivers won't unload, and hotplug won't kick off again to
3928 * remount those drives that actually got unmounted. Make sure to remount ALL
3929 * partitions here by simulating hotplug event.
3930 */
3931 if (state == SIGHUP /* RESTART */)
3932 add_remove_usbhost("-1", 1);
3933 #endif
3934
3935 create_passwd();
3936 start_vlan();
3937 start_lan();
3938 start_arpbind();
3939 start_wan(BOOT);
3940 start_services();
3941 start_wl();
3942
3943 #ifdef CONFIG_BCMWL5
3944 if (wds_enable()) {
3945 /* Restart NAS one more time - for some reason without
3946 * this the new driver doesn't always bring WDS up.
3947 */
3948 stop_nas();
3949 start_nas();
3950 }
3951 #endif
3952
3953 syslog(LOG_INFO, "%s: Tomato %s", nvram_safe_get("t_model_name"), tomato_version);
3954
3955 led(LED_DIAG, 0);
3956 switch(get_model())
3957 {
3958 case MODEL_WTR54GS:
3959 gpio_write(1 << 2, 1); // By BaoWeiQuan Clear power light blinking
3960 break;
3961 case MODEL_WNDR3400:
3962 case MODEL_WNDR3400v2:
3963 case MODEL_WNDR3700v3:
3964 case MODEL_WNDR4000:
3965 led(LED_WHITE, LED_ON);
3966 led(LED_AOSS, LED_ON);
3967 break;
3968 case MODEL_R6300V1:
3969 gpio_write(1 << 1, 0); // Turn on left half of LOGO light
3970 gpio_write(1 << 9, 0); // Turn on right half of LOGO light
3971 gpio_write(1 << 2, 0); // Turn on power light (green)
3972 break;
3973 }//bwq518
3974 notice_set("sysup", "");
3975 break;
3976 }
3977
3978 chld_reap(0); /* Periodically reap zombies. */
3979 check_services();
3980 sigwait(&sigset, &state);
3981 }
3982
3983 return 0;
3984 }
3985
3986 int reboothalt_main(int argc, char *argv[])
3987 {
3988 int reboot = (strstr(argv[0], "reboot") != NULL);
3989 puts(reboot ? "Rebooting..." : "Shutting down...");
3990 fflush(stdout);
3991 sleep(1);
3992 kill(1, reboot ? SIGTERM : SIGQUIT);
3993
3994 /* In the case we're hung, we'll get stuck and never actually reboot.
3995 * The only way out is to pull power.
3996 * So after 'reset_wait' seconds (default: 20), forcibly crash & restart.
3997 */
3998 if (fork() == 0) {
3999 int wait = nvram_get_int("reset_wait") ? : 20;
4000 if ((wait < 10) || (wait > 120)) wait = 10;
4001
4002 f_write("/proc/sysrq-trigger", "s", 1, 0 , 0); /* sync disks */
4003 sleep(wait);
4004 puts("Still running... Doing machine reset.");
4005 fflush(stdout);
4006 f_write("/proc/sysrq-trigger", "s", 1, 0 , 0); /* sync disks */
4007 sleep(1);
4008 f_write("/proc/sysrq-trigger", "b", 1, 0 , 0); /* machine reset */
4009 }
4010
4011 return 0;
4012 }
4013
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