include/perf_event.h

   1 #pragma once
   2
   3 /*
   4  * Performance events:
   5  *
   6  *    Copyright (C) 2008-2009, Thomas Gleixner <tglx@linutronix.de>
   7  *    Copyright (C) 2008-2011, Red Hat, Inc., Ingo Molnar
   8  *    Copyright (C) 2008-2011, Red Hat, Inc., Peter Zijlstra
   9  *
  10  * Data type definitions, declarations, prototypes.
  11  *
  12  *    Started by: Thomas Gleixner and Ingo Molnar
  13  *
  14  * For licencing details see kernel-base/COPYING
  15  */
  16 #include <linux/types.h>
  17 #include <linux/ioctl.h>
  18 #include <asm/byteorder.h>
  19
  20 /*
  21  * User-space ABI bits:
  22  */
  23
  24 /*
  25  * attr.type
  26  */
  27 enum perf_type_id {
  28         PERF_TYPE_HARDWARE                      = 0,
  29         PERF_TYPE_SOFTWARE                      = 1,
  30         PERF_TYPE_TRACEPOINT                    = 2,
  31         PERF_TYPE_HW_CACHE                      = 3,
  32         PERF_TYPE_RAW                           = 4,
  33         PERF_TYPE_BREAKPOINT                    = 5,
  34
  35         PERF_TYPE_MAX,                          /* non-ABI */
  36 };
  37
  38 /*
  39  * Generalized performance event event_id types, used by the
  40  * attr.event_id parameter of the sys_perf_event_open()
  41  * syscall:
  42  */
  43 enum perf_hw_id {
  44         /*
  45          * Common hardware events, generalized by the kernel:
  46          */
  47         PERF_COUNT_HW_CPU_CYCLES                = 0,
  48         PERF_COUNT_HW_INSTRUCTIONS              = 1,
  49         PERF_COUNT_HW_CACHE_REFERENCES          = 2,
  50         PERF_COUNT_HW_CACHE_MISSES              = 3,
  51         PERF_COUNT_HW_BRANCH_INSTRUCTIONS       = 4,
  52         PERF_COUNT_HW_BRANCH_MISSES             = 5,
  53         PERF_COUNT_HW_BUS_CYCLES                = 6,
  54         PERF_COUNT_HW_STALLED_CYCLES_FRONTEND   = 7,
  55         PERF_COUNT_HW_STALLED_CYCLES_BACKEND    = 8,
  56         PERF_COUNT_HW_REF_CPU_CYCLES            = 9,
  57
  58         PERF_COUNT_HW_MAX,                      /* non-ABI */
  59 };
  60
  61 /*
  62  * Generalized hardware cache events:
  63  *
  64  *       { L1-D, L1-I, LLC, ITLB, DTLB, BPU, NODE } x
  65  *       { read, write, prefetch } x
  66  *       { accesses, misses }
  67  */
  68 enum perf_hw_cache_id {
  69         PERF_COUNT_HW_CACHE_L1D                 = 0,
  70         PERF_COUNT_HW_CACHE_L1I                 = 1,
  71         PERF_COUNT_HW_CACHE_LL                  = 2,
  72         PERF_COUNT_HW_CACHE_DTLB                = 3,
  73         PERF_COUNT_HW_CACHE_ITLB                = 4,
  74         PERF_COUNT_HW_CACHE_BPU                 = 5,
  75         PERF_COUNT_HW_CACHE_NODE                = 6,
  76
  77         PERF_COUNT_HW_CACHE_MAX,                /* non-ABI */
  78 };
  79
  80 enum perf_hw_cache_op_id {
  81         PERF_COUNT_HW_CACHE_OP_READ             = 0,
  82         PERF_COUNT_HW_CACHE_OP_WRITE            = 1,
  83         PERF_COUNT_HW_CACHE_OP_PREFETCH         = 2,
  84
  85         PERF_COUNT_HW_CACHE_OP_MAX,             /* non-ABI */
  86 };
  87
  88 enum perf_hw_cache_op_result_id {
  89         PERF_COUNT_HW_CACHE_RESULT_ACCESS       = 0,
  90         PERF_COUNT_HW_CACHE_RESULT_MISS         = 1,
  91
  92         PERF_COUNT_HW_CACHE_RESULT_MAX,         /* non-ABI */
  93 };
  94
  95 /*
  96  * Special "software" events provided by the kernel, even if the hardware
  97  * does not support performance events. These events measure various
  98  * physical and sw events of the kernel (and allow the profiling of them as
  99  * well):
 100  */
 101 enum perf_sw_ids {
 102         PERF_COUNT_SW_CPU_CLOCK                 = 0,
 103         PERF_COUNT_SW_TASK_CLOCK                = 1,
 104         PERF_COUNT_SW_PAGE_FAULTS               = 2,
 105         PERF_COUNT_SW_CONTEXT_SWITCHES          = 3,
 106         PERF_COUNT_SW_CPU_MIGRATIONS            = 4,
 107         PERF_COUNT_SW_PAGE_FAULTS_MIN           = 5,
 108         PERF_COUNT_SW_PAGE_FAULTS_MAJ           = 6,
 109         PERF_COUNT_SW_ALIGNMENT_FAULTS          = 7,
 110         PERF_COUNT_SW_EMULATION_FAULTS          = 8,
 111         PERF_COUNT_SW_DUMMY                     = 9,
 112
 113         PERF_COUNT_SW_MAX,                      /* non-ABI */
 114 };
 115
 116 /*
 117  * Bits that can be set in attr.sample_type to request information
 118  * in the overflow packets.
 119  */
 120 enum perf_event_sample_format {
 121         PERF_SAMPLE_IP                          = 1U << 0,
 122         PERF_SAMPLE_TID                         = 1U << 1,
 123         PERF_SAMPLE_TIME                        = 1U << 2,
 124         PERF_SAMPLE_ADDR                        = 1U << 3,
 125         PERF_SAMPLE_READ                        = 1U << 4,
 126         PERF_SAMPLE_CALLCHAIN                   = 1U << 5,
 127         PERF_SAMPLE_ID                          = 1U << 6,
 128         PERF_SAMPLE_CPU                         = 1U << 7,
 129         PERF_SAMPLE_PERIOD                      = 1U << 8,
 130         PERF_SAMPLE_STREAM_ID                   = 1U << 9,
 131         PERF_SAMPLE_RAW                         = 1U << 10,
 132         PERF_SAMPLE_BRANCH_STACK                = 1U << 11,
 133         PERF_SAMPLE_REGS_USER                   = 1U << 12,
 134         PERF_SAMPLE_STACK_USER                  = 1U << 13,
 135         PERF_SAMPLE_WEIGHT                      = 1U << 14,
 136         PERF_SAMPLE_DATA_SRC                    = 1U << 15,
 137         PERF_SAMPLE_IDENTIFIER                  = 1U << 16,
 138         PERF_SAMPLE_TRANSACTION                 = 1U << 17,
 139
 140         PERF_SAMPLE_MAX = 1U << 18,             /* non-ABI */
 141 };
 142
 143 /*
 144  * values to program into branch_sample_type when PERF_SAMPLE_BRANCH is set
 145  *
 146  * If the user does not pass priv level information via branch_sample_type,
 147  * the kernel uses the event's priv level. Branch and event priv levels do
 148  * not have to match. Branch priv level is checked for permissions.
 149  *
 150  * The branch types can be combined, however BRANCH_ANY covers all types
 151  * of branches and therefore it supersedes all the other types.
 152  */
 153 enum perf_branch_sample_type {
 154         PERF_SAMPLE_BRANCH_USER         = 1U << 0, /* user branches */
 155         PERF_SAMPLE_BRANCH_KERNEL       = 1U << 1, /* kernel branches */
 156         PERF_SAMPLE_BRANCH_HV           = 1U << 2, /* hypervisor branches */
 157
 158         PERF_SAMPLE_BRANCH_ANY          = 1U << 3, /* any branch types */
 159         PERF_SAMPLE_BRANCH_ANY_CALL     = 1U << 4, /* any call branch */
 160         PERF_SAMPLE_BRANCH_ANY_RETURN   = 1U << 5, /* any return branch */
 161         PERF_SAMPLE_BRANCH_IND_CALL     = 1U << 6, /* indirect calls */
 162         PERF_SAMPLE_BRANCH_ABORT_TX     = 1U << 7, /* transaction aborts */
 163         PERF_SAMPLE_BRANCH_IN_TX        = 1U << 8, /* in transaction */
 164         PERF_SAMPLE_BRANCH_NO_TX        = 1U << 9, /* not in transaction */
 165
 166         PERF_SAMPLE_BRANCH_MAX          = 1U << 10, /* non-ABI */
 167 };
 168
 169 #define PERF_SAMPLE_BRANCH_PLM_ALL \
 170         (PERF_SAMPLE_BRANCH_USER|\
 171          PERF_SAMPLE_BRANCH_KERNEL|\
 172          PERF_SAMPLE_BRANCH_HV)
 173
 174 /*
 175  * Values to determine ABI of the registers dump.
 176  */
 177 enum perf_sample_regs_abi {
 178         PERF_SAMPLE_REGS_ABI_NONE       = 0,
 179         PERF_SAMPLE_REGS_ABI_32         = 1,
 180         PERF_SAMPLE_REGS_ABI_64         = 2,
 181 };
 182
 183 /*
 184  * Values for the memory transaction event qualifier, mostly for
 185  * abort events. Multiple bits can be set.
 186  */
 187 enum {
 188         PERF_TXN_ELISION        = (1 << 0), /* From elision */
 189         PERF_TXN_TRANSACTION    = (1 << 1), /* From transaction */
 190         PERF_TXN_SYNC           = (1 << 2), /* Instruction is related */
 191         PERF_TXN_ASYNC          = (1 << 3), /* Instruction not related */
 192         PERF_TXN_RETRY          = (1 << 4), /* Retry possible */
 193         PERF_TXN_CONFLICT       = (1 << 5), /* Conflict abort */
 194         PERF_TXN_CAPACITY_WRITE = (1 << 6), /* Capacity write abort */
 195         PERF_TXN_CAPACITY_READ  = (1 << 7), /* Capacity read abort */
 196
 197         PERF_TXN_MAX            = (1 << 8), /* non-ABI */
 198
 199         /* bits 32..63 are reserved for the abort code */
 200
 201         PERF_TXN_ABORT_MASK  = (0xffffffffULL << 32),
 202         PERF_TXN_ABORT_SHIFT = 32,
 203 };
 204
 205 /*
 206  * The format of the data returned by read() on a perf event fd,
 207  * as specified by attr.read_format:
 208  *
 209  * struct read_format {
 210  *      { u64           value;
 211  *        { u64         time_enabled; } && PERF_FORMAT_TOTAL_TIME_ENABLED
 212  *        { u64         time_running; } && PERF_FORMAT_TOTAL_TIME_RUNNING
 213  *        { u64         id;           } && PERF_FORMAT_ID
 214  *      } && !PERF_FORMAT_GROUP
 215  *
 216  *      { u64           nr;
 217  *        { u64         time_enabled; } && PERF_FORMAT_TOTAL_TIME_ENABLED
 218  *        { u64         time_running; } && PERF_FORMAT_TOTAL_TIME_RUNNING
 219  *        { u64         value;
 220  *          { u64       id;           } && PERF_FORMAT_ID
 221  *        }             cntr[nr];
 222  *      } && PERF_FORMAT_GROUP
 223  * };
 224  */
 225 enum perf_event_read_format {
 226         PERF_FORMAT_TOTAL_TIME_ENABLED          = 1U << 0,
 227         PERF_FORMAT_TOTAL_TIME_RUNNING          = 1U << 1,
 228         PERF_FORMAT_ID                          = 1U << 2,
 229         PERF_FORMAT_GROUP                       = 1U << 3,
 230
 231         PERF_FORMAT_MAX = 1U << 4,              /* non-ABI */
 232 };
 233
 234 #define PERF_ATTR_SIZE_VER0     64      /* sizeof first published struct */
 235 #define PERF_ATTR_SIZE_VER1     72      /* add: config2 */
 236 #define PERF_ATTR_SIZE_VER2     80      /* add: branch_sample_type */
 237 #define PERF_ATTR_SIZE_VER3     96      /* add: sample_regs_user */
 238                                         /* add: sample_stack_user */
 239
 240 /*
 241  * Hardware event_id to monitor via a performance monitoring event:
 242  */
 243 struct perf_event_attr {
 244
 245         /*
 246          * Major type: hardware/software/tracepoint/etc.
 247          */
 248         __u32                   type;
 249
 250         /*
 251          * Size of the attr structure, for fwd/bwd compat.
 252          */
 253         __u32                   size;
 254
 255         /*
 256          * Type specific configuration information.
 257          */
 258         __u64                   config;
 259
 260         union {
 261                 __u64           sample_period;
 262                 __u64           sample_freq;
 263         };
 264
 265         __u64                   sample_type;
 266         __u64                   read_format;
 267
 268         __u64                   disabled       :  1, /* off by default        */
 269                                 inherit        :  1, /* children inherit it   */
 270                                 pinned         :  1, /* must always be on PMU */
 271                                 exclusive      :  1, /* only group on PMU     */
 272                                 exclude_user   :  1, /* don't count user      */
 273                                 exclude_kernel :  1, /* ditto kernel          */
 274                                 exclude_hv     :  1, /* ditto hypervisor      */
 275                                 exclude_idle   :  1, /* don't count when idle */
 276                                 mmap           :  1, /* include mmap data     */
 277                                 comm           :  1, /* include comm data     */
 278                                 freq           :  1, /* use freq, not period  */
 279                                 inherit_stat   :  1, /* per task counts       */
 280                                 enable_on_exec :  1, /* next exec enables     */
 281                                 task           :  1, /* trace fork/exit       */
 282                                 watermark      :  1, /* wakeup_watermark      */
 283                                 /*
 284                                  * precise_ip:
 285                                  *
 286                                  *  0 - SAMPLE_IP can have arbitrary skid
 287                                  *  1 - SAMPLE_IP must have constant skid
 288                                  *  2 - SAMPLE_IP requested to have 0 skid
 289                                  *  3 - SAMPLE_IP must have 0 skid
 290                                  *
 291                                  *  See also PERF_RECORD_MISC_EXACT_IP
 292                                  */
 293                                 precise_ip     :  2, /* skid constraint       */
 294                                 mmap_data      :  1, /* non-exec mmap data    */
 295                                 sample_id_all  :  1, /* sample_type all events */
 296
 297                                 exclude_host   :  1, /* don't count in host   */
 298                                 exclude_guest  :  1, /* don't count in guest  */
 299
 300                                 exclude_callchain_kernel : 1, /* exclude kernel callchains */
 301                                 exclude_callchain_user   : 1, /* exclude user callchains */
 302                                 mmap2          :  1, /* include mmap with inode data     */
 303
 304                                 __reserved_1   : 40;
 305
 306         union {
 307                 __u32           wakeup_events;    /* wakeup every n events */
 308                 __u32           wakeup_watermark; /* bytes before wakeup   */
 309         };
 310
 311         __u32                   bp_type;
 312         union {
 313                 __u64           bp_addr;
 314                 __u64           config1; /* extension of config */
 315         };
 316         union {
 317                 __u64           bp_len;
 318                 __u64           config2; /* extension of config1 */
 319         };
 320         __u64   branch_sample_type; /* enum perf_branch_sample_type */
 321
 322         /*
 323          * Defines set of user regs to dump on samples.
 324          * See asm/perf_regs.h for details.
 325          */
 326         __u64   sample_regs_user;
 327
 328         /*
 329          * Defines size of the user stack to dump on samples.
 330          */
 331         __u32   sample_stack_user;
 332
 333         /* Align to u64. */
 334         __u32   __reserved_2;
 335 };
 336
 337 #define perf_flags(attr)        (*(&(attr)->read_format + 1))
 338
 339 /*
 340  * Ioctls that can be done on a perf event fd:
 341  */
 342 #define PERF_EVENT_IOC_ENABLE           _IO ('$', 0)
 343 #define PERF_EVENT_IOC_DISABLE          _IO ('$', 1)
 344 #define PERF_EVENT_IOC_REFRESH          _IO ('$', 2)
 345 #define PERF_EVENT_IOC_RESET            _IO ('$', 3)
 346 #define PERF_EVENT_IOC_PERIOD           _IOW('$', 4, __u64)
 347 #define PERF_EVENT_IOC_SET_OUTPUT       _IO ('$', 5)
 348 #define PERF_EVENT_IOC_SET_FILTER       _IOW('$', 6, char *)
 349 #define PERF_EVENT_IOC_ID               _IOR('$', 7, __u64 *)
 350
 351 enum perf_event_ioc_flags {
 352         PERF_IOC_FLAG_GROUP             = 1U << 0,
 353 };
 354
 355 /*
 356  * Structure of the page that can be mapped via mmap
 357  */
 358 struct perf_event_mmap_page {
 359         __u32   version;                /* version number of this structure */
 360         __u32   compat_version;         /* lowest version this is compat with */
 361
 362         /*
 363          * Bits needed to read the hw events in user-space.
 364          *
 365          *   u32 seq, time_mult, time_shift, idx, width;
 366          *   u64 count, enabled, running;
 367          *   u64 cyc, time_offset;
 368          *   s64 pmc = 0;
 369          *
 370          *   do {
 371          *     seq = pc->lock;
 372          *     barrier()
 373          *
 374          *     enabled = pc->time_enabled;
 375          *     running = pc->time_running;
 376          *
 377          *     if (pc->cap_usr_time && enabled != running) {
 378          *       cyc = rdtsc();
 379          *       time_offset = pc->time_offset;
 380          *       time_mult   = pc->time_mult;
 381          *       time_shift  = pc->time_shift;
 382          *     }
 383          *
 384          *     idx = pc->index;
 385          *     count = pc->offset;
 386          *     if (pc->cap_usr_rdpmc && idx) {
 387          *       width = pc->pmc_width;
 388          *       pmc = rdpmc(idx - 1);
 389          *     }
 390          *
 391          *     barrier();
 392          *   } while (pc->lock != seq);
 393          *
 394          * NOTE: for obvious reason this only works on self-monitoring
 395          *       processes.
 396          */
 397         __u32   lock;                   /* seqlock for synchronization */
 398         __u32   index;                  /* hardware event identifier */
 399         __s64   offset;                 /* add to hardware event value */
 400         __u64   time_enabled;           /* time event active */
 401         __u64   time_running;           /* time event on cpu */
 402         union {
 403                 __u64   capabilities;
 404                 struct {
 405                         __u64   cap_bit0                : 1, /* Always 0, deprecated, see commit 860f085b74e9 */
 406                                 cap_bit0_is_deprecated  : 1, /* Always 1, signals that bit 0 is zero */
 407
 408                                 cap_user_rdpmc          : 1, /* The RDPMC instruction can be used to read counts */
 409                                 cap_user_time           : 1, /* The time_* fields are used */
 410                                 cap_user_time_zero      : 1, /* The time_zero field is used */
 411                                 cap_____res             : 59;
 412                 };
 413         };
 414
 415         /*
 416          * If cap_usr_rdpmc this field provides the bit-width of the value
 417          * read using the rdpmc() or equivalent instruction. This can be used
 418          * to sign extend the result like:
 419          *
 420          *   pmc <<= 64 - width;
 421          *   pmc >>= 64 - width; // signed shift right
 422          *   count += pmc;
 423          */
 424         __u16   pmc_width;
 425
 426         /*
 427          * If cap_usr_time the below fields can be used to compute the time
 428          * delta since time_enabled (in ns) using rdtsc or similar.
 429          *
 430          *   u64 quot, rem;
 431          *   u64 delta;
 432          *
 433          *   quot = (cyc >> time_shift);
 434          *   rem = cyc & ((1 << time_shift) - 1);
 435          *   delta = time_offset + quot * time_mult +
 436          *              ((rem * time_mult) >> time_shift);
 437          *
 438          * Where time_offset,time_mult,time_shift and cyc are read in the
 439          * seqcount loop described above. This delta can then be added to
 440          * enabled and possible running (if idx), improving the scaling:
 441          *
 442          *   enabled += delta;
 443          *   if (idx)
 444          *     running += delta;
 445          *
 446          *   quot = count / running;
 447          *   rem  = count % running;
 448          *   count = quot * enabled + (rem * enabled) / running;
 449          */
 450         __u16   time_shift;
 451         __u32   time_mult;
 452         __u64   time_offset;
 453         /*
 454          * If cap_usr_time_zero, the hardware clock (e.g. TSC) can be calculated
 455          * from sample timestamps.
 456          *
 457          *   time = timestamp - time_zero;
 458          *   quot = time / time_mult;
 459          *   rem  = time % time_mult;
 460          *   cyc = (quot << time_shift) + (rem << time_shift) / time_mult;
 461          *
 462          * And vice versa:
 463          *
 464          *   quot = cyc >> time_shift;
 465          *   rem  = cyc & ((1 << time_shift) - 1);
 466          *   timestamp = time_zero + quot * time_mult +
 467          *               ((rem * time_mult) >> time_shift);
 468          */
 469         __u64   time_zero;
 470         __u32   size;                   /* Header size up to __reserved[] fields. */
 471
 472                 /*
 473                  * Hole for extension of the self monitor capabilities
 474                  */
 475
 476         __u8    __reserved[118*8+4];    /* align to 1k. */
 477
 478         /*
 479          * Control data for the mmap() data buffer.
 480          *
 481          * User-space reading the @data_head value should issue an smp_rmb(),
 482          * after reading this value.
 483          *
 484          * When the mapping is PROT_WRITE the @data_tail value should be
 485          * written by userspace to reflect the last read data, after issueing
 486          * an smp_mb() to separate the data read from the ->data_tail store.
 487          * In this case the kernel will not over-write unread data.
 488          *
 489          * See perf_output_put_handle() for the data ordering.
 490          */
 491         __u64   data_head;              /* head in the data section */
 492         __u64   data_tail;              /* user-space written tail */
 493 };
 494
 495 #define PERF_RECORD_MISC_CPUMODE_MASK           (7 << 0)
 496 #define PERF_RECORD_MISC_CPUMODE_UNKNOWN        (0 << 0)
 497 #define PERF_RECORD_MISC_KERNEL                 (1 << 0)
 498 #define PERF_RECORD_MISC_USER                   (2 << 0)
 499 #define PERF_RECORD_MISC_HYPERVISOR             (3 << 0)
 500 #define PERF_RECORD_MISC_GUEST_KERNEL           (4 << 0)
 501 #define PERF_RECORD_MISC_GUEST_USER             (5 << 0)
 502
 503 #define PERF_RECORD_MISC_MMAP_DATA              (1 << 13)
 504 /*
 505  * Indicates that the content of PERF_SAMPLE_IP points to
 506  * the actual instruction that triggered the event. See also
 507  * perf_event_attr::precise_ip.
 508  */
 509 #define PERF_RECORD_MISC_EXACT_IP               (1 << 14)
 510 /*
 511  * Reserve the last bit to indicate some extended misc field
 512  */
 513 #define PERF_RECORD_MISC_EXT_RESERVED           (1 << 15)
 514
 515 struct perf_event_header {
 516         __u32   type;
 517         __u16   misc;
 518         __u16   size;
 519 };
 520
 521 enum perf_event_type {
 522
 523         /*
 524          * If perf_event_attr.sample_id_all is set then all event types will
 525          * have the sample_type selected fields related to where/when
 526          * (identity) an event took place (TID, TIME, ID, STREAM_ID, CPU,
 527          * IDENTIFIER) described in PERF_RECORD_SAMPLE below, it will be stashed
 528          * just after the perf_event_header and the fields already present for
 529          * the existing fields, i.e. at the end of the payload. That way a newer
 530          * perf.data file will be supported by older perf tools, with these new
 531          * optional fields being ignored.
 532          *
 533          * struct sample_id {
 534          *      { u32                   pid, tid; } && PERF_SAMPLE_TID
 535          *      { u64                   time;     } && PERF_SAMPLE_TIME
 536          *      { u64                   id;       } && PERF_SAMPLE_ID
 537          *      { u64                   stream_id;} && PERF_SAMPLE_STREAM_ID
 538          *      { u32                   cpu, res; } && PERF_SAMPLE_CPU
 539          *      { u64                   id;       } && PERF_SAMPLE_IDENTIFIER
 540          * } && perf_event_attr::sample_id_all
 541          *
 542          * Note that PERF_SAMPLE_IDENTIFIER duplicates PERF_SAMPLE_ID.  The
 543          * advantage of PERF_SAMPLE_IDENTIFIER is that its position is fixed
 544          * relative to header.size.
 545          */
 546
 547         /*
 548          * The MMAP events record the PROT_EXEC mappings so that we can
 549          * correlate userspace IPs to code. They have the following structure:
 550          *
 551          * struct {
 552          *      struct perf_event_header        header;
 553          *
 554          *      u32                             pid, tid;
 555          *      u64                             addr;
 556          *      u64                             len;
 557          *      u64                             pgoff;
 558          *      char                            filename[];
 559          *      struct sample_id                sample_id;
 560          * };
 561          */
 562         PERF_RECORD_MMAP                        = 1,
 563
 564         /*
 565          * struct {
 566          *      struct perf_event_header        header;
 567          *      u64                             id;
 568          *      u64                             lost;
 569          *      struct sample_id                sample_id;
 570          * };
 571          */
 572         PERF_RECORD_LOST                        = 2,
 573
 574         /*
 575          * struct {
 576          *      struct perf_event_header        header;
 577          *
 578          *      u32                             pid, tid;
 579          *      char                            comm[];
 580          *      struct sample_id                sample_id;
 581          * };
 582          */
 583         PERF_RECORD_COMM                        = 3,
 584
 585         /*
 586          * struct {
 587          *      struct perf_event_header        header;
 588          *      u32                             pid, ppid;
 589          *      u32                             tid, ptid;
 590          *      u64                             time;
 591          *      struct sample_id                sample_id;
 592          * };
 593          */
 594         PERF_RECORD_EXIT                        = 4,
 595
 596         /*
 597          * struct {
 598          *      struct perf_event_header        header;
 599          *      u64                             time;
 600          *      u64                             id;
 601          *      u64                             stream_id;
 602          *      struct sample_id                sample_id;
 603          * };
 604          */
 605         PERF_RECORD_THROTTLE                    = 5,
 606         PERF_RECORD_UNTHROTTLE                  = 6,
 607
 608         /*
 609          * struct {
 610          *      struct perf_event_header        header;
 611          *      u32                             pid, ppid;
 612          *      u32                             tid, ptid;
 613          *      u64                             time;
 614          *      struct sample_id                sample_id;
 615          * };
 616          */
 617         PERF_RECORD_FORK                        = 7,
 618
 619         /*
 620          * struct {
 621          *      struct perf_event_header        header;
 622          *      u32                             pid, tid;
 623          *
 624          *      struct read_format              values;
 625          *      struct sample_id                sample_id;
 626          * };
 627          */
 628         PERF_RECORD_READ                        = 8,
 629
 630         /*
 631          * struct {
 632          *      struct perf_event_header        header;
 633          *
 634          *      #
 635          *      # Note that PERF_SAMPLE_IDENTIFIER duplicates PERF_SAMPLE_ID.
 636          *      # The advantage of PERF_SAMPLE_IDENTIFIER is that its position
 637          *      # is fixed relative to header.
 638          *      #
 639          *
 640          *      { u64                   id;       } && PERF_SAMPLE_IDENTIFIER
 641          *      { u64                   ip;       } && PERF_SAMPLE_IP
 642          *      { u32                   pid, tid; } && PERF_SAMPLE_TID
 643          *      { u64                   time;     } && PERF_SAMPLE_TIME
 644          *      { u64                   addr;     } && PERF_SAMPLE_ADDR
 645          *      { u64                   id;       } && PERF_SAMPLE_ID
 646          *      { u64                   stream_id;} && PERF_SAMPLE_STREAM_ID
 647          *      { u32                   cpu, res; } && PERF_SAMPLE_CPU
 648          *      { u64                   period;   } && PERF_SAMPLE_PERIOD
 649          *
 650          *      { struct read_format    values;   } && PERF_SAMPLE_READ
 651          *
 652          *      { u64                   nr,
 653          *        u64                   ips[nr];  } && PERF_SAMPLE_CALLCHAIN
 654          *
 655          *      #
 656          *      # The RAW record below is opaque data wrt the ABI
 657          *      #
 658          *      # That is, the ABI doesn't make any promises wrt to
 659          *      # the stability of its content, it may vary depending
 660          *      # on event, hardware, kernel version and phase of
 661          *      # the moon.
 662          *      #
 663          *      # In other words, PERF_SAMPLE_RAW contents are not an ABI.
 664          *      #
 665          *
 666          *      { u32                   size;
 667          *        char                  data[size];}&& PERF_SAMPLE_RAW
 668          *
 669          *      { u64                   nr;
 670          *        { u64 from, to, flags } lbr[nr];} && PERF_SAMPLE_BRANCH_STACK
 671          *
 672          *      { u64                   abi; # enum perf_sample_regs_abi
 673          *        u64                   regs[weight(mask)]; } && PERF_SAMPLE_REGS_USER
 674          *
 675          *      { u64                   size;
 676          *        char                  data[size];
 677          *        u64                   dyn_size; } && PERF_SAMPLE_STACK_USER
 678          *
 679          *      { u64                   weight;   } && PERF_SAMPLE_WEIGHT
 680          *      { u64                   data_src; } && PERF_SAMPLE_DATA_SRC
 681          *      { u64                   transaction; } && PERF_SAMPLE_TRANSACTION
 682          * };
 683          */
 684         PERF_RECORD_SAMPLE                      = 9,
 685
 686         /*
 687          * The MMAP2 records are an augmented version of MMAP, they add
 688          * maj, min, ino numbers to be used to uniquely identify each mapping
 689          *
 690          * struct {
 691          *      struct perf_event_header        header;
 692          *
 693          *      u32                             pid, tid;
 694          *      u64                             addr;
 695          *      u64                             len;
 696          *      u64                             pgoff;
 697          *      u32                             maj;
 698          *      u32                             min;
 699          *      u64                             ino;
 700          *      u64                             ino_generation;
 701          *      char                            filename[];
 702          *      struct sample_id                sample_id;
 703          * };
 704          */
 705         PERF_RECORD_MMAP2                       = 10,
 706
 707         PERF_RECORD_MAX,                        /* non-ABI */
 708 };
 709
 710 #define PERF_MAX_STACK_DEPTH            127
 711
 712 enum perf_callchain_context {
 713         PERF_CONTEXT_HV                 = (__u64)-32,
 714         PERF_CONTEXT_KERNEL             = (__u64)-128,
 715         PERF_CONTEXT_USER               = (__u64)-512,
 716
 717         PERF_CONTEXT_GUEST              = (__u64)-2048,
 718         PERF_CONTEXT_GUEST_KERNEL       = (__u64)-2176,
 719         PERF_CONTEXT_GUEST_USER         = (__u64)-2560,
 720
 721         PERF_CONTEXT_MAX                = (__u64)-4095,
 722 };
 723
 724 #define PERF_FLAG_FD_NO_GROUP           (1U << 0)
 725 #define PERF_FLAG_FD_OUTPUT             (1U << 1)
 726 #define PERF_FLAG_PID_CGROUP            (1U << 2) /* pid=cgroup id, per-cpu mode only */
 727 #define PERF_FLAG_FD_CLOEXEC            (1U << 3) /* O_CLOEXEC */
 728
 729 union perf_mem_data_src {
 730         __u64 val;
 731         struct {
 732                 __u64   mem_op:5,       /* type of opcode */
 733                         mem_lvl:14,     /* memory hierarchy level */
 734                         mem_snoop:5,    /* snoop mode */
 735                         mem_lock:2,     /* lock instr */
 736                         mem_dtlb:7,     /* tlb access */
 737                         mem_rsvd:31;
 738         };
 739 };
 740
 741 /* type of opcode (load/store/prefetch,code) */
 742 #define PERF_MEM_OP_NA          0x01 /* not available */
 743 #define PERF_MEM_OP_LOAD        0x02 /* load instruction */
 744 #define PERF_MEM_OP_STORE       0x04 /* store instruction */
 745 #define PERF_MEM_OP_PFETCH      0x08 /* prefetch */
 746 #define PERF_MEM_OP_EXEC        0x10 /* code (execution) */
 747 #define PERF_MEM_OP_SHIFT       0
 748
 749 /* memory hierarchy (memory level, hit or miss) */
 750 #define PERF_MEM_LVL_NA         0x01  /* not available */
 751 #define PERF_MEM_LVL_HIT        0x02  /* hit level */
 752 #define PERF_MEM_LVL_MISS       0x04  /* miss level  */
 753 #define PERF_MEM_LVL_L1         0x08  /* L1 */
 754 #define PERF_MEM_LVL_LFB        0x10  /* Line Fill Buffer */
 755 #define PERF_MEM_LVL_L2         0x20  /* L2 */
 756 #define PERF_MEM_LVL_L3         0x40  /* L3 */
 757 #define PERF_MEM_LVL_LOC_RAM    0x80  /* Local DRAM */
 758 #define PERF_MEM_LVL_REM_RAM1   0x100 /* Remote DRAM (1 hop) */
 759 #define PERF_MEM_LVL_REM_RAM2   0x200 /* Remote DRAM (2 hops) */
 760 #define PERF_MEM_LVL_REM_CCE1   0x400 /* Remote Cache (1 hop) */
 761 #define PERF_MEM_LVL_REM_CCE2   0x800 /* Remote Cache (2 hops) */
 762 #define PERF_MEM_LVL_IO         0x1000 /* I/O memory */
 763 #define PERF_MEM_LVL_UNC        0x2000 /* Uncached memory */
 764 #define PERF_MEM_LVL_SHIFT      5
 765
 766 /* snoop mode */
 767 #define PERF_MEM_SNOOP_NA       0x01 /* not available */
 768 #define PERF_MEM_SNOOP_NONE     0x02 /* no snoop */
 769 #define PERF_MEM_SNOOP_HIT      0x04 /* snoop hit */
 770 #define PERF_MEM_SNOOP_MISS     0x08 /* snoop miss */
 771 #define PERF_MEM_SNOOP_HITM     0x10 /* snoop hit modified */
 772 #define PERF_MEM_SNOOP_SHIFT    19
 773
 774 /* locked instruction */
 775 #define PERF_MEM_LOCK_NA        0x01 /* not available */
 776 #define PERF_MEM_LOCK_LOCKED    0x02 /* locked transaction */
 777 #define PERF_MEM_LOCK_SHIFT     24
 778
 779 /* TLB access */
 780 #define PERF_MEM_TLB_NA         0x01 /* not available */
 781 #define PERF_MEM_TLB_HIT        0x02 /* hit level */
 782 #define PERF_MEM_TLB_MISS       0x04 /* miss level */
 783 #define PERF_MEM_TLB_L1         0x08 /* L1 */
 784 #define PERF_MEM_TLB_L2         0x10 /* L2 */
 785 #define PERF_MEM_TLB_WK         0x20 /* Hardware Walker*/
 786 #define PERF_MEM_TLB_OS         0x40 /* OS fault handler */
 787 #define PERF_MEM_TLB_SHIFT      26
 788
 789 #define PERF_MEM_S(a, s) \
 790         (((__u64)PERF_MEM_##a##_##s) << PERF_MEM_##a##_SHIFT)
 791
 792 /*
 793  * single taken branch record layout:
 794  *
 795  *      from: source instruction (may not always be a branch insn)
 796  *        to: branch target
 797  *   mispred: branch target was mispredicted
 798  * predicted: branch target was predicted
 799  *
 800  * support for mispred, predicted is optional. In case it
 801  * is not supported mispred = predicted = 0.
 802  *
 803  *     in_tx: running in a hardware transaction
 804  *     abort: aborting a hardware transaction
 805  */
 806 struct perf_branch_entry {
 807         __u64   from;
 808         __u64   to;
 809         __u64   mispred:1,  /* target mispredicted */
 810                 predicted:1,/* target predicted */
 811                 in_tx:1,    /* in transaction */
 812                 abort:1,    /* transaction abort */
 813                 reserved:60;
 814 };