board/pcs440ep/pcs440ep.c

   1 /*
   2  * (C) Copyright 2006
   3  * Stefan Roese, DENX Software Engineering, sr@denx.de.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 #include <common.h>
  25 #include <ppc4xx.h>
  26 #include <malloc.h>
  27 #include <command.h>
  28 #include <crc.h>
  29 #include <asm/processor.h>
  30 #include <spd_sdram.h>
  31 #include <status_led.h>
  32 #include <sha1.h>
  33 #include <asm/io.h>
  34 #include <net.h>
  35
  36 DECLARE_GLOBAL_DATA_PTR;
  37
  38 extern flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips     */
  39
  40 unsigned char   sha1_checksum[SHA1_SUM_LEN];
  41
  42 /* swap 4 Bits (Bit0 = Bit3, Bit1 = Bit2, Bit2 = Bit1 and Bit3 = Bit0) */
  43 unsigned char swapbits[16] = {0x0, 0x8, 0x4, 0xc, 0x2, 0xa, 0x6, 0xe,
  44                               0x1, 0x9, 0x5, 0xd, 0x3, 0xb, 0x7, 0xf};
  45
  46 static void set_leds (int val)
  47 {
  48         out32(GPIO0_OR, (in32 (GPIO0_OR) & ~0x78000000) | (val << 27));
  49 }
  50
  51 #define GET_LEDS ((in32 (GPIO0_OR) & 0x78000000) >> 27)
  52
  53 void __led_init (led_id_t mask, int state)
  54 {
  55         int     val = GET_LEDS;
  56
  57         if (state == STATUS_LED_ON)
  58                 val |= mask;
  59         else
  60                 val &= ~mask;
  61         set_leds (val);
  62 }
  63
  64 void __led_set (led_id_t mask, int state)
  65 {
  66         int     val = GET_LEDS;
  67
  68         if (state == STATUS_LED_ON)
  69                 val |= mask;
  70         else if (state == STATUS_LED_OFF)
  71                 val &= ~mask;
  72         set_leds (val);
  73 }
  74
  75 void __led_toggle (led_id_t mask)
  76 {
  77         int     val = GET_LEDS;
  78
  79         val ^= mask;
  80         set_leds (val);
  81 }
  82
  83 static void status_led_blink (void)
  84 {
  85         int     i;
  86         int     val = GET_LEDS;
  87
  88         /* set all LED which are on, to state BLINKING */
  89         for (i = 0; i < 4; i++) {
  90                 if (val & 0x01) status_led_set (3 - i, STATUS_LED_BLINKING);
  91                 else status_led_set (3 - i, STATUS_LED_OFF);
  92                 val = val >> 1;
  93         }
  94 }
  95
  96 #if defined(CONFIG_SHOW_BOOT_PROGRESS)
  97 void show_boot_progress (int val)
  98 {
  99         /* find all valid Codes for val in README */
 100         if (val == -30) return;
 101         if (val < 0) {
 102                 /* smthing goes wrong */
 103                 status_led_blink ();
 104                 return;
 105         }
 106         switch (val) {
 107                 case 1:
 108                         /* validating Image */
 109                         status_led_set (0, STATUS_LED_OFF);
 110                         status_led_set (1, STATUS_LED_ON);
 111                         status_led_set (2, STATUS_LED_ON);
 112                         break;
 113                 case 15:
 114                         /* booting */
 115                         status_led_set (0, STATUS_LED_ON);
 116                         status_led_set (1, STATUS_LED_ON);
 117                         status_led_set (2, STATUS_LED_ON);
 118                         break;
 119 #if 0
 120                 case 64:
 121                         /* starting Ethernet configuration */
 122                         status_led_set (0, STATUS_LED_OFF);
 123                         status_led_set (1, STATUS_LED_OFF);
 124                         status_led_set (2, STATUS_LED_ON);
 125                         break;
 126 #endif
 127                 case 80:
 128                         /* loading Image */
 129                         status_led_set (0, STATUS_LED_ON);
 130                         status_led_set (1, STATUS_LED_OFF);
 131                         status_led_set (2, STATUS_LED_ON);
 132                         break;
 133         }
 134 }
 135 #endif
 136
 137 int board_early_init_f(void)
 138 {
 139         register uint reg;
 140
 141         set_leds(0);                    /* display boot info counter */
 142
 143         /*--------------------------------------------------------------------
 144          * Setup the external bus controller/chip selects
 145          *-------------------------------------------------------------------*/
 146         mtdcr(ebccfga, xbcfg);
 147         reg = mfdcr(ebccfgd);
 148         mtdcr(ebccfgd, reg | 0x04000000);       /* Set ATC */
 149
 150         /*--------------------------------------------------------------------
 151          * GPIO's are alreay setup in cpu/ppc4xx/cpu_init.c
 152          * via define from board config file.
 153          *-------------------------------------------------------------------*/
 154
 155         /*--------------------------------------------------------------------
 156          * Setup the interrupt controller polarities, triggers, etc.
 157          *-------------------------------------------------------------------*/
 158         mtdcr(uic0sr, 0xffffffff);      /* clear all */
 159         mtdcr(uic0er, 0x00000000);      /* disable all */
 160         mtdcr(uic0cr, 0x00000001);      /* UIC1 crit is critical */
 161         mtdcr(uic0pr, 0xfffffe1f);      /* per ref-board manual */
 162         mtdcr(uic0tr, 0x01c00000);      /* per ref-board manual */
 163         mtdcr(uic0vr, 0x00000001);      /* int31 highest, base=0x000 */
 164         mtdcr(uic0sr, 0xffffffff);      /* clear all */
 165
 166         mtdcr(uic1sr, 0xffffffff);      /* clear all */
 167         mtdcr(uic1er, 0x00000000);      /* disable all */
 168         mtdcr(uic1cr, 0x00000000);      /* all non-critical */
 169         mtdcr(uic1pr, 0xffffe0ff);      /* per ref-board manual */
 170         mtdcr(uic1tr, 0x00ffc000);      /* per ref-board manual */
 171         mtdcr(uic1vr, 0x00000001);      /* int31 highest, base=0x000 */
 172         mtdcr(uic1sr, 0xffffffff);      /* clear all */
 173
 174         /*--------------------------------------------------------------------
 175          * Setup other serial configuration
 176          *-------------------------------------------------------------------*/
 177         mfsdr(sdr_pci0, reg);
 178         mtsdr(sdr_pci0, 0x80000000 | reg);      /* PCI arbiter enabled */
 179         mtsdr(sdr_pfc0, 0x00000000);    /* Pin function: enable GPIO49-63 */
 180         mtsdr(sdr_pfc1, 0x00048000);    /* Pin function: UART0 has 4 pins, select IRQ5 */
 181
 182         return 0;
 183 }
 184
 185 #define EEPROM_LEN      256
 186 static void load_ethaddr(void)
 187 {
 188         int     ok_ethaddr, ok_eth1addr;
 189         int     ret;
 190         uchar   buf[EEPROM_LEN];
 191         char    *use_eeprom;
 192         u16     checksumcrc16 = 0;
 193
 194         /* If the env is sane, then nothing for us to do */
 195         ok_ethaddr = eth_getenv_enetaddr("ethaddr", buf);
 196         ok_eth1addr = eth_getenv_enetaddr("eth1addr", buf);
 197         if (ok_ethaddr && ok_eth1addr)
 198                 return;
 199
 200         /* read the MACs from EEprom */
 201         status_led_set (0, STATUS_LED_ON);
 202         status_led_set (1, STATUS_LED_ON);
 203         ret = eeprom_read (CONFIG_SYS_I2C_EEPROM_ADDR, 0, buf, EEPROM_LEN);
 204         if (ret == 0) {
 205                 checksumcrc16 = cyg_crc16 (buf, EEPROM_LEN - 2);
 206                 /* check, if the EEprom is programmed:
 207                  * - The Prefix(Byte 0,1,2) is equal to "ATR"
 208                  * - The checksum, stored in the last 2 Bytes, is correct
 209                  */
 210                 if ((strncmp ((char *)buf,"ATR",3) != 0) ||
 211                     ((checksumcrc16 >> 8) != buf[EEPROM_LEN - 2]) ||
 212                     ((checksumcrc16 & 0xff) != buf[EEPROM_LEN - 1])) {
 213                         /* EEprom is not programmed */
 214                         printf("%s: EEPROM Checksum not OK\n", __FUNCTION__);
 215                 } else {
 216                         /* get the MACs */
 217                         if (!ok_ethaddr)
 218                                 eth_setenv_enetaddr("ethaddr", &buf[3]);
 219                         if (!ok_eth1addr)
 220                                 eth_setenv_enetaddr("eth1addr", &buf[9]);
 221                         return;
 222                 }
 223         }
 224
 225         /* some error reading the EEprom */
 226         if ((use_eeprom = getenv ("use_eeprom_ethaddr")) == NULL) {
 227                 /* dont use bootcmd */
 228                 setenv("bootdelay", "-1");
 229                 return;
 230         }
 231         /* == default ? use standard */
 232         if (strncmp (use_eeprom, "default", 7) == 0) {
 233                 return;
 234         }
 235         /* Env doesnt exist -> hang */
 236         status_led_blink ();
 237         /* here we do this "handy" because we have no interrupts
 238            at this time */
 239         puts ("### EEPROM ERROR ### Please RESET the board ###\n");
 240         for (;;) {
 241                 __led_toggle (12);
 242                 udelay (100000);
 243         }
 244         return;
 245 }
 246
 247 #ifdef CONFIG_PREBOOT
 248
 249 static uchar kbd_magic_prefix[]         = "key_magic";
 250 static uchar kbd_command_prefix[]       = "key_cmd";
 251
 252 struct kbd_data_t {
 253         char s1;
 254         char s2;
 255 };
 256
 257 struct kbd_data_t* get_keys (struct kbd_data_t *kbd_data)
 258 {
 259         char *val;
 260         unsigned long tmp;
 261
 262         /* use the DIPs for some bootoptions */
 263         val = getenv (ENV_NAME_DIP);
 264         tmp = simple_strtoul (val, NULL, 16);
 265
 266         kbd_data->s2 = (tmp & 0x0f);
 267         kbd_data->s1 = (tmp & 0xf0) >> 4;
 268         return kbd_data;
 269 }
 270
 271 static int compare_magic (const struct kbd_data_t *kbd_data, char *str)
 272 {
 273         char s1 = str[0];
 274
 275         if (s1 >= '0' && s1 <= '9')
 276                 s1 -= '0';
 277         else if (s1 >= 'a' && s1 <= 'f')
 278                 s1 = s1 - 'a' + 10;
 279         else if (s1 >= 'A' && s1 <= 'F')
 280                 s1 = s1 - 'A' + 10;
 281         else
 282                 return -1;
 283
 284         if (s1 != kbd_data->s1) return -1;
 285
 286         s1 = str[1];
 287         if (s1 >= '0' && s1 <= '9')
 288                 s1 -= '0';
 289         else if (s1 >= 'a' && s1 <= 'f')
 290                 s1 = s1 - 'a' + 10;
 291         else if (s1 >= 'A' && s1 <= 'F')
 292                 s1 = s1 - 'A' + 10;
 293         else
 294                 return -1;
 295
 296         if (s1 != kbd_data->s2) return -1;
 297         return 0;
 298 }
 299
 300 static char *key_match (const struct kbd_data_t *kbd_data)
 301 {
 302         char magic[sizeof (kbd_magic_prefix) + 1];
 303         char *suffix;
 304         char *kbd_magic_keys;
 305
 306         /*
 307          * The following string defines the characters that can be appended
 308          * to "key_magic" to form the names of environment variables that
 309          * hold "magic" key codes, i. e. such key codes that can cause
 310          * pre-boot actions. If the string is empty (""), then only
 311          * "key_magic" is checked (old behaviour); the string "125" causes
 312          * checks for "key_magic1", "key_magic2" and "key_magic5", etc.
 313          */
 314         if ((kbd_magic_keys = getenv ("magic_keys")) == NULL)
 315                 kbd_magic_keys = "";
 316
 317         /* loop over all magic keys;
 318          * use '\0' suffix in case of empty string
 319          */
 320         for (suffix = kbd_magic_keys; *suffix ||
 321                      suffix == kbd_magic_keys; ++suffix) {
 322                 sprintf (magic, "%s%c", kbd_magic_prefix, *suffix);
 323                 if (compare_magic (kbd_data, getenv (magic)) == 0) {
 324                         char cmd_name[sizeof (kbd_command_prefix) + 1];
 325                         char *cmd;
 326
 327                         sprintf (cmd_name, "%s%c", kbd_command_prefix, *suffix);
 328                         cmd = getenv (cmd_name);
 329
 330                         return (cmd);
 331                 }
 332         }
 333         return (NULL);
 334 }
 335
 336 #endif /* CONFIG_PREBOOT */
 337
 338 static int pcs440ep_readinputs (void)
 339 {
 340         int     i;
 341         char    value[20];
 342
 343         /* read the inputs and set the Envvars */
 344         /* Revision Level Bit 26 - 29 */
 345         i = ((in32 (GPIO0_IR) & 0x0000003c) >> 2);
 346         i = swapbits[i];
 347         sprintf (value, "%02x", i);
 348         setenv (ENV_NAME_REVLEV, value);
 349         /* Solder Switch Bit 30 - 33 */
 350         i = (in32 (GPIO0_IR) & 0x00000003) << 2;
 351         i += (in32 (GPIO1_IR) & 0xc0000000) >> 30;
 352         i = swapbits[i];
 353         sprintf (value, "%02x", i);
 354         setenv (ENV_NAME_SOLDER, value);
 355         /* DIP Switch Bit 49 - 56 */
 356         i = ((in32 (GPIO1_IR) & 0x00007f80) >> 7);
 357         i = (swapbits[i & 0x0f] << 4) + swapbits[(i & 0xf0) >> 4];
 358         sprintf (value, "%02x", i);
 359         setenv (ENV_NAME_DIP, value);
 360         return 0;
 361 }
 362
 363
 364 #if defined(CONFIG_SHA1_CHECK_UB_IMG)
 365 /*************************************************************************
 366  * calculate a SHA1 sum for the U-Boot image in Flash.
 367  *
 368  ************************************************************************/
 369 static int pcs440ep_sha1 (int docheck)
 370 {
 371         unsigned char *data;
 372         unsigned char *ptroff;
 373         unsigned char output[20];
 374         unsigned char org[20];
 375         int     i, len = CONFIG_SHA1_LEN;
 376
 377         memcpy ((char *)CONFIG_SYS_LOAD_ADDR, (char *)CONFIG_SHA1_START, len);
 378         data = (unsigned char *)CONFIG_SYS_LOAD_ADDR;
 379         ptroff = &data[len + SHA1_SUM_POS];
 380
 381         for (i = 0; i < SHA1_SUM_LEN; i++) {
 382                 org[i] = ptroff[i];
 383                 ptroff[i] = 0;
 384         }
 385
 386         sha1_csum ((unsigned char *) data, len, (unsigned char *)output);
 387
 388         if (docheck == 2) {
 389                 for (i = 0; i < 20 ; i++) {
 390                         printf("%02X ", output[i]);
 391                 }
 392                 printf("\n");
 393         }
 394         if (docheck == 1) {
 395                 for (i = 0; i < 20 ; i++) {
 396                         if (org[i] != output[i]) return 1;
 397                 }
 398         }
 399         return 0;
 400 }
 401
 402 /*************************************************************************
 403  * do some checks after the SHA1 checksum from the U-Boot Image was
 404  * calculated.
 405  *
 406  ************************************************************************/
 407 static void pcs440ep_checksha1 (void)
 408 {
 409         int     ret;
 410         char    *cs_test;
 411
 412         status_led_set (0, STATUS_LED_OFF);
 413         status_led_set (1, STATUS_LED_OFF);
 414         status_led_set (2, STATUS_LED_ON);
 415         ret = pcs440ep_sha1 (1);
 416         if (ret == 0) return;
 417
 418         if ((cs_test = getenv ("cs_test")) == NULL) {
 419                 /* Env doesnt exist -> hang */
 420                 status_led_blink ();
 421                 /* here we do this "handy" because we have no interrupts
 422                    at this time */
 423                 puts ("### SHA1 ERROR ### Please RESET the board ###\n");
 424                 for (;;) {
 425                         __led_toggle (2);
 426                         udelay (100000);
 427                 }
 428         }
 429
 430         if (strncmp (cs_test, "off", 3) == 0) {
 431                 printf ("SHA1 U-Boot sum NOT ok!\n");
 432                 setenv ("bootdelay", "-1");
 433         }
 434 }
 435 #else
 436 static __inline__ void pcs440ep_checksha1 (void) { do {} while (0);}
 437 #endif
 438
 439 int misc_init_r (void)
 440 {
 441         uint pbcr;
 442         int size_val = 0;
 443
 444         load_ethaddr();
 445
 446         /* Re-do sizing to get full correct info */
 447         mtdcr(ebccfga, pb0cr);
 448         pbcr = mfdcr(ebccfgd);
 449         switch (gd->bd->bi_flashsize) {
 450         case 1 << 20:
 451                 size_val = 0;
 452                 break;
 453         case 2 << 20:
 454                 size_val = 1;
 455                 break;
 456         case 4 << 20:
 457                 size_val = 2;
 458                 break;
 459         case 8 << 20:
 460                 size_val = 3;
 461                 break;
 462         case 16 << 20:
 463                 size_val = 4;
 464                 break;
 465         case 32 << 20:
 466                 size_val = 5;
 467                 break;
 468         case 64 << 20:
 469                 size_val = 6;
 470                 break;
 471         case 128 << 20:
 472                 size_val = 7;
 473                 break;
 474         }
 475         pbcr = (pbcr & 0x0001ffff) | gd->bd->bi_flashstart | (size_val << 17);
 476         mtdcr(ebccfga, pb0cr);
 477         mtdcr(ebccfgd, pbcr);
 478
 479         /* adjust flash start and offset */
 480         gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
 481         gd->bd->bi_flashoffset = 0;
 482
 483         /* Monitor protection ON by default */
 484         (void)flash_protect(FLAG_PROTECT_SET,
 485                             -CONFIG_SYS_MONITOR_LEN,
 486                             0xffffffff,
 487                             &flash_info[1]);
 488
 489         /* Env protection ON by default */
 490         (void)flash_protect(FLAG_PROTECT_SET,
 491                             CONFIG_ENV_ADDR_REDUND,
 492                             CONFIG_ENV_ADDR_REDUND + 2*CONFIG_ENV_SECT_SIZE - 1,
 493                             &flash_info[1]);
 494
 495         pcs440ep_readinputs ();
 496         pcs440ep_checksha1 ();
 497 #ifdef CONFIG_PREBOOT
 498         {
 499                 struct kbd_data_t kbd_data;
 500                 /* Decode keys */
 501                 char *str = strdup (key_match (get_keys (&kbd_data)));
 502                 /* Set or delete definition */
 503                 setenv ("preboot", str);
 504                 free (str);
 505         }
 506 #endif /* CONFIG_PREBOOT */
 507         return 0;
 508 }
 509
 510 int checkboard(void)
 511 {
 512         char *s = getenv("serial#");
 513
 514         printf("Board: PCS440EP");
 515         if (s != NULL) {
 516                 puts(", serial# ");
 517                 puts(s);
 518         }
 519         putc('\n');
 520
 521         return (0);
 522 }
 523
 524 void spd_ddr_init_hang (void)
 525 {
 526         status_led_set (0, STATUS_LED_OFF);
 527         status_led_set (1, STATUS_LED_ON);
 528         /* we cannot use hang() because we are still running from
 529            Flash, and so the status_led driver is not initialized */
 530         puts ("### SDRAM ERROR ### Please RESET the board ###\n");
 531         for (;;) {
 532                 __led_toggle (4);
 533                 udelay (100000);
 534         }
 535 }
 536
 537 phys_size_t initdram (int board_type)
 538 {
 539         long dram_size = 0;
 540
 541         status_led_set (0, STATUS_LED_ON);
 542         status_led_set (1, STATUS_LED_OFF);
 543         dram_size = spd_sdram();
 544         status_led_set (0, STATUS_LED_OFF);
 545         status_led_set (1, STATUS_LED_ON);
 546         if (dram_size == 0) {
 547                 hang();
 548         }
 549
 550         return dram_size;
 551 }
 552
 553 /*************************************************************************
 554  *  pci_pre_init
 555  *
 556  *  This routine is called just prior to registering the hose and gives
 557  *  the board the opportunity to check things. Returning a value of zero
 558  *  indicates that things are bad & PCI initialization should be aborted.
 559  *
 560  *      Different boards may wish to customize the pci controller structure
 561  *      (add regions, override default access routines, etc) or perform
 562  *      certain pre-initialization actions.
 563  *
 564  ************************************************************************/
 565 #if defined(CONFIG_PCI)
 566 int pci_pre_init(struct pci_controller *hose)
 567 {
 568         unsigned long addr;
 569
 570         /*-------------------------------------------------------------------------+
 571           | Set priority for all PLB3 devices to 0.
 572           | Set PLB3 arbiter to fair mode.
 573           +-------------------------------------------------------------------------*/
 574         mfsdr(sdr_amp1, addr);
 575         mtsdr(sdr_amp1, (addr & 0x000000FF) | 0x0000FF00);
 576         addr = mfdcr(plb3_acr);
 577         mtdcr(plb3_acr, addr | 0x80000000);
 578
 579         /*-------------------------------------------------------------------------+
 580           | Set priority for all PLB4 devices to 0.
 581           +-------------------------------------------------------------------------*/
 582         mfsdr(sdr_amp0, addr);
 583         mtsdr(sdr_amp0, (addr & 0x000000FF) | 0x0000FF00);
 584         addr = mfdcr(plb4_acr) | 0xa0000000;    /* Was 0x8---- */
 585         mtdcr(plb4_acr, addr);
 586
 587         /*-------------------------------------------------------------------------+
 588           | Set Nebula PLB4 arbiter to fair mode.
 589           +-------------------------------------------------------------------------*/
 590         /* Segment0 */
 591         addr = (mfdcr(plb0_acr) & ~plb0_acr_ppm_mask) | plb0_acr_ppm_fair;
 592         addr = (addr & ~plb0_acr_hbu_mask) | plb0_acr_hbu_enabled;
 593         addr = (addr & ~plb0_acr_rdp_mask) | plb0_acr_rdp_4deep;
 594         addr = (addr & ~plb0_acr_wrp_mask) | plb0_acr_wrp_2deep;
 595         mtdcr(plb0_acr, addr);
 596
 597         /* Segment1 */
 598         addr = (mfdcr(plb1_acr) & ~plb1_acr_ppm_mask) | plb1_acr_ppm_fair;
 599         addr = (addr & ~plb1_acr_hbu_mask) | plb1_acr_hbu_enabled;
 600         addr = (addr & ~plb1_acr_rdp_mask) | plb1_acr_rdp_4deep;
 601         addr = (addr & ~plb1_acr_wrp_mask) | plb1_acr_wrp_2deep;
 602         mtdcr(plb1_acr, addr);
 603
 604         return 1;
 605 }
 606 #endif  /* defined(CONFIG_PCI) */
 607
 608 /*************************************************************************
 609  *  pci_target_init
 610  *
 611  *      The bootstrap configuration provides default settings for the pci
 612  *      inbound map (PIM). But the bootstrap config choices are limited and
 613  *      may not be sufficient for a given board.
 614  *
 615  ************************************************************************/
 616 #if defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT)
 617 void pci_target_init(struct pci_controller *hose)
 618 {
 619         /*--------------------------------------------------------------------------+
 620          * Set up Direct MMIO registers
 621          *--------------------------------------------------------------------------*/
 622         /*--------------------------------------------------------------------------+
 623           | PowerPC440 EP PCI Master configuration.
 624           | Map one 1Gig range of PLB/processor addresses to PCI memory space.
 625           |   PLB address 0xA0000000-0xDFFFFFFF ==> PCI address 0xA0000000-0xDFFFFFFF
 626           |   Use byte reversed out routines to handle endianess.
 627           | Make this region non-prefetchable.
 628           +--------------------------------------------------------------------------*/
 629         out32r(PCIX0_PMM0MA, 0x00000000);       /* PMM0 Mask/Attribute - disabled b4 setting */
 630         out32r(PCIX0_PMM0LA, CONFIG_SYS_PCI_MEMBASE);   /* PMM0 Local Address */
 631         out32r(PCIX0_PMM0PCILA, CONFIG_SYS_PCI_MEMBASE);        /* PMM0 PCI Low Address */
 632         out32r(PCIX0_PMM0PCIHA, 0x00000000);    /* PMM0 PCI High Address */
 633         out32r(PCIX0_PMM0MA, 0xE0000001);       /* 512M + No prefetching, and enable region */
 634
 635         out32r(PCIX0_PMM1MA, 0x00000000);       /* PMM0 Mask/Attribute - disabled b4 setting */
 636         out32r(PCIX0_PMM1LA, CONFIG_SYS_PCI_MEMBASE2);  /* PMM0 Local Address */
 637         out32r(PCIX0_PMM1PCILA, CONFIG_SYS_PCI_MEMBASE2);       /* PMM0 PCI Low Address */
 638         out32r(PCIX0_PMM1PCIHA, 0x00000000);    /* PMM0 PCI High Address */
 639         out32r(PCIX0_PMM1MA, 0xE0000001);       /* 512M + No prefetching, and enable region */
 640
 641         out32r(PCIX0_PTM1MS, 0x00000001);       /* Memory Size/Attribute */
 642         out32r(PCIX0_PTM1LA, 0);        /* Local Addr. Reg */
 643         out32r(PCIX0_PTM2MS, 0);        /* Memory Size/Attribute */
 644         out32r(PCIX0_PTM2LA, 0);        /* Local Addr. Reg */
 645
 646         /*--------------------------------------------------------------------------+
 647          * Set up Configuration registers
 648          *--------------------------------------------------------------------------*/
 649
 650         /* Program the board's subsystem id/vendor id */
 651         pci_write_config_word(0, PCI_SUBSYSTEM_VENDOR_ID,
 652                               CONFIG_SYS_PCI_SUBSYS_VENDORID);
 653         pci_write_config_word(0, PCI_SUBSYSTEM_ID, CONFIG_SYS_PCI_SUBSYS_ID);
 654
 655         /* Configure command register as bus master */
 656         pci_write_config_word(0, PCI_COMMAND, PCI_COMMAND_MASTER);
 657
 658         /* 240nS PCI clock */
 659         pci_write_config_word(0, PCI_LATENCY_TIMER, 1);
 660
 661         /* No error reporting */
 662         pci_write_config_word(0, PCI_ERREN, 0);
 663
 664         pci_write_config_dword(0, PCI_BRDGOPT2, 0x00000101);
 665
 666 }
 667 #endif                          /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT) */
 668
 669 /*************************************************************************
 670  *  pci_master_init
 671  *
 672  ************************************************************************/
 673 #if defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_MASTER_INIT)
 674 void pci_master_init(struct pci_controller *hose)
 675 {
 676         unsigned short temp_short;
 677
 678         /*--------------------------------------------------------------------------+
 679           | Write the PowerPC440 EP PCI Configuration regs.
 680           |   Enable PowerPC440 EP to be a master on the PCI bus (PMM).
 681           |   Enable PowerPC440 EP to act as a PCI memory target (PTM).
 682           +--------------------------------------------------------------------------*/
 683         pci_read_config_word(0, PCI_COMMAND, &temp_short);
 684         pci_write_config_word(0, PCI_COMMAND,
 685                               temp_short | PCI_COMMAND_MASTER |
 686                               PCI_COMMAND_MEMORY);
 687 }
 688 #endif                          /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_MASTER_INIT) */
 689
 690 /*************************************************************************
 691  *  is_pci_host
 692  *
 693  *      This routine is called to determine if a pci scan should be
 694  *      performed. With various hardware environments (especially cPCI and
 695  *      PPMC) it's insufficient to depend on the state of the arbiter enable
 696  *      bit in the strap register, or generic host/adapter assumptions.
 697  *
 698  *      Rather than hard-code a bad assumption in the general 440 code, the
 699  *      440 pci code requires the board to decide at runtime.
 700  *
 701  *      Return 0 for adapter mode, non-zero for host (monarch) mode.
 702  *
 703  *
 704  ************************************************************************/
 705 #if defined(CONFIG_PCI)
 706 int is_pci_host(struct pci_controller *hose)
 707 {
 708         /* PCS440EP is always configured as host. */
 709         return (1);
 710 }
 711 #endif                          /* defined(CONFIG_PCI) */
 712
 713 /*************************************************************************
 714  *  hw_watchdog_reset
 715  *
 716  *      This routine is called to reset (keep alive) the watchdog timer
 717  *
 718  ************************************************************************/
 719 #if defined(CONFIG_HW_WATCHDOG)
 720 void hw_watchdog_reset(void)
 721 {
 722
 723 }
 724 #endif
 725
 726 /*************************************************************************
 727  * "led" Commando for the U-Boot shell
 728  *
 729  ************************************************************************/
 730 int do_led (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 731 {
 732         int     rcode = 0, i;
 733         ulong   pattern = 0;
 734
 735         pattern = simple_strtoul (argv[1], NULL, 16);
 736         if (pattern > 0x400) {
 737                 int     val = GET_LEDS;
 738                 printf ("led: %x\n", val);
 739                 return rcode;
 740         }
 741         if (pattern > 0x200) {
 742                 status_led_blink ();
 743                 hang ();
 744                 return rcode;
 745         }
 746         if (pattern > 0x100) {
 747                 status_led_blink ();
 748                 return rcode;
 749         }
 750         pattern &= 0x0f;
 751         for (i = 0; i < 4; i++) {
 752                 if (pattern & 0x01) status_led_set (i, STATUS_LED_ON);
 753                 else status_led_set (i, STATUS_LED_OFF);
 754                 pattern = pattern >> 1;
 755         }
 756         return rcode;
 757 }
 758
 759 U_BOOT_CMD(
 760         led,    2,      1,      do_led,
 761         "set the DIAG-LED",
 762         "[bitmask] 0x01 = DIAG 1 on\n"
 763         "              0x02 = DIAG 2 on\n"
 764         "              0x04 = DIAG 3 on\n"
 765         "              0x08 = DIAG 4 on\n"
 766         "              > 0x100 set the LED, who are on, to state blinking"
 767 );
 768
 769 #if defined(CONFIG_SHA1_CHECK_UB_IMG)
 770 /*************************************************************************
 771  * "sha1" Commando for the U-Boot shell
 772  *
 773  ************************************************************************/
 774 int do_sha1 (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 775 {
 776         int     rcode = -1;
 777
 778         if (argc < 2) {
 779   usage:
 780                 cmd_usage(cmdtp);
 781                 return 1;
 782         }
 783
 784         if (argc >= 3) {
 785                 unsigned char *data;
 786                 unsigned char output[20];
 787                 int     len;
 788                 int     i;
 789
 790                 data = (unsigned char *)simple_strtoul (argv[1], NULL, 16);
 791                 len = simple_strtoul (argv[2], NULL, 16);
 792                 sha1_csum (data, len, (unsigned char *)output);
 793                 printf ("U-Boot sum:\n");
 794                 for (i = 0; i < 20 ; i++) {
 795                         printf ("%02X ", output[i]);
 796                 }
 797                 printf ("\n");
 798                 if (argc == 4) {
 799                         data = (unsigned char *)simple_strtoul (argv[3], NULL, 16);
 800                         memcpy (data, output, 20);
 801                 }
 802                 return 0;
 803         }
 804         if (argc == 2) {
 805                 char *ptr = argv[1];
 806                 if (*ptr != '-') goto usage;
 807                 ptr++;
 808                 if ((*ptr == 'c') || (*ptr == 'C')) {
 809                         rcode = pcs440ep_sha1 (1);
 810                         printf ("SHA1 U-Boot sum %sok!\n", (rcode != 0) ? "not " : "");
 811                 } else if ((*ptr == 'p') || (*ptr == 'P')) {
 812                         rcode = pcs440ep_sha1 (2);
 813                 } else {
 814                         rcode = pcs440ep_sha1 (0);
 815                 }
 816                 return rcode;
 817         }
 818         return rcode;
 819 }
 820
 821 U_BOOT_CMD(
 822         sha1,   4,      1,      do_sha1,
 823         "calculate the SHA1 Sum",
 824         "address len [addr]  calculate the SHA1 sum [save at addr]\n"
 825         "     -p calculate the SHA1 sum from the U-Boot image in flash and print\n"
 826         "     -c check the U-Boot image in flash"
 827 );
 828 #endif
 829
 830 #if defined (CONFIG_CMD_IDE)
 831 /* These addresses need to be shifted one place to the left
 832  * ( bus per_addr 20 -30 is connectsd on CF bus A10-A0)
 833  * These values are shifted
 834  */
 835 extern ulong *ide_bus_offset;
 836 void inline ide_outb(int dev, int port, unsigned char val)
 837 {
 838         debug ("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n",
 839                 dev, port, val, (ATA_CURR_BASE(dev)+port));
 840
 841         out_be16((u16 *)(ATA_CURR_BASE(dev)+(port << 1)), val);
 842 }
 843 unsigned char inline ide_inb(int dev, int port)
 844 {
 845         uchar val;
 846         val = in_be16((u16 *)(ATA_CURR_BASE(dev)+(port << 1)));
 847         debug ("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n",
 848                 dev, port, (ATA_CURR_BASE(dev)+port), val);
 849         return (val);
 850 }
 851 #endif
 852
 853 #ifdef CONFIG_IDE_PREINIT
 854 int ide_preinit (void)
 855 {
 856         /* Set True IDE Mode */
 857         out32 (GPIO0_OR, (in32 (GPIO0_OR) | 0x00100000));
 858         out32 (GPIO0_OR, (in32 (GPIO0_OR) | 0x00200000));
 859         out32 (GPIO1_OR, (in32 (GPIO1_OR) & ~0x00008040));
 860         udelay (100000);
 861         return 0;
 862 }
 863 #endif
 864
 865 #if defined (CONFIG_CMD_IDE) && defined (CONFIG_IDE_RESET)
 866 void ide_set_reset (int idereset)
 867 {
 868         debug ("ide_reset(%d)\n", idereset);
 869         if (idereset == 0) {
 870                 out32 (GPIO0_OR, (in32 (GPIO0_OR) | 0x00200000));
 871         } else {
 872                 out32 (GPIO0_OR, (in32 (GPIO0_OR) & ~0x00200000));
 873         }
 874         udelay (10000);
 875 }
 876 #endif /* defined (CONFIG_CMD_IDE) && defined (CONFIG_IDE_RESET) */