board/pcippc2/pcippc2_fpga.c

   1 /*
   2  * (C) Copyright 2002
   3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 #include <config.h>
  25 #include <common.h>
  26 #include <asm/io.h>
  27
  28 #include "pci.h"
  29
  30 #include "hardware.h"
  31 #include "pcippc2.h"
  32
  33 u32             pcippc2_fpga0_phys;
  34 u32             pcippc2_fpga1_phys;
  35
  36 void pcippc2_fpga_init (void)
  37 {
  38   pci_dev_t             bdf = pci_find_device(FPGA_VENDOR_ID, FPGA_DEVICE_ID, 0);
  39   unsigned int          addr;
  40   u16                   cmd;
  41
  42   if (bdf == -1)
  43   {
  44     puts("Unable to find FPGA !\n");
  45     hang();
  46   }
  47
  48   pci_read_config_word(bdf, PCI_COMMAND, &cmd);
  49   if ((cmd & (PCI_COMMAND_MEMORY | PCI_COMMAND_IO)) != (PCI_COMMAND_MEMORY | PCI_COMMAND_IO))
  50   {
  51     puts("FPGA is not configured !\n");
  52     hang();
  53   }
  54
  55   pci_read_config_dword(bdf, PCI_BASE_ADDRESS_0, &addr);
  56   if (addr & 0x1)
  57   {
  58       /* IO space
  59        */
  60     pcippc2_fpga0_phys = pci_io_to_phys(bdf, addr & 0xfffffffc);
  61   }
  62   else
  63   {
  64       /* Memory space
  65        */
  66     pcippc2_fpga0_phys = pci_mem_to_phys(bdf, addr & 0xfffffff0);
  67   }
  68
  69   pci_read_config_dword(bdf, PCI_BASE_ADDRESS_1, &addr);
  70   if (addr & 0x1)
  71   {
  72       /* IO space
  73        */
  74     pcippc2_fpga1_phys = pci_io_to_phys(bdf, addr & 0xfffffffc);
  75   }
  76   else
  77   {
  78       /* Memory space
  79        */
  80     pcippc2_fpga1_phys = pci_mem_to_phys(bdf, addr & 0xfffffff0);
  81   }
  82
  83     /* Interrupts are not used
  84      */
  85   out32(FPGA(INT, INTR_MASK), 0xffffffff);
  86   iobarrier_rw();
  87 }