include/at91rm9200_aic.h

   1 /* ---------------------------------------------------------------------------- */
   2 /*          ATMEL Microcontroller Software Support  -  ROUSSET  -               */
   3 /* ---------------------------------------------------------------------------- */
   4 /*  The software is delivered "AS IS" without warranty or condition of any      */
   5 /*  kind, either express, implied or statutory. This includes without           */
   6 /*  limitation any warranty or condition with respect to merchantability or     */
   7 /*  fitness for any particular purpose, or against the infringements of         */
   8 /*  intellectual property rights of others.                                     */
   9 /* ---------------------------------------------------------------------------- */
  10 /* File Name           : at91rm9200_i2c.h                                       */
  11 /* Object              : AT91RM9200 / TWI definitions                           */
  12 /* Generated           : AT91 SW Application Group  12/03/2002 (10:48:02)       */
  13 /*                                                                              */
  14 /* ---------------------------------------------------------------------------- */
  15
  16 #ifndef AT91RM9200_AIC_H
  17 #define AT91RM9200_AIC_H
  18
  19 #ifndef __ASSEMBLY__
  20
  21 // *****************************************************************************
  22 //              SOFTWARE API DEFINITION  FOR Advanced Interrupt Controller
  23 // *****************************************************************************
  24 typedef struct _AT91S_AIC {
  25         AT91_REG         AIC_SMR[32];   // Source Mode Register
  26         AT91_REG         AIC_SVR[32];   // Source Vector Register
  27         AT91_REG         AIC_IVR;       // IRQ Vector Register
  28         AT91_REG         AIC_FVR;       // FIQ Vector Register
  29         AT91_REG         AIC_ISR;       // Interrupt Status Register
  30         AT91_REG         AIC_IPR;       // Interrupt Pending Register
  31         AT91_REG         AIC_IMR;       // Interrupt Mask Register
  32         AT91_REG         AIC_CISR;      // Core Interrupt Status Register
  33         AT91_REG         Reserved0[2];  //
  34         AT91_REG         AIC_IECR;      // Interrupt Enable Command Register
  35         AT91_REG         AIC_IDCR;      // Interrupt Disable Command Register
  36         AT91_REG         AIC_ICCR;      // Interrupt Clear Command Register
  37         AT91_REG         AIC_ISCR;      // Interrupt Set Command Register
  38         AT91_REG         AIC_EOICR;     // End of Interrupt Command Register
  39         AT91_REG         AIC_SPU;       // Spurious Vector Register
  40         AT91_REG         AIC_DCR;       // Debug Control Register (Protect)
  41         AT91_REG         Reserved1[1];  //
  42         AT91_REG         AIC_FFER;      // Fast Forcing Enable Register
  43         AT91_REG         AIC_FFDR;      // Fast Forcing Disable Register
  44         AT91_REG         AIC_FFSR;      // Fast Forcing Status Register
  45 } AT91S_AIC, *AT91PS_AIC;
  46
  47 // -------- AIC_SMR : (AIC Offset: 0x0) Control Register --------
  48 #define AT91C_AIC_PRIOR       ((unsigned int) 0x7 <<  0) // (AIC) Priority Level
  49 #define         AT91C_AIC_PRIOR_LOWEST               ((unsigned int) 0x0) // (AIC) Lowest priority level
  50 #define         AT91C_AIC_PRIOR_HIGHEST              ((unsigned int) 0x7) // (AIC) Highest priority level
  51 #define AT91C_AIC_SRCTYPE     ((unsigned int) 0x3 <<  5) // (AIC) Interrupt Source Type
  52 #define         AT91C_AIC_SRCTYPE_INT_LEVEL_SENSITIVE  ((unsigned int) 0x0 <<  5) // (AIC) Internal Sources Code Label Level Sensitive
  53 #define         AT91C_AIC_SRCTYPE_INT_EDGE_TRIGGERED   ((unsigned int) 0x1 <<  5) // (AIC) Internal Sources Code Label Edge triggered
  54 #define         AT91C_AIC_SRCTYPE_EXT_HIGH_LEVEL       ((unsigned int) 0x2 <<  5) // (AIC) External Sources Code Label High-level Sensitive
  55 #define         AT91C_AIC_SRCTYPE_EXT_POSITIVE_EDGE    ((unsigned int) 0x3 <<  5) // (AIC) External Sources Code Label Positive Edge triggered
  56 // -------- AIC_CISR : (AIC Offset: 0x114) AIC Core Interrupt Status Register --------
  57 #define AT91C_AIC_NFIQ        ((unsigned int) 0x1 <<  0) // (AIC) NFIQ Status
  58 #define AT91C_AIC_NIRQ        ((unsigned int) 0x1 <<  1) // (AIC) NIRQ Status
  59 // -------- AIC_DCR : (AIC Offset: 0x138) AIC Debug Control Register (Protect) --------
  60 #define AT91C_AIC_DCR_PROT    ((unsigned int) 0x1 <<  0) // (AIC) Protection Mode
  61 #define AT91C_AIC_DCR_GMSK    ((unsigned int) 0x1 <<  1) // (AIC) General Mask
  62
  63 #endif  /* __ASSEMBLY__ */
  64 #endif  /* AT91RM9200_TWI_H */