include/mpc85xx.h

   1 /*
   2  * Copyright 2004, 2007 Freescale Semiconductor.
   3  * Copyright(c) 2003 Motorola Inc.
   4  */
   5
   6 #ifndef __MPC85xx_H__
   7 #define __MPC85xx_H__
   8
   9 #include <asm/fsl_lbc.h>
  10
  11 /* define for common ppc_asm.tmpl */
  12 #define EXC_OFF_SYS_RESET       0x100   /* System reset */
  13 #define _START_OFFSET           0
  14
  15 #if defined(CONFIG_E500)
  16 #include <e500.h>
  17 #endif
  18
  19 /*
  20  * SCCR - System Clock Control Register, 9-8
  21  */
  22 #define SCCR_CLPD       0x00000004      /* CPM Low Power Disable */
  23 #define SCCR_DFBRG_MSK  0x00000003      /* Division by BRGCLK Mask */
  24 #define SCCR_DFBRG_SHIFT 0
  25
  26 #define SCCR_DFBRG00    0x00000000      /* BRGCLK division by 4 */
  27 #define SCCR_DFBRG01    0x00000001      /* BRGCLK div by 16 (normal) */
  28 #define SCCR_DFBRG10    0x00000002      /* BRGCLK division by 64 */
  29 #define SCCR_DFBRG11    0x00000003      /* BRGCLK division by 256 */
  30
  31 #endif  /* __MPC85xx_H__ */