Merge tag 'xilinx-for-v2025.01-rc3-v2' of https://source.denx.de/u-boot/custodians...
[u-boot.git] / configs / chromebook_speedy_defconfig
blobc19b0905d5cfde728ecfb8f5c5fd2bd35ee80483
1 CONFIG_ARM=y
2 CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
3 CONFIG_SYS_ARCH_TIMER=y
4 # CONFIG_SPL_USE_ARCH_MEMCPY is not set
5 CONFIG_ARCH_ROCKCHIP=y
6 CONFIG_TEXT_BASE=0x00100000
7 CONFIG_NR_DRAM_BANKS=1
8 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
9 CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000
10 CONFIG_SF_DEFAULT_SPEED=20000000
11 CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-speedy"
12 CONFIG_DM_RESET=y
13 CONFIG_SYS_MONITOR_LEN=614400
14 CONFIG_ROCKCHIP_RK3288=y
15 # CONFIG_SPL_MMC is not set
16 CONFIG_TARGET_CHROMEBOOK_SPEEDY=y
17 CONFIG_SPL_STACK_R_ADDR=0x80000
18 CONFIG_SPL_STACK=0xff718000
19 CONFIG_SPL_TEXT_BASE=0xff704000
20 CONFIG_SPL_STACK_R=y
21 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
22 CONFIG_SYS_BOOTM_LEN=0x4000000
23 CONFIG_SYS_LOAD_ADDR=0x800800
24 CONFIG_SF_DEFAULT_BUS=2
25 CONFIG_DEBUG_UART_BASE=0xff690000
26 CONFIG_DEBUG_UART_CLOCK=24000000
27 CONFIG_SPL_SPI_FLASH_SUPPORT=y
28 CONFIG_SPL_SPI=y
29 CONFIG_SPL_PAYLOAD="u-boot.img"
30 CONFIG_DEBUG_UART=y
31 CONFIG_USE_PREBOOT=y
32 CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-speedy.dtb"
33 CONFIG_SILENT_CONSOLE=y
34 CONFIG_LOG=y
35 # CONFIG_DISPLAY_CPUINFO is not set
36 CONFIG_DISPLAY_BOARDINFO_LATE=y
37 CONFIG_BOARD_EARLY_INIT_R=y
38 CONFIG_SPL_PAD_TO=0x7f8000
39 CONFIG_SPL_NO_BSS_LIMIT=y
40 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
41 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
42 CONFIG_SPL_SPI_LOAD=y
43 CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
44 CONFIG_CMD_GPIO=y
45 CONFIG_CMD_GPT=y
46 CONFIG_CMD_I2C=y
47 CONFIG_CMD_MMC=y
48 CONFIG_CMD_SF_TEST=y
49 CONFIG_CMD_SPI=y
50 CONFIG_CMD_USB=y
51 # CONFIG_CMD_SETEXPR is not set
52 CONFIG_CMD_CACHE=y
53 CONFIG_CMD_TIME=y
54 CONFIG_CMD_SOUND=y
55 CONFIG_CMD_PMIC=y
56 CONFIG_CMD_REGULATOR=y
57 # CONFIG_SPL_DOS_PARTITION is not set
58 # CONFIG_SPL_EFI_PARTITION is not set
59 CONFIG_SPL_OF_CONTROL=y
60 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
61 CONFIG_SPL_OF_PLATDATA=y
62 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
63 CONFIG_REGMAP=y
64 CONFIG_SPL_REGMAP=y
65 CONFIG_SYSCON=y
66 CONFIG_SPL_SYSCON=y
67 # CONFIG_SPL_SIMPLE_BUS is not set
68 # CONFIG_SPL_BLK is not set
69 CONFIG_CLK=y
70 CONFIG_SPL_CLK=y
71 CONFIG_ROCKCHIP_GPIO=y
72 CONFIG_I2C_CROS_EC_TUNNEL=y
73 CONFIG_SYS_I2C_ROCKCHIP=y
74 CONFIG_I2C_MUX=y
75 CONFIG_DM_KEYBOARD=y
76 CONFIG_CROS_EC_KEYB=y
77 CONFIG_CROS_EC=y
78 CONFIG_CROS_EC_SPI=y
79 CONFIG_PWRSEQ=y
80 CONFIG_MMC_PWRSEQ=y
81 # CONFIG_SPL_DM_MMC is not set
82 CONFIG_MMC_DW=y
83 CONFIG_MMC_DW_ROCKCHIP=y
84 CONFIG_SPI_FLASH_GIGADEVICE=y
85 CONFIG_SPI_FLASH_WINBOND=y
86 CONFIG_PINCTRL=y
87 CONFIG_PINCONF=y
88 CONFIG_SPL_PINCTRL=y
89 # CONFIG_SPL_PINCTRL_FULL is not set
90 CONFIG_DM_PMIC=y
91 # CONFIG_SPL_PMIC_CHILDREN is not set
92 CONFIG_PMIC_RK8XX=y
93 CONFIG_DM_REGULATOR_FIXED=y
94 CONFIG_REGULATOR_RK8XX=y
95 CONFIG_PWM_ROCKCHIP=y
96 CONFIG_RAM=y
97 CONFIG_SPL_RAM=y
98 CONFIG_DEBUG_UART_SHIFT=2
99 CONFIG_SYS_NS16550_MEM32=y
100 CONFIG_ROCKCHIP_SERIAL=y
101 CONFIG_SOUND=y
102 CONFIG_I2S=y
103 CONFIG_I2S_ROCKCHIP=y
104 CONFIG_SOUND_MAX98090=y
105 CONFIG_ROCKCHIP_SPI=y
106 CONFIG_SYSRESET=y
107 CONFIG_USB=y
108 # CONFIG_SPL_DM_USB is not set
109 CONFIG_USB_DWC2=y
110 CONFIG_ROCKCHIP_USB2_PHY=y
111 CONFIG_VIDEO=y
112 # CONFIG_VIDEO_BPP8 is not set
113 CONFIG_CONSOLE_TRUETYPE=y
114 CONFIG_DISPLAY=y
115 CONFIG_VIDEO_ROCKCHIP=y
116 CONFIG_DISPLAY_ROCKCHIP_EDP=y
117 CONFIG_DISPLAY_ROCKCHIP_HDMI=y
118 # CONFIG_USE_PRIVATE_LIBGCC is not set
119 CONFIG_SPL_TINY_MEMSET=y
120 CONFIG_CMD_DHRYSTONE=y
121 CONFIG_ERRNO_STR=y