include/mv88e6352.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * (C) Copyright 2012
   4  * Valentin Lontgchamp, Keymile AG, valentin.longchamp@keymile.com
   5  */
   6
   7 #ifndef __MV886352_H
   8 #define __MV886352_H
   9
  10 /* PHY registers */
  11 #define PHY(itf)        (itf)
  12
  13 #define PHY_CTRL        0x00
  14 #define PHY_100_MBPS    0x2000
  15 #define PHY_1_GBPS      0x0040
  16 #define AUTONEG_EN      0x1000
  17 #define AUTONEG_RST     0x0200
  18 #define FULL_DUPLEX     0x0100
  19 #define PHY_PWR_DOWN    0x0800
  20
  21 #define PHY_STATUS      0x01
  22 #define AN1000FIX       0x0001
  23
  24 #define PHY_SPEC_CTRL   0x10
  25 #define SPEC_PWR_DOWN   0x0004
  26 #define AUTO_MDIX_EN    0x0060
  27
  28 #define PHY_1000_CTRL   0x9
  29
  30 #define NO_ADV          0x0000
  31 #define ADV_1000_FDPX   0x0200
  32 #define ADV_1000_HDPX   0x0100
  33
  34 #define PHY_PAGE        0x16
  35
  36 #define AN1000FIX_PAGE  0x00fc
  37
  38 /* PORT or MAC registers */
  39 #define PORT(itf)       (itf+0x10)
  40
  41 #define PORT_STATUS     0x00
  42 #define NO_PHY_DETECT   0x0000
  43
  44 #define PORT_PHY        0x01
  45 #define RX_RGMII_TIM    0x8000
  46 #define TX_RGMII_TIM    0x4000
  47 #define FLOW_CTRL_EN    0x0080
  48 #define FLOW_CTRL_FOR   0x0040
  49 #define LINK_VAL        0x0020
  50 #define LINK_FOR        0x0010
  51 #define FULL_DPX        0x0008
  52 #define FULL_DPX_FOR    0x0004
  53 #define NO_SPEED_FOR    0x0003
  54 #define SPEED_1000_FOR  0x0002
  55 #define SPEED_100_FOR   0x0001
  56 #define SPEED_10_FOR    0x0000
  57
  58 #define PORT_CTRL       0x04
  59 #define FORWARDING      0x0003
  60 #define EGRS_FLD_ALL    0x000c
  61 #define PORT_DIS        0x0000
  62
  63 struct mv88e_sw_reg {
  64         u8 port;
  65         u8 reg;
  66         u16 value;
  67 };
  68
  69 int mv88e_sw_reset(const char *devname, u8 phy_addr);
  70 int mv88e_sw_program(const char *devname, u8 phy_addr,
  71         struct mv88e_sw_reg *regs, int regs_nb);
  72
  73 #endif