2 * TI DaVinci (TMS320DM644x) I2C driver.
4 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
6 * --------------------------------------------------------
8 * SPDX-License-Identifier: GPL-2.0+
13 #include <asm/arch/hardware.h>
14 #include <asm/arch/i2c_defs.h>
16 #define CHECK_NACK() \
18 if (tmp & (I2C_TIMEOUT | I2C_STAT_NACK)) {\
25 static int wait_for_bus(void)
29 REG(I2C_STAT
) = 0xffff;
31 for (timeout
= 0; timeout
< 10; timeout
++) {
32 if (!((stat
= REG(I2C_STAT
)) & I2C_STAT_BB
)) {
33 REG(I2C_STAT
) = 0xffff;
41 REG(I2C_STAT
) = 0xffff;
46 static int poll_i2c_irq(int mask
)
50 for (timeout
= 0; timeout
< 10; timeout
++) {
58 REG(I2C_STAT
) = 0xffff;
59 return(stat
| I2C_TIMEOUT
);
66 if (!(REG(I2C_STAT
) & I2C_STAT_RRDY
))
70 REG(I2C_STAT
) = I2C_STAT_RRDY
;
76 void i2c_init(int speed
, int slaveadd
)
80 if (REG(I2C_CON
) & I2C_CON_EN
) {
86 div
= (CONFIG_SYS_HZ_CLOCK
/ ((psc
+ 1) * speed
)) - 10; /* SCLL + SCLH */
87 REG(I2C_PSC
) = psc
; /* 27MHz / (2 + 1) = 9MHz */
88 REG(I2C_SCLL
) = (div
* 50) / 100; /* 50% Duty */
89 REG(I2C_SCLH
) = div
- REG(I2C_SCLL
);
91 REG(I2C_OA
) = slaveadd
;
94 /* Interrupts must be enabled or I2C module won't work */
95 REG(I2C_IE
) = I2C_IE_SCD_IE
| I2C_IE_XRDY_IE
|
96 I2C_IE_RRDY_IE
| I2C_IE_ARDY_IE
| I2C_IE_NACK_IE
;
98 /* Now enable I2C controller (get it out of reset) */
99 REG(I2C_CON
) = I2C_CON_EN
;
104 int i2c_set_bus_speed(unsigned int speed
)
106 i2c_init(speed
, CONFIG_SYS_I2C_SLAVE
);
110 int i2c_probe(u_int8_t chip
)
114 if (chip
== REG(I2C_OA
)) {
119 if (wait_for_bus()) {return(1);}
121 /* try to read one byte from current (or only) address */
124 REG(I2C_CON
) = (I2C_CON_EN
| I2C_CON_MST
| I2C_CON_STT
| I2C_CON_STP
);
127 if (!(REG(I2C_STAT
) & I2C_STAT_NACK
)) {
130 REG(I2C_STAT
) = 0xffff;
132 REG(I2C_STAT
) = 0xffff;
133 REG(I2C_CON
) |= I2C_CON_STP
;
135 if (wait_for_bus()) {return(1);}
139 REG(I2C_STAT
) = 0xffff;
145 int i2c_read(u_int8_t chip
, u_int32_t addr
, int alen
, u_int8_t
*buf
, int len
)
150 if ((alen
< 0) || (alen
> 2)) {
151 printf("%s(): bogus address length %x\n", __FUNCTION__
, alen
);
155 if (wait_for_bus()) {return(1);}
158 /* Start address phase */
159 tmp
= I2C_CON_EN
| I2C_CON_MST
| I2C_CON_STT
| I2C_CON_TRX
;
164 tmp
= poll_i2c_irq(I2C_STAT_XRDY
| I2C_STAT_NACK
);
170 /* Send address MSByte */
171 if (tmp
& I2C_STAT_XRDY
) {
172 REG(I2C_DXR
) = (addr
>> 8) & 0xff;
178 tmp
= poll_i2c_irq(I2C_STAT_XRDY
| I2C_STAT_NACK
);
181 /* No break, fall through */
183 /* Send address LSByte */
184 if (tmp
& I2C_STAT_XRDY
) {
185 REG(I2C_DXR
) = addr
& 0xff;
191 tmp
= poll_i2c_irq(I2C_STAT_XRDY
| I2C_STAT_NACK
| I2C_STAT_ARDY
);
195 if (!(tmp
& I2C_STAT_ARDY
)) {
202 /* Address phase is over, now read 'len' bytes and stop */
203 tmp
= I2C_CON_EN
| I2C_CON_MST
| I2C_CON_STT
| I2C_CON_STP
;
204 REG(I2C_CNT
) = len
& 0xffff;
208 for (i
= 0; i
< len
; i
++) {
209 tmp
= poll_i2c_irq(I2C_STAT_RRDY
| I2C_STAT_NACK
| I2C_STAT_ROVR
);
213 if (tmp
& I2C_STAT_RRDY
) {
214 buf
[i
] = REG(I2C_DRR
);
221 tmp
= poll_i2c_irq(I2C_STAT_SCD
| I2C_STAT_NACK
);
225 if (!(tmp
& I2C_STAT_SCD
)) {
231 REG(I2C_STAT
) = 0xffff;
239 int i2c_write(u_int8_t chip
, u_int32_t addr
, int alen
, u_int8_t
*buf
, int len
)
244 if ((alen
< 0) || (alen
> 2)) {
245 printf("%s(): bogus address length %x\n", __FUNCTION__
, alen
);
249 printf("%s(): bogus length %x\n", __FUNCTION__
, len
);
253 if (wait_for_bus()) {return(1);}
255 /* Start address phase */
256 tmp
= I2C_CON_EN
| I2C_CON_MST
| I2C_CON_STT
| I2C_CON_TRX
| I2C_CON_STP
;
257 REG(I2C_CNT
) = (alen
== 0) ? len
& 0xffff : (len
& 0xffff) + alen
;
263 /* Send address MSByte */
264 tmp
= poll_i2c_irq(I2C_STAT_XRDY
| I2C_STAT_NACK
);
268 if (tmp
& I2C_STAT_XRDY
) {
269 REG(I2C_DXR
) = (addr
>> 8) & 0xff;
274 /* No break, fall through */
276 /* Send address LSByte */
277 tmp
= poll_i2c_irq(I2C_STAT_XRDY
| I2C_STAT_NACK
);
281 if (tmp
& I2C_STAT_XRDY
) {
282 REG(I2C_DXR
) = addr
& 0xff;
289 for (i
= 0; i
< len
; i
++) {
290 tmp
= poll_i2c_irq(I2C_STAT_XRDY
| I2C_STAT_NACK
);
294 if (tmp
& I2C_STAT_XRDY
) {
295 REG(I2C_DXR
) = buf
[i
];
301 tmp
= poll_i2c_irq(I2C_STAT_SCD
| I2C_STAT_NACK
);
305 if (!(tmp
& I2C_STAT_SCD
)) {
311 REG(I2C_STAT
) = 0xffff;