arm: vf610: fix double iomux configuration for vf610twr board
[u-boot/qq2440-u-boot.git] / drivers / usb / host / sl811.h
blobc1f9f013bd1c6c1c4386434b8287299171cb8e65
1 #ifndef __UBOOT_SL811_H
2 #define __UBOOT_SL811_H
4 #undef SL811_DEBUG
6 #ifdef SL811_DEBUG
7 #define PDEBUG(level, fmt, args...) \
8 if (debug >= (level)) printf("[%s:%d] " fmt, \
9 __PRETTY_FUNCTION__, __LINE__ , ## args)
10 #else
11 #define PDEBUG(level, fmt, args...) do {} while(0)
12 #endif
14 /* Sl811 host control register */
15 #define SL811_CTRL_A 0x00
16 #define SL811_ADDR_A 0x01
17 #define SL811_LEN_A 0x02
18 #define SL811_STS_A 0x03 /* read */
19 #define SL811_PIDEP_A 0x03 /* write */
20 #define SL811_CNT_A 0x04 /* read */
21 #define SL811_DEV_A 0x04 /* write */
22 #define SL811_CTRL1 0x05
23 #define SL811_INTR 0x06
24 #define SL811_CTRL_B 0x08
25 #define SL811_ADDR_B 0x09
26 #define SL811_LEN_B 0x0A
27 #define SL811_STS_B 0x0B /* read */
28 #define SL811_PIDEP_B 0x0B /* write */
29 #define SL811_CNT_B 0x0C /* read */
30 #define SL811_DEV_B 0x0C /* write */
31 #define SL811_INTRSTS 0x0D /* write clears bitwise */
32 #define SL811_HWREV 0x0E /* read */
33 #define SL811_SOFLOW 0x0E /* write */
34 #define SL811_SOFCNTDIV 0x0F /* read */
35 #define SL811_CTRL2 0x0F /* write */
37 /* USB control register bits (addr 0x00 and addr 0x08) */
38 #define SL811_USB_CTRL_ARM 0x01
39 #define SL811_USB_CTRL_ENABLE 0x02
40 #define SL811_USB_CTRL_DIR_OUT 0x04
41 #define SL811_USB_CTRL_ISO 0x10
42 #define SL811_USB_CTRL_SOF 0x20
43 #define SL811_USB_CTRL_TOGGLE_1 0x40
44 #define SL811_USB_CTRL_PREAMBLE 0x80
46 /* USB status register bits (addr 0x03 and addr 0x0B) */
47 #define SL811_USB_STS_ACK 0x01
48 #define SL811_USB_STS_ERROR 0x02
49 #define SL811_USB_STS_TIMEOUT 0x04
50 #define SL811_USB_STS_TOGGLE_1 0x08
51 #define SL811_USB_STS_SETUP 0x10
52 #define SL811_USB_STS_OVERFLOW 0x20
53 #define SL811_USB_STS_NAK 0x40
54 #define SL811_USB_STS_STALL 0x80
56 /* Control register 1 bits (addr 0x05) */
57 #define SL811_CTRL1_SOF 0x01
58 #define SL811_CTRL1_RESET 0x08
59 #define SL811_CTRL1_JKSTATE 0x10
60 #define SL811_CTRL1_SPEED_LOW 0x20
61 #define SL811_CTRL1_SUSPEND 0x40
63 /* Interrut enable (addr 0x06) and interrupt status register bits (addr 0x0D) */
64 #define SL811_INTR_DONE_A 0x01
65 #define SL811_INTR_DONE_B 0x02
66 #define SL811_INTR_SOF 0x10
67 #define SL811_INTR_INSRMV 0x20
68 #define SL811_INTR_DETECT 0x40
69 #define SL811_INTR_NOTPRESENT 0x40
70 #define SL811_INTR_SPEED_FULL 0x80 /* only in status reg */
72 /* HW rev and SOF lo register bits (addr 0x0E) */
73 #define SL811_HWR_HWREV 0xF0
75 /* SOF counter and control reg 2 (addr 0x0F) */
76 #define SL811_CTL2_SOFHI 0x3F
77 #define SL811_CTL2_DSWAP 0x40
78 #define SL811_CTL2_HOST 0x80
80 /* Set up for 1-ms SOF time. */
81 #define SL811_12M_LOW 0xE0
82 #define SL811_12M_HI 0x2E
84 #define SL811_DATA_START 0x10
85 #define SL811_DATA_LIMIT 240
87 /* Requests: bRequest << 8 | bmRequestType */
88 #define RH_GET_STATUS 0x0080
89 #define RH_CLEAR_FEATURE 0x0100
90 #define RH_SET_FEATURE 0x0300
91 #define RH_SET_ADDRESS 0x0500
92 #define RH_GET_DESCRIPTOR 0x0680
93 #define RH_SET_DESCRIPTOR 0x0700
94 #define RH_GET_CONFIGURATION 0x0880
95 #define RH_SET_CONFIGURATION 0x0900
96 #define RH_GET_STATE 0x0280
97 #define RH_GET_INTERFACE 0x0A80
98 #define RH_SET_INTERFACE 0x0B00
99 #define RH_SYNC_FRAME 0x0C80
102 #define PIDEP(pid, ep) (((pid) & 0x0f) << 4 | (ep))
104 #endif /* __UBOOT_SL811_H */