board/incaip/incaip.c

   1 /*
   2  * (C) Copyright 2003
   3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 #include <common.h>
   9 #include <command.h>
  10 #include <netdev.h>
  11 #include <asm/addrspace.h>
  12 #include <asm/inca-ip.h>
  13 #include <asm/io.h>
  14 #include <asm/reboot.h>
  15
  16 extern uint incaip_get_cpuclk(void);
  17
  18 void _machine_restart(void)
  19 {
  20         *INCA_IP_WDT_RST_REQ = 0x3f;
  21 }
  22
  23 static ulong max_sdram_size(void)
  24 {
  25         /* The only supported SDRAM data width is 16bit.
  26          */
  27 #define CONFIG_SYS_DW   2
  28
  29         /* The only supported number of SDRAM banks is 4.
  30          */
  31 #define CONFIG_SYS_NB   4
  32
  33         ulong cfgpb0 = *INCA_IP_SDRAM_MC_CFGPB0;
  34         int   cols   = cfgpb0 & 0xF;
  35         int   rows   = (cfgpb0 & 0xF0) >> 4;
  36         ulong size   = (1 << (rows + cols)) * CONFIG_SYS_DW * CONFIG_SYS_NB;
  37
  38         return size;
  39 }
  40
  41 phys_size_t initdram(int board_type)
  42 {
  43         int   rows, cols, best_val = *INCA_IP_SDRAM_MC_CFGPB0;
  44         ulong size, max_size       = 0;
  45         ulong our_address;
  46
  47         asm volatile ("move %0, $25" : "=r" (our_address) :);
  48
  49                 /* Can't probe for RAM size unless we are running from Flash.
  50                  */
  51         if (CPHYSADDR(our_address) < CPHYSADDR(PHYS_FLASH_1))
  52         {
  53                 return max_sdram_size();
  54         }
  55
  56         for (cols = 0x8; cols <= 0xC; cols++)
  57         {
  58                 for (rows = 0xB; rows <= 0xD; rows++)
  59                 {
  60                         *INCA_IP_SDRAM_MC_CFGPB0 = (0x14 << 8) |
  61                                                    (rows << 4) | cols;
  62                         size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
  63                                                              max_sdram_size());
  64
  65                         if (size > max_size)
  66                         {
  67                                 best_val = *INCA_IP_SDRAM_MC_CFGPB0;
  68                                 max_size = size;
  69                         }
  70                 }
  71         }
  72
  73         *INCA_IP_SDRAM_MC_CFGPB0 = best_val;
  74         return max_size;
  75 }
  76
  77 int checkboard (void)
  78 {
  79         unsigned long chipid = *INCA_IP_WDT_CHIPID;
  80         int part_num;
  81
  82         puts ("Board: INCA-IP ");
  83         part_num = (chipid >> 12) & 0xffff;
  84         switch (part_num) {
  85         case 0xc0:
  86                 printf ("Standard Version, ");
  87                 break;
  88         case 0xc1:
  89                 printf ("Basic Version, ");
  90                 break;
  91         default:
  92                 printf ("Unknown Part Number 0x%x ", part_num);
  93                 break;
  94         }
  95
  96         printf ("Chip V1.%ld, ", (chipid >> 28));
  97
  98         printf("CPU Speed %d MHz\n", incaip_get_cpuclk()/1000000);
  99
 100         set_io_port_base(0);
 101
 102         return 0;
 103 }
 104
 105 #if defined(CONFIG_INCA_IP_SWITCH)
 106 int board_eth_init(bd_t *bis)
 107 {
 108         return inca_switch_initialize(bis);
 109 }
 110 #endif