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[u-boot/qq2440-u-boot.git] / board / lwmon / flash.c
blobcb60c418a1df6114f7d39cd41a6737258d243129
1 /*
2 * (C) Copyright 2001
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8 /* #define DEBUG */
9
10 #include <common.h>
11 #include <mpc8xx.h>
12
13 #if defined(CONFIG_ENV_IS_IN_FLASH)
14 # ifndef CONFIG_ENV_ADDR
15 # define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
16 # endif
17 # ifndef CONFIG_ENV_SIZE
18 # define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
19 # endif
20 # ifndef CONFIG_ENV_SECT_SIZE
21 # define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
22 # endif
23 #endif
24
25 /*---------------------------------------------------------------------*/
26
27 flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
28
29 /*-----------------------------------------------------------------------
30 * Functions
31 */
32 static ulong flash_get_size (vu_long *addr, flash_info_t *info);
33 static int write_data (flash_info_t *info, ulong dest, ulong data);
34 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
35 static int write_data_buf (flash_info_t * info, ulong dest, uchar * cp, int len);
36 #endif
37 static void flash_get_offsets (ulong base, flash_info_t *info);
38
39 /*-----------------------------------------------------------------------
40 */
41
42 unsigned long flash_init (void)
43 {
44 volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
45 volatile memctl8xx_t *memctl = &immap->im_memctl;
46 unsigned long size_b0, size_b1;
47 int i;
48
49 /* Init: no FLASHes known */
50 for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
51 flash_info[i].flash_id = FLASH_UNKNOWN;
52 }
53
54 /* Static FLASH Bank configuration here - FIXME XXX */
55
56 debug ("\n## Get flash bank 1 size @ 0x%08x\n",FLASH_BASE0_PRELIM);
57
58 size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
59
60 if (flash_info[0].flash_id == FLASH_UNKNOWN) {
61 printf ("## Unknown FLASH on Bank 0: "
62 "ID 0x%lx, Size = 0x%08lx = %ld MB\n",
63 flash_info[0].flash_id,
64 size_b0, size_b0<<20);
65 }
66
67 debug ("## Get flash bank 2 size @ 0x%08x\n",FLASH_BASE1_PRELIM);
68
69 size_b1 = flash_get_size((vu_long *)FLASH_BASE1_PRELIM, &flash_info[1]);
70
71 debug ("## Prelim. Flash bank sizes: %08lx + 0x%08lx\n",size_b0,size_b1);
72
73 if (size_b1 > size_b0) {
74 printf ("## ERROR: "
75 "Bank 1 (0x%08lx = %ld MB) > Bank 0 (0x%08lx = %ld MB)\n",
76 size_b1, size_b1<<20,
77 size_b0, size_b0<<20
78 );
79 flash_info[0].flash_id = FLASH_UNKNOWN;
80 flash_info[1].flash_id = FLASH_UNKNOWN;
81 flash_info[0].sector_count = -1;
82 flash_info[1].sector_count = -1;
83 flash_info[0].size = 0;
84 flash_info[1].size = 0;
85 return (0);
86 }
87
88 debug ("## Before remap: "
89 "BR0: 0x%08x OR0: 0x%08x "
90 "BR1: 0x%08x OR1: 0x%08x\n",
91 memctl->memc_br0, memctl->memc_or0,
92 memctl->memc_br1, memctl->memc_or1);
93
94 /* Remap FLASH according to real size */
95 memctl->memc_or0 = (-size_b0 & 0xFFFF8000) | CONFIG_SYS_OR_TIMING_FLASH |
96 OR_CSNT_SAM | OR_ACS_DIV1;
97 memctl->memc_br0 = (CONFIG_SYS_FLASH_BASE & BR_BA_MSK) | BR_PS_32 | BR_V;
98
99 debug ("## BR0: 0x%08x OR0: 0x%08x\n",
100 memctl->memc_br0, memctl->memc_or0);
101
102 /* Re-do sizing to get full correct info */
103 size_b0 = flash_get_size((vu_long *)CONFIG_SYS_FLASH_BASE, &flash_info[0]);
104
105 flash_get_offsets (CONFIG_SYS_FLASH_BASE, &flash_info[0]);
106
107 flash_info[0].size = size_b0;
108
109 #if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
110 /* monitor protection ON by default */
111 flash_protect(FLAG_PROTECT_SET,
112 CONFIG_SYS_MONITOR_BASE,
113 CONFIG_SYS_MONITOR_BASE+monitor_flash_len-1,
114 &flash_info[0]);
115 #endif
116
117 #ifdef CONFIG_ENV_IS_IN_FLASH
118 /* ENV protection ON by default */
119 flash_protect(FLAG_PROTECT_SET,
120 CONFIG_ENV_ADDR,
121 CONFIG_ENV_ADDR+CONFIG_ENV_SECT_SIZE-1,
122 &flash_info[0]);
123 #endif
124
125 if (size_b1) {
126 memctl->memc_or1 = (-size_b1 & 0xFFFF8000) | CONFIG_SYS_OR_TIMING_FLASH |
127 OR_CSNT_SAM | OR_ACS_DIV1;
128 memctl->memc_br1 = ((CONFIG_SYS_FLASH_BASE + size_b0) & BR_BA_MSK) |
129 BR_PS_32 | BR_V;
130
131 debug ("## BR1: 0x%08x OR1: 0x%08x\n",
132 memctl->memc_br1, memctl->memc_or1);
133
134 /* Re-do sizing to get full correct info */
135 size_b1 = flash_get_size((vu_long *)(CONFIG_SYS_FLASH_BASE + size_b0),
136 &flash_info[1]);
137
138 flash_info[1].size = size_b1;
139
140 flash_get_offsets (CONFIG_SYS_FLASH_BASE + size_b0, &flash_info[1]);
141
142 #if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
143 /* monitor protection ON by default */
144 flash_protect(FLAG_PROTECT_SET,
145 CONFIG_SYS_MONITOR_BASE,
146 CONFIG_SYS_MONITOR_BASE+monitor_flash_len-1,
147 &flash_info[1]);
148 #endif
149
150 #ifdef CONFIG_ENV_IS_IN_FLASH
151 /* ENV protection ON by default */
152 flash_protect(FLAG_PROTECT_SET,
153 CONFIG_ENV_ADDR,
154 CONFIG_ENV_ADDR+CONFIG_ENV_SECT_SIZE-1,
155 &flash_info[1]);
156 #endif
157 } else {
158 memctl->memc_br1 = 0; /* invalidate bank */
159 memctl->memc_or1 = 0; /* invalidate bank */
160
161 debug ("## DISABLE BR1: 0x%08x OR1: 0x%08x\n",
162 memctl->memc_br1, memctl->memc_or1);
163
164 flash_info[1].flash_id = FLASH_UNKNOWN;
165 flash_info[1].sector_count = -1;
166 flash_info[1].size = 0;
167 }
168
169 debug ("## Final Flash bank sizes: %08lx + 0x%08lx\n",size_b0,size_b1);
170
171 return (size_b0 + size_b1);
172 }
173
174 /*-----------------------------------------------------------------------
175 */
176 static void flash_get_offsets (ulong base, flash_info_t *info)
177 {
178 int i;
179
180 if (info->flash_id == FLASH_UNKNOWN) {
181 return;
182 }
183
184 switch (info->flash_id & FLASH_VENDMASK) {
185 case FLASH_MAN_INTEL:
186 for (i = 0; i < info->sector_count; i++) {
187 info->start[i] = base;
188 base += 0x00020000 * 2; /* 128k * 2 chips per bank */
189 }
190 return;
191
192 default:
193 printf ("Don't know sector ofsets for flash type 0x%lx\n",
194 info->flash_id);
195 return;
196 }
197 }
198
199 /*-----------------------------------------------------------------------
200 */
201 void flash_print_info (flash_info_t *info)
202 {
203 int i;
204
205 if (info->flash_id == FLASH_UNKNOWN) {
206 printf ("missing or unknown FLASH type\n");
207 return;
208 }
209
210 switch (info->flash_id & FLASH_VENDMASK) {
211 case FLASH_MAN_AMD: printf ("AMD "); break;
212 case FLASH_MAN_FUJ: printf ("Fujitsu "); break;
213 case FLASH_MAN_SST: printf ("SST "); break;
214 case FLASH_MAN_STM: printf ("STM "); break;
215 case FLASH_MAN_INTEL: printf ("Intel "); break;
216 case FLASH_MAN_MT: printf ("MT "); break;
217 default: printf ("Unknown Vendor "); break;
218 }
219
220 switch (info->flash_id & FLASH_TYPEMASK) {
221 case FLASH_28F320J3A: printf ("28F320J3A (32Mbit = 128K x 32)\n");
222 break;
223 case FLASH_28F640J3A: printf ("28F640J3A (64Mbit = 128K x 64)\n");
224 break;
225 case FLASH_28F128J3A: printf ("28F128J3A (128Mbit = 128K x 128)\n");
226 break;
227 default: printf ("Unknown Chip Type\n");
228 break;
229 }
230
231 if (info->size >= (1 << 20)) {
232 i = 20;
233 } else {
234 i = 10;
235 }
236 printf (" Size: %ld %cB in %d Sectors\n",
237 info->size >> i,
238 (i == 20) ? 'M' : 'k',
239 info->sector_count);
240
241 printf (" Sector Start Addresses:");
242 for (i=0; i<info->sector_count; ++i) {
243 if ((i % 5) == 0)
244 printf ("\n ");
245 printf (" %08lX%s",
246 info->start[i],
247 info->protect[i] ? " (RO)" : " "
248 );
249 }
250 printf ("\n");
251 return;
252 }
253
254 /*-----------------------------------------------------------------------
255 */
256
257
258 /*-----------------------------------------------------------------------
259 */
260
261 /*
262 * The following code cannot be run from FLASH!
263 */
264
265 static ulong flash_get_size (vu_long *addr, flash_info_t *info)
266 {
267 ulong value;
268
269 /* Read Manufacturer ID */
270 addr[0] = 0x00900090;
271 value = addr[0];
272
273 debug ("Manuf. ID @ 0x%08lx: 0x%08lx\n", (ulong)addr, value);
274
275 switch (value) {
276 case AMD_MANUFACT:
277 info->flash_id = FLASH_MAN_AMD;
278 break;
279 case FUJ_MANUFACT:
280 info->flash_id = FLASH_MAN_FUJ;
281 break;
282 case SST_MANUFACT:
283 info->flash_id = FLASH_MAN_SST;
284 break;
285 case STM_MANUFACT:
286 info->flash_id = FLASH_MAN_STM;
287 break;
288 case INTEL_MANUFACT:
289 info->flash_id = FLASH_MAN_INTEL;
290 break;
291 default:
292 info->flash_id = FLASH_UNKNOWN;
293 info->sector_count = 0;
294 info->size = 0;
295 addr[0] = 0x00FF00FF; /* restore read mode */
296 return (0); /* no or unknown flash */
297 }
298
299 value = addr[1]; /* device ID */
300
301 debug ("Device ID @ 0x%08lx: 0x%08lx\n", (ulong)(&addr[1]), value);
302
303 switch (value) {
304 case INTEL_ID_28F320J3A:
305 info->flash_id += FLASH_28F320J3A;
306 info->sector_count = 32;
307 info->size = 0x00400000 * 2;
308 break; /* => 8 MB */
309
310 case INTEL_ID_28F640J3A:
311 info->flash_id += FLASH_28F640J3A;
312 info->sector_count = 64;
313 info->size = 0x00800000 * 2;
314 break; /* => 16 MB */
315
316 case INTEL_ID_28F128J3A:
317 info->flash_id += FLASH_28F128J3A;
318 info->sector_count = 128;
319 info->size = 0x01000000 * 2;
320 break; /* => 32 MB */
321
322 default:
323 info->flash_id = FLASH_UNKNOWN;
324 addr[0] = 0x00FF00FF; /* restore read mode */
325 return (0); /* => no or unknown flash */
326
327 }
328
329 if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) {
330 printf ("** ERROR: sector count %d > max (%d) **\n",
331 info->sector_count, CONFIG_SYS_MAX_FLASH_SECT);
332 info->sector_count = CONFIG_SYS_MAX_FLASH_SECT;
333 }
334
335 addr[0] = 0x00FF00FF; /* restore read mode */
336
337 return (info->size);
338 }
339
340
341 /*-----------------------------------------------------------------------
342 */
343
344 int flash_erase (flash_info_t *info, int s_first, int s_last)
345 {
346 int flag, prot, sect;
347 ulong start, now, last;
348
349 debug ("flash_erase: first: %d last: %d\n", s_first, s_last);
350
351 if ((s_first < 0) || (s_first > s_last)) {
352 if (info->flash_id == FLASH_UNKNOWN) {
353 printf ("- missing\n");
354 } else {
355 printf ("- no sectors to erase\n");
356 }
357 return 1;
358 }
359
360 if ((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_INTEL) {
361 printf ("Can erase only Intel flash types - aborted\n");
362 return 1;
363 }
364
365 prot = 0;
366 for (sect=s_first; sect<=s_last; ++sect) {
367 if (info->protect[sect]) {
368 prot++;
369 }
370 }
371
372 if (prot) {
373 printf ("- Warning: %d protected sectors will not be erased!\n",
374 prot);
375 } else {
376 printf ("\n");
377 }
378
379 start = get_timer (0);
380 last = start;
381 /* Start erase on unprotected sectors */
382 for (sect = s_first; sect<=s_last; sect++) {
383 if (info->protect[sect] == 0) { /* not protected */
384 vu_long *addr = (vu_long *)(info->start[sect]);
385 unsigned long status;
386
387 /* Disable interrupts which might cause a timeout here */
388 flag = disable_interrupts();
389
390 *addr = 0x00600060; /* clear lock bit setup */
391 *addr = 0x00D000D0; /* clear lock bit confirm */
392
393 udelay (1000);
394 /* This takes awfully long - up to 50 ms and more */
395 while (((status = *addr) & 0x00800080) != 0x00800080) {
396 if ((now=get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
397 printf ("Timeout\n");
398 *addr = 0x00FF00FF; /* reset to read mode */
399 return 1;
400 }
401
402 /* show that we're waiting */
403 if ((now - last) > 1000) { /* every second */
404 putc ('.');
405 last = now;
406 }
407 udelay (1000); /* to trigger the watchdog */
408 }
409
410 *addr = 0x00500050; /* clear status register */
411 *addr = 0x00200020; /* erase setup */
412 *addr = 0x00D000D0; /* erase confirm */
413
414 /* re-enable interrupts if necessary */
415 if (flag)
416 enable_interrupts();
417
418 /* wait at least 80us - let's wait 1 ms */
419 udelay (1000);
420
421 while (((status = *addr) & 0x00800080) != 0x00800080) {
422 if ((now=get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
423 printf ("Timeout\n");
424 *addr = 0x00B000B0; /* suspend erase */
425 *addr = 0x00FF00FF; /* reset to read mode */
426 return 1;
427 }
428
429 /* show that we're waiting */
430 if ((now - last) > 1000) { /* every second */
431 putc ('.');
432 last = now;
433 }
434 udelay (1000); /* to trigger the watchdog */
435 }
436
437 *addr = 0x00FF00FF; /* reset to read mode */
438 }
439 }
440 printf (" done\n");
441 return 0;
442 }
443
444 /*-----------------------------------------------------------------------
445 * Copy memory to flash, returns:
446 * 0 - OK
447 * 1 - write timeout
448 * 2 - Flash not erased
449 * 4 - Flash not identified
450 */
451
452 #define FLASH_WIDTH 4 /* flash bus width in bytes */
453
454 int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
455 {
456 ulong cp, wp, data;
457 int i, l, rc;
458
459 if (info->flash_id == FLASH_UNKNOWN) {
460 return 4;
461 }
462
463 wp = (addr & ~(FLASH_WIDTH-1)); /* get lower FLASH_WIDTH aligned address */
464
465 /*
466 * handle unaligned start bytes
467 */
468 if ((l = addr - wp) != 0) {
469 data = 0;
470 for (i=0, cp=wp; i<l; ++i, ++cp) {
471 data = (data << 8) | (*(uchar *)cp);
472 }
473 for (; i<FLASH_WIDTH && cnt>0; ++i) {
474 data = (data << 8) | *src++;
475 --cnt;
476 ++cp;
477 }
478 for (; cnt==0 && i<FLASH_WIDTH; ++i, ++cp) {
479 data = (data << 8) | (*(uchar *)cp);
480 }
481
482 if ((rc = write_data(info, wp, data)) != 0) {
483 return (rc);
484 }
485 wp += FLASH_WIDTH;
486 }
487
488 /*
489 * handle FLASH_WIDTH aligned part
490 */
491 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
492 while(cnt >= FLASH_WIDTH) {
493 i = CONFIG_SYS_FLASH_BUFFER_SIZE > cnt ?
494 (cnt & ~(FLASH_WIDTH - 1)) : CONFIG_SYS_FLASH_BUFFER_SIZE;
495 if((rc = write_data_buf(info, wp, src,i)) != 0)
496 return rc;
497 wp += i;
498 src += i;
499 cnt -=i;
500 }
501 #else
502 while (cnt >= FLASH_WIDTH) {
503 data = 0;
504 for (i=0; i<FLASH_WIDTH; ++i) {
505 data = (data << 8) | *src++;
506 }
507 if ((rc = write_data(info, wp, data)) != 0) {
508 return (rc);
509 }
510 wp += FLASH_WIDTH;
511 cnt -= FLASH_WIDTH;
512 }
513 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
514
515 if (cnt == 0) {
516 return (0);
517 }
518
519 /*
520 * handle unaligned tail bytes
521 */
522 data = 0;
523 for (i=0, cp=wp; i<FLASH_WIDTH && cnt>0; ++i, ++cp) {
524 data = (data << 8) | *src++;
525 --cnt;
526 }
527 for (; i<FLASH_WIDTH; ++i, ++cp) {
528 data = (data << 8) | (*(uchar *)cp);
529 }
530
531 return (write_data(info, wp, data));
532 }
533
534 /*-----------------------------------------------------------------------
535 * Check flash status, returns:
536 * 0 - OK
537 * 1 - timeout
538 */
539 static int flash_status_check(vu_long *addr, ulong tout, char * prompt)
540 {
541 ulong status;
542 ulong start;
543
544 /* Wait for command completion */
545 start = get_timer (0);
546 while(((status = *addr) & 0x00800080) != 0x00800080) {
547 if (get_timer(start) > tout) {
548 printf("Flash %s timeout at address %p\n", prompt, addr);
549 *addr = 0x00FF00FF; /* restore read mode */
550 return (1);
551 }
552 }
553 return 0;
554 }
555
556 /*-----------------------------------------------------------------------
557 * Write a word to Flash, returns:
558 * 0 - OK
559 * 1 - write timeout
560 * 2 - Flash not erased
561 */
562 static int write_data (flash_info_t *info, ulong dest, ulong data)
563 {
564 vu_long *addr = (vu_long *)dest;
565 int flag;
566
567 /* Check if Flash is (sufficiently) erased */
568 if ((*addr & data) != data) {
569 return (2);
570 }
571 /* Disable interrupts which might cause a timeout here */
572 flag = disable_interrupts();
573
574 *addr = 0x00400040; /* write setup */
575 *addr = data;
576
577 /* re-enable interrupts if necessary */
578 if (flag)
579 enable_interrupts();
580
581 if (flash_status_check(addr, CONFIG_SYS_FLASH_WRITE_TOUT, "write") != 0) {
582 return (1);
583 }
584
585 *addr = 0x00FF00FF; /* restore read mode */
586
587 return (0);
588 }
589
590 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
591 /*-----------------------------------------------------------------------
592 * Write a buffer to Flash, returns:
593 * 0 - OK
594 * 1 - write timeout
595 */
596 static int write_data_buf(flash_info_t * info, ulong dest, uchar * cp, int len)
597 {
598 vu_long *addr = (vu_long *)dest;
599 int sector;
600 int cnt;
601 int retcode;
602 vu_long * src = (vu_long *)cp;
603 vu_long * dst = (vu_long *)dest;
604
605 /* find sector */
606 for(sector = info->sector_count - 1; sector >= 0; sector--) {
607 if(dest >= info->start[sector])
608 break;
609 }
610
611 *addr = 0x00500050; /* clear status */
612 *addr = 0x00e800e8; /* write buffer */
613
614 if((retcode = flash_status_check(addr, CONFIG_SYS_FLASH_BUFFER_WRITE_TOUT,
615 "write to buffer")) == 0) {
616 cnt = len / FLASH_WIDTH;
617 *addr = (cnt-1) | ((cnt-1) << 16);
618 while(cnt-- > 0) {
619 *dst++ = *src++;
620 }
621 *addr = 0x00d000d0; /* write buffer confirm */
622 retcode = flash_status_check(addr, CONFIG_SYS_FLASH_BUFFER_WRITE_TOUT,
623 "buffer write");
624 }
625 *addr = 0x00FF00FF; /* restore read mode */
626 *addr = 0x00500050; /* clear status */
627 return retcode;
628 }
629 #endif /* CONFIG_SYS_USE_FLASH_BUFFER_WRITE */
630
631 /*-----------------------------------------------------------------------
632 */
u-boot for qq2440