board/matrix_vision/mvbc_p/mvbc_p.h

   1 #ifndef __MVBC_H__
   2 #define __MVBC_H__
   3
   4 #define LED_G0          MPC5XXX_GPIO_SIMPLE_PSC2_0
   5 #define LED_G1          MPC5XXX_GPIO_SIMPLE_PSC2_1
   6 #define LED_Y           MPC5XXX_GPIO_SIMPLE_PSC2_2
   7 #define LED_R           MPC5XXX_GPIO_SIMPLE_PSC2_3
   8 #define ARB_X_EN        MPC5XXX_GPIO_WKUP_PSC2_4
   9
  10 #define FPGA_DIN        MPC5XXX_GPIO_SIMPLE_PSC3_0
  11 #define FPGA_CCLK       MPC5XXX_GPIO_SIMPLE_PSC3_1
  12 #define FPGA_CONF_DONE  MPC5XXX_GPIO_SIMPLE_PSC3_2
  13 #define FPGA_CONFIG     MPC5XXX_GPIO_SIMPLE_PSC3_3
  14 #define FPGA_STATUS     MPC5XXX_GPIO_SINT_PSC3_4
  15
  16 #define MAN_RST         MPC5XXX_GPIO_WKUP_PSC6_0
  17 #define WD_TS           MPC5XXX_GPIO_WKUP_PSC6_1
  18 #define WD_WDI          MPC5XXX_GPIO_SIMPLE_PSC6_2
  19 #define COP_PRESENT     MPC5XXX_GPIO_SIMPLE_PSC6_3
  20 #define FACT_RST        MPC5XXX_GPIO_WKUP_6
  21 #define FLASH_RBY       MPC5XXX_GPIO_WKUP_7
  22
  23 #define SIMPLE_DDR      (LED_G0 | LED_G1 | LED_Y | LED_R | \
  24                          FPGA_DIN | FPGA_CCLK | FPGA_CONFIG | WD_WDI)
  25 #define SIMPLE_DVO      (FPGA_CONFIG)
  26 #define SIMPLE_ODE      (FPGA_CONFIG | LED_G0 | LED_G1 | LED_Y | LED_R)
  27 #define SIMPLE_GPIOEN   (LED_G0 | LED_G1 | LED_Y | LED_R | \
  28                          FPGA_DIN | FPGA_CCLK | FPGA_CONF_DONE | FPGA_CONFIG |\
  29                          WD_WDI | COP_PRESENT)
  30
  31 #define SINT_ODE        0
  32 #define SINT_DDR        0
  33 #define SINT_DVO        0
  34 #define SINT_INTEN      0
  35 #define SINT_ITYPE      0
  36 #define SINT_GPIOEN     (FPGA_STATUS)
  37
  38 #define WKUP_ODE        (MAN_RST)
  39 #define WKUP_DIR        (ARB_X_EN|MAN_RST|WD_TS)
  40 #define WKUP_DO         (ARB_X_EN|MAN_RST|WD_TS)
  41 #define WKUP_EN         (ARB_X_EN|MAN_RST|WD_TS|FACT_RST|FLASH_RBY)
  42
  43 #endif