board/matrix_vision/mvsmr/mvsmr.h

   1 #include <pci.h>
   2
   3 extern void pci_mpc5xxx_init(struct pci_controller *);
   4
   5 #define FPGA_DIN        MPC5XXX_GPIO_SIMPLE_PSC3_0
   6 #define FPGA_CCLK       MPC5XXX_GPIO_SIMPLE_PSC3_1
   7 #define FPGA_DONE       MPC5XXX_GPIO_SIMPLE_PSC3_2
   8 #define FPGA_CONFIG     MPC5XXX_GPIO_SIMPLE_PSC3_3
   9 #define FPGA_STATUS     MPC5XXX_GPIO_SINT_PSC3_4
  10 #define S_FPGA_DIN      MPC5XXX_GPIO_SINT_PSC3_5
  11 #define S_FPGA_CCLK     MPC5XXX_GPIO_SIMPLE_PSC3_6
  12 #define S_FPGA_DONE     MPC5XXX_GPIO_SIMPLE_PSC3_7
  13 #define S_FPGA_CONFIG   MPC5XXX_GPIO_SINT_PSC3_8
  14 #define S_FPGA_STATUS   MPC5XXX_GPIO_WKUP_PSC3_9
  15
  16 #define MAN_RST         MPC5XXX_GPIO_WKUP_PSC6_0
  17 #define WD_TS           MPC5XXX_GPIO_WKUP_PSC6_1
  18 #define WD_WDI          MPC5XXX_GPIO_SIMPLE_PSC6_2
  19 #define COP_PRESENT     MPC5XXX_GPIO_SIMPLE_PSC6_3
  20 #define SERVICE_MODE    MPC5XXX_GPIO_WKUP_6
  21 #define FLASH_RBY       MPC5XXX_GPIO_WKUP_7
  22 #define UART_EN1        MPC5XXX_GPIO_WKUP_PSC1_4
  23 #define LAN_PRSNT       MPC5XXX_GPIO_WKUP_PSC2_4
  24
  25 #define SIMPLE_DDR      (FPGA_DIN | FPGA_CCLK | FPGA_CONFIG | WD_WDI |\
  26                          S_FPGA_CCLK)
  27 #define SIMPLE_DVO      (FPGA_CONFIG)
  28 #define SIMPLE_ODE      (FPGA_CONFIG)
  29 #define SIMPLE_GPIOEN   (FPGA_DIN | FPGA_CCLK | FPGA_DONE | FPGA_CONFIG |\
  30                          S_FPGA_CCLK | S_FPGA_DONE | WD_WDI | COP_PRESENT)
  31
  32 #define SINT_ODE        0x1
  33 #define SINT_DDR        0x3
  34 #define SINT_DVO        0x1
  35 #define SINT_INTEN      0
  36 #define SINT_ITYPE      0
  37 #define SINT_GPIOEN     (FPGA_STATUS | S_FPGA_DIN | S_FPGA_CONFIG)
  38
  39 #define WKUP_ODE        (MAN_RST | S_FPGA_STATUS)
  40 #define WKUP_DIR        (MAN_RST | WD_TS | S_FPGA_STATUS)
  41 #define WKUP_DO         (MAN_RST | WD_TS | S_FPGA_STATUS)
  42 #define WKUP_EN         (MAN_RST | WD_TS | S_FPGA_STATUS | SERVICE_MODE |\
  43                          FLASH_RBY | UART_EN1 | LAN_PRSNT)