2 * (C) Copyright 2004-2007 Freescale Semiconductor, Inc.
3 * TsiChung Liew, Tsi-Chung.Liew@freescale.com.
5 * SPDX-License-Identifier: GPL-2.0+
9 * Minimal serial functions needed to use one of the uart ports
10 * as serial console interface.
15 #include <linux/compiler.h>
17 #include <asm/immap.h>
20 DECLARE_GLOBAL_DATA_PTR
;
22 extern void uart_port_conf(int port
);
24 static int mcf_serial_init(void)
26 volatile uart_t
*uart
;
29 uart
= (volatile uart_t
*)(CONFIG_SYS_UART_BASE
);
31 uart_port_conf(CONFIG_SYS_UART_PORT
);
33 /* write to SICR: SIM2 = uart mode,dcd does not affect rx */
34 uart
->ucr
= UART_UCR_RESET_RX
;
35 uart
->ucr
= UART_UCR_RESET_TX
;
36 uart
->ucr
= UART_UCR_RESET_ERROR
;
37 uart
->ucr
= UART_UCR_RESET_MR
;
42 /* write to CSR: RX/TX baud rate from timers */
43 uart
->ucsr
= (UART_UCSR_RCS_SYS_CLK
| UART_UCSR_TCS_SYS_CLK
);
45 uart
->umr
= (UART_UMR_BC_8
| UART_UMR_PM_NONE
);
46 uart
->umr
= UART_UMR_SB_STOP_BITS_1
;
48 /* Setting up BaudRate */
49 counter
= (u32
) ((gd
->bus_clk
/ 32) + (gd
->baudrate
/ 2));
50 counter
= counter
/ gd
->baudrate
;
52 /* write to CTUR: divide counter upper byte */
53 uart
->ubg1
= (u8
) ((counter
& 0xff00) >> 8);
54 /* write to CTLR: divide counter lower byte */
55 uart
->ubg2
= (u8
) (counter
& 0x00ff);
57 uart
->ucr
= (UART_UCR_RX_ENABLED
| UART_UCR_TX_ENABLED
);
62 static void mcf_serial_putc(const char c
)
64 volatile uart_t
*uart
= (volatile uart_t
*)(CONFIG_SYS_UART_BASE
);
69 /* Wait for last character to go. */
70 while (!(uart
->usr
& UART_USR_TXRDY
)) ;
75 static int mcf_serial_getc(void)
77 volatile uart_t
*uart
= (volatile uart_t
*)(CONFIG_SYS_UART_BASE
);
79 /* Wait for a character to arrive. */
80 while (!(uart
->usr
& UART_USR_RXRDY
)) ;
84 static int mcf_serial_tstc(void)
86 volatile uart_t
*uart
= (volatile uart_t
*)(CONFIG_SYS_UART_BASE
);
88 return (uart
->usr
& UART_USR_RXRDY
);
91 static void mcf_serial_setbrg(void)
93 volatile uart_t
*uart
= (volatile uart_t
*)(CONFIG_SYS_UART_BASE
);
96 /* Setting up BaudRate */
97 counter
= (u32
) ((gd
->bus_clk
/ 32) + (gd
->baudrate
/ 2));
98 counter
= counter
/ gd
->baudrate
;
100 /* write to CTUR: divide counter upper byte */
101 uart
->ubg1
= ((counter
& 0xff00) >> 8);
102 /* write to CTLR: divide counter lower byte */
103 uart
->ubg2
= (counter
& 0x00ff);
105 uart
->ucr
= UART_UCR_RESET_RX
;
106 uart
->ucr
= UART_UCR_RESET_TX
;
108 uart
->ucr
= UART_UCR_RX_ENABLED
| UART_UCR_TX_ENABLED
;
111 static struct serial_device mcf_serial_drv
= {
112 .name
= "mcf_serial",
113 .start
= mcf_serial_init
,
115 .setbrg
= mcf_serial_setbrg
,
116 .putc
= mcf_serial_putc
,
117 .puts
= default_serial_puts
,
118 .getc
= mcf_serial_getc
,
119 .tstc
= mcf_serial_tstc
,
122 void mcf_serial_initialize(void)
124 serial_register(&mcf_serial_drv
);
127 __weak
struct serial_device
*default_serial_console(void)
129 return &mcf_serial_drv
;