board/freescale/mpc8540ads/law.c

   1 /*
   2  * Copyright 2008 Freescale Semiconductor, Inc.
   3  *
   4  * (C) Copyright 2000
   5  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9
  10 #include <common.h>
  11 #include <asm/fsl_law.h>
  12 #include <asm/mmu.h>
  13
  14 /*
  15  * LAW(Local Access Window) configuration:
  16  *
  17  * 0x0000_0000     0x7fff_ffff     DDR                     2G
  18  * 0x8000_0000     0x9fff_ffff     PCI1 MEM                512M
  19  * 0xc000_0000     0xdfff_ffff     RapidIO                 512M
  20  * 0xe000_0000     0xe000_ffff     CCSR                    1M
  21  * 0xe200_0000     0xe2ff_ffff     PCI1 IO                 16M
  22  * 0xf000_0000     0xf7ff_ffff     SDRAM                   128M
  23  * 0xf800_0000     0xf80f_ffff     BCSR                    1M
  24  * 0xff00_0000     0xffff_ffff     FLASH (boot bank)       16M
  25  *
  26  * Notes:
  27  *    CCSRBAR and L2-as-SRAM don't need a configured Local Access Window.
  28  *    If flash is 8M at default position (last 8M), no LAW needed.
  29  */
  30
  31 struct law_entry law_table[] = {
  32 #ifndef CONFIG_SPD_EEPROM
  33         SET_LAW(CONFIG_SYS_DDR_SDRAM_BASE, LAW_SIZE_128M, LAW_TRGT_IF_DDR),
  34 #endif
  35         SET_LAW(CONFIG_SYS_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI),
  36         /* This is not so much the SDRAM map as it is the whole localbus map. */
  37         SET_LAW(CONFIG_SYS_LBC_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC),
  38         SET_LAW(CONFIG_SYS_PCI1_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCI),
  39         SET_LAW(CONFIG_SYS_RIO_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_RIO),
  40 };
  41
  42 int num_law_entries = ARRAY_SIZE(law_table);