arm: vf610: add uart0 clock/iomux definitions
[u-boot/qq2440-u-boot.git] / board / nvidia / harmony / harmony.c
blobb74c21934754c3ca0c9bee9fa37c43cf4d6882d7
1 /*
2 * (C) Copyright 2010,2011
3 * NVIDIA Corporation <www.nvidia.com>
5 * SPDX-License-Identifier: GPL-2.0+
6 */
8 #include <common.h>
9 #include <lcd.h>
10 #include <asm/io.h>
11 #include <asm/arch/clock.h>
12 #include <asm/arch/funcmux.h>
13 #include <asm/arch/pinmux.h>
14 #include <asm/arch/tegra.h>
15 #include <asm/gpio.h>
17 #ifdef CONFIG_TEGRA_MMC
19 * Routine: pin_mux_mmc
20 * Description: setup the pin muxes/tristate values for the SDMMC(s)
22 void pin_mux_mmc(void)
24 funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT);
25 funcmux_select(PERIPH_ID_SDMMC2, FUNCMUX_SDMMC2_DTA_DTD_8BIT);
27 /* For power GPIO PI6 */
28 pinmux_tristate_disable(PINGRP_ATA);
29 /* For CD GPIO PH2 */
30 pinmux_tristate_disable(PINGRP_ATD);
32 /* For power GPIO PT3 */
33 pinmux_tristate_disable(PINGRP_DTB);
34 /* For CD GPIO PI5 */
35 pinmux_tristate_disable(PINGRP_ATC);
37 #endif
39 void pin_mux_usb(void)
41 funcmux_select(PERIPH_ID_USB2, FUNCMUX_USB2_ULPI);
42 pinmux_set_func(PINGRP_CDEV2, PMUX_FUNC_PLLP_OUT4);
43 pinmux_tristate_disable(PINGRP_CDEV2);
44 /* USB2 PHY reset GPIO */
45 pinmux_tristate_disable(PINGRP_UAC);
48 void pin_mux_display(void)
50 pinmux_set_func(PINGRP_SDC, PMUX_FUNC_PWM);
51 pinmux_tristate_disable(PINGRP_SDC);