3 * NVIDIA Corporation <www.nvidia.com>
5 * SPDX-License-Identifier: GPL-2.0+
8 #ifndef _PINMUX_CONFIG_VENICE2_H_
9 #define _PINMUX_CONFIG_VENICE2_H_
11 #define DEFAULT_PINMUX(_pingroup, _mux, _pull, _tri, _io) \
13 .pingroup = PINGRP_##_pingroup, \
14 .func = PMUX_FUNC_##_mux, \
15 .pull = PMUX_PULL_##_pull, \
16 .tristate = PMUX_TRI_##_tri, \
17 .io = PMUX_PIN_##_io, \
18 .lock = PMUX_PIN_LOCK_DEFAULT, \
19 .od = PMUX_PIN_OD_DEFAULT, \
20 .ioreset = PMUX_PIN_IO_RESET_DEFAULT, \
23 #define I2C_PINMUX(_pingroup, _mux, _pull, _tri, _io, _lock, _od) \
25 .pingroup = PINGRP_##_pingroup, \
26 .func = PMUX_FUNC_##_mux, \
27 .pull = PMUX_PULL_##_pull, \
28 .tristate = PMUX_TRI_##_tri, \
29 .io = PMUX_PIN_##_io, \
30 .lock = PMUX_PIN_LOCK_##_lock, \
31 .od = PMUX_PIN_OD_##_od, \
32 .ioreset = PMUX_PIN_IO_RESET_DEFAULT, \
35 #define DDC_PINMUX(_pingroup, _mux, _pull, _tri, _io, _lock, _rcv_sel) \
37 .pingroup = PINGRP_##_pingroup, \
38 .func = PMUX_FUNC_##_mux, \
39 .pull = PMUX_PULL_##_pull, \
40 .tristate = PMUX_TRI_##_tri, \
41 .io = PMUX_PIN_##_io, \
42 .lock = PMUX_PIN_LOCK_##_lock, \
43 .rcv_sel = PMUX_PIN_RCV_SEL_##_rcv_sel, \
44 .ioreset = PMUX_PIN_IO_RESET_DEFAULT, \
47 #define VI_PINMUX(_pingroup, _mux, _pull, _tri, _io, _lock, _ioreset) \
49 .pingroup = PINGRP_##_pingroup, \
50 .func = PMUX_FUNC_##_mux, \
51 .pull = PMUX_PULL_##_pull, \
52 .tristate = PMUX_TRI_##_tri, \
53 .io = PMUX_PIN_##_io, \
54 .lock = PMUX_PIN_LOCK_##_lock, \
55 .od = PMUX_PIN_OD_DEFAULT, \
56 .ioreset = PMUX_PIN_IO_RESET_##_ioreset \
59 #define CEC_PINMUX(_pingroup, _mux, _pull, _tri, _io, _lock, _od) \
61 .pingroup = PINGRP_##_pingroup, \
62 .func = PMUX_FUNC_##_mux, \
63 .pull = PMUX_PULL_##_pull, \
64 .tristate = PMUX_TRI_##_tri, \
65 .io = PMUX_PIN_##_io, \
66 .lock = PMUX_PIN_LOCK_##_lock, \
67 .od = PMUX_PIN_OD_##_od, \
68 .ioreset = PMUX_PIN_IO_RESET_DEFAULT, \
71 #define USB_PINMUX CEC_PINMUX
73 #define DEFAULT_PADCFG(_padgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \
75 .padgrp = PDRIVE_PINGROUP_##_padgrp, \
80 .lpmd = PGRP_LPMD_##_lpmd, \
81 .schmt = PGRP_SCHMT_##_schmt, \
82 .hsm = PGRP_HSM_##_hsm, \
85 static struct pingroup_config tegra124_pinmux_common
[] = {
86 /* EXTPERIPH1 pinmux */
87 DEFAULT_PINMUX(CLK1_OUT
, EXTPERIPH1
, NORMAL
, NORMAL
, OUTPUT
),
90 DEFAULT_PINMUX(DAP1_DIN
, I2S0
, NORMAL
, TRISTATE
, INPUT
),
91 DEFAULT_PINMUX(DAP1_DOUT
, I2S0
, NORMAL
, NORMAL
, INPUT
),
92 DEFAULT_PINMUX(DAP1_FS
, I2S0
, NORMAL
, NORMAL
, INPUT
),
93 DEFAULT_PINMUX(DAP1_SCLK
, I2S0
, NORMAL
, NORMAL
, INPUT
),
96 DEFAULT_PINMUX(DAP2_DIN
, I2S1
, NORMAL
, TRISTATE
, INPUT
),
97 DEFAULT_PINMUX(DAP2_DOUT
, I2S1
, NORMAL
, NORMAL
, INPUT
),
98 DEFAULT_PINMUX(DAP2_FS
, I2S1
, NORMAL
, NORMAL
, INPUT
),
99 DEFAULT_PINMUX(DAP2_SCLK
, I2S1
, NORMAL
, NORMAL
, INPUT
),
102 DEFAULT_PINMUX(DAP4_DIN
, I2S3
, NORMAL
, NORMAL
, INPUT
),
103 DEFAULT_PINMUX(DAP4_DOUT
, I2S3
, NORMAL
, NORMAL
, INPUT
),
104 DEFAULT_PINMUX(DAP4_FS
, I2S3
, NORMAL
, NORMAL
, INPUT
),
105 DEFAULT_PINMUX(DAP4_SCLK
, I2S3
, NORMAL
, NORMAL
, INPUT
),
108 DEFAULT_PINMUX(DVFS_PWM
, CLDVFS
, NORMAL
, NORMAL
, OUTPUT
),
109 DEFAULT_PINMUX(DVFS_CLK
, CLDVFS
, NORMAL
, NORMAL
, OUTPUT
),
112 DEFAULT_PINMUX(ULPI_DATA0
, ULPI
, NORMAL
, NORMAL
, INPUT
),
113 DEFAULT_PINMUX(ULPI_DATA1
, ULPI
, NORMAL
, NORMAL
, INPUT
),
114 DEFAULT_PINMUX(ULPI_DATA2
, ULPI
, NORMAL
, NORMAL
, INPUT
),
115 DEFAULT_PINMUX(ULPI_DATA3
, ULPI
, NORMAL
, NORMAL
, INPUT
),
116 DEFAULT_PINMUX(ULPI_DATA4
, ULPI
, UP
, NORMAL
, INPUT
),
117 DEFAULT_PINMUX(ULPI_DATA5
, ULPI
, UP
, NORMAL
, INPUT
),
118 DEFAULT_PINMUX(ULPI_DATA6
, ULPI
, NORMAL
, NORMAL
, INPUT
),
121 DEFAULT_PINMUX(ULPI_CLK
, SPI1
, UP
, NORMAL
, INPUT
),
122 DEFAULT_PINMUX(ULPI_DIR
, SPI1
, UP
, NORMAL
, INPUT
),
123 DEFAULT_PINMUX(ULPI_NXT
, SPI1
, NORMAL
, NORMAL
, INPUT
),
124 DEFAULT_PINMUX(ULPI_STP
, SPI1
, NORMAL
, NORMAL
, INPUT
),
126 /* I2C3 (TPM) pinmux */
127 I2C_PINMUX(CAM_I2C_SCL
, I2C3
, NORMAL
, NORMAL
, INPUT
, DEFAULT
, ENABLE
),
128 I2C_PINMUX(CAM_I2C_SDA
, I2C3
, NORMAL
, NORMAL
, INPUT
, DEFAULT
, ENABLE
),
131 I2C_PINMUX(GEN2_I2C_SCL
, I2C2
, NORMAL
, NORMAL
, INPUT
, DEFAULT
, ENABLE
),
132 I2C_PINMUX(GEN2_I2C_SDA
, I2C2
, NORMAL
, NORMAL
, INPUT
, DEFAULT
, ENABLE
),
134 /* UARTD pinmux (UART4 on Servo board, unused) */
135 DEFAULT_PINMUX(GPIO_PJ7
, UARTD
, NORMAL
, NORMAL
, OUTPUT
),
136 DEFAULT_PINMUX(GPIO_PB0
, UARTD
, NORMAL
, TRISTATE
, INPUT
),
137 DEFAULT_PINMUX(GPIO_PB1
, UARTD
, NORMAL
, TRISTATE
, INPUT
),
138 DEFAULT_PINMUX(GPIO_PK7
, UARTD
, NORMAL
, NORMAL
, OUTPUT
),
140 /* SPI4 (Winbond 'boot ROM') */
141 DEFAULT_PINMUX(GPIO_PG5
, SPI4
, NORMAL
, NORMAL
, INPUT
),
142 DEFAULT_PINMUX(GPIO_PG6
, SPI4
, UP
, NORMAL
, INPUT
),
143 DEFAULT_PINMUX(GPIO_PG7
, SPI4
, UP
, NORMAL
, INPUT
),
144 DEFAULT_PINMUX(GPIO_PI3
, SPI4
, NORMAL
, NORMAL
, INPUT
),
147 DEFAULT_PINMUX(GPIO_W3_AUD
, RSVD1
, NORMAL
, NORMAL
, INPUT
),
150 DEFAULT_PINMUX(GPIO_PH1
, PWM1
, NORMAL
, NORMAL
, OUTPUT
),
153 DEFAULT_PINMUX(SDMMC1_CLK
, SDMMC1
, NORMAL
, NORMAL
, INPUT
),
154 DEFAULT_PINMUX(SDMMC1_CMD
, SDMMC1
, UP
, NORMAL
, INPUT
),
155 DEFAULT_PINMUX(SDMMC1_DAT0
, SDMMC1
, UP
, NORMAL
, INPUT
),
156 DEFAULT_PINMUX(SDMMC1_DAT1
, SDMMC1
, UP
, NORMAL
, INPUT
),
157 DEFAULT_PINMUX(SDMMC1_DAT2
, SDMMC1
, UP
, NORMAL
, INPUT
),
158 DEFAULT_PINMUX(SDMMC1_DAT3
, SDMMC1
, UP
, NORMAL
, INPUT
),
161 DEFAULT_PINMUX(SDMMC3_CLK
, SDMMC3
, NORMAL
, NORMAL
, INPUT
),
162 DEFAULT_PINMUX(SDMMC3_CMD
, SDMMC3
, UP
, NORMAL
, INPUT
),
163 DEFAULT_PINMUX(SDMMC3_DAT0
, SDMMC3
, UP
, NORMAL
, INPUT
),
164 DEFAULT_PINMUX(SDMMC3_DAT1
, SDMMC3
, UP
, NORMAL
, INPUT
),
165 DEFAULT_PINMUX(SDMMC3_DAT2
, SDMMC3
, UP
, NORMAL
, INPUT
),
166 DEFAULT_PINMUX(SDMMC3_DAT3
, SDMMC3
, UP
, NORMAL
, INPUT
),
167 DEFAULT_PINMUX(SDMMC3_CLK_LB_IN
, SDMMC3
, UP
, TRISTATE
, INPUT
),
168 DEFAULT_PINMUX(SDMMC3_CLK_LB_OUT
, SDMMC3
, DOWN
, NORMAL
, INPUT
),
171 DEFAULT_PINMUX(SDMMC4_CLK
, SDMMC4
, NORMAL
, NORMAL
, INPUT
),
172 DEFAULT_PINMUX(SDMMC4_CMD
, SDMMC4
, UP
, NORMAL
, INPUT
),
173 DEFAULT_PINMUX(SDMMC4_DAT0
, SDMMC4
, UP
, NORMAL
, INPUT
),
174 DEFAULT_PINMUX(SDMMC4_DAT1
, SDMMC4
, UP
, NORMAL
, INPUT
),
175 DEFAULT_PINMUX(SDMMC4_DAT2
, SDMMC4
, UP
, NORMAL
, INPUT
),
176 DEFAULT_PINMUX(SDMMC4_DAT3
, SDMMC4
, UP
, NORMAL
, INPUT
),
177 DEFAULT_PINMUX(SDMMC4_DAT4
, SDMMC4
, UP
, NORMAL
, INPUT
),
178 DEFAULT_PINMUX(SDMMC4_DAT5
, SDMMC4
, UP
, NORMAL
, INPUT
),
179 DEFAULT_PINMUX(SDMMC4_DAT6
, SDMMC4
, UP
, NORMAL
, INPUT
),
180 DEFAULT_PINMUX(SDMMC4_DAT7
, SDMMC4
, UP
, NORMAL
, INPUT
),
183 DEFAULT_PINMUX(CLK_32K_OUT
, BLINK
, NORMAL
, NORMAL
, OUTPUT
),
186 DEFAULT_PINMUX(KB_COL0
, KBC
, UP
, NORMAL
, INPUT
),
187 DEFAULT_PINMUX(KB_COL1
, KBC
, UP
, NORMAL
, INPUT
),
188 DEFAULT_PINMUX(KB_COL2
, KBC
, UP
, NORMAL
, INPUT
),
189 DEFAULT_PINMUX(KB_ROW0
, KBC
, UP
, NORMAL
, INPUT
),
190 DEFAULT_PINMUX(KB_ROW1
, KBC
, UP
, NORMAL
, INPUT
),
193 DEFAULT_PINMUX(GPIO_PV0
, RSVD1
, NORMAL
, TRISTATE
, OUTPUT
),
194 DEFAULT_PINMUX(KB_ROW7
, RSVD1
, UP
, NORMAL
, INPUT
),
196 /* UARTA pinmux (BR_UART_TXD/RXD on Servo board) */
197 DEFAULT_PINMUX(KB_ROW9
, UARTA
, UP
, NORMAL
, OUTPUT
),
198 DEFAULT_PINMUX(KB_ROW10
, UARTA
, UP
, TRISTATE
, INPUT
),
200 /* I2CPWR pinmux (I2C5) */
201 I2C_PINMUX(PWR_I2C_SCL
, I2CPWR
, NORMAL
, NORMAL
, INPUT
, DEFAULT
, ENABLE
),
202 I2C_PINMUX(PWR_I2C_SDA
, I2CPWR
, NORMAL
, NORMAL
, INPUT
, DEFAULT
, ENABLE
),
205 DEFAULT_PINMUX(JTAG_RTCK
, RTCK
, NORMAL
, NORMAL
, INPUT
),
208 DEFAULT_PINMUX(CLK_32K_IN
, CLK
, NORMAL
, TRISTATE
, INPUT
),
211 DEFAULT_PINMUX(CORE_PWR_REQ
, PWRON
, NORMAL
, NORMAL
, OUTPUT
),
214 DEFAULT_PINMUX(CPU_PWR_REQ
, CPU
, NORMAL
, NORMAL
, OUTPUT
),
217 DEFAULT_PINMUX(PWR_INT_N
, PMI
, NORMAL
, TRISTATE
, INPUT
),
219 /* RESET_OUT_N pinmux */
220 DEFAULT_PINMUX(RESET_OUT_N
, RESET_OUT_N
, NORMAL
, NORMAL
, OUTPUT
),
222 /* EXTPERIPH3 pinmux */
223 DEFAULT_PINMUX(CLK3_OUT
, EXTPERIPH3
, NORMAL
, NORMAL
, OUTPUT
),
226 I2C_PINMUX(GEN1_I2C_SCL
, I2C1
, NORMAL
, NORMAL
, INPUT
, DEFAULT
, ENABLE
),
227 I2C_PINMUX(GEN1_I2C_SDA
, I2C1
, NORMAL
, NORMAL
, INPUT
, DEFAULT
, ENABLE
),
230 DEFAULT_PINMUX(UART2_CTS_N
, UARTB
, NORMAL
, TRISTATE
, INPUT
),
231 DEFAULT_PINMUX(UART2_RTS_N
, UARTB
, NORMAL
, NORMAL
, OUTPUT
),
232 DEFAULT_PINMUX(UART2_RXD
, UARTB
, NORMAL
, TRISTATE
, INPUT
),
233 DEFAULT_PINMUX(UART2_TXD
, UARTB
, NORMAL
, NORMAL
, OUTPUT
),
235 /* UARTC (WIFI/BT) */
236 DEFAULT_PINMUX(UART3_CTS_N
, UARTC
, NORMAL
, TRISTATE
, INPUT
),
237 DEFAULT_PINMUX(UART3_RTS_N
, UARTC
, NORMAL
, NORMAL
, OUTPUT
),
238 DEFAULT_PINMUX(UART3_RXD
, UARTC
, NORMAL
, TRISTATE
, INPUT
),
239 DEFAULT_PINMUX(UART3_TXD
, UARTC
, NORMAL
, NORMAL
, OUTPUT
),
242 CEC_PINMUX(HDMI_CEC
, CEC
, NORMAL
, NORMAL
, INPUT
, DEFAULT
, DISABLE
),
244 /* I2C4 (HDMI_DDC) pinmux */
245 DDC_PINMUX(DDC_SCL
, I2C4
, NORMAL
, NORMAL
, INPUT
, DEFAULT
, HIGH
),
246 DDC_PINMUX(DDC_SDA
, I2C4
, NORMAL
, NORMAL
, INPUT
, DEFAULT
, HIGH
),
249 USB_PINMUX(USB_VBUS_EN0
, USB
, NORMAL
, NORMAL
, INPUT
, DEFAULT
, ENABLE
),
250 USB_PINMUX(USB_VBUS_EN1
, USB
, NORMAL
, NORMAL
, INPUT
, DEFAULT
, ENABLE
),
252 /* Unused, marked SNN_ on schematic, TRISTATE 'em */
253 DEFAULT_PINMUX(GPIO_PBB0
, RSVD3
, NORMAL
, TRISTATE
, INPUT
),
254 DEFAULT_PINMUX(GPIO_PBB3
, RSVD3
, NORMAL
, TRISTATE
, INPUT
),
255 DEFAULT_PINMUX(GPIO_PBB4
, RSVD3
, NORMAL
, TRISTATE
, INPUT
),
256 DEFAULT_PINMUX(GPIO_PBB5
, RSVD2
, NORMAL
, TRISTATE
, INPUT
),
257 DEFAULT_PINMUX(GPIO_PBB6
, RSVD1
, NORMAL
, TRISTATE
, INPUT
),
258 DEFAULT_PINMUX(GPIO_PBB7
, RSVD1
, NORMAL
, TRISTATE
, INPUT
),
259 DEFAULT_PINMUX(GPIO_PCC1
, RSVD1
, NORMAL
, TRISTATE
, INPUT
),
260 DEFAULT_PINMUX(GPIO_PCC2
, RSVD1
, NORMAL
, TRISTATE
, INPUT
),
261 DEFAULT_PINMUX(GPIO_PH3
, GMI
, NORMAL
, TRISTATE
, INPUT
),
262 DEFAULT_PINMUX(GPIO_PI7
, GMI
, NORMAL
, TRISTATE
, INPUT
),
263 DEFAULT_PINMUX(GPIO_PJ2
, RSVD1
, NORMAL
, TRISTATE
, INPUT
),
264 DEFAULT_PINMUX(GPIO_X5_AUD
, RSVD3
, NORMAL
, TRISTATE
, INPUT
),
265 DEFAULT_PINMUX(GPIO_X6_AUD
, GMI
, NORMAL
, TRISTATE
, INPUT
),
266 DEFAULT_PINMUX(GPIO_W2_AUD
, RSVD1
, NORMAL
, TRISTATE
, INPUT
),
267 DEFAULT_PINMUX(GPIO_PFF2
, RSVD1
, NORMAL
, TRISTATE
, INPUT
),
268 DEFAULT_PINMUX(USB_VBUS_EN2
, RSVD1
, NORMAL
, TRISTATE
, INPUT
),
269 DEFAULT_PINMUX(KB_COL5
, RSVD1
, NORMAL
, TRISTATE
, INPUT
),
270 DEFAULT_PINMUX(KB_ROW2
, RSVD1
, NORMAL
, TRISTATE
, INPUT
),
271 DEFAULT_PINMUX(KB_ROW3
, KBC
, NORMAL
, TRISTATE
, INPUT
),
272 DEFAULT_PINMUX(KB_ROW5
, RSVD2
, NORMAL
, TRISTATE
, INPUT
),
273 DEFAULT_PINMUX(KB_ROW6
, KBC
, NORMAL
, TRISTATE
, INPUT
),
274 DEFAULT_PINMUX(KB_ROW13
, RSVD1
, NORMAL
, TRISTATE
, INPUT
),
275 DEFAULT_PINMUX(KB_ROW14
, RSVD1
, NORMAL
, TRISTATE
, INPUT
),
276 DEFAULT_PINMUX(KB_ROW16
, RSVD1
, NORMAL
, TRISTATE
, INPUT
),
277 DEFAULT_PINMUX(OWR
, RSVD1
, NORMAL
, TRISTATE
, INPUT
),
278 DEFAULT_PINMUX(ULPI_DATA7
, ULPI
, NORMAL
, TRISTATE
, INPUT
),
279 DEFAULT_PINMUX(DAP3_DIN
, RSVD1
, NORMAL
, TRISTATE
, INPUT
),
280 DEFAULT_PINMUX(DAP3_FS
, RSVD1
, NORMAL
, TRISTATE
, INPUT
),
281 DEFAULT_PINMUX(DAP3_SCLK
, RSVD2
, NORMAL
, TRISTATE
, INPUT
),
282 DEFAULT_PINMUX(CLK2_OUT
, RSVD1
, NORMAL
, TRISTATE
, INPUT
),
283 DEFAULT_PINMUX(SDMMC1_WP_N
, RSVD1
, NORMAL
, TRISTATE
, INPUT
),
284 DEFAULT_PINMUX(CAM_MCLK
, RSVD1
, NORMAL
, TRISTATE
, INPUT
),
285 DEFAULT_PINMUX(CLK3_REQ
, RSVD1
, NORMAL
, TRISTATE
, INPUT
),
286 DEFAULT_PINMUX(SPDIF_OUT
, RSVD1
, NORMAL
, TRISTATE
, INPUT
),
289 static struct pingroup_config unused_pins_lowpower
[] = {
290 DEFAULT_PINMUX(CLK1_REQ
, RSVD3
, DOWN
, TRISTATE
, OUTPUT
),
293 /* Initially setting all used GPIO's to non-TRISTATE */
294 static struct pingroup_config tegra124_pinmux_set_nontristate
[] = {
295 DEFAULT_PINMUX(GPIO_X4_AUD
, RSVD1
, DOWN
, NORMAL
, OUTPUT
),
296 DEFAULT_PINMUX(GPIO_X7_AUD
, RSVD1
, DOWN
, NORMAL
, OUTPUT
),
297 DEFAULT_PINMUX(GPIO_W2_AUD
, RSVD1
, UP
, NORMAL
, INPUT
),
298 DEFAULT_PINMUX(GPIO_X3_AUD
, RSVD3
, UP
, NORMAL
, INPUT
),
301 DEFAULT_PINMUX(DAP3_DOUT
, I2S2
, DOWN
, NORMAL
, OUTPUT
),
304 DEFAULT_PINMUX(GPIO_PV0
, RSVD3
, NORMAL
, NORMAL
, INPUT
),
305 DEFAULT_PINMUX(GPIO_PV1
, RSVD1
, NORMAL
, NORMAL
, INPUT
),
308 DEFAULT_PINMUX(GPIO_PG0
, GMI
, NORMAL
, NORMAL
, INPUT
),
309 DEFAULT_PINMUX(GPIO_PG1
, GMI
, NORMAL
, NORMAL
, INPUT
),
310 DEFAULT_PINMUX(GPIO_PG2
, GMI
, NORMAL
, NORMAL
, INPUT
),
311 DEFAULT_PINMUX(GPIO_PG3
, GMI
, NORMAL
, NORMAL
, INPUT
),
313 DEFAULT_PINMUX(CLK2_REQ
, RSVD3
, NORMAL
, NORMAL
, OUTPUT
),
315 DEFAULT_PINMUX(KB_COL3
, KBC
, UP
, NORMAL
, OUTPUT
),
316 DEFAULT_PINMUX(KB_COL4
, SDMMC3
, UP
, NORMAL
, INPUT
),
317 DEFAULT_PINMUX(KB_COL6
, KBC
, UP
, NORMAL
, OUTPUT
),
318 DEFAULT_PINMUX(KB_COL7
, KBC
, UP
, NORMAL
, OUTPUT
),
319 DEFAULT_PINMUX(KB_ROW4
, KBC
, DOWN
, NORMAL
, INPUT
),
320 DEFAULT_PINMUX(KB_ROW8
, KBC
, UP
, NORMAL
, INPUT
),
322 DEFAULT_PINMUX(GPIO_PU4
, RSVD3
, NORMAL
, NORMAL
, INPUT
),
323 DEFAULT_PINMUX(GPIO_PU5
, RSVD3
, NORMAL
, NORMAL
, OUTPUT
),
324 DEFAULT_PINMUX(GPIO_PU6
, RSVD3
, NORMAL
, NORMAL
, INPUT
),
326 DEFAULT_PINMUX(HDMI_INT
, RSVD1
, DOWN
, NORMAL
, INPUT
),
327 DEFAULT_PINMUX(SPDIF_IN
, USB
, NORMAL
, NORMAL
, INPUT
),
328 DEFAULT_PINMUX(SDMMC3_CD_N
, SDMMC3
, UP
, NORMAL
, INPUT
),
331 DEFAULT_PINMUX(GPIO_PK1
, GMI
, NORMAL
, NORMAL
, OUTPUT
),
334 static struct padctrl_config venice2_padctrl
[] = {
335 /* (_padgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) */
336 DEFAULT_PADCFG(SDIO3
, SDIOCFG_DRVUP_SLWF
, SDIOCFG_DRVDN_SLWR
,
337 SDIOCFG_DRVUP
, SDIOCFG_DRVDN
, NONE
, NONE
, NONE
),
339 #endif /* PINMUX_CONFIG_VENICE2_H */