2 * (C) Copyright 2000, 2001
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * SPDX-License-Identifier: GPL-2.0+
9 * Support for read and write access to EEPROM like memory devices. This
10 * includes regular EEPROM as well as FRAM (ferroelectic nonvolaile RAM).
11 * FRAM devices read and write data at bus speed. In particular, there is no
12 * write delay. Also, there is no limit imposed on the number of bytes that can
13 * be transferred with a single read or write.
15 * Use the following configuration options to ensure no unneeded performance
16 * degradation (typical for EEPROM) is incured for FRAM memory:
18 * #define CONFIG_SYS_I2C_FRAM
19 * #undef CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS
28 extern void eeprom_init (void);
29 extern int eeprom_read (unsigned dev_addr
, unsigned offset
,
30 uchar
*buffer
, unsigned cnt
);
31 extern int eeprom_write (unsigned dev_addr
, unsigned offset
,
32 uchar
*buffer
, unsigned cnt
);
33 #if defined(CONFIG_SYS_EEPROM_WREN)
34 extern int eeprom_write_enable (unsigned dev_addr
, int state
);
38 #if defined(CONFIG_SYS_EEPROM_X40430)
39 /* Maximum number of times to poll for acknowledge after write */
40 #define MAX_ACKNOWLEDGE_POLLS 10
43 /* ------------------------------------------------------------------------- */
45 #if defined(CONFIG_CMD_EEPROM)
46 int do_eeprom ( cmd_tbl_t
* cmdtp
, int flag
, int argc
, char * const argv
[])
48 const char *const fmt
=
49 "\nEEPROM @0x%lX %s: addr %08lx off %04lx count %ld ... ";
51 #if defined(CONFIG_SYS_I2C_MULTI_EEPROMS)
53 ulong dev_addr
= simple_strtoul (argv
[2], NULL
, 16);
54 ulong addr
= simple_strtoul (argv
[3], NULL
, 16);
55 ulong off
= simple_strtoul (argv
[4], NULL
, 16);
56 ulong cnt
= simple_strtoul (argv
[5], NULL
, 16);
59 ulong dev_addr
= CONFIG_SYS_DEF_EEPROM_ADDR
;
60 ulong addr
= simple_strtoul (argv
[2], NULL
, 16);
61 ulong off
= simple_strtoul (argv
[3], NULL
, 16);
62 ulong cnt
= simple_strtoul (argv
[4], NULL
, 16);
63 #endif /* CONFIG_SYS_I2C_MULTI_EEPROMS */
65 # if !defined(CONFIG_SPI) || defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
67 # endif /* !CONFIG_SPI */
69 if (strcmp (argv
[1], "read") == 0) {
72 printf (fmt
, dev_addr
, argv
[1], addr
, off
, cnt
);
74 rcode
= eeprom_read (dev_addr
, off
, (uchar
*) addr
, cnt
);
78 } else if (strcmp (argv
[1], "write") == 0) {
81 printf (fmt
, dev_addr
, argv
[1], addr
, off
, cnt
);
83 rcode
= eeprom_write (dev_addr
, off
, (uchar
*) addr
, cnt
);
94 /*-----------------------------------------------------------------------
96 * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 2 (16-bit EEPROM address) offset is
97 * 0x000nxxxx for EEPROM address selectors at n, offset xxxx in EEPROM.
99 * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 (8-bit EEPROM page address) offset is
100 * 0x00000nxx for EEPROM address selectors and page number at n.
103 #if !defined(CONFIG_SPI) || defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
104 #if !defined(CONFIG_SYS_I2C_EEPROM_ADDR_LEN) || CONFIG_SYS_I2C_EEPROM_ADDR_LEN < 1 || CONFIG_SYS_I2C_EEPROM_ADDR_LEN > 2
105 #error CONFIG_SYS_I2C_EEPROM_ADDR_LEN must be 1 or 2
109 int eeprom_read (unsigned dev_addr
, unsigned offset
, uchar
*buffer
, unsigned cnt
)
111 unsigned end
= offset
+ cnt
;
115 /* Read data until done or would cross a page boundary.
116 * We must write the address again when changing pages
117 * because the next page may be in a different device.
119 while (offset
< end
) {
121 #if !defined(CONFIG_SYS_I2C_FRAM)
125 #if CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 && !defined(CONFIG_SPI_X)
128 blk_off
= offset
& 0xFF; /* block offset */
130 addr
[0] = offset
>> 8; /* block number */
131 addr
[1] = blk_off
; /* block offset */
136 blk_off
= offset
& 0xFF; /* block offset */
138 addr
[0] = offset
>> 16; /* block number */
139 addr
[1] = offset
>> 8; /* upper address octet */
140 addr
[2] = blk_off
; /* lower address octet */
142 #endif /* CONFIG_SYS_I2C_EEPROM_ADDR_LEN, CONFIG_SPI_X */
144 addr
[0] |= dev_addr
; /* insert device address */
149 * For a FRAM device there is no limit on the number of the
150 * bytes that can be ccessed with the single read or write
153 #if !defined(CONFIG_SYS_I2C_FRAM)
154 maxlen
= 0x100 - blk_off
;
155 if (maxlen
> I2C_RXTX_LEN
)
156 maxlen
= I2C_RXTX_LEN
;
161 #if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
162 spi_read (addr
, alen
, buffer
, len
);
164 if (i2c_read(addr
[0], offset
, alen
- 1, buffer
, len
))
174 /*-----------------------------------------------------------------------
176 * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 2 (16-bit EEPROM address) offset is
177 * 0x000nxxxx for EEPROM address selectors at n, offset xxxx in EEPROM.
179 * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 (8-bit EEPROM page address) offset is
180 * 0x00000nxx for EEPROM address selectors and page number at n.
183 int eeprom_write (unsigned dev_addr
, unsigned offset
, uchar
*buffer
, unsigned cnt
)
185 unsigned end
= offset
+ cnt
;
189 #if defined(CONFIG_SYS_EEPROM_X40430)
190 uchar contr_r_addr
[2];
197 #if defined(CONFIG_SYS_EEPROM_WREN)
198 eeprom_write_enable (dev_addr
,1);
200 /* Write data until done or would cross a write page boundary.
201 * We must write the address again when changing pages
202 * because the address counter only increments within a page.
205 while (offset
< end
) {
207 #if !defined(CONFIG_SYS_I2C_FRAM)
211 #if CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 && !defined(CONFIG_SPI_X)
214 blk_off
= offset
& 0xFF; /* block offset */
216 addr
[0] = offset
>> 8; /* block number */
217 addr
[1] = blk_off
; /* block offset */
222 blk_off
= offset
& 0xFF; /* block offset */
224 addr
[0] = offset
>> 16; /* block number */
225 addr
[1] = offset
>> 8; /* upper address octet */
226 addr
[2] = blk_off
; /* lower address octet */
228 #endif /* CONFIG_SYS_I2C_EEPROM_ADDR_LEN, CONFIG_SPI_X */
230 addr
[0] |= dev_addr
; /* insert device address */
235 * For a FRAM device there is no limit on the number of the
236 * bytes that can be accessed with the single read or write
239 #if !defined(CONFIG_SYS_I2C_FRAM)
241 #if defined(CONFIG_SYS_EEPROM_PAGE_WRITE_BITS)
243 #define EEPROM_PAGE_SIZE (1 << CONFIG_SYS_EEPROM_PAGE_WRITE_BITS)
244 #define EEPROM_PAGE_OFFSET(x) ((x) & (EEPROM_PAGE_SIZE - 1))
246 maxlen
= EEPROM_PAGE_SIZE
- EEPROM_PAGE_OFFSET(blk_off
);
248 maxlen
= 0x100 - blk_off
;
250 if (maxlen
> I2C_RXTX_LEN
)
251 maxlen
= I2C_RXTX_LEN
;
257 #if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
258 spi_write (addr
, alen
, buffer
, len
);
260 #if defined(CONFIG_SYS_EEPROM_X40430)
261 /* Get the value of the control register.
262 * Set current address (internal pointer in the x40430)
266 contr_r_addr
[1] = 0xff;
268 addr_void
[1] = addr
[1];
269 #ifdef CONFIG_SYS_I2C_EEPROM_ADDR
270 contr_r_addr
[0] |= CONFIG_SYS_I2C_EEPROM_ADDR
;
271 addr_void
[0] |= CONFIG_SYS_I2C_EEPROM_ADDR
;
274 if (i2c_read (contr_r_addr
[0], contr_r_addr
[1], 1, contr_reg
, 1) != 0) {
277 ctrl_reg_v
= contr_reg
[0];
279 /* Are any of the eeprom blocks write protected?
281 if (ctrl_reg_v
& 0x18) {
282 ctrl_reg_v
&= ~0x18; /* reset block protect bits */
283 ctrl_reg_v
|= 0x02; /* set write enable latch */
284 ctrl_reg_v
&= ~0x04; /* clear RWEL */
286 /* Set write enable latch.
289 if (i2c_write (contr_r_addr
[0], 0xff, 1, contr_reg
, 1) != 0) {
293 /* Set register write enable latch.
296 if (i2c_write (contr_r_addr
[0], 0xFF, 1, contr_reg
, 1) != 0) {
300 /* Modify ctrl register.
302 contr_reg
[0] = ctrl_reg_v
;
303 if (i2c_write (contr_r_addr
[0], 0xFF, 1, contr_reg
, 1) != 0) {
307 /* The write (above) is an operation on NV memory.
308 * These can take some time (~5ms), and the device
309 * will not respond to further I2C messages till
310 * it's completed the write.
311 * So poll device for an I2C acknowledge.
312 * When we get one we know we can continue with other
316 for (i
= 0; i
< MAX_ACKNOWLEDGE_POLLS
; i
++) {
317 if (i2c_read (addr_void
[0], addr_void
[1], 1, contr_reg
, 1) == 0)
319 #if defined(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS)
320 udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS
* 1000);
323 if (i
== MAX_ACKNOWLEDGE_POLLS
) {
324 puts ("EEPROM poll acknowledge failed\n");
329 /* Is the write enable latch on?.
331 else if (!(ctrl_reg_v
& 0x02)) {
332 /* Set write enable latch.
335 if (i2c_write (contr_r_addr
[0], 0xFF, 1, contr_reg
, 1) != 0) {
339 /* Write is enabled ... now write eeprom value.
342 if (i2c_write(addr
[0], offset
, alen
- 1, buffer
, len
))
349 #if defined(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS)
350 udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS
* 1000);
353 #if defined(CONFIG_SYS_EEPROM_WREN)
354 eeprom_write_enable (dev_addr
,0);
359 #if !defined(CONFIG_SPI) || defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
361 eeprom_probe (unsigned dev_addr
, unsigned offset
)
365 /* Probe the chip address
367 #if CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 && !defined(CONFIG_SPI_X)
368 chip
= offset
>> 8; /* block number */
370 chip
= offset
>> 16; /* block number */
371 #endif /* CONFIG_SYS_I2C_EEPROM_ADDR_LEN, CONFIG_SPI_X */
373 chip
|= dev_addr
; /* insert device address */
375 return (i2c_probe (chip
));
379 /*-----------------------------------------------------------------------
382 #ifndef CONFIG_SYS_I2C_SPEED
383 #define CONFIG_SYS_I2C_SPEED 50000
386 void eeprom_init (void)
389 #if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
392 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C_SOFT)
393 i2c_init (CONFIG_SYS_I2C_SPEED
, CONFIG_SYS_I2C_SLAVE
);
397 /*-----------------------------------------------------------------------
400 /***************************************************/
402 #if defined(CONFIG_CMD_EEPROM)
404 #ifdef CONFIG_SYS_I2C_MULTI_EEPROMS
406 eeprom
, 6, 1, do_eeprom
,
408 "read devaddr addr off cnt\n"
409 "eeprom write devaddr addr off cnt\n"
410 " - read/write `cnt' bytes from `devaddr` EEPROM at offset `off'"
412 #else /* One EEPROM */
414 eeprom
, 5, 1, do_eeprom
,
416 "read addr off cnt\n"
417 "eeprom write addr off cnt\n"
418 " - read/write `cnt' bytes at EEPROM offset `off'"
420 #endif /* CONFIG_SYS_I2C_MULTI_EEPROMS */