usr/src/uts/common/io/cxgbe/t4nex/t4_l2t.h

   1 /*
   2  * This file and its contents are supplied under the terms of the
   3  * Common Development and Distribution License ("CDDL"), version 1.0.
   4  * You may only use this file in accordance with the terms of version
   5  * 1.0 of the CDDL.
   6  *
   7  * A full copy of the text of the CDDL should have accompanied this
   8  * source. A copy of the CDDL is also available via the Internet at
   9  * http://www.illumos.org/license/CDDL.
  10  */
  11
  12 /*
  13  * This file is part of the Chelsio T4 support code.
  14  *
  15  * Copyright (C) 2010-2013 Chelsio Communications.  All rights reserved.
  16  *
  17  * This program is distributed in the hope that it will be useful, but WITHOUT
  18  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  19  * FITNESS FOR A PARTICULAR PURPOSE.  See the LICENSE file included in this
  20  * release for licensing terms and conditions.
  21  */
  22
  23 #ifndef __CXGBE_T4L2T_H
  24 #define __CXGBE_T4L2T_H
  25
  26 #include <inet/ip.h>
  27 #include <inet/ip2mac.h>
  28
  29 enum { L2T_SIZE = 4096 };       /* # of L2T entries */
  30
  31 #define MBUF_EQ(mp)     (*((void **)(&(mp)->b_datap->db_cksumstuff)))
  32
  33 /*
  34  * Each L2T entry plays multiple roles.  First of all, it keeps state for the
  35  * corresponding entry of the HW L2 table and maintains a queue of offload
  36  * packets awaiting address resolution.  Second, it is a node of a hash table
  37  * chain, where the nodes of the chain are linked together through their next
  38  * pointer.  Finally, each node is a bucket of a hash table, pointing to the
  39  * first element in its chain through its first pointer.
  40  */
  41 struct l2t_entry {
  42         uint16_t state;                 /* entry state */
  43         uint16_t idx;                   /* entry index */
  44         uint32_t addr[4];               /* next hop IP or IPv6 address */
  45         in_addr_t in_addr;
  46         struct adapter *sc;             /* associated adapter */
  47         uint16_t smt_idx;               /* SMT index */
  48         uint16_t vlan;                  /* VLAN TCI (id: 0-11, prio: 13-15) */
  49         int ifindex;                    /* interface index */
  50         struct l2t_entry *first;        /* start of hash chain */
  51         struct l2t_entry *next;         /* next l2t_entry on chain */
  52         mblk_t *arpq_head;      /* list of mblks awaiting resolution */
  53         mblk_t *arpq_tail;
  54         kmutex_t lock;
  55         volatile uint_t refcnt;         /* entry reference count */
  56         uint16_t hash;                  /* hash bucket the entry is on */
  57         uint8_t v6;                     /* whether entry is for IPv6 */
  58         uint8_t lport;                  /* associated offload logical port */
  59         uint8_t dmac[ETHERADDRL];       /* next hop's MAC address */
  60 };
  61
  62 int t4_free_l2t(struct l2t_data *d);
  63 void t4_l2t_release(struct l2t_entry *e);
  64 int  do_l2t_write_rpl(struct sge_iq *iq, const struct rss_header *rss,
  65     mblk_t *m);
  66
  67 #ifdef TCP_OFFLOAD_ENABLE
  68 struct l2t_entry *t4_l2t_get(struct port_info *pi, conn_t *connp);
  69 int t4_l2t_send(struct adapter *sc, mblk_t *m, struct l2t_entry *e);
  70 void t4_l2t_update(ip2mac_t *ip2macp, void* arg);
  71 #endif
  72
  73 #endif /* __CXGBE_T4L2T_H */