2 Copyright (c) 1999-2001, Intel Corporation
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
9 1. Redistributions of source code must retain the above copyright notice,
10 this list of conditions and the following disclaimer.
12 2. Redistributions in binary form must reproduce the above copyright notice,
13 this list of conditions and the following disclaimer in the documentation
14 and/or other materials provided with the distribution.
16 3. Neither the name of Intel Corporation nor the names of its contributors
17 may be used to endorse or promote products derived from this software
18 without specific prior written permission.
20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
23 DISCLAIMED. IN NO EVENT SHALL CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
24 INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
25 LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
26 PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
27 LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
28 NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
29 EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 * Author: Patrick J Luhmann (PJL)
39 * This file contains the loadable micro code arrays to implement
40 * receive bundling on the D101 A-step, D101 B-step, D101M (B-step
41 * only), D101S, D102 B-step, D102 C-step and D102 E-step.
43 * Each controller has its own specific micro code array. The array
44 * for one controller is totally incompatible with any other
45 * controller, and if used will most likely cause the controller to
46 * lock up and stop responding to the driver. Each micro code array
47 * has its own parameter offsets (described below), and they each have
48 * their own version number (which should not be confused with the
49 * version of the rcvbundl.h file given above).
52 /* Note: Minor formatting changes made for illumos. */
57 * All CPUSaver parameters are 16-bit literals that are part of a
58 * "move immediate value" instruction. By changing the value of the
59 * literal in the instruction before the code is loaded, the driver
60 * can change algorithm.
62 * CPUSAVER_DWORD - This is the location of the instruction that loads
63 * the dead-man timer with its inital value. By writing a 16-bit
64 * value to the low word of this instruction, the driver can change
65 * the timer value. The current default is either x600 or x800;
66 * experiments show that the value probably should stay within the
67 * range of x200 - x1000.
69 * CPUSAVER_BUNDLE_MAX_DWORD - This is the location of the instruction
70 * that sets the maximum number of frames that will be bundled. In
71 * some situations, such as the TCP windowing algorithm, it may be
72 * better to limit the growth of the bundle size than let it go as
73 * high as it can, because that could cause too much added latency.
74 * The default is six, because this is the number of packets in the
75 * default TCP window size. A value of 1 would make CPUSaver
76 * indicate an interrupt for every frame received. If you do not
77 * want to put a limit on the bundle size, set this value to xFFFF.
79 * CPUSAVER_MIN_SIZE_DWORD - This is the location of the instruction
80 * that contains a bit-mask describing the minimum size frame that
81 * will be bundled. The default masks the lower 7 bits, which
82 * means that any frame less than 128 bytes in length will not be
83 * bundled, but will instead immediately generate an interrupt.
84 * This does not affect the current bundle in any way. Any frame
85 * that is 128 bytes or large will be bundled normally. This
86 * feature is meant to provide immediate indication of ACK frames
87 * in a TCP environment. Customers were seeing poor performance
88 * when a machine with CPUSaver enabled was sending but not
89 * receiving. The delay introduced when the ACKs were received was
90 * enough to reduce total throughput, because the sender would sit
91 * idle until the ACK was finally seen.
93 * The current default is 0xFF80, which masks out the lower 7 bits.
94 * This means that any frame which is x7F (127) bytes or smaller
95 * will cause an immediate interrupt. Because this value must be a
96 * bit mask, there are only a few valid values that can be used.
97 * To turn this feature off, the driver can write the value xFFFF
98 * to the lower word of this instruction (in the same way that the
99 * other parameters are used). Likewise, a value of 0xF800 (2047)
100 * would cause an interrupt to be generated for every frame,
101 * because all standard Ethernet frames are <= 2047 bytes in
108 * CPUSaver micro code for the D101A
113 /* This value is the same for both A and B step of 558. */
114 #define D101_CPUSAVER_DWORD 72
116 #define D101_A_RCVBUNDLE_UCODE \
224 * CPUSaver micro code for the D101B
228 #define D101_B0_CPUSAVER_DWORD 72
230 #define D101_B0_RCVBUNDLE_UCODE \
338 * CPUSaver micro code for the D101M (B-step only)
343 /* Parameter values for the D101M B-step */
344 #define D101M_CPUSAVER_DWORD 78
345 #define D101M_CPUSAVER_BUNDLE_MAX_DWORD 65
346 #define D101M_CPUSAVER_MIN_SIZE_DWORD 126
348 #define D101M_B_RCVBUNDLE_UCODE \
488 * CPUSaver micro code for the D101S
493 /* Parameter values for the D101S */
494 #define D101S_CPUSAVER_DWORD 78
495 #define D101S_CPUSAVER_BUNDLE_MAX_DWORD 67
496 #define D101S_CPUSAVER_MIN_SIZE_DWORD 129
499 #define D101S_RCVBUNDLE_UCODE \
639 * CPUSaver micro code for the D102 B-step
645 * This version of CPUSaver is different from all others in a
646 * different way. It combines the CPUSaver algorithm with fixes for
647 * bugs in the B-step hardware (specifically, bugs with Inline
648 * Receive). Thus, when CPUSaver is disabled, this micro code image
649 * will still need to be loaded. Before this happens, the hit
650 * addresses for the CPUSaver algorithm must be set to 0x1FFFF. The
651 * hit addresses for CPUSaver are (starting with 0, and remember that.
654 /* Parameter values for the D102 B-step */
655 #define D102_B_CPUSAVER_DWORD 91
656 #define D102_B_CPUSAVER_BUNDLE_MAX_DWORD 115
657 #define D102_B_CPUSAVER_MIN_SIZE_DWORD 70
659 #define D102_B_RCVBUNDLE_UCODE \
799 * Micro code for the D102 C-step
802 /* Parameter values for the D102 C-step */
803 #define D102_C_CPUSAVER_DWORD 46
804 #define D102_C_CPUSAVER_BUNDLE_MAX_DWORD 54
805 #define D102_C_CPUSAVER_MIN_SIZE_DWORD 133 /* not implemented */
807 #define D102_C_RCVBUNDLE_UCODE \
946 * Micro code for the D102 E-step
949 /* Parameter values for the D102 E-step */
950 #define D102_E_CPUSAVER_DWORD 42
951 #define D102_E_CPUSAVER_BUNDLE_MAX_DWORD 54
952 #define D102_E_CPUSAVER_MIN_SIZE_DWORD 46
954 #define D102_E_RCVBUNDLE_UCODE \