usr/src/uts/common/io/mxfe/mxfeimpl.h

   1 /*
   2  * Solaris driver for ethernet cards based on the Macronix 98715
   3  *
   4  * Copyright (c) 2007 by Garrett D'Amore <garrett@damore.org>.
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions and the following disclaimer.
  12  * 2. Redistributions in binary form must reproduce the above copyright
  13  *    notice, this list of conditions and the following disclaimer in the
  14  *    documentation and/or other materials provided with the distribution.
  15  * 3. Neither the name of the author nor the names of any co-contributors
  16  *    may be used to endorse or promote products derived from this software
  17  *    without specific prior written permission.
  18  *
  19  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDER AND CONTRIBUTORS ``AS IS''
  20  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  21  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  22  * ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
  23  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  29  * POSSIBILITY OF SUCH DAMAGE.
  30  */
  31 /*
  32  * Copyright 2008 Sun Microsystems, Inc.  All rights reserved.
  33  * Use is subject to license terms.
  34  */
  35
  36 #ifndef _MXFEIMPL_H
  37 #define _MXFEIMPL_H
  38
  39 /*
  40  * This entire file is private to the MXFE driver.
  41  */
  42
  43 #ifdef  _KERNEL
  44
  45 #include        <sys/mac_provider.h>
  46
  47 /*
  48  * Compile time tunables.
  49  */
  50 #define MXFE_TXRING     128     /* number of xmt buffers */
  51 #define MXFE_RXRING     256     /* number of rcv buffers */
  52 #define MXFE_TXRECLAIM  32      /* when to reclaim tx buffers (txavail) */
  53 #define MXFE_TXRESCHED  120     /* when to resched (txavail) */
  54 #define MXFE_LINKTIMER  5000    /* how often we check link state (msec) */
  55 #define MXFE_HEADROOM   34      /* headroom in packet (should be 2 modulo 4) */
  56
  57 /*
  58  * Constants, do not change.  The bufsize is setup to make sure it comes
  59  * in at a whole number of cache lines, even for 32-long-word aligned
  60  * caches.
  61  */
  62 #define MXFE_BUFSZ      (1664)          /* big enough for a vlan frame */
  63 #define MXFE_SETUP_LEN  192             /* size of a setup frame */
  64
  65 typedef struct mxfe mxfe_t;
  66 typedef struct mxfe_card mxfe_card_t;
  67 typedef struct mxfe_rxbuf mxfe_rxbuf_t;
  68 typedef struct mxfe_txbuf mxfe_txbuf_t;
  69 typedef struct mxfe_desc mxfe_desc_t;
  70
  71 struct mxfe_card {
  72         uint16_t        card_venid;     /* PCI vendor id */
  73         uint16_t        card_devid;     /* PCI device id */
  74         uint16_t        card_revid;     /* PCI revision id */
  75         uint16_t        card_revmask;
  76         char            *card_cardname; /* Description of the card */
  77         unsigned        card_model;     /* Card specific flags */
  78 };
  79
  80 /*
  81  * Device instance structure, one per PCI card.
  82  */
  83 struct mxfe {
  84         dev_info_t              *mxfe_dip;
  85         mac_handle_t            mxfe_mh;
  86         mxfe_card_t             *mxfe_cardp;
  87         ushort_t                mxfe_cachesize;
  88         ushort_t                mxfe_sromwidth;
  89         int                     mxfe_flags;
  90         kmutex_t                mxfe_xmtlock;
  91         kmutex_t                mxfe_intrlock;
  92         ddi_iblock_cookie_t     mxfe_icookie;
  93
  94         /*
  95          * Register access.
  96          */
  97         uint32_t                *mxfe_regs;
  98         ddi_acc_handle_t        mxfe_regshandle;
  99
 100         /*
 101          * Receive descriptors.
 102          */
 103         int                     mxfe_rxhead;
 104         struct mxfe_desc        *mxfe_rxdescp;
 105         ddi_dma_handle_t        mxfe_rxdesc_dmah;
 106         ddi_acc_handle_t        mxfe_rxdesc_acch;
 107         uint32_t                mxfe_rxdesc_paddr;
 108         struct mxfe_rxbuf       **mxfe_rxbufs;
 109
 110         /*
 111          * Transmit descriptors.
 112          */
 113         int                     mxfe_txreclaim;
 114         int                     mxfe_txsend;
 115         int                     mxfe_txavail;
 116         struct mxfe_desc        *mxfe_txdescp;
 117         ddi_dma_handle_t        mxfe_txdesc_dmah;
 118         ddi_acc_handle_t        mxfe_txdesc_acch;
 119         uint32_t                mxfe_txdesc_paddr;
 120         struct mxfe_txbuf       **mxfe_txbufs;
 121         hrtime_t                mxfe_txstall_time;
 122         boolean_t               mxfe_wantw;
 123
 124         /*
 125          * Address management.
 126          */
 127         uchar_t                 mxfe_curraddr[ETHERADDRL];
 128         boolean_t               mxfe_promisc;
 129
 130         /*
 131          * Link state.
 132          */
 133         int                     mxfe_nwaystate;
 134         uint64_t                mxfe_lastifspeed;
 135         link_duplex_t           mxfe_lastduplex;
 136         link_state_t            mxfe_lastlinkup;
 137         link_state_t            mxfe_linkup;
 138         link_duplex_t           mxfe_duplex;
 139         uint64_t                mxfe_ifspeed;
 140         boolean_t               mxfe_resetting; /* no link warning */
 141
 142         /*
 143          * Transceiver stuff.
 144          */
 145         int                     mxfe_phyaddr;
 146         int                     mxfe_phyid;
 147         int                     mxfe_phyinuse;
 148         uint8_t                 mxfe_adv_aneg;
 149         uint8_t                 mxfe_adv_100T4;
 150         uint8_t                 mxfe_adv_100fdx;
 151         uint8_t                 mxfe_adv_100hdx;
 152         uint8_t                 mxfe_adv_10fdx;
 153         uint8_t                 mxfe_adv_10hdx;
 154         uint8_t                 mxfe_cap_aneg;
 155         uint8_t                 mxfe_cap_100T4;
 156         uint8_t                 mxfe_cap_100fdx;
 157         uint8_t                 mxfe_cap_100hdx;
 158         uint8_t                 mxfe_cap_10fdx;
 159         uint8_t                 mxfe_cap_10hdx;
 160         int                     mxfe_forcephy;
 161         uint16_t                mxfe_bmsr;
 162         uint16_t                mxfe_anlpar;
 163         uint16_t                mxfe_aner;
 164
 165         /*
 166          * Kstats.
 167          */
 168         kstat_t                 *mxfe_intrstat;
 169         uint64_t                mxfe_ipackets;
 170         uint64_t                mxfe_opackets;
 171         uint64_t                mxfe_rbytes;
 172         uint64_t                mxfe_obytes;
 173         uint64_t                mxfe_brdcstrcv;
 174         uint64_t                mxfe_multircv;
 175         uint64_t                mxfe_brdcstxmt;
 176         uint64_t                mxfe_multixmt;
 177
 178         unsigned                mxfe_norcvbuf;
 179         unsigned                mxfe_noxmtbuf;
 180         unsigned                mxfe_errrcv;
 181         unsigned                mxfe_errxmt;
 182         unsigned                mxfe_missed;
 183         unsigned                mxfe_underflow;
 184         unsigned                mxfe_overflow;
 185         unsigned                mxfe_align_errors;
 186         unsigned                mxfe_fcs_errors;
 187         unsigned                mxfe_carrier_errors;
 188         unsigned                mxfe_collisions;
 189         unsigned                mxfe_ex_collisions;
 190         unsigned                mxfe_tx_late_collisions;
 191         unsigned                mxfe_defer_xmts;
 192         unsigned                mxfe_first_collisions;
 193         unsigned                mxfe_multi_collisions;
 194         unsigned                mxfe_sqe_errors;
 195         unsigned                mxfe_macxmt_errors;
 196         unsigned                mxfe_macrcv_errors;
 197         unsigned                mxfe_toolong_errors;
 198         unsigned                mxfe_runt;
 199         unsigned                mxfe_jabber;
 200 };
 201
 202 struct mxfe_rxbuf {
 203         caddr_t                 rxb_buf;
 204         ddi_dma_handle_t        rxb_dmah;
 205         ddi_acc_handle_t        rxb_acch;
 206         uint32_t                rxb_paddr;
 207 };
 208
 209 struct mxfe_txbuf {
 210         /* bcopy version of tx */
 211         caddr_t                 txb_buf;
 212         uint32_t                txb_paddr;
 213         ddi_dma_handle_t        txb_dmah;
 214         ddi_acc_handle_t        txb_acch;
 215 };
 216
 217 /*
 218  * Descriptor.  We use rings rather than chains.
 219  */
 220 struct mxfe_desc {
 221         unsigned        desc_status;
 222         unsigned        desc_control;
 223         unsigned        desc_buffer1;
 224         unsigned        desc_buffer2;
 225 };
 226
 227 #define PUTTXDESC(mxfep, member, val)   \
 228         ddi_put32(mxfep->mxfe_txdesc_acch, &member, val)
 229
 230 #define PUTRXDESC(mxfep, member, val)   \
 231         ddi_put32(mxfep->mxfe_rxdesc_acch, &member, val)
 232
 233 #define GETTXDESC(mxfep, member)        \
 234         ddi_get32(mxfep->mxfe_txdesc_acch, &member)
 235
 236 #define GETRXDESC(mxfep, member)        \
 237         ddi_get32(mxfep->mxfe_rxdesc_acch, &member)
 238
 239 /*
 240  * Receive descriptor fields.
 241  */
 242 #define RXSTAT_OWN              0x80000000U     /* ownership */
 243 #define RXSTAT_RXLEN            0x3FFF0000U     /* frame length, incl. crc */
 244 #define RXSTAT_RXERR            0x00008000U     /* error summary */
 245 #define RXSTAT_DESCERR          0x00004000U     /* descriptor error */
 246 #define RXSTAT_RXTYPE           0x00003000U     /* data type */
 247 #define RXSTAT_RUNT             0x00000800U     /* runt frame */
 248 #define RXSTAT_GROUP            0x00000400U     /* multicast/brdcast frame */
 249 #define RXSTAT_FIRST            0x00000200U     /* first descriptor */
 250 #define RXSTAT_LAST             0x00000100U     /* last descriptor */
 251 #define RXSTAT_TOOLONG          0x00000080U     /* frame too long */
 252 #define RXSTAT_COLLSEEN         0x00000040U     /* late collision seen */
 253 #define RXSTAT_FRTYPE           0x00000020U     /* frame type */
 254 #define RXSTAT_WATCHDOG         0x00000010U     /* receive watchdog */
 255 #define RXSTAT_DRIBBLE          0x00000004U     /* dribbling bit */
 256 #define RXSTAT_CRCERR           0x00000002U     /* crc error */
 257 #define RXSTAT_OFLOW            0x00000001U     /* fifo overflow */
 258 #define RXSTAT_ERRS             (RXSTAT_DESCERR | RXSTAT_RUNT | \
 259                                 RXSTAT_COLLSEEN | RXSTAT_DRIBBLE | \
 260                                 RXSTAT_CRCERR | RXSTAT_OFLOW)
 261 #define RXLENGTH(x)             ((x & RXSTAT_RXLEN) >> 16)
 262
 263 #define RXCTL_ENDRING           0x02000000U     /* end of ring */
 264 #define RXCTL_CHAIN             0x01000000U     /* chained descriptors */
 265 #define RXCTL_BUFLEN2           0x003FF800U     /* buffer 2 length */
 266 #define RXCTL_BUFLEN1           0x000007FFU     /* buffer 1 length */
 267
 268 /*
 269  * Transmit descriptor fields.
 270  */
 271 #define TXSTAT_OWN              0x80000000U     /* ownership */
 272 #define TXSTAT_URCNT            0x00C00000U     /* underrun count */
 273 #define TXSTAT_TXERR            0x00008000U     /* error summary */
 274 #define TXSTAT_JABBER           0x00004000U     /* jabber timeout */
 275 #define TXSTAT_CARRLOST         0x00000800U     /* lost carrier */
 276 #define TXSTAT_NOCARR           0x00000400U     /* no carrier */
 277 #define TXSTAT_LATECOL          0x00000200U     /* late collision */
 278 #define TXSTAT_EXCOLL           0x00000100U     /* excessive collisions */
 279 #define TXSTAT_SQE              0x00000080U     /* heartbeat failure */
 280 #define TXSTAT_COLLCNT          0x00000078U     /* collision count */
 281 #define TXSTAT_UFLOW            0x00000002U     /* underflow */
 282 #define TXSTAT_DEFER            0x00000001U     /* deferred */
 283 #define TXCOLLCNT(x)            ((x & TXSTAT_COLLCNT) >> 3)
 284 #define TXUFLOWCNT(x)           ((x & TXSTAT_URCNT) >> 22)
 285
 286 #define TXCTL_INTCMPLTE         0x80000000U     /* interrupt completed */
 287 #define TXCTL_LAST              0x40000000U     /* last descriptor */
 288 #define TXCTL_FIRST             0x20000000U     /* first descriptor */
 289 #define TXCTL_NOCRC             0x04000000U     /* disable crc */
 290 #define TXCTL_SETUP             0x08000000U     /* setup frame */
 291 #define TXCTL_ENDRING           0x02000000U     /* end of ring */
 292 #define TXCTL_CHAIN             0x01000000U     /* chained descriptors */
 293 #define TXCTL_NOPAD             0x00800000U     /* disable padding */
 294 #define TXCTL_HASHPERF          0x00400000U     /* hash perfect mode */
 295 #define TXCTL_BUFLEN2           0x003FF800U     /* buffer length 2 */
 296 #define TXCTL_BUFLEN1           0x000007FFU     /* buffer length 1 */
 297
 298 /*
 299  * Interface flags.
 300  */
 301 #define MXFE_RUNNING    0x1     /* chip is initialized */
 302 #define MXFE_SUSPENDED  0x2     /* interface is suspended */
 303 #define MXFE_SYMBOL     0x8     /* use symbol mode */
 304
 305 /*
 306  * Link flags...
 307  */
 308 #define MXFE_NOLINK     0x0     /* initial link state, no timer */
 309 #define MXFE_NWAYCHECK  0x2     /* checking for NWay support */
 310 #define MXFE_NWAYRENEG  0x3     /* renegotiating NWay mode */
 311 #define MXFE_GOODLINK   0x4     /* detected link is good */
 312
 313 /*
 314  * Card models.
 315  */
 316 #define MXFE_MODEL(mxfep)       ((mxfep)->mxfe_cardp->card_model)
 317 #define MXFE_98715      0x1
 318 #define MXFE_98715A     0x2
 319 #define MXFE_98715AEC   0x3
 320 #define MXFE_98715B     0x4
 321 #define MXFE_98725      0x5
 322 #define MXFE_98713      0x6
 323 #define MXFE_98713A     0x7
 324 #define MXFE_PNICII     0x8
 325
 326 /*
 327  * Register definitions located in mxfe.h exported header file.
 328  */
 329
 330 /*
 331  * Macros to simplify hardware access.  Note that the reg/4 is used to
 332  * help with pointer arithmetic.
 333  */
 334 #define GETCSR(mxfep, reg)      \
 335         ddi_get32(mxfep->mxfe_regshandle, mxfep->mxfe_regs + (reg/4))
 336
 337 #define PUTCSR(mxfep, reg, val) \
 338         ddi_put32(mxfep->mxfe_regshandle, mxfep->mxfe_regs + (reg/4), val)
 339
 340 #define SETBIT(mxfep, reg, val) \
 341         PUTCSR(mxfep, reg, GETCSR(mxfep, reg) | (val))
 342
 343 #define CLRBIT(mxfep, reg, val) \
 344         PUTCSR(mxfep, reg, GETCSR(mxfep, reg) & ~(val))
 345
 346 #define SYNCTXDESC(mxfep, index, who)   \
 347         (void) ddi_dma_sync(mxfep->mxfe_txdesc_dmah, \
 348             (index * sizeof (mxfe_desc_t)), sizeof (mxfe_desc_t), who)
 349
 350 #define SYNCTXBUF(txb, len, who)        \
 351         (void) (ddi_dma_sync(txb->txb_dmah, 0, len, who))
 352
 353 #define SYNCRXDESC(mxfep, index, who)   \
 354         (void) ddi_dma_sync(mxfep->mxfe_rxdesc_dmah, \
 355             (index * sizeof (mxfe_desc_t)), sizeof (mxfe_desc_t), who)
 356
 357 #define SYNCRXBUF(rxb, len, who)        \
 358         (void) (ddi_dma_sync(rxb->rxb_dmah, 0, len, who))
 359
 360 /*
 361  * Debugging flags.
 362  */
 363 #define DWARN   0x0001
 364 #define DINTR   0x0002
 365 #define DWSRV   0x0004
 366 #define DMACID  0x0008
 367 #define DDLPI   0x0010
 368 #define DPHY    0x0020
 369 #define DPCI    0x0040
 370 #define DCHATTY 0x0080
 371 #define DDMA    0x0100
 372 #define DLINK   0x0200
 373 #define DSROM   0x0400
 374 #define DRECV   0x0800
 375 #define DXMIT   0x1000
 376
 377 #ifdef  DEBUG
 378 #define DBG(lvl, ...)   mxfe_dprintf(mxfep, __func__, lvl, __VA_ARGS__);
 379 #else
 380 #define DBG(lvl, ...)
 381 #endif
 382
 383 #endif  /* _KERNEL */
 384
 385 #endif  /* _MXFEIMPL_H */