usr/src/man/man3rsm/Makefile

   1 #
   2 # This file and its contents are supplied under the terms of the
   3 # Common Development and Distribution License ("CDDL"), version 1.0.
   4 # You may only use this file in accordance with the terms of version
   5 # 1.0 of the CDDL.
   6 #
   7 # A full copy of the text of the CDDL should have accompanied this
   8 # source.  A copy of the CDDL is also available via the Internet
   9 # at http://www.illumos.org/license/CDDL.
  10 #
  11
  12 #
  13 # Copyright 2011, Richard Lowe
  14 # Copyright 2013 Nexenta Systems, Inc.  All rights reserved.
  15 #
  16
  17 include         $(SRC)/Makefile.master
  18
  19 MANSECT=        3rsm
  20
  21 MANFILES=       rsm_create_localmemory_handle.3rsm      \
  22                 rsm_get_controller.3rsm                 \
  23                 rsm_get_interconnect_topology.3rsm      \
  24                 rsm_get_segmentid_range.3rsm            \
  25                 rsm_intr_signal_post.3rsm               \
  26                 rsm_intr_signal_wait_pollfd.3rsm        \
  27                 rsm_memseg_export_create.3rsm           \
  28                 rsm_memseg_export_publish.3rsm          \
  29                 rsm_memseg_get_pollfd.3rsm              \
  30                 rsm_memseg_import_connect.3rsm          \
  31                 rsm_memseg_import_get.3rsm              \
  32                 rsm_memseg_import_init_barrier.3rsm     \
  33                 rsm_memseg_import_map.3rsm              \
  34                 rsm_memseg_import_open_barrier.3rsm     \
  35                 rsm_memseg_import_put.3rsm              \
  36                 rsm_memseg_import_putv.3rsm             \
  37                 rsm_memseg_import_set_mode.3rsm
  38
  39 MANLINKS=       rsm_free_interconnect_topology.3rsm     \
  40                 rsm_free_localmemory_handle.3rsm        \
  41                 rsm_get_controller_attr.3rsm            \
  42                 rsm_intr_signal_wait.3rsm               \
  43                 rsm_memseg_export_destroy.3rsm          \
  44                 rsm_memseg_export_rebind.3rsm           \
  45                 rsm_memseg_export_republish.3rsm        \
  46                 rsm_memseg_export_unpublish.3rsm        \
  47                 rsm_memseg_import_close_barrier.3rsm    \
  48                 rsm_memseg_import_destroy_barrier.3rsm  \
  49                 rsm_memseg_import_disconnect.3rsm       \
  50                 rsm_memseg_import_get16.3rsm            \
  51                 rsm_memseg_import_get32.3rsm            \
  52                 rsm_memseg_import_get64.3rsm            \
  53                 rsm_memseg_import_get8.3rsm             \
  54                 rsm_memseg_import_get_mode.3rsm         \
  55                 rsm_memseg_import_getv.3rsm             \
  56                 rsm_memseg_import_order_barrier.3rsm    \
  57                 rsm_memseg_import_put16.3rsm            \
  58                 rsm_memseg_import_put32.3rsm            \
  59                 rsm_memseg_import_put64.3rsm            \
  60                 rsm_memseg_import_put8.3rsm             \
  61                 rsm_memseg_import_unmap.3rsm            \
  62                 rsm_memseg_release_pollfd.3rsm          \
  63                 rsm_release_controller.3rsm
  64
  65 rsm_free_localmemory_handle.3rsm        := LINKSRC = rsm_create_localmemory_handle.3rsm
  66
  67 rsm_get_controller_attr.3rsm            := LINKSRC = rsm_get_controller.3rsm
  68 rsm_release_controller.3rsm             := LINKSRC = rsm_get_controller.3rsm
  69
  70 rsm_free_interconnect_topology.3rsm     := LINKSRC = rsm_get_interconnect_topology.3rsm
  71
  72 rsm_intr_signal_wait.3rsm               := LINKSRC = rsm_intr_signal_post.3rsm
  73
  74 rsm_memseg_export_destroy.3rsm          := LINKSRC = rsm_memseg_export_create.3rsm
  75 rsm_memseg_export_rebind.3rsm           := LINKSRC = rsm_memseg_export_create.3rsm
  76
  77 rsm_memseg_export_republish.3rsm        := LINKSRC = rsm_memseg_export_publish.3rsm
  78 rsm_memseg_export_unpublish.3rsm        := LINKSRC = rsm_memseg_export_publish.3rsm
  79
  80 rsm_memseg_release_pollfd.3rsm          := LINKSRC = rsm_memseg_get_pollfd.3rsm
  81
  82 rsm_memseg_import_disconnect.3rsm       := LINKSRC = rsm_memseg_import_connect.3rsm
  83
  84 rsm_memseg_import_get16.3rsm            := LINKSRC = rsm_memseg_import_get.3rsm
  85 rsm_memseg_import_get32.3rsm            := LINKSRC = rsm_memseg_import_get.3rsm
  86 rsm_memseg_import_get64.3rsm            := LINKSRC = rsm_memseg_import_get.3rsm
  87 rsm_memseg_import_get8.3rsm             := LINKSRC = rsm_memseg_import_get.3rsm
  88
  89 rsm_memseg_import_destroy_barrier.3rsm  := LINKSRC = rsm_memseg_import_init_barrier.3rsm
  90
  91 rsm_memseg_import_unmap.3rsm            := LINKSRC = rsm_memseg_import_map.3rsm
  92
  93 rsm_memseg_import_close_barrier.3rsm    := LINKSRC = rsm_memseg_import_open_barrier.3rsm
  94 rsm_memseg_import_order_barrier.3rsm    := LINKSRC = rsm_memseg_import_open_barrier.3rsm
  95
  96 rsm_memseg_import_put16.3rsm            := LINKSRC = rsm_memseg_import_put.3rsm
  97 rsm_memseg_import_put32.3rsm            := LINKSRC = rsm_memseg_import_put.3rsm
  98 rsm_memseg_import_put64.3rsm            := LINKSRC = rsm_memseg_import_put.3rsm
  99 rsm_memseg_import_put8.3rsm             := LINKSRC = rsm_memseg_import_put.3rsm
 100
 101 rsm_memseg_import_getv.3rsm             := LINKSRC = rsm_memseg_import_putv.3rsm
 102
 103 rsm_memseg_import_get_mode.3rsm         := LINKSRC = rsm_memseg_import_set_mode.3rsm
 104
 105 .KEEP_STATE:
 106
 107 include         $(SRC)/man/Makefile.man
 108
 109 install:        $(ROOTMANFILES) $(ROOTMANLINKS)