usr/src/uts/sun4u/sys/smc_commands.h

   1 /*
   2  * CDDL HEADER START
   3  *
   4  * The contents of this file are subject to the terms of the
   5  * Common Development and Distribution License, Version 1.0 only
   6  * (the "License").  You may not use this file except in compliance
   7  * with the License.
   8  *
   9  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
  10  * or http://www.opensolaris.org/os/licensing.
  11  * See the License for the specific language governing permissions
  12  * and limitations under the License.
  13  *
  14  * When distributing Covered Code, include this CDDL HEADER in each
  15  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
  16  * If applicable, add the following below this CDDL HEADER, with the
  17  * fields enclosed by brackets "[]" replaced with your own identifying
  18  * information: Portions Copyright [yyyy] [name of copyright owner]
  19  *
  20  * CDDL HEADER END
  21  */
  22 /*
  23  * Copyright 2004 Sun Microsystems, Inc.  All rights reserved.
  24  * Use is subject to license terms.
  25  */
  26
  27 #ifndef _SYS_SMC_COMMANDS_H
  28 #define _SYS_SMC_COMMANDS_H
  29
  30 #pragma ident   "%Z%%M% %I%     %E% SMI"
  31
  32 #ifdef  __cplusplus
  33 extern "C" {
  34 #endif
  35
  36 /* Address of BMC on IPMB */
  37 #define BMC_IPMB_ADDR   0x20
  38 #define SMC_CPCI_SLOT0_ADDR     0xB0
  39 #define SMC_CPCI_SLOT_ADDR(X)   (SMC_CPCI_SLOT0_ADDR + \
  40                 2 * ((X) - 1))
  41
  42 typedef struct ctsmc_code_ent {
  43         uint8_t code;
  44         char    *name;
  45 } ctsmc_code_ent_t;
  46
  47 /*
  48  * Definition of Network Function Codes
  49  */
  50 typedef enum {
  51         SMC_NETFN_CHASSIS_REQ = 0x0,
  52         SMC_NETFN_CHASSIS_RSP = 0x1,
  53         SMC_NETFN_BRIDGE_REQ = 0x2,
  54         SMC_NETFN_BRIDGE_RSP = 0x3,
  55         SMC_NETFN_SENSOR_REQ = 0x4,
  56         SMC_NETFN_SENSOR_RSP = 0x5,
  57         SMC_NETFN_APP_REQ = 0x6,
  58         SMC_NETFN_APP_RSP = 0x7,
  59         SMC_NETFN_FIRMWARE_REQ = 0x8,
  60         SMC_NETFN_FIRMWARE_RSP = 0x9,
  61         SMC_NETFN_STORAGE_REQ = 0xA,
  62         SMC_NETFN_STORAGE_RSP = 0xB
  63 } smc_netfn_t;
  64
  65 /*
  66  * Definition of Completion codes
  67  */
  68 typedef enum {
  69         SMC_CC_SUCCESS   = 0x00,
  70         SMC_CC_NODE_BUSY = 0xC0,
  71         SMC_CC_INVALID_COMMAND = 0xC1,
  72         SMC_CC_INVALID_COMMAND_ON_LUN = 0xC2,
  73         SMC_CC_TIMEOUT = 0xC3,
  74         SMC_CC_RESOURCE_NOTAVAIL = 0xC4,
  75         SMC_CC_RESERVATION = 0xC5,
  76         SMC_CC_REQ_TRUNC = 0xC6,
  77         SMC_CC_REQLEN_NOTVALID = 0xC7,
  78         SMC_CC_REQLEN_EXCEED = 0xC8,
  79         SMC_CC_PARAM_OUT_OF_RANGE = 0xC9,
  80         SMC_CC_REQUEST_BYTES_FAILED = 0xCA,
  81         SMC_CC_NOT_PRESENT = 0xCB,
  82         SMC_CC_INVALID_FIELD = 0xCC,
  83         SMC_CC_ILLEGAL_COMMAND = 0xCD,
  84         SMC_CC_RESPONSE_FAILED = 0xCE,
  85         SMC_CC_DUPLICATE_REQUEST = 0xCF,
  86         SMC_CC_SDR_UPDATE_MODE = 0xD0,
  87         SMC_CC_FIRMWARE_UPDATE_MODE = 0xD1,
  88         SMC_CC_INIT_IN_PROGRESS = 0xD2,
  89         SMC_CC_UNSPECIFIED_ERROR = 0xFF
  90 } smc_cc_t;
  91
  92 typedef enum {
  93         SMC_BMC_LUN,
  94         SMC_OEM1_LUN,
  95         SMC_SMS_LUN,
  96         SMC_OEM2_LUN
  97 } smc_lun_t;
  98
  99 /*
 100  * App command codes for commands/event notifications etc.
 101  */
 102 typedef enum {
 103         SMC_GET_DEVICE_ID = 0x01,
 104         SMC_COLD_RESET = 0x02,
 105         SMC_WARM_RESET = 0x03,
 106         SMC_GET_SELFTEST_RESULTS = 0x04,
 107         SMC_MANUFACTURING_TEST_ON = 0x05,
 108         SMC_SET_ACPI_POWER_STATE = 0x06,
 109         SMC_GET_ACPI_POWER_STATE = 0x07,
 110         SMC_GET_DEVICE_GUID = 0x08,
 111         SMC_RESET_WATCHDOG_TIMER = 0x22,
 112         SMC_EXPIRED_WATCHDOG_NOTIF = 0x23,      /* Sent by driver */
 113         SMC_SET_WATCHDOG_TIMER = 0x24,
 114         SMC_GET_WATCHDOG_TIMER = 0x25,
 115         SMC_SET_GLOBAL_ENABLES = 0x2E,
 116         SMC_GET_GLOBAL_ENABLES = 0x2F,
 117         SMC_CLEAR_MESSAGE_FLAGS = 0x30,
 118         SMC_GET_MESSAGE_FLAGS = 0x31,
 119         SMC_ENABLE_MESSAGE_CHANNEL_RECEIVE = 0x32,
 120         SMC_GET_MESSAGE = 0x33,
 121         SMC_SEND_MESSAGE = 0x34,
 122         SMC_READ_EVENT_MSG_BUFFER = 0x35,
 123         SMC_SEND_TO_EVENT_MSG_BUFFER = 0x36,    /* Changed from IPMI */
 124         SMC_MASTER_WR_RD_I2C = 0x52,
 125         SMC_GET_GEOGRAPHICAL_ADDRESS = 0x55,
 126         SMC_GET_BACKPLANE_TYPE = 0x57,
 127         SMC_SELECT_MEMORY_DEVICE = 0x60,
 128         SMC_READ_SELECTED_MEMORY_DEVICE = 0x61,
 129         SMC_READ_MEMORY_DEVICE = 0x62,
 130         SMC_WRITE_SELECTED_MEMORY_DEVICE = 0x63,
 131         SMC_WRITE_MEMORY_DEVICE = 0x64,
 132         SMC_ERASE_SELECTED_MEMORY_DEVICE = 0x65,
 133         SMC_LOCK_UNLOCK_SELECTED_MEMORY = 0x66,
 134         SMC_COMPUTE_CRC16_OF_SELECTED_MEMORY_DEVICE = 0x67,
 135         SMC_COMPUTE_CRC16_OF_MEMORY_DEVICE = 0x68,
 136         SMC_FILL_MEMORY_DEVICE = 0x6a,
 137         SMC_QUERY_FIRMWARE_VERSION = 0x6f,
 138         SMC_RESET_DEVICE = 0x70,
 139         SMC_GET_ROLE_INFO = 0x71,
 140         SMC_GET_FLASH_AND_BOOT_VERSION = 0x72,
 141         SMC_GET_LOCAL_HA_SIGNAL_STATUS = 0x73,
 142         SMC_SELECT_HA_HOTSWAP_MODE = 0x80,
 143         SMC_GET_HA_HOTSWAP_SIGNAL_STATE = 0x81,
 144         SMC_SET_HA_HOTSWAP_SIGNAL_STATE = 0x82,
 145         SMC_NOTIFY_SMC_OF_HOST_HEALTH = 0x83,
 146         SMC_TURN_ON_OFF_BLUE_LED = 0x84,
 147         SMC_GET_EXECUTION_STATE = 0x85,
 148         SMC_GET_SMC_UPTIME = 0x86,
 149         SMC_ENUM_NOTIF = 0x87,
 150         SMC_IPMI_RESPONSE_NOTIF = 0x88,
 151         SMC_SET_INTERFACE_TIMEOUT = 0x89,
 152         SMC_GET_INTERFACE_TIMEOUT = 0x8A,
 153         SMC_SMC_LOCAL_EVENT_NOTIF = 0x8B,
 154         SMC_GET_DEVICE_TABLE_DATA = 0x8C,
 155         SMC_IPMI_MASTER_WR_RD_I2C = 0x90,
 156         SMC_GET_SMC_SELF_TEST_RESULT = 0xA0,
 157         SMC_READ_SMC_PLD_REGISTER = 0xA1,
 158         SMC_WRITE_SMC_PLD_REGISTER = 0xA2,
 159         SMC_SET_ROLE = 0xC0,
 160         SMC_SET_CPCI_INTMASK = 0xC1,
 161         SMC_GET_CPCI_INTMASK = 0xC2,
 162         SMC_EEPROM_WRITE = 0xC3,
 163         SMC_EEPROM_READ = 0xC4,
 164         SMC_SET_STATE = 0xDE,
 165         SMC_GET_STATE = 0xDF,
 166         SMC_SET_DHCP_CLIENT_ID = 0xE1,
 167         SMC_GET_DHCP_CLIENT_ID = 0xE2,
 168         SMC_DEV_SDR_REPOSITORY_RESERVE = 0xE3,
 169         SMC_FRU_INVENTORY_AREA_INFO_GET = 0xE4,
 170         SMC_SET_BANNER = 0xE5,
 171         SMC_GET_BANNER = 0xE6,
 172         SMC_SEND_ASYNC_SEL_CMD_TO_HOST = 0xE7,
 173         SMC_MASTER_WR_RD_I2C_2 = 0xE9,
 174         SMC_GET_BUFFER_BLOCK_ALLOC_TABLE = 0xEA,
 175         SMC_GET_BUFFER_ALLOC_TABLE = 0xEB,
 176         SMC_GET_SFRS = 0xEC,
 177         SMC_GET_PORT_VALUE = 0xED,
 178         SMC_GET_BUFFER_DATA = 0xEE,
 179         SMC_GET_PCB_DATA = 0xEF,
 180         SMC_GET_PCB_BLOCK_ALLOC_TABLE = 0xF0,
 181         SMC_GET_PCB_TABLE = 0xF1,
 182         SMC_DEVICE_SDR_INFO_GET = 0xF2,
 183         SMC_DEVICE_SDR_GET = 0xF3,
 184         SMC_SENSOR_EVENT_ENABLE_GET = 0xF4,
 185         SMC_SENSOR_EVENT_ENABLE_SET = 0xF5,
 186         SMC_GET_CONFIG_BLOCK = 0xF8,
 187         SMC_SET_CONFIG_BLOCK = 0xF9,
 188         SMC_SET_VOLTAGE = 0xFB,
 189         SMC_SENSOR_READING_GET = 0xFC,
 190         SMC_SENSOR_THRESHOLD_GET = 0xFD,
 191         SMC_SENSOR_THRESHOLD_SET = 0xFE,
 192         SMC_CND_OF_CMD_MARKER = 0xFF
 193 } smc_app_command_t;
 194
 195 typedef enum {
 196         SMC_GET_CHASSIS_STATUS = 0x01,
 197         SMC_CHASSIS_CONTROL = 0x02,
 198         SMC_GET_POH_COUNTER = 0x0F
 199 } smc_chassis_command_t;
 200
 201 typedef enum {
 202         SMC_SET_EVENT_RECEIVER = 0x00,
 203         SMC_GET_EVENT_RECEIVER = 0x01,
 204         SMC_PLATFORM_EVENT_MESSAGE = 0x02
 205 } smc_event_command_t;
 206
 207 typedef enum {
 208         SMC_GET_SEL_INFO = 0x40,
 209         SMC_GET_SEL_ALLOCATION_INFO = 0x41,
 210         SMC_RESERVE_SEL = 0x42,
 211         SMC_GET_SEL_ENTRY = 0x43,
 212         SMC_ADD_SEL_ENTRY = 0x44,
 213         SMC_PARTIAL_ADD_SEL_ENTRY = 0x45,
 214         SMC_DELETE_SEL_ENTRY = 0x46,
 215         SMC_CLEAR_SEL = 0x47,
 216         SMC_GET_SEL_TIME = 0x48,
 217         SMC_SET_SEL_TIME = 0x49
 218 } smc_sel_command_t;
 219
 220 typedef enum {
 221         SMC_GET_SDR_REPOSITORY_INFO = 0x20,
 222         SMC_GET_SDR_REPOSITORY_ALLOCATION_INFO = 0x21,
 223         SMC_RESERVE_SDR_REPOSITORY = 0x22,
 224         SMC_GET_SDR = 0x23,
 225         SMC_ADD_SDR = 0x24,
 226         SMC_PARTIAL_ADD_SDR = 0x25,
 227         SMC_DELETE_SDR = 0x26,
 228         SMC_CLEAR_SDR_REPOSITORY = 0x27,
 229         SMC_GET_SDR_REPOSITORY_TIME = 0x28,
 230         SMC_SET_SDR_REPOSITORY_TIME = 0x29,
 231         SMC_ENTER_SDR_REPOSITORY_UPDATE_MODE = 0x2A,
 232         SMC_EXIT_SDR_REPOSITORY_UPDATE_MODE = 0x2B,
 233         SMC_RUN_INITIALIZATION_AGENT = 0x2C
 234 } smc_sdr_repository_command_t;
 235
 236 typedef enum {
 237         SMC_GET_FRU_INVENTORY_AREA_INFO = 0x10,
 238         SMC_READ_FRU_INVENTORY_DATA = 0x11,
 239         SMC_WRITE_FRU_INVENTORY_DATA = 0x12
 240 } smc_fru_inventory_device_command_t;
 241
 242 typedef enum {
 243         SMC_GET_DEVICE_SDR_INFO = 0x20,
 244         SMC_GET_DEVICE_SDR = 0x21,
 245         SMC_RESERVE_DEVICE_SDR_REPOSITORY = 0x22,
 246         SMC_GET_SENSOR_READING_FACTORS = 0x23,
 247         SMC_SET_SENSOR_HYSTERESIS = 0x24,
 248         SMC_GET_SENSOR_HYSTERESIS = 0x25,
 249         SMC_SET_SENSOR_THRESHOLD = 0x26,
 250         SMC_GET_SENSOR_THRESHOLD = 0x27,
 251         SMC_SET_SENSOR_EVENT_ENABLE = 0x28,
 252         SMC_GET_SENSOR_EVENT_ENABLE = 0x29,
 253         SMC_REARM_SENSOR_EVENTS = 0x2A,
 254         SMC_GET_SENSOR_EVENT_STATUS = 0x2B,
 255         /* RESERVED */
 256         SMC_GET_SENSOR_READING = 0x2D,
 257         SMC_SET_SENSOR_TYPE = 0x2E,
 258         SMC_GET_SENSOR_TYPE = 0x2F
 259 } smc_sensor_device_command_t;
 260
 261 #ifdef  __cplusplus
 262 }
 263 #endif
 264
 265 #endif  /* _SYS_SMC_COMMANDS_H */