8354 sync regcomp(3C) with upstream (fix make catalog)
[unleashed/tickless.git] / usr / src / uts / sun4u / sys / todds1287.h
blobe4e1c01396f8d5e03c0ea09f02ddb9b6e65abf50
1 /*
2 * CDDL HEADER START
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License, Version 1.0 only
6 * (the "License"). You may not use this file except in compliance
7 * with the License.
9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10 * or http://www.opensolaris.org/os/licensing.
11 * See the License for the specific language governing permissions
12 * and limitations under the License.
14 * When distributing Covered Code, include this CDDL HEADER in each
15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16 * If applicable, add the following below this CDDL HEADER, with the
17 * fields enclosed by brackets "[]" replaced with your own identifying
18 * information: Portions Copyright [yyyy] [name of copyright owner]
20 * CDDL HEADER END
23 * Copyright (c) 1999-2001 by Sun Microsystems, Inc.
24 * All rights reserved.
27 #ifndef _TODDS1287_H
28 #define _TODDS1287_H
30 #pragma ident "%Z%%M% %I% %E% SMI"
32 #ifdef __cplusplus
33 extern "C" {
34 #endif
36 extern char *v_rtc_addr_reg;
37 extern volatile uint8_t *v_rtc_data_reg;
39 #ifdef DEBUG
40 #include <sys/promif.h>
41 #define DPRINTF if (ds1287_debug_flags) prom_printf
42 #else
43 #define DPRINTF
44 #endif /* DEBUG */
46 #define DS1287_ADDR_REG *(volatile uint8_t *)v_rtc_addr_reg
47 #define DS1287_DATA_REG *(volatile uint8_t *)v_rtc_data_reg
50 * Maximum number of clones
52 #define DS1287_MAX_CLONE 256
55 * Minor number is instance << 8 + clone minor from range 1-255; clone 0 is
56 * reserved for the "original".
58 #define DS1287_MINOR_TO_CLONE(minor) ((minor) & (DS1287_MAX_CLONE - 1))
60 struct ds1287 {
61 dev_info_t *dip; /* device info pointer */
62 kmutex_t ds1287_mutex; /* mutex lock */
63 uchar_t clones[DS1287_MAX_CLONE]; /* array of clones */
64 int monitor_on; /* clone monitoring the button event */
65 /* clone 0 is used to indicate no one */
66 /* is monitoring the button event */
67 pollhead_t pollhd; /* poll head struct */
68 int events; /* bit map of occured events */
69 int shutdown_pending; /* system shutdown in progress */
74 * Definitions for Real Time Clock driver (Dallas DS1287 chip).
78 * Common registers between Banks 0, 1, and 2.
80 #define RTC_SEC 0x0 /* Seconds */
81 #define RTC_ASEC 0x1 /* Seconds Alarm */
82 #define RTC_MIN 0x2 /* Minutes */
83 #define RTC_AMIN 0x3 /* Minutes Alarm */
84 #define RTC_HRS 0x4 /* Hours */
85 #define RTC_AHRS 0x5 /* Hours Alarm */
86 #define RTC_DOW 0x6 /* Day-of-Week */
87 #define RTC_DOM 0x7 /* Day-of-Month */
88 #define RTC_MON 0x8 /* Month */
89 #define RTC_YEAR 0x9 /* Year */
90 #define RTC_A 0xa /* Control Register A */
91 #define RTC_B 0xb /* Control Register B */
92 #define RTC_C 0xc /* Control Register C */
93 #define RTC_D 0xd /* Control Register D */
96 * Control register A definitions
98 #define RTC_DIV0 0x10 /* Bank Select */
99 #define RTC_DIV1 0x20 /* Oscillator enable */
100 #define RTC_DIV2 0x40 /* Countdown chain */
101 #define RTC_UIP 0x80 /* Update in progress bit */
104 * Control register B definitions
106 #define RTC_DSE 0x01 /* Daylight Savings Enable */
107 #define RTC_HM 0x02 /* Hour mode, 1 = 24 hour, 0 = 12 hour */
108 #define RTC_DM 0x04 /* Date mode, 1 = binary, 0 = BCD */
109 #define RTC_UIE 0x10 /* Update-ended Interrupt Enable */
110 #define RTC_AIE 0x20 /* Alarm Interrupt Enable */
111 #define RTC_PIE 0x40 /* Periodic Interrupt Enable */
112 #define RTC_SET 0x80 /* Stop updates for time set */
115 * Control Register C definitions
117 #define RTC_UF 0x10 /* UF flag bit */
118 #define RTC_AF 0x20 /* AF flag bit */
119 #define RTC_PF 0x40 /* PF flag bit */
120 #define RTC_IRQF 0x80 /* IRQ flag */
123 * Control Register D definitions
125 #define RTC_VRT 0x80 /* Valid RAM and time bit */
128 * Bank 1 Registers
130 #define RTC_CENTURY 0x48 /* Century */
131 #define RTC_ADOM 0x49 /* Date of Month Alarm */
132 #define RTC_AMON 0x4a /* Month Alarm */
135 * Bank 2 Registers
137 #define APC_APCR1 0x40 /* APC Control Register 1 */
138 #define APC_APCR2 0x41 /* APC Control Register 2 */
139 #define APC_APSR 0x42 /* APC Status Register */
140 #define APC_WDWR 0x43 /* Wake up Day of Week */
141 #define APC_WDMR 0x44 /* Wake up Date of Month */
142 #define APC_WMR 0x45 /* Wake up Month */
143 #define APC_WYR 0x46 /* Wake up Year */
144 #define APC_WCR 0x48 /* Wake up Century */
146 #define RTC_CADDR 0x51 /* Century address register */
149 * APC Control Register 1 (APCR1) definitions
151 #define APC_FSTRC 0x40 /* Fail-safe Timer Reset Command */
154 * APC Control Register 2 (APCR2) definitions
156 #define APC_TME 0x01 /* Timer Match Enable */
158 struct rtc_t {
159 uint8_t rtc_sec; /* seconds */
160 uint8_t rtc_asec; /* alarm seconds */
161 uint8_t rtc_min; /* mins */
162 uint8_t rtc_amin; /* alarm mins */
163 uint8_t rtc_hrs; /* hours */
164 uint8_t rtc_ahrs; /* alarm hours */
165 uint8_t rtc_dow; /* day of the week */
166 uint8_t rtc_dom; /* day of the month */
167 uint8_t rtc_mon; /* month */
168 uint8_t rtc_year; /* year */
169 uint8_t rtc_rega; /* REG A */
170 uint8_t rtc_regb; /* REG B */
171 uint8_t rtc_regc; /* REG C */
172 uint8_t rtc_regd; /* REG D */
173 uint8_t rtc_century; /* century */
174 uint8_t rtc_adom; /* alarm day */
175 uint8_t rtc_amon; /* alarm mon */
176 uint8_t apc_apcr1; /* APC Control register 1 */
177 uint8_t apc_apcr2; /* APC Control register 2 */
178 uint8_t apc_apsr; /* APC Status register */
179 uint8_t apc_wdwr; /* Wakeup date of the month */
180 uint8_t apc_wdmr; /* Wakeup day of month */
181 uint8_t apc_wmr; /* Wakeup month register */
182 uint8_t apc_wyr; /* Wakeup year register */
183 uint8_t apc_wcr; /* Wakeup Century reg. */
186 #ifdef __cplusplus
188 #endif
190 #endif /* _TODDS1287_H */