usr/src/uts/intel/io/intel_nhm/mem_addr.h

   1 /*
   2  * CDDL HEADER START
   3  *
   4  * The contents of this file are subject to the terms of the
   5  * Common Development and Distribution License (the "License").
   6  * You may not use this file except in compliance with the License.
   7  *
   8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
   9  * or http://www.opensolaris.org/os/licensing.
  10  * See the License for the specific language governing permissions
  11  * and limitations under the License.
  12  *
  13  * When distributing Covered Code, include this CDDL HEADER in each
  14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
  15  * If applicable, add the following below this CDDL HEADER, with the
  16  * fields enclosed by brackets "[]" replaced with your own identifying
  17  * information: Portions Copyright [yyyy] [name of copyright owner]
  18  *
  19  * CDDL HEADER END
  20  */
  21
  22 /*
  23  * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
  24  * Use is subject to license terms.
  25  */
  26
  27 #ifndef _MEM_ADDR_H
  28 #define _MEM_ADDR_H
  29
  30 #ifdef __cplusplus
  31 extern "C" {
  32 #endif
  33
  34 #include "intel_nhm.h"
  35
  36 #ifdef  _KERNEL
  37
  38 extern uint64_t rankaddr_to_dimm(uint64_t rankaddr, int node,
  39     int channel, int dimm, int writing, uint64_t *bank,
  40     uint64_t *row, uint64_t *column);
  41 extern uint64_t dimm_to_rankaddr(int node, int channel,
  42     int dimm, uint64_t rowaddr, uint64_t bankaddr,
  43     uint64_t coladr, int *log_chan);
  44 extern uint64_t rankaddr_to_phyaddr(int node, int log_chan,
  45     int dimm, int rank, int rankaddr);
  46 extern uint64_t caddr_to_dimm(int node, int channel, uint64_t caddr,
  47     int *rank_p, uint64_t *rank_addr_p);
  48
  49 #pragma weak caddr_to_dimm
  50 #pragma weak rankaddr_to_dimm
  51 #pragma weak dimm_to_rankaddr
  52 #pragma weak rankaddr_to_phyaddr
  53
  54 extern char closed_page;
  55 extern char ecc_enabled;
  56 extern char divby3_enabled;
  57 extern char lockstep[2];
  58 extern char mirror_mode[2];
  59 extern char spare_channel[2];
  60 extern sad_t sad[MAX_SAD_DRAM_RULE];
  61 extern tad_t tad[MAX_CPU_NODES][MAX_TAD_DRAM_RULE];
  62 extern sag_ch_t sag_ch[MAX_CPU_NODES][CHANNELS_PER_MEMORY_CONTROLLER]
  63         [MAX_TAD_DRAM_RULE];
  64 extern rir_t rir[MAX_CPU_NODES][CHANNELS_PER_MEMORY_CONTROLLER]
  65         [MAX_TAD_DRAM_RULE];
  66 extern dod_t dod_reg[MAX_CPU_NODES][CHANNELS_PER_MEMORY_CONTROLLER]
  67         [MAX_DIMMS_PER_CHANNEL];
  68
  69 #endif  /* _KERNEL */
  70
  71 #define CAS_MASK        0xFFFFFF
  72 #define BANK_MASK       0xFF
  73 #define RAS_MASK        0xFFFFF
  74 #define RANK_MASK       0x7FF
  75
  76 #ifdef __cplusplus
  77 }
  78 #endif
  79
  80 #endif /* _MEM_ADDR_H */