4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
22 * Copyright 2008 Sun Microsystems, Inc. All rights reserved.
23 * Use is subject to license terms.
26 #pragma ident "%Z%%M% %I% %E% SMI"
29 * Eversholt rules for Oberon ASICs
32 #pragma dictionary "SUN4U"
37 * Test for primary or secondary ereports
39 #define IS_PRIMARY (payloadprop("primary"))
40 #define IS_SECONDARY (! payloadprop("primary"))
42 event error.io.oberon.pec.secondary@hostbridge/pciexrc;
43 event error.io.oberon.pec.fabric_error@hostbridge/pciexrc;
46 * Ereports derived from the
47 * UBC Status Clear Register
49 * dmarduea-channel DMA read uncorrectable error (UE) in leaf A
50 * dmawtuea DMA write UE in leaf A
51 * memrdaxa Memory read invalid address error in leaf A
52 * memwtaxa Memory write invalid address error in leaf A
53 * dmardueb-channel DMA read uncorrectable error (UE) in leaf B
54 * dmawtueb DMA write UE in leaf B
55 * memrdaxb Memory read invalid address error in leaf B
56 * memwtaxb Memory write invalid address error in leaf B
57 * piowtue-channel PIO write UE
58 * piowbeue-channel PIO write byte enable UE
59 * piorbeue-channel PIO read byte enable UE
61 event ereport.io.oberon.ubc.dmarduea-channel@hostbridge/pciexrc{within(5s)};
62 event ereport.io.oberon.ubc.dmawtuea@hostbridge/pciexrc{within(5s)};
63 event ereport.io.oberon.ubc.memrdaxa@hostbridge/pciexrc{within(5s)};
64 event ereport.io.oberon.ubc.memwtaxa@hostbridge/pciexrc{within(5s)};
65 event ereport.io.oberon.ubc.dmardueb-channel@hostbridge/pciexrc{within(5s)};
66 event ereport.io.oberon.ubc.dmawtueb@hostbridge/pciexrc{within(5s)};
67 event ereport.io.oberon.ubc.memrdaxb@hostbridge/pciexrc{within(5s)};
68 event ereport.io.oberon.ubc.memwtaxb@hostbridge/pciexrc{within(5s)};
69 event ereport.io.oberon.ubc.piowtue-channel@hostbridge/pciexrc{within(5s)};
70 event ereport.io.oberon.ubc.piowbeue-channel@hostbridge/pciexrc{within(5s)};
71 event ereport.io.oberon.ubc.piorbeue-channel@hostbridge/pciexrc{within(5s)};
74 * tlueitmo TLU Egress Issue Timeout
76 event ereport.io.oberon.pec.tlueitmo@hostbridge/pciexrc{within(5s)};
79 * TLU Uncorrectable and Correctable ereports
81 * ecrc End-to-end CRC error
83 event ereport.io.oberon.pec.ecrc@hostbridge/pciexrc{within(5s)};
86 * A faulty Oberon may cause;
88 * - DMA write internal RAM UE: dmawtuea, dmawtueb
91 * Errors marked with * may cause PCI-E abort
96 event fault.io.oberon@hostbridge,
97 FITrate=HB_FIT, FRU=hostbridge, ASRU=hostbridge;
98 prop fault.io.oberon@hostbridge (0)->
99 ereport.io.oberon.ubc.dmawtuea@hostbridge/pciexrc,
100 ereport.io.oberon.ubc.dmawtueb@hostbridge/pciexrc;
101 event fault.io.oberon@hostbridge/pciexrc,
102 FITrate=HB_FIT, FRU=hostbridge, ASRU=hostbridge;
103 prop fault.io.oberon@hostbridge/pciexrc (0)->
104 ereport.io.oberon.pec.ecrc@hostbridge/pciexrc { IS_PRIMARY };
107 * A faulty PX nexus driver can cause
108 * - Jbus unmapped error
109 * - mmu invalid, out of range, protection etc. all except data parity
111 * - unsolicited read or interrupt return
112 * - msg received to unenabled queue
115 #define SW_FIT 5000 /* No real fit rate, SW */
116 event fault.io.fire.hb.sw-config@hostbridge/pciexrc, retire=0, response=0,
119 prop fault.io.fire.hb.sw-config@hostbridge/pciexrc (0)->
120 ereport.io.oberon.ubc.memrdaxa@hostbridge/pciexrc,
121 ereport.io.oberon.ubc.memrdaxb@hostbridge/pciexrc,
122 ereport.io.oberon.ubc.memwtaxa@hostbridge/pciexrc,
123 ereport.io.oberon.ubc.memwtaxb@hostbridge/pciexrc;
126 * Secondary errors of the ereport that the device is at fault.
127 * Undiagnosed the secondary errors since the payload is invalid.
129 prop error.io.oberon.pec.secondary@hostbridge/pciexrc (0) ->
130 ereport.io.oberon.pec.ecrc@hostbridge/pciexrc{ IS_SECONDARY };
133 * For logging purpose only.
134 * The px nexus driver generates equivalent pciex ereports for the
135 * common pciex rules to diagnose.
137 prop error.io.oberon.pec.fabric_error@hostbridge/pciexrc(0) ->
138 ereport.io.oberon.pec.ecrc@hostbridge/pciexrc;
140 event ereport.io.oberon.nodiag@hostbridge;
143 * Upset used to hide ereports that are not currently diagnosed.
145 engine serd.io.oberon.nodiag@hostbridge,
146 N=1000, T=1s, method=persistent,
147 trip=ereport.io.oberon.nodiag@hostbridge;
149 event upset.io.oberon.nodiag@hostbridge,
150 engine=serd.io.oberon.nodiag@hostbridge;
152 prop upset.io.oberon.nodiag@hostbridge (0)->
153 ereport.io.oberon.ubc.dmarduea-channel@hostbridge/pciexrc,
154 ereport.io.oberon.ubc.dmardueb-channel@hostbridge/pciexrc,
155 ereport.io.oberon.ubc.piowtue-channel@hostbridge/pciexrc,
156 ereport.io.oberon.ubc.piowbeue-channel@hostbridge/pciexrc,
157 ereport.io.oberon.ubc.piorbeue-channel@hostbridge/pciexrc,
158 ereport.io.oberon.pec.tlueitmo@hostbridge/pciexrc,
159 error.io.oberon.pec.fabric_error@hostbridge/pciexrc,
160 ereport.io.oberon.nodiag@hostbridge;