usr/src/lib/libbc/inc/include/sun4/mmu.h

   1 /*
   2  * CDDL HEADER START
   3  *
   4  * The contents of this file are subject to the terms of the
   5  * Common Development and Distribution License, Version 1.0 only
   6  * (the "License").  You may not use this file except in compliance
   7  * with the License.
   8  *
   9  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
  10  * or http://www.opensolaris.org/os/licensing.
  11  * See the License for the specific language governing permissions
  12  * and limitations under the License.
  13  *
  14  * When distributing Covered Code, include this CDDL HEADER in each
  15  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
  16  * If applicable, add the following below this CDDL HEADER, with the
  17  * fields enclosed by brackets "[]" replaced with your own identifying
  18  * information: Portions Copyright [yyyy] [name of copyright owner]
  19  *
  20  * CDDL HEADER END
  21  */
  22 /*
  23  * Copyright 2004 Sun Microsystems, Inc.  All rights reserved.
  24  * Use is subject to license terms.
  25  */
  26
  27 #ifndef _SUN4_MMU_H
  28 #define _SUN4_MMU_H
  29
  30 #pragma ident   "%Z%%M% %I%     %E% SMI"
  31
  32 #ifdef  __cplusplus
  33 extern "C" {
  34 #endif
  35
  36 /*
  37  * Sun-4 memory management unit.
  38  * All sun-4 implementations use 32 bits of address.
  39  * A particular implementation may implement a smaller MMU.
  40  * If so, the missing addresses are in the "middle" of the
  41  * 32 bit address space. All accesses in this range behave
  42  * as if there was an invalid page map entry correspronding
  43  * to the address.
  44  *
  45  * There are two types of MMUs a 2 level MMU and a 3 level MMU.
  46  * Three level MMUs do not have holes.
  47  */
  48
  49 /*
  50  * Hardware context and segment information
  51  * Mnemonic decoding:
  52  *      PMENT - Page Map ENTry
  53  *      PMGRP - Group of PMENTs (aka "segment")
  54  *      SMENT - Segment Map ENTry - 3 level MMU only
  55  *      SMGRP - Group of SMENTs (aka "region") - 3 level MMU only
  56  */
  57 /* fixed SUN4 constants */
  58 #define NPMENTPERPMGRP          32
  59 #define NPMENTPERPMGRPSHIFT     5       /* log2(NPMENTPERPMGRP) */
  60 #define PMGRPSIZE       (NPMENTPERPMGRP * PAGESIZE)
  61 #define PMGRPOFFSET     (PMGRPSIZE - 1)
  62 #define PMGRPSHIFT      (PAGESHIFT + NPMENTPERPMGRPSHIFT)
  63 #define PMGRPMASK       (~PMGRPOFFSET)
  64
  65 #define NSMENTPERSMGRP          64
  66 #define NSMENTPERSMGRPSHIFT     6       /* log2(NSMENTPERSMGRP) */
  67 #define SMGRPSIZE       (NSMENTPERSMGRP * PMGRPSIZE)
  68 #define SMGRPOFFSET     (SMGRPSIZE - 1)
  69 #define SMGRPSHIFT      (PMGRPSHIFT + NSMENTPERSMGRPSHIFT)
  70 #define SMGRPMASK       (~SMGRPOFFSET)
  71
  72 #define NSMGRPPERCTX            256
  73
  74 /*
  75  * Useful defines for hat constants,
  76  * Every implementation seems to have its own set
  77  * they are set at boot time by setcputype()
  78  */
  79 #define NCTXS           nctxs
  80 #define NPMGRPS         npmgrps
  81 #define NSMGRPS         nsmgrps
  82
  83 /*
  84  * Variables set at boot time to reflect cpu type.
  85  */
  86 #ifndef LOCORE
  87 #include <sys/types.h>
  88
  89 extern uint_t nctxs;            /* number of implemented contexts */
  90 extern uint_t npmgrps;          /* number of pmgrps in page map */
  91 #ifdef  MMU_3LEVEL
  92 extern uint_t nsmgrps;          /* number of smgrps in segment map (3 level) */
  93 #endif  /* MMU_3LEVEL */
  94 extern uint_t segmask;          /* mask for segment number */
  95 extern addr_t hole_start;       /* addr of start of MMU "hole" */
  96 extern addr_t hole_end;         /* addr of end of MMU "hole" */
  97 extern uint_t shm_alignment;    /* VAC address consistency modulus */
  98
  99 #ifdef MMU_3LEVEL
 100 extern int mmu_3level;          /* indicates 3 level MMU can exist */
 101 #endif /* MMU_3LEVEL */
 102
 103 #define PMGRP_INVALID (NPMGRPS - 1)
 104 #define SMGRP_INVALID (NSMGRPS - 1)
 105
 106 /*
 107  * Macro to determine whether an address is within the range of the MMU.
 108  */
 109 #ifdef MMU_3LEVEL
 110 #define good_addr(a) \
 111         (mmu_3level || (addr_t)(a) < hole_start || (addr_t)(a) >= hole_end)
 112 #else
 113 #define good_addr(a) \
 114         ((addr_t)(a) < hole_start || (addr_t)(a) >= hole_end)
 115 #endif /* MMU_3LEVEL */
 116 #endif /* !LOCORE */
 117
 118 /*
 119  * Address space identifiers.
 120  */
 121 #define ASI_CTL 0x2             /* control space */
 122 #define ASI_SM  0x3             /* segment map */
 123 #define ASI_PM  0x4             /* page map */
 124 #define ASI_BC  0x5             /* block copy */
 125 #define ASI_RM  0x6             /* region map */
 126 #define ASI_FCR 0x7             /* flush cache region */
 127 #define ASI_UP  0x8             /* user program */
 128 #define ASI_SP  0x9             /* supervisor program */
 129 #define ASI_UD  0xA             /* user data */
 130 #define ASI_SD  0xB             /* supervisor data */
 131 #define ASI_FCS 0xC             /* flush cache segment */
 132 #define ASI_FCP 0xD             /* flush cache page */
 133 #define ASI_FCC 0xE             /* flush cache context */
 134 #define ASI_FCU 0xF             /* flush cache user, sunray */
 135
 136 #define ASI_CD  0xF             /* cache data, sunrise */
 137
 138 /*
 139  * ASI_CTL addresses
 140  */
 141 #define ID_PROM         0x00000000
 142 #define CONTEXT_REG     0x30000000
 143 #define SYSTEM_ENABLE   0x40000000
 144 #define BUS_ERROR_REG   0x60000000
 145 #define DIAGNOSTIC_REG  0x70000000
 146 #define CACHE_TAGS      0x80000000
 147 #define CACHE_DATA      0x90000000      /* cache data, sunray */
 148 #define VME_INT_VEC     0xE0000000
 149 #define UART_BYPASS     0xF0000000
 150
 151 #define IDPROMSIZE      0x20            /* size of id prom in bytes */
 152
 153 /*
 154  * Constants for cache operations.
 155  * XXX - should be deleted but the standalones (boot) use them.
 156  */
 157 #define VAC_SIZE                0x20000         /* 128K */
 158 #define VAC_LINESIZE_SUNRISE    16              /* 16 bytes per line */
 159 #define VAC_LINESIZE_SUNRAY     32              /* 32 bytes per line */
 160 #define NPMGRPPERCTX_110        4096
 161 #define NPMGRPPERCTX_260        4096
 162 #define NPMGRPPERCTX_330        4096
 163 #define NPMGRPS_110             256
 164 #define NPMGRPS_260             512
 165 #define NPMGRPS_330             256
 166 #define NPMGRPS_470             1024
 167
 168 /*
 169  * Various I/O space related constants
 170  */
 171 #define VME16_BASE      0xFFFF0000
 172 #define VME16_SIZE      (1<<16)
 173 #define VME16_MASK      (VME16_SIZE-1)
 174
 175 #define VME24_BASE      0xFF000000
 176 #define VME24_SIZE      (1<<24)
 177 #define VME24_MASK      (VME24_SIZE-1)
 178
 179 /*
 180  * Virtual address where dvma starts.
 181  */
 182 #define DVMABASE        (0-(1024*1024))
 183
 184 /*
 185  * Context for kernel. On a Sun-4 the kernel is in every address space,
 186  * but KCONTEXT is magic in that there is never any user context there.
 187  */
 188 #define KCONTEXT        0
 189
 190 /*
 191  * MDEVBASE is a virtual segment reserved for mapping misc. obio devices.
 192  * The base address and the number of devices mapped should not cause the
 193  * device mappings to cross a segment boundary.  We use the segment
 194  * immediately before SYSBASE
 195  */
 196 #define MDEVBASE        (SYSBASE - PMGRPSIZE)
 197
 198 /*
 199  * SEGTEMP & SEGTEMP2 are virtual segments reserved for temporary operations.
 200  * We use the segments immediately before the start of debugger area.
 201  */
 202 #define SEGTEMP         ((addr_t)(DEBUGSTART - (2 * PMGRPSIZE)))
 203 #define SEGTEMP2        ((addr_t)(DEBUGSTART - PMGRPSIZE))
 204
 205 /*
 206  * REGTEMP is only during intialization, we use the
 207  * REGION immediately before KERNELBASE, it is invalidated
 208  * after use
 209  */
 210 #define REGTEMP         ((KERNELBASE-SMGRPSIZE)&SMGRPMASK)
 211
 212 #if defined(KERNEL) && !defined(LOCORE)
 213
 214 #ifdef VAC
 215 void vac_dontcache();
 216 /*
 217  * cache related constants set at boot time
 218  */
 219 extern int vac_size;                    /* size of cache in bytes */
 220 extern int vac_linesize;                /* cache linesize */
 221 extern int vac_nlines;                  /* number of lines in cache */
 222 extern int vac_pglines;                 /* number of cache lines in a page */
 223 #endif /* VAC */
 224
 225 /*
 226  * Low level mmu-specific functions
 227  */
 228 struct  ctx *mmu_getctx();
 229 void    mmu_setctx(/* ctx */);
 230 void    mmu_setpmg(/* base, pmg */);
 231 void    mmu_settpmg(/* base, pmg */);
 232 struct  pmgrp *mmu_getpmg(/* base */);
 233 void    mmu_setpte(/* base, pte */);
 234 void    mmu_getpte(/* base, ppte */);
 235 void    mmu_getkpte(/* base, ppte */);
 236 void    mmu_pmginval(/* pmg */);
 237 #ifdef MMU_3LEVEL
 238 struct  smgrp *mmu_getsmg(/* base */);
 239 void    mmu_setsmg(/* base, smg */);
 240 void    mmu_settsmg(/* base, smg */);
 241 void    mmu_smginval(/* smg */);
 242 #endif /* MMU_3LEVEL */
 243
 244 /*
 245  * Cache specific routines - ifdef'ed out if there is no chance
 246  * of running on a machine with a virtual address cache.
 247  */
 248 #ifdef VAC
 249 void    vac_init();
 250 void    vac_tagsinit();
 251 void    vac_flushall();
 252 void    vac_ctxflush();
 253 #ifdef MMU_3LEVEL
 254 void    vac_usrflush();
 255 void    vac_rgnflush(/* base */);
 256 #endif /* MMU_3LEVEL */
 257 void    vac_segflush(/* base */);
 258 void    vac_pageflush(/* base */);
 259 void    vac_flush(/* base, len */);
 260 int     bp_alloc(/* map, bp, size */);
 261 #else /* VAC */
 262 #define vac_init()
 263 #define vac_tagsinit()
 264 #define vac_flushall()
 265 #define vac_usrflush()
 266 #define vac_ctxflush()
 267 #define vac_rgnflush(base)
 268 #define vac_segflush(base)
 269 #define vac_pageflush(base)
 270 #define vac_flush(base, len)
 271 #define bp_alloc(map, bp, size)         (int)rmalloc((map), (long)(size))
 272 #endif /* VAC */
 273
 274 int     valid_va_range(/* basep, lenp, minlen, dir */);
 275
 276 #endif /* defined(KERNEL) && !defined(LOCORE) */
 277
 278 #ifdef  __cplusplus
 279 }
 280 #endif
 281
 282 #endif /* !_SUN4_MMU_H */