| blob | 97c047b9d29fa01cca836eaf0e850df4ec4714d0 |
1 /*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
22 /*
23 * Copyright (c) 2009, 2010, Oracle and/or its affiliates. All rights reserved.
24 * Copyright 2016 Nexenta Systems, Inc. All rights reserved.
25 * Copyright (c) 2014, Joyent, Inc. All rights reserved.
26 * Copyright 2014 OmniTI Computer Consulting, Inc. All rights reserved.
27 * Copyright (c) 2014, Tegile Systems Inc. All rights reserved.
28 */
30 /*
31 * Copyright (c) 2000 to 2010, LSI Corporation.
32 * All rights reserved.
33 *
34 * Redistribution and use in source and binary forms of all code within
35 * this file that is exclusively owned by LSI, with or without
36 * modification, is permitted provided that, in addition to the CDDL 1.0
37 * License requirements, the following conditions are met:
38 *
39 * Neither the name of the author nor the names of its contributors may be
40 * used to endorse or promote products derived from this software without
41 * specific prior written permission.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
46 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
47 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
48 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
49 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
50 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
51 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
52 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
53 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
54 * DAMAGE.
55 */
57 /*
58 * mptsas - This is a driver based on LSI Logic's MPT2.0/2.5 interface.
59 *
60 */
62 #if defined(DEBUG)
63 #define MPTSAS_DEBUG
64 #endif
66 /*
67 * standard header files.
68 */
69 #include <sys/note.h>
70 #include <sys/scsi/scsi.h>
71 #include <sys/pci.h>
72 #include <sys/file.h>
73 #include <sys/policy.h>
74 #include <sys/model.h>
75 #include <sys/sysevent.h>
76 #include <sys/sysevent/eventdefs.h>
77 #include <sys/sysevent/dr.h>
78 #include <sys/sata/sata_defs.h>
79 #include <sys/sata/sata_hba.h>
80 #include <sys/scsi/generic/sas.h>
81 #include <sys/scsi/impl/scsi_sas.h>
83 #pragma pack(1)
84 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2_type.h>
85 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2.h>
86 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2_cnfg.h>
87 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2_init.h>
88 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2_ioc.h>
89 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2_sas.h>
90 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2_tool.h>
91 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2_raid.h>
92 #pragma pack()
94 /*
95 * private header files.
96 *
97 */
98 #include <sys/scsi/impl/scsi_reset_notify.h>
99 #include <sys/scsi/adapters/mpt_sas/mptsas_var.h>
100 #include <sys/scsi/adapters/mpt_sas/mptsas_ioctl.h>
101 #include <sys/scsi/adapters/mpt_sas/mptsas_smhba.h>
102 #include <sys/scsi/adapters/mpt_sas/mptsas_hash.h>
103 #include <sys/raidioctl.h>
107 /*
108 * FMA header files
109 */
110 #include <sys/ddifm.h>
111 #include <sys/fm/protocol.h>
112 #include <sys/fm/util.h>
113 #include <sys/fm/io/ddi.h>
115 /*
116 * autoconfiguration data and routines.
117 */
122 /*
123 * cb_ops function
124 */
129 /*
130 * Resource initilaization for hardware
131 */
155 /*
156 * SCSA function prototypes
157 */
184 /*
185 * SMP functions
186 */
189 /*
190 * internal function prototypes.
191 */
231 pMpi2ReplyDescriptorsUnion_t reply_desc_union);
233 pMpi2ReplyDescriptorsUnion_t reply_desc);
235 pMpi2ReplyDescriptorsUnion_t reply_desc);
321 /*
322 * helper functions
323 */
358 mptsas_phymask_t phymask);
362 /*
363 * Enumeration / DR functions
364 */
398 uint_t flags);
416 /*
417 * Power management functions
418 */
422 /*
423 * MPT MSI tunable:
424 *
425 * By default MSI is enabled on all supported platforms.
426 */
430 /*
431 * Global switch for use of MPI2.5 FAST PATH.
432 * We don't really know what FAST PATH actually does, so if it is suspected
433 * to cause problems it can be turned off by setting this variable to B_FALSE.
434 */
442 /*
443 * FMA Prototypes
444 */
451 /*
452 * This device is created by the SCSI pseudo nexus driver (SCSI vHCI). It is
453 * under this device that the paths to a physical device are created when
454 * MPxIO is used.
455 */
458 /*
459 * Tunable timeout value for Inquiry VPD page 0x83
460 * By default the value is 30 seconds.
461 */
464 /*
465 * This is used to allocate memory for message frame storage, not for
466 * data I/O DMA. All message frames must be stored in the first 4G of
467 * physical memory.
468 */
469 ddi_dma_attr_t mptsas_dma_attrs = {
482 };
484 /*
485 * This is used for data I/O DMA memory allocation. (full 64-bit DMA
486 * physical addresses are supported.)
487 */
488 ddi_dma_attr_t mptsas_dma_attrs64 = {
501 };
503 ddi_device_acc_attr_t mptsas_dev_attr = {
504 DDI_DEVICE_ATTR_V1,
505 DDI_STRUCTURE_LE_ACC,
506 DDI_STRICTORDER_ACC,
507 DDI_DEFAULT_ACC
508 };
528 nodev /* awrite */
529 };
543 mptsas_quiesce /* quiesce */
544 };
553 };
557 };
566 /*
567 * Local static data
568 */
569 #if defined(MPTSAS_DEBUG)
570 /*
571 * Flags to indicate which debug messages are to be printed and which go to the
572 * debug log ring buffer. Default is to not print anything, and to log
573 * everything except the watchsubr() output which normally happens every second.
574 */
595 /*
596 * Default length for extended auto request sense buffers.
597 * All sense buffers need to be under the same alloc because there
598 * is only one common top 32bits (of 64bits) address register.
599 * Most requests only require 32 bytes, but some request >256.
600 * We use rmalloc()/rmfree() on this additional memory to manage the
601 * "extended" requests.
602 */
605 /*
606 * We believe that all software resrictions of having to run with DMA
607 * attributes to limit allocation to the first 4G are removed.
608 * However, this flag remains to enable quick switchback should suspicious
609 * problems emerge.
610 * Note that scsi_alloc_consistent_buf() does still adhere to allocating
611 * 32 bit addressable memory, but we can cope if that is changed now.
612 */
615 /*
616 * SM - HBA statics
617 */
620 #ifdef MPTSAS_DEBUG
622 #endif
624 /*
625 * Notes:
626 * - scsi_hba_init(9F) initializes SCSI HBA modules
627 * - must call scsi_hba_fini(9F) if modload() fails
628 */
629 int
631 {
633 /* CONSTCOND */
639 MPTSAS_INITIAL_SOFT_SPACE);
642 }
647 }
659 }
662 }
664 /*
665 * Notes:
666 * - scsi_hba_fini(9F) uninitializes SCSI HBA modules
667 */
668 int
670 {
672 /* CONSTCOND */
683 }
685 }
687 /*
688 * The loadable-module _info(9E) entry point
689 */
690 int
692 {
693 /* CONSTCOND */
698 }
700 static int
702 {
707 }
709 static int
711 {
719 }
721 static int
723 {
731 }
733 static int
735 {
740 }
742 static uint64_t
744 {
749 }
751 static int
753 {
762 }
764 static uint64_t
766 {
768 }
770 static int
772 {
779 }
781 static void
783 {
785 }
787 static void
789 {
791 }
793 static void
795 {
802 }
806 }
812 }
814 static int
816 {
839 /* CONSTCOND */
847 /*
848 * If this a scsi-iport node, nothing to do here.
849 */
854 }
859 NULL) {
863 }
871 NULL) {
875 }
877 /*
878 * Overwrite parent's tran_hba_private to iport's tran vector
879 */
884 /*
885 * Get SAS address for initiator port according dev_handle
886 */
891 DDI_PROP_SUCCESS) {
893 MPTSAS_VIRTUAL_PORT);
897 }
899 }
908 }
909 }
916 }
922 else
925 /*
926 * Update PHY info for smhba
927 */
933 }
940 numphys++;
941 }
942 }
950 DDI_PROP_SUCCESS) {
956 }
959 DDI_PROP_SUCCESS) {
962 }
966 DDI_PROP_SUCCESS) {
971 }
975 DDI_PROP_SUCCESS) {
980 }
983 DDI_PROP_SUCCESS) {
985 MPTSAS_VIRTUAL_PORT);
989 }
1002 attached_devhdl);
1005 }
1014 }
1015 }
1020 attached_sas_wwn);
1023 DDI_PROP_SUCCESS) {
1027 }
1029 /* Create kstats for each phy on this iport */
1033 /*
1034 * register sas hba iport with mdi (MPxIO/vhci)
1035 */
1039 }
1041 }
1043 /*
1044 * Notes:
1045 * Set up all device state and allocate data structures,
1046 * mutexes, condition variables, etc. for device operation.
1047 * Add interrupts needed.
1048 * Return DDI_SUCCESS if device is ready, else return DDI_FAILURE.
1049 */
1050 static int
1052 {
1070 /* CONSTCOND */
1075 }
1089 }
1091 /*
1092 * Reset hardware and softc to "no outstanding commands"
1093 * Note that a check condition can result on first command
1094 * to a target.
1095 */
1098 /*
1099 * raise power.
1100 */
1108 /*
1109 * The pm_raise_power() call above failed,
1110 * and that can only occur if we were unable
1111 * to reset the hardware. This is probably
1112 * due to unhealty hardware, and because
1113 * important filesystems(such as the root
1114 * filesystem) could be on the attached disks,
1115 * it would not be a good idea to continue,
1116 * as we won't be entirely certain we are
1117 * writing correct data. So we panic() here
1118 * to not only prevent possible data corruption,
1119 * but to give developers or end users a hope
1120 * of identifying and correcting any problems.
1121 */
1124 }
1125 }
1129 /*
1130 * Reinitialize ioc
1131 */
1137 }
1139 }
1140 /*
1141 * mptsas_update_driver_data needs interrupts so enable them
1142 * first.
1143 */
1147 /* start requests, if possible */
1152 /*
1153 * Restart watch thread
1154 */
1158 mptsas_tick);
1160 }
1163 /* report idle status to pm framework */
1166 }
1173 }
1177 /*
1178 * Allocate softc information.
1179 */
1184 }
1192 }
1194 /* Indicate that we are 'sizeof (scsi_*(9S))' clean. */
1200 /* Make a per-instance copy of the structures */
1206 }
1210 /*
1211 * Size of individual request sense buffer
1212 */
1215 /*
1216 * Initialize FMA
1217 */
1229 }
1231 /*
1232 * Setup configuration space
1233 */
1237 }
1238 config_setup++;
1244 }
1245 map_setup++;
1247 /*
1248 * A taskq is created for dealing with the event handler
1249 */
1254 }
1255 event_taskq_create++;
1257 /*
1258 * A taskq is created for dealing with dr events
1259 */
1266 }
1267 dr_taskq_create++;
1292 MPTSAS_DONEQ_THREAD_ACTIVE;
1302 }
1304 doneq_thread_create++;
1305 }
1307 /*
1308 * Disable hardware interrupt since we're not ready to
1309 * handle it yet.
1310 */
1314 intr_added++;
1316 /* Initialize mutex used in interrupt handler */
1326 }
1334 mutex_init_done++;
1337 /*
1338 * Initialize power management component
1339 */
1346 }
1347 }
1349 /*
1350 * Initialize chip using Message Unit Reset, if allowed
1351 */
1357 }
1365 /*
1366 * The refhash for temporary targets uses the address of the target
1367 * struct itself as tag, so the tag offset is 0. See the implementation
1368 * of mptsas_tmp_target_hash() and mptsas_tmp_target_cmp().
1369 */
1375 /*
1376 * Fill in the phy_info structure and get the base WWID
1377 */
1382 }
1388 }
1394 }
1398 /*
1399 * Register the iport for multiple port HBA
1400 */
1403 /*
1404 * initialize SCSI HBA transport structure
1405 */
1408 hba_attach_setup++;
1412 smp_attach_setup++;
1421 "scsi_reset_delay of 0 is not recommended,"
1424 }
1426 /*
1427 * Initialize the wait and done FIFO queue
1428 */
1434 /*
1435 * ioc cmd queue initialize
1436 */
1442 /*
1443 * enable event notification
1444 */
1449 }
1452 /*
1453 * used for mptsas_watch
1454 */
1467 }
1469 added_watchdog++;
1471 /*
1472 * Initialize PHY info for smhba.
1473 * This requires watchdog to be enabled otherwise if interrupts
1474 * don't work the system will hang.
1475 */
1480 }
1482 /* Check all dma handles allocated in attach */
1496 }
1498 /* Check all acc handles allocated in attach */
1515 }
1517 /*
1518 * After this point, we are not going to fail the attach.
1519 */
1521 /* Print message of HBA present */
1524 /* report idle status to pm framework */
1527 }
1531 fail:
1536 /* deallocate in reverse order */
1548 }
1550 }
1556 }
1559 }
1570 }
1573 }
1584 }
1588 }
1592 }
1599 }
1602 }
1605 }
1613 }
1620 }
1624 }
1627 }
1634 }
1636 }
1638 static int
1640 {
1646 }
1654 }
1661 }
1663 /*
1664 * Cancel timeout threads for this mpt
1665 */
1672 }
1680 }
1686 /*
1687 * Cancel watch threads if all mpts suspended
1688 */
1693 }
1698 timeout_id_t tid;
1707 }
1714 }
1715 }
1720 /*
1721 * If this mpt is not in full power(PM_LEVEL_D0), just return.
1722 */
1727 }
1729 /* Disable HBA interrupts in hardware */
1731 /*
1732 * Send RAID action system shutdown to sync IR
1733 */
1738 /* drain the taskq */
1743 }
1745 /*
1746 * quiesce(9E) entry point.
1747 *
1748 * This function is called when the system is single-threaded at high
1749 * PIL with preemption disabled. Therefore, this function must not be
1750 * blocked.
1751 *
1752 * This function returns DDI_SUCCESS on success, or DDI_FAILURE on failure.
1753 * DDI_FAILURE indicates an error condition and should almost never happen.
1754 */
1755 static int
1757 {
1761 /*
1762 * If this call is for iport, just return.
1763 */
1773 /* Disable HBA interrupts in hardware */
1775 /* Send RAID action system shutdonw to sync IR */
1779 }
1781 /*
1782 * detach(9E). Remove all device allocations and system resources;
1783 * disable device interrupts.
1784 * Return DDI_SUCCESS if done; DDI_FAILURE if there's a problem.
1785 */
1786 static int
1788 {
1789 /* CONSTCOND */
1802 }
1803 /* NOTREACHED */
1804 }
1806 static int
1808 {
1825 }
1826 /*
1827 * Still have pathinfo child, should not detach mpt driver
1828 */
1831 /*
1832 * MPxIO enabled for the iport
1833 */
1839 }
1845 }
1849 }
1854 }
1856 /* Make sure power level is D0 before accessing registers */
1861 DDI_SUCCESS) {
1867 }
1868 }
1869 }
1871 /*
1872 * Send RAID action system shutdown to sync IR. After action, send a
1873 * Message Unit Reset. Since after that DMA resource will be freed,
1874 * set ioc to READY state will avoid HBA initiated DMA operation.
1875 */
1895 }
1899 }
1903 }
1910 }
1916 /*
1917 * Cancel timeout threads for this mpt
1918 */
1926 }
1934 }
1938 /*
1939 * last mpt? ... if active, CANCEL watch threads.
1940 */
1943 timeout_id_t tid;
1944 /*
1945 * Clear mptsas_timeouts_enable so that the watch thread
1946 * gets restarted on DDI_ATTACH
1947 */
1955 }
1962 }
1963 }
1966 /*
1967 * Delete Phy stats
1968 */
1973 /*
1974 * Delete nt_active.
1975 */
1980 /* deallocate everything that was allocated in mptsas_attach */
1986 /* Lower the power informing PM Framework */
1990 "!mptsas%d: Lower power request failed "
1993 }
2000 }
2020 }
2022 static void
2024 {
2031 }
2034 }
2036 static void
2038 {
2040 /*
2041 * Remove device instance from the global linked list
2042 */
2051 }
2052 }
2055 }
2056 }
2060 }
2062 }
2064 static int
2066 {
2067 ddi_dma_attr_t task_dma_attrs;
2074 /* allocate Task Management ddi_dma resources */
2079 }
2083 }
2085 static void
2087 {
2092 }
2094 static int
2096 {
2100 /* Allocate a transport structure */
2102 SCSI_HBA_CANSLEEP);
2139 /*
2140 * All children of the HBA are iports. We need tran was cloned.
2141 * So we pass the flags to SCSA. SCSI_HBA_TRAN_CLONE will be
2142 * inherited to iport's tran vector.
2143 */
2152 }
2154 }
2156 static void
2158 {
2163 }
2164 }
2166 static void
2168 {
2171 /*
2172 * initial value of mask is 0
2173 */
2194 }
2195 }
2201 }
2202 }
2207 /*
2208 * register a iport
2209 */
2212 }
2214 /*
2215 * register a virtual port for RAID volume always
2216 */
2219 }
2221 static int
2223 {
2233 }
2234 /*
2235 * Initialize smp hash table
2236 */
2241 KM_SLEEP);
2245 }
2247 static void
2249 {
2254 }
2256 }
2258 static int
2260 {
2264 /*
2265 * create kmem cache for packets
2266 */
2276 }
2278 /*
2279 * create kmem cache for extra SGL frames if SGL cannot
2280 * be accomodated into main request frame.
2281 */
2291 }
2294 }
2296 static void
2298 {
2299 /* deallocate in reverse order */
2303 }
2307 }
2308 }
2310 static int
2312 {
2326 }
2330 /*
2331 * If the device is busy, don't lower its power level
2332 */
2336 }
2341 /*
2342 * Wait up to 30 seconds for IOC to come out of reset.
2343 */
2349 }
2351 }
2352 /*
2353 * If IOC is not in operational state, try to hard reset it.
2354 */
2356 MPI2_IOC_STATE_OPERATIONAL) {
2363 }
2364 }
2376 }
2379 }
2381 /*
2382 * Initialize configuration space and figure out which
2383 * chip and revison of the chip the mpt driver is using.
2384 */
2385 static int
2387 {
2397 }
2399 /*
2400 * This is a workaround for a XMITS ASIC bug which does not
2401 * drive the CBE upper bits.
2402 */
2404 PCI_STAT_PERROR) {
2406 PCI_STAT_PERROR);
2407 }
2411 /*
2412 * Get the chip device id:
2413 */
2416 /*
2417 * Save the revision.
2418 */
2421 /*
2422 * Save the SubSystem Vendor and Device IDs
2423 */
2427 /*
2428 * Set the latency timer to 0x40 as specified by the upa -> pci
2429 * bridge chip design team. This may be done by the sparc pci
2430 * bus nexus driver, but the driver should make sure the latency
2431 * timer is correct for performance reasons.
2432 */
2434 MPTSAS_LATENCY_TIMER);
2438 }
2440 static void
2442 {
2447 }
2448 }
2450 static void
2452 {
2453 ushort_t cmdreg;
2455 /*
2456 * Set the command register to the needed values.
2457 */
2463 }
2465 static void
2467 {
2468 ushort_t cmdreg;
2470 /*
2471 * Clear the master enable bit in the PCI command register.
2472 * This prevents any bus mastering activity like DMA.
2473 */
2477 }
2479 int
2481 {
2482 ddi_dma_attr_t attrs;
2493 }
2496 }
2498 void
2500 {
2504 }
2506 int
2508 {
2509 ddi_dma_attr_t attrs;
2510 ddi_dma_handle_t dma_handle;
2511 caddr_t memp;
2512 ddi_acc_handle_t accessp;
2524 }
2532 }
2537 }
2539 static int
2541 {
2542 ddi_dma_attr_t frame_dma_attrs;
2543 caddr_t memp;
2544 ddi_dma_cookie_t cookie;
2547 /*
2548 * re-alloc when it has already alloced
2549 */
2554 /*
2555 * The size of the request frame pool is:
2556 * Number of Request Frames * Request Frame Size
2557 */
2560 /*
2561 * set the DMA attributes. System Request Message Frames must be
2562 * aligned on a 16-byte boundry.
2563 */
2568 /*
2569 * allocate the request frame pool.
2570 */
2575 }
2577 /*
2578 * Store the request frame memory address. This chip uses this
2579 * address to dma to and from the driver's frame. The second
2580 * address is the address mpt uses to fill in the frame.
2581 */
2585 /*
2586 * Clear the request frame pool.
2587 */
2591 }
2593 static int
2595 {
2596 ddi_dma_attr_t sense_dma_attrs;
2597 caddr_t memp;
2598 ddi_dma_cookie_t cookie;
2604 /*
2605 * re-alloc when it has already alloced
2606 */
2611 }
2613 /*
2614 * The size of the request sense pool is:
2615 * (Number of Request Frames - 2 ) * Request Sense Size +
2616 * extra memory for extended sense requests.
2617 */
2619 mptsas_extreq_sense_bufsize;
2621 /*
2622 * set the DMA attributes. ARQ buffers
2623 * aligned on a 16-byte boundry.
2624 */
2629 /*
2630 * allocate the request sense buffer pool.
2631 */
2636 }
2638 /*
2639 * Store the request sense base memory address. This chip uses this
2640 * address to dma the request sense data. The second
2641 * address is the address mpt uses to access the data.
2642 * The third is the base for the extended rqsense buffers.
2643 */
2649 /*
2650 * The extra memory is divided up into multiples of the base
2651 * buffer size in order to allocate via rmalloc().
2652 * Note that the rmallocmap cannot start at zero!
2653 */
2659 /*
2660 * Clear the pool.
2661 */
2665 }
2667 static int
2669 {
2670 ddi_dma_attr_t frame_dma_attrs;
2671 caddr_t memp;
2672 ddi_dma_cookie_t cookie;
2675 /*
2676 * re-alloc when it has already alloced
2677 */
2681 }
2683 /*
2684 * The size of the reply frame pool is:
2685 * Number of Reply Frames * Reply Frame Size
2686 */
2689 /*
2690 * set the DMA attributes. System Reply Message Frames must be
2691 * aligned on a 4-byte boundry. This is the default.
2692 */
2696 /*
2697 * allocate the reply frame pool
2698 */
2703 }
2705 /*
2706 * Store the reply frame memory address. This chip uses this
2707 * address to dma to and from the driver's frame. The second
2708 * address is the address mpt uses to process the frame.
2709 */
2713 /*
2714 * Clear the reply frame pool.
2715 */
2719 }
2721 static int
2723 {
2724 ddi_dma_attr_t frame_dma_attrs;
2725 caddr_t memp;
2726 ddi_dma_cookie_t cookie;
2729 /*
2730 * re-alloc when it has already alloced
2731 */
2735 }
2737 /*
2738 * The reply free queue size is:
2739 * Reply Free Queue Depth * 4
2740 * The "4" is the size of one 32 bit address (low part of 64-bit
2741 * address)
2742 */
2745 /*
2746 * set the DMA attributes The Reply Free Queue must be aligned on a
2747 * 16-byte boundry.
2748 */
2753 /*
2754 * allocate the reply free queue
2755 */
2760 }
2762 /*
2763 * Store the reply free queue memory address. This chip uses this
2764 * address to read from the reply free queue. The second address
2765 * is the address mpt uses to manage the queue.
2766 */
2770 /*
2771 * Clear the reply free queue memory.
2772 */
2776 }
2778 static int
2780 {
2781 ddi_dma_attr_t frame_dma_attrs;
2782 caddr_t memp;
2783 ddi_dma_cookie_t cookie;
2786 /*
2787 * re-alloc when it has already alloced
2788 */
2792 }
2794 /*
2795 * The reply descriptor post queue size is:
2796 * Reply Descriptor Post Queue Depth * 8
2797 * The "8" is the size of each descriptor (8 bytes or 64 bits).
2798 */
2801 /*
2802 * set the DMA attributes. The Reply Descriptor Post Queue must be
2803 * aligned on a 16-byte boundry.
2804 */
2809 /*
2810 * allocate the reply post queue
2811 */
2816 }
2818 /*
2819 * Store the reply descriptor post queue memory address. This chip
2820 * uses this address to write to the reply descriptor post queue. The
2821 * second address is the address mpt uses to manage the queue.
2822 */
2826 /*
2827 * Clear the reply post queue memory.
2828 */
2832 }
2834 static void
2836 {
2840 }
2841 }
2843 static int
2845 {
2851 }
2853 }
2855 }
2857 static void
2859 {
2864 }
2865 }
2867 static void
2869 {
2872 }
2874 static void
2876 {
2879 /*
2880 * Free up any allocated memory
2881 */
2885 }
2891 }
2896 }
2901 }
2906 }
2911 }
2912 }
2914 static int
2916 {
2922 /* Get the target num */
2928 /*
2929 * Stick in the address of form "pPHY,LUN"
2930 */
2935 /*
2936 * Stick in the address of the form "wWWN,LUN"
2937 */
2942 }
2948 }
2950 }
2952 /*
2953 * tran_tgt_init(9E) - target device instance initialization
2954 */
2955 static int
2958 {
2961 /*
2962 * At this point, the scsi_device structure already exists
2963 * and has been initialized.
2964 *
2965 * Use this function to allocate target-private data structures,
2966 * if needed by this HBA. Add revised flow-control and queue
2967 * properties for child here, if desired and if you can tell they
2968 * support tagged queueing by now.
2969 */
2978 mptsas_target_addr_t addr;
2990 }
2991 /*
2992 * phymask is 0 means the virtual port for RAID
2993 */
2998 /*
2999 * Very bad news if this occurs. Somehow scsi_vhci has
3000 * lost the pathinfo node for this target.
3001 */
3003 }
3006 DDI_PROP_SUCCESS) {
3009 }
3015 }
3017 }
3023 DDI_PROP_SUCCESS) {
3026 }
3030 }
3031 }
3042 sas_wwn);
3044 }
3047 KM_SLEEP);
3051 }
3055 }
3060 MPI2_SAS_DEVICE_INFO_ATAPI_DEVICE)) {
3071 /*
3072 * According SCSI/ATA Translation -2 (SAT-2) revision 01a
3073 * chapter 12.4.2 VPD page 89h includes 512 bytes ATA IDENTIFY
3074 * DEVICE data or ATA IDENTIFY PACKET DEVICE data.
3075 */
3083 }
3088 }
3099 /*
3100 * override SCSA "inquiry-*" properties
3101 */
3113 }
3116 }
3119 }
3120 /*
3121 * tran_tgt_free(9E) - target device instance deallocation
3122 */
3123 static void
3126 {
3134 }
3135 }
3137 /*
3138 * scsi_pkt handling
3139 *
3140 * Visible to the external world via the transport structure.
3141 */
3143 /*
3144 * Notes:
3145 * - transport the command to the addressed SCSI target/lun device
3146 * - normal operation is to schedule the command to be transported,
3147 * and return TRAN_ACCEPT if this is successful.
3148 * - if NO_INTR, tran_start must poll device for command completion
3149 */
3150 static int
3152 {
3165 /*
3166 * prepare the pkt before taking mutex.
3167 */
3171 }
3173 /*
3174 * Send the command to target/lun, however your HBA requires it.
3175 * If busy, return TRAN_BUSY; if there's some other formatting error
3176 * in the packet, return TRAN_BADPKT; otherwise, fall through to the
3177 * return of TRAN_ACCEPT.
3178 *
3179 * Remember that access to shared resources, including the mptsas_t
3180 * data structure and the HBA hardware registers, must be protected
3181 * with mutexes, here and everywhere.
3182 *
3183 * Also remember that at interrupt time, you'll get an argument
3184 * to the interrupt handler which is a pointer to your mptsas_t
3185 * structure; you'll have to remember which commands are outstanding
3186 * and which scsi_pkt is the currently-running command so the
3187 * interrupt handler can refer to the pkt to set completion
3188 * status, call the target driver back through pkt_comp, etc.
3189 *
3190 * If the instance lock is held by other thread, don't spin to wait
3191 * for it. Instead, queue the cmd and next time when the instance lock
3192 * is not held, accept all the queued cmd. A extra tx_waitq is
3193 * introduced to protect the queue.
3194 *
3195 * The polled cmd will not be queud and accepted as usual.
3196 *
3197 * Under the tx_waitq mutex, record whether a thread is draining
3198 * the tx_waitq. An IO requesting thread that finds the instance
3199 * mutex contended appends to the tx_waitq and while holding the
3200 * tx_wait mutex, if the draining flag is not set, sets it and then
3201 * proceeds to spin for the instance mutex. This scheme ensures that
3202 * the last cmd in a burst be processed.
3203 *
3204 * we enable this feature only when the helper threads are enabled,
3205 * at which we think the loads are heavy.
3206 *
3207 * per instance mutex m_tx_waitq_mutex is introduced to protect the
3208 * m_tx_waitqtail, m_tx_waitq, m_tx_draining.
3209 */
3221 /*
3222 * ptgt->m_dr_flag is protected by m_mutex or
3223 * m_tx_waitq_mutex. In this case, m_tx_waitq_mutex
3224 * is acquired.
3225 */
3228 /*
3229 * The command should be allowed to
3230 * retry by returning TRAN_BUSY to
3231 * to stall the I/O's which come from
3232 * scsi_vhci since the device/path is
3233 * in unstable state now.
3234 */
3238 /*
3239 * The device is offline, just fail the
3240 * command by returning
3241 * TRAN_FATAL_ERROR.
3242 */
3245 }
3246 }
3258 }
3259 }
3262 /*
3263 * ptgt->m_dr_flag is protected by m_mutex or m_tx_waitq_mutex
3264 * in this case, m_mutex is acquired.
3265 */
3268 /*
3269 * commands should be allowed to retry by
3270 * returning TRAN_BUSY to stall the I/O's
3271 * which come from scsi_vhci since the device/
3272 * path is in unstable state now.
3273 */
3277 /*
3278 * The device is offline, just fail the
3279 * command by returning TRAN_FATAL_ERROR.
3280 */
3283 }
3284 }
3287 }
3290 }
3292 /*
3293 * Accept all the queued cmds(if any) before accept the current one.
3294 */
3295 static int
3297 {
3302 /*
3303 * The call to mptsas_accept_tx_waitq() must always be performed
3304 * because that is where mpt->m_tx_draining is cleared.
3305 */
3309 /*
3310 * ptgt->m_dr_flag is protected by m_mutex or m_tx_waitq_mutex
3311 * in this case, m_mutex is acquired.
3312 */
3315 /*
3316 * The command should be allowed to retry by returning
3317 * TRAN_BUSY to stall the I/O's which come from
3318 * scsi_vhci since the device/path is in unstable state
3319 * now.
3320 */
3323 /*
3324 * The device is offline, just fail the command by
3325 * return TRAN_FATAL_ERROR.
3326 */
3328 }
3329 }
3333 }
3335 static int
3337 {
3350 }
3351 }
3353 /*
3354 * reset the throttle if we were draining
3355 */
3361 }
3363 /*
3364 * If HBA is being reset, the DevHandles are being re-initialized,
3365 * which means that they could be invalid even if the target is still
3366 * attached. Check if being reset and if DevHandle is being
3367 * re-initialized. If this is the case, return BUSY so the I/O can be
3368 * retried later.
3369 */
3378 }
3379 }
3381 /*
3382 * If device handle has already been invalidated, just
3383 * fail the command. In theory, command from scsi_vhci
3384 * client is impossible send down command with invalid
3385 * devhdl since devhdl is set after path offline, target
3386 * driver is not suppose to select a offlined path.
3387 */
3398 }
3399 }
3400 /*
3401 * The first case is the normal case. mpt gets a command from the
3402 * target driver and starts it.
3403 * Since SMID 0 is reserved and the TM slot is reserved, the actual max
3404 * commands is m_max_requests - 2.
3405 */
3416 }
3418 /*
3419 * Add this pkt to the work queue
3420 */
3426 /*
3427 * Only flush the doneq if this is not a TM
3428 * cmd. For TM cmds the flushing of the
3429 * doneq will be done in those routines.
3430 */
3433 }
3434 }
3435 }
3437 }
3439 int
3441 {
3448 /*
3449 * Account for reserved TM request slot and reserved SMID of 0.
3450 */
3453 /*
3454 * Find the next available slot, beginning at m_rotor. If no slot is
3455 * available, we'll return FALSE to indicate that. This mechanism
3456 * considers only the normal slots, not the reserved slot 0 nor the
3457 * task management slot m_n_normal + 1. The rotor is left to point to
3458 * the normal slot after the one we select, unless we select the last
3459 * normal slot in which case it returns to slot 1.
3460 */
3480 /*
3481 * only increment per target ncmds if this is not a
3482 * command that has no target associated with it (i.e. a
3483 * event acknoledgment)
3484 */
3486 /*
3487 * Expiration time is set in mptsas_start_cmd
3488 */
3492 /*
3493 * Initialize expiration time for passthrough commands,
3494 */
3497 }
3499 }
3501 /*
3502 * prepare the pkt:
3503 * the pkt may have been resubmitted or just reused so
3504 * initialize some fields and do some checks.
3505 */
3506 static int
3508 {
3513 /*
3514 * Reinitialize some fields that need it; the packet may
3515 * have been resubmitted
3516 */
3524 /*
3525 * zero status byte.
3526 */
3532 /*
3533 * consistent packets need to be sync'ed first
3534 * (only for data going out)
3535 */
3539 DDI_DMA_SYNC_FORDEV);
3540 }
3541 }
3548 }
3550 /*
3551 * tran_init_pkt(9E) - allocate scsi_pkt(9S) for command
3552 *
3553 * One of three possibilities:
3554 * - allocate scsi_pkt
3555 * - allocate scsi_pkt and DMA resources
3556 * - allocate DMA resources to an already-allocated pkt
3557 */
3562 {
3565 uint_t oldcookiec;
3574 tran_tgt_private;
3578 }
3587 #ifdef MPTSAS_TEST_EXTRN_ALLOC
3589 #endif
3595 /*
3596 * Allocate the new packet.
3597 */
3599 ddi_dma_handle_t save_dma_handle;
3627 /*
3628 * We are going to allocate external packet space which
3629 * might include the sense data buffer for DMA so we
3630 * need to increase the reference counter here. In a
3631 * case the HBA is in reset we just simply free the
3632 * allocated packet and bail out.
3633 */
3641 }
3646 /*
3647 * if extern alloc fails, all will be
3648 * deallocated, including cmd
3649 */
3654 /*
3655 * If the external packet space allocation
3656 * failed, or we didn't allocate the sense
3657 * data buffer for DMA we need to decrease the
3658 * reference counter.
3659 */
3669 /*
3670 * if extern allocation fails, it will
3671 * deallocate the new pkt as well
3672 */
3674 }
3675 }
3676 }
3682 }
3685 /* grab cmd->cmd_cookiec here as oldcookiec */
3689 /*
3690 * If the dma was broken up into PARTIAL transfers cmd_nwin will be
3691 * greater than 0 and we'll need to grab the next dma window
3692 */
3693 /*
3694 * SLM-not doing extra command frame right now; may add later
3695 */
3699 /*
3700 * Make sure we havn't gone past the the total number
3701 * of windows
3702 */
3705 }
3710 }
3712 }
3717 }
3719 /*
3720 * DMA resource allocation. This version assumes your
3721 * HBA has some sort of bus-mastering or onboard DMA capability, with a
3722 * scatter-gather list of length MPTSAS_MAX_DMA_SEGS, as given in the
3723 * ddi_dma_attr_t structure and passed to scsi_impl_dmaget.
3724 */
3731 /*
3732 * Set up DMA memory and position to the next DMA segment.
3733 */
3742 }
3746 }
3750 }
3752 /*
3753 * workaround for byte hole issue on psycho and
3754 * schizo pre 2.1
3755 */
3760 }
3786 }
3790 }
3792 }
3794 get_dma_cookies:
3804 }
3806 }
3808 /*
3809 * Allocate extra SGL buffer if needed.
3810 */
3814 DDI_FAILURE) {
3820 }
3822 }
3823 }
3825 /*
3826 * Always use scatter-gather transfer
3827 * Use the loop below to store physical addresses of
3828 * DMA segments, from the DMA cookies, into your HBA's
3829 * scatter-gather list.
3830 * We need to ensure we have enough kmem alloc'd
3831 * for the sg entries since we are no longer using an
3832 * array inside mptsas_cmd_t.
3833 *
3834 * We check cmd->cmd_cookiec against oldcookiec so
3835 * the scatter-gather list is correctly allocated
3836 */
3841 oldcookiec);
3843 }
3844 }
3852 "unable to kmem_alloc enough memory "
3854 /*
3855 * if we have an ENOMEM condition we need to behave
3856 * the same way as the rest of this routine
3857 */
3862 }
3864 }
3865 }
3871 /*
3872 * store the first segment into the S/G list
3873 */
3880 /*
3881 * dmacount counts the size of the dma for this window
3882 * (if partial dma is being used). totaldmacount
3883 * keeps track of the total amount of dma we have
3884 * transferred for all the windows (needed to calculate
3885 * the resid value below).
3886 */
3890 /*
3891 * We already stored the first DMA scatter gather segment,
3892 * start at 1 if we need to store more.
3893 */
3895 /*
3896 * Get next DMA cookie
3897 */
3900 dmap++;
3905 /*
3906 * store the segment parms into the S/G list
3907 */
3913 }
3915 /*
3916 * If this was partially allocated we set the resid
3917 * the amount of data NOT transferred in this window
3918 * If there is only one window, the resid will be 0
3919 */
3923 }
3925 }
3927 /*
3928 * tran_destroy_pkt(9E) - scsi_pkt(9s) deallocation
3929 *
3930 * Notes:
3931 * - also frees DMA resources if allocated
3932 * - implicit DMA synchonization
3933 */
3934 static void
3936 {
3946 }
3951 }
3965 /*
3966 * If the packet had the sense data buffer for DMA allocated we
3967 * need to decrease the reference counter.
3968 */
3976 }
3977 }
3978 }
3980 /*
3981 * kmem cache constructor and destructor:
3982 * When constructing, we bzero the cmd and allocate the dma handle
3983 * When destructing, just free the dma handle
3984 */
3985 static int
3987 {
3996 /*
3997 * allocate a dma handle
3998 */
4003 }
4005 }
4007 static void
4009 {
4019 }
4020 }
4022 static int
4024 {
4027 ddi_dma_attr_t frame_dma_attr;
4029 ddi_dma_cookie_t cookie;
4030 uint_t ncookie;
4043 }
4055 }
4066 }
4068 /*
4069 * Store the SGL memory address. This chip uses this
4070 * address to dma to and from the driver. The second
4071 * address is the address mpt uses to fill in the SGL.
4072 */
4076 }
4078 static void
4080 {
4092 }
4094 }
4096 /*
4097 * Figure out if we need to use a different method for the request
4098 * sense buffer and allocate from the map if necessary.
4099 */
4100 static boolean_t
4102 {
4106 /* Sense length is limited to an 8 bit value in MPI Spec. */
4123 }
4126 }
4128 /*
4129 * allocate and deallocate external pkt space (ie. not part of mptsas_cmd)
4130 * for non-standard length cdb, pkt_private, status areas
4131 * if allocation fails, then deallocate all external space and the pkt
4132 */
4133 /* ARGSUSED */
4134 static int
4137 {
4151 }
4154 }
4158 }
4161 }
4165 }
4169 /* allocate sense data buf for DMA */
4174 }
4176 fail:
4179 }
4181 /*
4182 * deallocate external pkt space and deallocate the pkt
4183 */
4184 static void
4186 {
4193 /* NOTREACHED */
4194 }
4198 }
4201 }
4204 }
4207 }
4210 }
4212 /*
4213 * tran_sync_pkt(9E) - explicit DMA synchronization
4214 */
4215 /*ARGSUSED*/
4216 static void
4218 {
4228 }
4229 }
4231 /*
4232 * tran_dmafree(9E) - deallocate DMA resources allocated for command
4233 */
4234 /*ARGSUSED*/
4235 static void
4237 {
4247 }
4250 }
4252 static void
4254 {
4258 DDI_DMA_SYNC_FORCPU);
4259 }
4261 }
4263 static void
4266 {
4267 pMpi2SGESimple64_t sge;
4284 MPI2_SGE_FLAGS_SYSTEM_ADDRESS |
4285 MPI2_SGE_FLAGS_64_BIT_ADDRESSING) <<
4286 MPI2_SGE_FLAGS_SHIFT);
4288 /*
4289 * If this is the last cookie, we set the flags
4290 * to indicate so
4291 */
4294 }
4297 MPI2_SGE_FLAGS_SHIFT);
4300 MPI2_SGE_FLAGS_SHIFT);
4301 }
4303 dmap++;
4304 sge++;
4305 }
4306 }
4308 static void
4311 {
4312 pMpi2SGESimple64_t sge;
4313 pMpi2SGEChain64_t sgechain;
4315 uint_t cookiec;
4319 /*
4320 * Save the number of entries in the DMA
4321 * Scatter/Gather list
4322 */
4325 /*
4326 * Hereby we start to deal with multiple frames.
4327 * The process is as follows:
4328 * 1. Determine how many frames are needed for SGL element
4329 * storage; Note that all frames are stored in contiguous
4330 * memory space and in 64-bit DMA mode each element is
4331 * 3 double-words (12 bytes) long.
4332 * 2. Fill up the main frame. We need to do this separately
4333 * since it contains the SCSI IO request header and needs
4334 * dedicated processing. Note that the last 4 double-words
4335 * of the SCSI IO header is for SGL element storage
4336 * (MPI2_SGE_IO_UNION).
4337 * 3. Fill the chain element in the main frame, so the DMA
4338 * engine can use the following frames.
4339 * 4. Enter a loop to fill the remaining frames. Note that the
4340 * last frame contains no chain element. The remaining
4341 * frames go into the mpt SGL buffer allocated on the fly,
4342 * not immediately following the main message frame, as in
4343 * Gen1.
4344 * Some restrictions:
4345 * 1. For 64-bit DMA, the simple element and chain element
4346 * are both of 3 double-words (12 bytes) in size, even
4347 * though all frames are stored in the first 4G of mem
4348 * range and the higher 32-bits of the address are always 0.
4349 * 2. On some controllers (like the 1064/1068), a frame can
4350 * hold SGL elements with the last 1 or 2 double-words
4351 * (4 or 8 bytes) un-used. On these controllers, we should
4352 * recognize that there's not enough room for another SGL
4353 * element and move the sge pointer to the next frame.
4354 */
4361 /*
4362 * Sgemax is the number of SGE's that will fit
4363 * each extra frame and frames is total
4364 * number of frames we'll need. 1 sge entry per
4365 * frame is reseverd for the chain element thus the -1 below.
4366 */
4371 /*
4372 * A little check to see if we need to round up the number
4373 * of frames we need
4374 */
4380 }
4384 /*
4385 * First fill in the main frame
4386 */
4390 MPI2_SGE_FLAGS_SHIFT));
4393 j++;
4395 /*
4396 * Fill in the chain element in the main frame.
4397 * About calculation on ChainOffset:
4398 * 1. Struct msg_scsi_io_request has 4 double-words (16 bytes)
4399 * in the end reserved for SGL element storage
4400 * (MPI2_SGE_IO_UNION); we should count it in our
4401 * calculation. See its definition in the header file.
4402 * 2. Constant j is the counter of the current SGL element
4403 * that will be processed, and (j - 1) is the number of
4404 * SGL elements that have been processed (stored in the
4405 * main frame).
4406 * 3. ChainOffset value should be in units of double-words (4
4407 * bytes) so the last value should be divided by 4.
4408 */
4415 MPI2_SGE_FLAGS_SYSTEM_ADDRESS |
4416 MPI2_SGE_FLAGS_64_BIT_ADDRESSING);
4419 /*
4420 * The size of the next frame is the accurate size of space
4421 * (in bytes) used to store the SGL elements. j is the counter
4422 * of SGL elements. (j - 1) is the number of SGL elements that
4423 * have been processed (stored in frames).
4424 */
4433 }
4441 /*
4442 * If there are more than 2 frames left we have to
4443 * fill in the next chain offset to the location of
4444 * the chain element in the next frame.
4445 * sgemax is the number of simple elements in an extra
4446 * frame. Note that the value NextChainOffset should be
4447 * in double-words (4 bytes).
4448 */
4454 }
4456 /*
4457 * Jump to next frame;
4458 * Starting here, chain buffers go into the per command SGL.
4459 * This buffer is allocated when chain buffers are needed.
4460 */
4464 /*
4465 * Start filling in frames with SGE's. If we
4466 * reach the end of frame and still have SGE's
4467 * to fill we need to add a chain element and
4468 * use another frame. j will be our counter
4469 * for what cookie we are at and i will be
4470 * the total cookiec. k is the current frame
4471 */
4475 /*
4476 * If we have reached the end of frame
4477 * and we have more SGE's to fill in
4478 * we have to fill the final entry
4479 * with a chain element and then
4480 * continue to the next frame
4481 */
4484 j--;
4485 chainflags = (
4486 MPI2_SGE_FLAGS_CHAIN_ELEMENT |
4487 MPI2_SGE_FLAGS_SYSTEM_ADDRESS |
4488 MPI2_SGE_FLAGS_64_BIT_ADDRESSING);
4491 /*
4492 * k is the frame counter and (k + 1)
4493 * is the number of the next frame.
4494 * Note that frames are in contiguous
4495 * memory space.
4496 */
4501 nframe_phys_addr);
4506 /*
4507 * If there are more than 2 frames left
4508 * we have to next chain offset to
4509 * the location of the chain element
4510 * in the next frame and fill in the
4511 * length of the next chain
4512 */
4525 /*
4526 * This is the last frame. Set
4527 * the NextChainOffset to 0 and
4528 * Length is the total size of
4529 * all remaining simple elements
4530 */
4538 }
4540 /* Jump to the next frame */
4546 }
4559 MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
4560 MPI2_SGE_FLAGS_SYSTEM_ADDRESS |
4561 MPI2_SGE_FLAGS_64_BIT_ADDRESSING) <<
4562 MPI2_SGE_FLAGS_SHIFT);
4564 /*
4565 * If we are at the end of the frame and
4566 * there is another frame to fill in
4567 * we set the last simple element as last
4568 * element
4569 */
4573 MPI2_SGE_FLAGS_SHIFT);
4574 }
4576 /*
4577 * If this is the final cookie we
4578 * indicate it by setting the flags
4579 */
4583 MPI2_SGE_FLAGS_END_OF_BUFFER |
4584 MPI2_SGE_FLAGS_END_OF_LIST) <<
4585 MPI2_SGE_FLAGS_SHIFT);
4586 }
4588 flags |=
4590 MPI2_SGE_FLAGS_SHIFT);
4592 flags |=
4594 MPI2_SGE_FLAGS_SHIFT);
4595 }
4598 dmap++;
4599 sge++;
4600 }
4601 }
4603 /*
4604 * Sync DMA with the chain buffers that were just created
4605 */
4607 }
4609 static void
4612 {
4613 pMpi2IeeeSgeSimple64_t ieeesge;
4632 MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR);
4634 /*
4635 * If this is the last cookie, we set the flags
4636 * to indicate so
4637 */
4640 }
4643 dmap++;
4644 ieeesge++;
4645 }
4646 }
4648 static void
4651 {
4652 pMpi2IeeeSgeSimple64_t ieeesge;
4653 pMpi25IeeeSgeChain64_t ieeesgechain;
4655 uint_t cookiec;
4659 /*
4660 * Save the number of entries in the DMA
4661 * Scatter/Gather list
4662 */
4667 /*
4668 * Hereby we start to deal with multiple frames.
4669 * The process is as follows:
4670 * 1. Determine how many frames are needed for SGL element
4671 * storage; Note that all frames are stored in contiguous
4672 * memory space and in 64-bit DMA mode each element is
4673 * 4 double-words (16 bytes) long.
4674 * 2. Fill up the main frame. We need to do this separately
4675 * since it contains the SCSI IO request header and needs
4676 * dedicated processing. Note that the last 4 double-words
4677 * of the SCSI IO header is for SGL element storage
4678 * (MPI2_SGE_IO_UNION).
4679 * 3. Fill the chain element in the main frame, so the DMA
4680 * engine can use the following frames.
4681 * 4. Enter a loop to fill the remaining frames. Note that the
4682 * last frame contains no chain element. The remaining
4683 * frames go into the mpt SGL buffer allocated on the fly,
4684 * not immediately following the main message frame, as in
4685 * Gen1.
4686 * Restrictions:
4687 * For 64-bit DMA, the simple element and chain element
4688 * are both of 4 double-words (16 bytes) in size, even
4689 * though all frames are stored in the first 4G of mem
4690 * range and the higher 32-bits of the address are always 0.
4691 */
4698 /*
4699 * Sgemax is the number of SGE's that will fit
4700 * each extra frame and frames is total
4701 * number of frames we'll need. 1 sge entry per
4702 * frame is reseverd for the chain element thus the -1 below.
4703 */
4708 /*
4709 * A little check to see if we need to round up the number
4710 * of frames we need
4711 */
4717 }
4722 /*
4723 * First fill in the main frame
4724 */
4729 j++;
4731 /*
4732 * Fill in the chain element in the main frame.
4733 * About calculation on ChainOffset:
4734 * 1. Struct msg_scsi_io_request has 4 double-words (16 bytes)
4735 * in the end reserved for SGL element storage
4736 * (MPI2_SGE_IO_UNION); we should count it in our
4737 * calculation. See its definition in the header file.
4738 * 2. Constant j is the counter of the current SGL element
4739 * that will be processed, and (j - 1) is the number of
4740 * SGL elements that have been processed (stored in the
4741 * main frame).
4742 * 3. ChainOffset value should be in units of quad-words (16
4743 * bytes) so the last value should be divided by 16.
4744 */
4751 MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR);
4754 /*
4755 * The size of the next frame is the accurate size of space
4756 * (in bytes) used to store the SGL elements. j is the counter
4757 * of SGL elements. (j - 1) is the number of SGL elements that
4758 * have been processed (stored in frames).
4759 */
4769 }
4777 /*
4778 * If there are more than 2 frames left we have to
4779 * fill in the next chain offset to the location of
4780 * the chain element in the next frame.
4781 * sgemax is the number of simple elements in an extra
4782 * frame. Note that the value NextChainOffset should be
4783 * in double-words (4 bytes).
4784 */
4790 }
4792 /*
4793 * Jump to next frame;
4794 * Starting here, chain buffers go into the per command SGL.
4795 * This buffer is allocated when chain buffers are needed.
4796 */
4800 /*
4801 * Start filling in frames with SGE's. If we
4802 * reach the end of frame and still have SGE's
4803 * to fill we need to add a chain element and
4804 * use another frame. j will be our counter
4805 * for what cookie we are at and i will be
4806 * the total cookiec. k is the current frame
4807 */
4811 /*
4812 * If we have reached the end of frame
4813 * and we have more SGE's to fill in
4814 * we have to fill the final entry
4815 * with a chain element and then
4816 * continue to the next frame
4817 */
4820 j--;
4821 chainflags =
4822 MPI2_IEEE_SGE_FLAGS_CHAIN_ELEMENT |
4823 MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR;
4826 /*
4827 * k is the frame counter and (k + 1)
4828 * is the number of the next frame.
4829 * Note that frames are in contiguous
4830 * memory space.
4831 */
4836 nframe_phys_addr);
4841 /*
4842 * If there are more than 2 frames left
4843 * we have to next chain offset to
4844 * the location of the chain element
4845 * in the next frame and fill in the
4846 * length of the next chain
4847 */
4862 /*
4863 * This is the last frame. Set
4864 * the NextChainOffset to 0 and
4865 * Length is the total size of
4866 * all remaining simple elements
4867 */
4875 }
4877 /* Jump to the next frame */
4883 }
4894 MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR);
4896 /*
4897 * If we are at the end of the frame and
4898 * there is another frame to fill in
4899 * do we need to do anything?
4900 * if ((l == sgemax) && (k != frames)) {
4901 * }
4902 */
4904 /*
4905 * If this is the final cookie set end of list.
4906 */
4909 }
4912 dmap++;
4913 ieeesge++;
4914 }
4915 }
4917 /*
4918 * Sync DMA with the chain buffers that were just created
4919 */
4921 }
4923 static void
4926 {
4931 /*
4932 * Set read/write bit in control.
4933 */
4938 }
4942 /*
4943 * We have 4 cases here. First where we can fit all the
4944 * SG elements into the main frame, and the case
4945 * where we can't. The SG element is also different when using
4946 * MPI2.5 interface.
4947 * If we have more cookies than we can attach to a frame
4948 * we will need to use a chain element to point
4949 * a location of memory where the rest of the S/G
4950 * elements reside.
4951 */
4956 MPI25_IEEE_SGE_FLAGS_END_OF_LIST);
4961 | MPI2_SGE_FLAGS_END_OF_BUFFER
4963 MPI2_SGE_FLAGS_SHIFT));
4964 }
4970 }
4971 }
4972 }
4974 /*
4975 * Interrupt handling
4976 * Utility routine. Poll for status of a command sent to HBA
4977 * without interrupts (a FLAG_NOINTR command).
4978 */
4979 int
4981 {
4988 }
4990 /*
4991 * Wait, using drv_usecwait(), long enough for the command to
4992 * reasonably return from the target if the target isn't
4993 * "dead". A polled command may well be sent from scsi_poll, and
4994 * there are retries built in to scsi_poll if the transport
4995 * accepted the packet (TRAN_ACCEPT). scsi_poll waits 1 second
4996 * and retries the transport up to scsi_poll_busycnt times
4997 * (currently 60) if
4998 * 1. pkt_reason is CMD_INCOMPLETE and pkt_state is 0, or
4999 * 2. pkt_reason is CMD_CMPLT and *pkt_scbp has STATUS_BUSY
5000 *
5001 * limit the waiting to avoid a hang in the event that the
5002 * cmd never gets started but we are still receiving interrupts
5003 */
5009 }
5010 }
5014 /*
5015 * this isn't supposed to happen, the hba must be wedged
5016 * Mark this cmd as a timeout.
5017 */
5029 /* find and remove it from the waitq */
5032 }
5034 }
5038 }
5040 /*
5041 * Used for polling cmds and TM function
5042 */
5043 static int
5045 {
5047 pMpi2ReplyDescriptorsUnion_t reply_desc_union;
5054 /*
5055 * Get the current interrupt mask and disable interrupts. When
5056 * re-enabling ints, set mask to saved value.
5057 */
5061 /*
5062 * Keep polling for at least (polltime * 1000) seconds
5063 */
5066 DDI_DMA_SYNC_FORCPU);
5077 }
5079 /*
5080 * The reply is valid, process it according to its
5081 * type.
5082 */
5087 }
5089 /*
5090 * Update the global reply index
5091 */
5096 /*
5097 * Re-enable interrupts and quit.
5098 */
5100 int_mask);
5103 }
5105 /*
5106 * Clear polling flag, re-enable interrupts and quit.
5107 */
5111 }
5113 static void
5115 pMpi2ReplyDescriptorsUnion_t reply_desc)
5116 {
5117 pMpi2SCSIIOSuccessReplyDescriptor_t scsi_io_success;
5128 /*
5129 * This is a success reply so just complete the IO. First, do a sanity
5130 * check on the SMID. The final slot is used for TM requests, which
5131 * would not come into this reply handler.
5132 */
5135 SMID);
5138 }
5142 /*
5143 * print warning and return if the slot is empty
5144 */
5149 }
5153 STATE_GOT_STATUS);
5156 }
5165 }
5168 /*
5169 * The target returned QFULL or busy, do not add tihs
5170 * pkt to the doneq since the hba will retry
5171 * this cmd.
5172 *
5173 * The pkt has already been resubmitted in
5174 * mptsas_handle_qfull() or in mptsas_check_scsi_io_error().
5175 * Remove this cmd_flag here.
5176 */
5180 }
5181 }
5183 static void
5185 pMpi2ReplyDescriptorsUnion_t reply_desc)
5186 {
5187 pMpi2AddressReplyDescriptor_t address_reply;
5188 pMPI2DefaultReply_t reply;
5205 /*
5206 * If reply frame is not in the proper range we should ignore this
5207 * message and exit the interrupt handler.
5208 */
5219 }
5222 DDI_DMA_SYNC_FORCPU);
5224 reply_frame_dma_baseaddr));
5230 /*
5231 * don't get slot information and command for events since these values
5232 * don't exist
5233 */
5236 /*
5237 * This could be a TM reply, which use the last allocated SMID,
5238 * so allow for that.
5239 */
5244 DDI_SERVICE_UNAFFECTED);
5246 }
5250 /*
5251 * print warning and return if the slot is empty
5252 */
5257 }
5268 }
5270 }
5271 /*
5272 * Depending on the function, we need to handle
5273 * the reply frame (and cmd) differently.
5274 */
5282 cmd);
5295 /*
5296 * Record the event if its type is enabled in
5297 * this mpt instance by ioctl.
5298 */
5301 /*
5302 * Handle time critical events
5303 * NOT_RESPONDING/ADDED only now
5304 */
5306 /*
5307 * Would not return main process,
5308 * just let taskq resolve ack action
5309 * and ack would be sent in taskq thread
5310 */
5312 }
5317 }
5323 /*
5324 * Return the reply frame to the free queue.
5325 */
5330 DDI_DMA_SYNC_FORDEV);
5333 }
5337 }
5340 /*
5341 * If SMID is 0, this implies that the reply is due to a
5342 * release function with a status that the buffer has been
5343 * released. Set the buffer flags accordingly.
5344 */
5351 pBuffer =
5356 }
5358 /*
5359 * Normal handling of diag post reply with SMID.
5360 */
5363 /*
5364 * print warning and return if the slot is empty
5365 */
5370 }
5374 }
5379 }
5381 /*
5382 * Return the reply frame to the free queue.
5383 */
5386 reply_addr);
5388 DDI_DMA_SYNC_FORDEV);
5391 }
5399 /*
5400 * The target returned QFULL or busy, do not add this
5401 * pkt to the doneq since the hba will retry
5402 * this cmd.
5403 *
5404 * The pkt has already been resubmitted in
5405 * mptsas_handle_qfull() or in mptsas_check_scsi_io_error().
5406 * Remove this cmd_flag here.
5407 */
5411 }
5412 }
5414 #ifdef MPTSAS_DEBUG
5416 #endif
5418 static void
5421 {
5448 }
5455 scsi_state);
5456 }
5465 /*
5466 * if loginfo PL_LOGINFO_CODE_IO_DEVICE_MISSING_DELAY_RETRY
5467 * 0x31170000 comes, that means the device missing delay
5468 * is in progressing, the command need retry later.
5469 */
5472 }
5476 MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE)) {
5481 DRAIN_THROTTLE);
5482 }
5484 }
5492 }
5493 }
5506 }
5509 }
5518 DDI_DMA_SYNC_FORKERNEL);
5519 #ifdef MPTSAS_DEBUG
5523 #endif
5526 cmd_rqs_len));
5529 /*
5530 * Set proper status for pkt if autosense was valid
5531 */
5535 }
5537 /*
5538 * ASC=0x47 is parity error
5539 * ASC=0x48 is initiator detected error received
5540 */
5545 }
5547 /*
5548 * ASC/ASCQ=0x3F/0x0E means report_luns data changed
5549 * ASC/ASCQ=0x25/0x00 means invalid lun
5550 */
5561 KM_NOSLEEP);
5564 "resource for handle SAS dynamic"
5567 }
5576 mptsas_handle_dr,
5582 "for handle SAS dynamic reconfigure"
5584 }
5585 }
5594 }
5616 }
5620 /*
5621 * When timeout requested, propagate
5622 * proper reason and statistics to
5623 * target drivers.
5624 */
5629 STAT_BUS_RESET);
5630 }
5645 /*
5646 * set throttles to drain
5647 */
5651 }
5653 /*
5654 * retry command
5655 */
5668 }
5685 }
5686 }
5688 static void
5691 {
5709 }
5722 /*
5723 * Check for invalid DevHandle of 0 in case application
5724 * sends bad command. DevHandle of 0 could cause problems.
5725 */
5731 task_type);
5732 }
5736 task_type);
5739 }
5740 }
5742 static void
5744 {
5755 }
5760 }
5764 }
5766 }
5772 }
5775 /*
5776 * mpt interrupt handler.
5777 */
5778 static uint_t
5780 {
5782 pMpi2ReplyDescriptorsUnion_t reply_desc_union;
5789 /*
5790 * If interrupts are shared by two channels then check whether this
5791 * interrupt is genuinely for this channel by making sure first the
5792 * chip is in high power state.
5793 */
5798 }
5800 /*
5801 * If polling, interrupt was triggered by some shared interrupt because
5802 * IOC interrupts are disabled during polling, so polling routine will
5803 * handle any replies. Considering this, if polling is happening,
5804 * return with interrupt unclaimed.
5805 */
5810 }
5812 /*
5813 * Read the istat register.
5814 */
5816 /*
5817 * read fifo until empty.
5818 */
5823 DDI_DMA_SYNC_FORCPU);
5832 }
5834 /*
5835 * The reply is valid, process it according to its
5836 * type. Also, set a flag for updating the reply index
5837 * after they've all been processed.
5838 */
5843 /*
5844 * Increment post index and roll over if needed.
5845 */
5848 }
5849 }
5851 /*
5852 * Update the global reply index if at least one reply was
5853 * processed.
5854 */
5858 }
5862 }
5865 /*
5866 * If no helper threads are created, process the doneq in ISR. If
5867 * helpers are created, use the doneq length as a metric to measure the
5868 * load on the interrupt CPU. If it is long enough, which indicates the
5869 * load is heavy, then we deliver the IO completions to the helpers.
5870 * This measurement has some limitations, although it is simple and
5871 * straightforward and works well for most of the cases at present.
5872 */
5878 }
5880 /*
5881 * If there are queued cmd, start them now.
5882 */
5885 }
5889 }
5891 static void
5893 pMpi2ReplyDescriptorsUnion_t reply_desc_union)
5894 {
5899 /*
5900 * The reply is valid, process it according to its
5901 * type. Also, set a flag for updated the reply index
5902 * after they've all been processed.
5903 */
5915 }
5917 /*
5918 * Clear the reply descriptor for re-use and increment
5919 * index.
5920 */
5925 DDI_DMA_SYNC_FORDEV);
5926 }
5928 /*
5929 * handle qfull condition
5930 */
5931 static void
5933 {
5938 /*
5939 * We have exhausted the retries on QFULL, or,
5940 * the target driver has indicated that it
5941 * wants to handle QFULL itself by setting
5942 * qfull-retries capability to 0. In either case
5943 * we want the target driver's QFULL handling
5944 * to kick in. We do this by having pkt_reason
5945 * as CMD_CMPLT and pkt_scbp as STATUS_QFULL.
5946 */
5952 }
5960 /*
5961 * when target gives queue full status with no commands
5962 * outstanding (m_t_ncmds == 0), throttle is set to 0
5963 * (HOLD_THROTTLE), and the queue full handling start
5964 * (see psarc/1994/313); if there are commands outstanding,
5965 * throttle is set to (m_t_ncmds - 2)
5966 */
5968 /*
5969 * By setting throttle to QFULL_THROTTLE, we
5970 * avoid submitting new commands and in
5971 * mptsas_restart_cmd find out slots which need
5972 * their throttles to be cleared.
5973 */
5979 }
5980 }
5981 }
5982 }
5984 mptsas_phymask_t
5986 {
5994 /*
5995 * If physport is 0xFF, this is a RAID volume. Use phymask of 0.
5996 */
5999 }
6007 }
6008 }
6012 }
6014 /*
6015 * mpt free device handle after device gone, by use of passthrough
6016 */
6017 static int
6019 {
6020 Mpi2SasIoUnitControlRequest_t req;
6021 Mpi2SasIoUnitControlReply_t rep;
6026 /*
6027 * Need to compose a SAS IO Unit Control request message
6028 * and call mptsas_do_passthru() function
6029 */
6043 }
6045 /* do passthrough success, check the ioc status */
6050 }
6053 }
6055 static void
6057 {
6088 }
6089 }
6095 }
6096 }
6101 /*
6102 * register a iport, if the port has already been existed
6103 * SCSA will do nothing and just return.
6104 */
6107 }
6110 }
6112 /*
6113 * mptsas_handle_dr is a task handler for DR, the DR action includes:
6114 * 1. Directly attched Device Added/Removed.
6115 * 2. Expander Device Added/Removed.
6116 * 3. Indirectly Attached Device Added/Expander.
6117 * 4. LUNs of a existing device status change.
6118 * 5. RAID volume created/deleted.
6119 * 6. Member of RAID volume is released because of RAID deletion.
6120 * 7. Physical disks are removed because of RAID creation.
6121 */
6122 static void
6124 {
6133 uint_t event;
6150 /*
6151 * Direct attached or expander attached device added
6152 * into system or a Phys Disk that is being unhidden.
6153 */
6155 }
6158 /*
6159 * New expander added into system, it must be the head
6160 * of topo_change_list_t
6161 */
6167 }
6168 /*
6169 * All cases port_update == 1 may cause initiator port form change
6170 */
6173 /*
6174 * mpt->m_port_chng flag indicates some PHYs of initiator
6175 * port have changed to online. So when expander added or
6176 * directly attached device online event come, we force to
6177 * update port information by issueing SAS IO Unit Page and
6178 * update PHYMASKs.
6179 */
6183 }
6192 MPTSAS_DR_EVENT_OFFLINE_SMP)) {
6193 /*
6194 * For all offline events, phymask is known
6195 */
6198 }
6201 }
6205 }
6208 MPTSAS_TOPO_FLAG_RAID_PHYSDRV_ASSOCIATED) &&
6210 /*
6211 * There is no any field in IR_CONFIG_CHANGE
6212 * event indicate physport/phynum, let's get
6213 * parent after SAS Device Page0 request.
6214 */
6216 }
6220 /*
6221 * If the direct attached device added or a
6222 * phys disk is being unhidden, argument
6223 * physport actually is PHY#, so we have to get
6224 * phymask according PHY#.
6225 */
6227 }
6229 /*
6230 * Translate physport to phymask so that we can search
6231 * parent dip.
6232 */
6234 physport);
6237 find_parent:
6239 /*
6240 * For RAID topology change node, write the iport name
6241 * as v0.
6242 */
6246 /*
6247 * phymask can bo 0 if the drive has been
6248 * pulled by the time an add event is
6249 * processed. If phymask is 0, just skip this
6250 * event and continue.
6251 */
6263 }
6265 }
6267 phy_mask_name);
6272 }
6274 }
6276 handle_topo_change:
6279 /*
6280 * If HBA is being reset, don't perform operations depending
6281 * on the IOC. We must free the topo list, however.
6282 */
6285 else
6296 /*
6297 * If direct attached device associated, make sure
6298 * reset the parent before start the next one. But
6299 * all devices associated with expander shares the
6300 * parent. Also, reset parent if this is for RAID.
6301 */
6303 }
6304 }
6305 out:
6307 }
6309 static void
6312 {
6335 {
6340 /*
6341 * Get latest RAID info.
6342 */
6350 }
6353 /*
6354 * If a Phys Disk was deleted, RAID info needs to be
6355 * updated to reflect the new topology.
6356 */
6359 /*
6360 * Get sas device page 0 by DevHandle to make sure if
6361 * SSP/SATA end device exist.
6362 */
6364 MPI2_SAS_DEVICE_PGAD_FORM_MASK) |
6371 "mptsas_handle_topo_change: target %d is "
6376 "mptsas_handle_topo_change: could not "
6380 "mptsas_handle_topo_change: could not "
6383 }
6384 /*
6385 * If rval is DEV_INFO_PHYS_DISK or indicates failure
6386 * then there is nothing else to do, just leave.
6387 */
6390 }
6391 }
6403 phy_mask_name);
6410 }
6411 }
6419 /*
6420 * hold nexus for bus configure
6421 */
6425 /*
6426 * release nexus for bus configure
6427 */
6431 /*
6432 * Add parent's props for SMHBA support
6433 */
6440 parent,
6441 SCSI_ADDR_PROP_ATTACHED_PORT,
6442 attached_wwnstr)
6445 parent,
6446 SCSI_ADDR_PROP_ATTACHED_PORT);
6450 }
6453 DDI_PROP_SUCCESS) {
6459 }
6461 /*
6462 * Update PHY info for smhba
6463 */
6470 }
6473 /*
6474 * topo_node->un.physport is really the PHY#
6475 * for direct attached devices
6476 */
6482 DDI_PROP_SUCCESS) {
6486 "mptsas virtual-port"
6489 }
6490 }
6491 }
6498 }
6500 {
6516 }
6521 MPTSAS_TOPO_FLAG_RAID_PHYSDRV_ASSOCIATED)) {
6522 /*
6523 * Get latest RAID info if RAID volume status changes
6524 * or Phys Disk status changes
6525 */
6527 }
6528 /*
6529 * Abort all outstanding command on the device
6530 */
6537 }
6552 /*
6553 * Clear parent's props for SMHBA support
6554 */
6560 DDI_PROP_SUCCESS) {
6562 SCSI_ADDR_PROP_ATTACHED_PORT);
6566 }
6569 DDI_PROP_SUCCESS) {
6571 MPTSAS_NUM_PHYS);
6575 }
6578 DDI_PROP_SUCCESS) {
6580 MPTSAS_VIRTUAL_PORT);
6584 }
6585 }
6594 /*
6595 * clean DR_INTRANSITION flag to allow I/O down to
6596 * PHCI driver since failover finished.
6597 * Invalidate the devhdl
6598 */
6604 }
6606 /*
6607 * Send SAS IO Unit Control to free the dev handle
6608 */
6615 rval));
6616 }
6619 }
6621 {
6623 /*
6624 * If this is the remove handle event, do a reset first.
6625 */
6632 }
6633 }
6635 /*
6636 * Send SAS IO Unit Control to free the dev handle
6637 */
6641 rval));
6643 }
6645 {
6646 mptsas_smp_t smp;
6658 }
6663 }
6672 }
6674 {
6682 /*
6683 * The mptsas_smp_t data is released only if the dip is offlined
6684 * successfully.
6685 */
6694 DEVINFO_DIRECT_ATTACHED) {
6697 DDI_PROP_SUCCESS) {
6699 MPTSAS_VIRTUAL_PORT);
6703 }
6704 /*
6705 * Check whether the smp connected to the iport,
6706 */
6709 DDI_PROP_SUCCESS) {
6711 MPTSAS_NUM_PHYS);
6715 }
6716 /*
6717 * Clear parent's attached-port props
6718 */
6722 DDI_PROP_SUCCESS) {
6724 SCSI_ADDR_PROP_ATTACHED_PORT);
6728 }
6729 }
6738 }
6743 }
6746 }
6747 }
6749 /*
6750 * Record the event if its type is enabled in mpt instance by ioctl.
6751 */
6752 static void
6754 {
6756 pMpi2EventNotificationReply_t eventreply;
6773 /*
6774 * Generate a system event to let anyone who cares know that a
6775 * LOG_ENTRY_ADDED event has occurred. This is sent no matter what the
6776 * event mask is set to.
6777 */
6780 }
6782 /*
6783 * Record the event only if it is not masked. Determine which dword
6784 * and bit of event mask to test.
6785 */
6797 /*
6798 * Limit data to size in m_event entry
6799 */
6802 }
6807 }
6809 /*
6810 * check for index wrap-around
6811 */
6814 }
6817 /*
6818 * Set flag to send the event.
6819 */
6821 }
6822 }
6824 /*
6825 * Generate a system event if flag is set to let anyone who cares know
6826 * that an event has occurred.
6827 */
6831 }
6832 }
6834 #define SMP_RESET_IN_PROGRESS MPI2_EVENT_SAS_TOPO_LR_SMP_RESET_IN_PROGRESS
6835 /*
6836 * handle sync events from ioc in interrupt
6837 * return value:
6838 * DDI_SUCCESS: The event is handled by this func
6839 * DDI_FAILURE: Event is not handled
6840 */
6841 static int
6843 {
6845 pMpi2EventNotificationReply_t eventreply;
6848 uint_t iocstatus;
6865 "!mptsas_handle_event_sync: event 0x%x, "
6866 "IOCStatus=0x%x, "
6872 "mptsas_handle_event_sync: event 0x%x, "
6873 "IOCStatus=0x%x, "
6877 }
6878 }
6880 /*
6881 * figure out what kind of event we got and handle accordingly
6882 */
6885 {
6886 pMpi2EventDataSasTopologyChangeList_t sas_topo_change_list;
6925 /*
6926 * New expander device added
6927 */
6931 KM_SLEEP);
6943 }
6955 KM_SLEEP);
6968 }
6978 }
6981 }
6992 /*
6993 * Filter out processing of Phy Vacant Status unless
6994 * the reason code is "Not Responding". Process all
6995 * other combinations of Phy Status and Reason Codes.
6996 */
6998 MPI2_EVENT_SAS_TOPO_PHYSTATUS_VACANT) &&
7000 MPI2_EVENT_SAS_TOPO_RC_TARG_NOT_RESPONDING)) {
7002 }
7008 {
7015 MPI2_EVENT_SAS_TOPO_LR_CURRENT_MASK) >>
7016 MPI2_EVENT_SAS_TOPO_LR_CURRENT_SHIFT;
7053 }
7054 /*
7055 * New target device added into the system.
7056 * Set association flag according to if an
7057 * expander is used or not.
7058 */
7059 exp_flag =
7060 MPTSAS_TOPO_FLAG_EXPANDER_ATTACHED_DEVICE;
7062 MPTSAS_TOPO_FLAG_EXPANDER_ASSOCIATED) {
7064 }
7067 KM_SLEEP);
7070 MPTSAS_DR_EVENT_RECONFIG_TARGET;
7072 /*
7073 * Per MPI 2, if expander dev handle
7074 * is 0, it's a directly attached
7075 * device. So driver use PHY to decide
7076 * which iport is associated
7077 */
7080 }
7090 }
7092 }
7094 {
7098 /*
7099 * Set association flag according to if an
7100 * expander is used or not.
7101 */
7102 exp_flag =
7103 MPTSAS_TOPO_FLAG_EXPANDER_ATTACHED_DEVICE;
7105 MPTSAS_TOPO_FLAG_EXPANDER_ASSOCIATED) {
7107 }
7108 /*
7109 * Target device is removed from the system
7110 * Before the device is really offline from
7111 * from system.
7112 */
7115 /*
7116 * If ptgt is NULL here, it means that the
7117 * DevHandle is not in the hash table. This is
7118 * reasonable sometimes. For example, if a
7119 * disk was pulled, then added, then pulled
7120 * again, the disk will not have been put into
7121 * the hash table because the add event will
7122 * have an invalid phymask. BUT, this does not
7123 * mean that the DevHandle is invalid. The
7124 * controller will still have a valid DevHandle
7125 * that must be removed. To do this, use the
7126 * MPTSAS_TOPO_FLAG_REMOVE_HANDLE event.
7127 */
7131 KM_SLEEP);
7135 MPTSAS_TOPO_FLAG_REMOVE_HANDLE;
7141 topo_node;
7145 }
7147 }
7149 /*
7150 * Update DR flag immediately avoid I/O failure
7151 * before failover finish. Pay attention to the
7152 * mutex protect, we need grab m_tx_waitq_mutex
7153 * during set m_dr_flag because we won't add
7154 * the following command into waitq, instead,
7155 * we need return TRAN_BUSY in the tran_start
7156 * context.
7157 */
7164 KM_SLEEP);
7169 MPTSAS_DR_EVENT_OFFLINE_TARGET;
7178 }
7180 }
7185 MPI2_EVENT_SAS_TOPO_LR_CURRENT_MASK) >>
7186 MPI2_EVENT_SAS_TOPO_LR_CURRENT_SHIFT;
7193 ESC_SAS_PHY_EVENT,
7194 SAS_PHY_REMOVE,
7197 negotiated_link_rate
7204 ESC_SAS_PHY_EVENT,
7205 SAS_PHY_OFFLINE,
7222 }
7224 ESC_SAS_PHY_EVENT,
7225 SAS_PHY_ONLINE,
7234 }
7236 ESC_SAS_PHY_EVENT,
7237 SAS_PHY_ONLINE,
7246 }
7248 ESC_SAS_PHY_EVENT,
7249 SAS_PHY_ONLINE,
7258 }
7260 ESC_SAS_PHY_EVENT,
7261 SAS_PHY_ONLINE,
7268 }
7271 MPI2_EVENT_SAS_TOPO_LR_PREV_MASK) >>
7272 MPI2_EVENT_SAS_TOPO_LR_PREV_SHIFT;
7307 }
7315 "target not responding, delaying "
7318 }
7321 prev));
7322 }
7324 /*
7325 * Launch DR taskq to handle topology change
7326 */
7335 }
7338 }
7339 }
7341 }
7343 {
7371 {
7377 KM_SLEEP);
7381 MPTSAS_DR_EVENT_RECONFIG_TARGET;
7385 MPTSAS_TOPO_FLAG_RAID_ASSOCIATED;
7392 }
7394 }
7397 {
7405 /*
7406 * Clear any flags related to volume
7407 */
7410 /*
7411 * Update DR flag immediately avoid I/O failure
7412 */
7419 KM_SLEEP);
7424 MPTSAS_DR_EVENT_OFFLINE_TARGET;
7427 MPTSAS_TOPO_FLAG_RAID_ASSOCIATED;
7434 }
7436 }
7439 {
7445 /*
7446 * Update DR flag immediately avoid I/O failure
7447 */
7454 KM_SLEEP);
7459 MPTSAS_DR_EVENT_OFFLINE_TARGET;
7462 MPTSAS_TOPO_FLAG_RAID_PHYSDRV_ASSOCIATED;
7469 }
7471 }
7474 {
7475 /*
7476 * The physical drive is released by a IR
7477 * volume. But we cannot get the the physport
7478 * or phynum from the event data, so we only
7479 * can get the physport/phynum after SAS
7480 * Device Page0 request for the devhdl.
7481 */
7484 KM_SLEEP);
7488 MPTSAS_DR_EVENT_RECONFIG_TARGET;
7491 MPTSAS_TOPO_FLAG_RAID_PHYSDRV_ASSOCIATED;
7499 }
7501 }
7504 }
7505 }
7508 /*
7509 * Launch DR taskq to handle topology change
7510 */
7519 }
7522 }
7523 }
7525 }
7528 }
7531 }
7533 /*
7534 * handle events from ioc
7535 */
7536 static void
7538 {
7540 pMpi2EventNotificationReply_t eventreply;
7545 uint_t iocstatus;
7552 /*
7553 * If HBA is being reset, drop incoming event.
7554 */
7559 }
7570 "!mptsas_handle_event: IOCStatus=0x%x, "
7576 "mptsas_handle_event: IOCStatus=0x%x, "
7580 }
7581 }
7583 /*
7584 * figure out what kind of event we got and handle accordingly
7585 */
7593 iocloginfo));
7602 {
7607 sasdiscovery =
7628 }
7634 }
7639 {
7640 pMpi2EventDataTaskSetFull_t taskfull;
7648 }
7650 {
7651 /*
7652 * SAS TOPOLOGY CHANGE LIST Event has already been handled
7653 * in mptsas_handle_event_sync() of interrupt context
7654 */
7656 }
7658 {
7659 pMpi2EventDataSasEnclDevStatusChange_t encstatus;
7677 }
7683 }
7685 /*
7686 * MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE is handled by
7687 * mptsas_handle_event_sync,in here just send ack message.
7688 */
7690 {
7691 pMpi2EventDataSasDeviceStatusChange_t statuschange;
7710 wwn));
7762 }
7764 }
7766 {
7767 /*
7768 * IR TOPOLOGY CHANGE LIST Event has already been handled
7769 * in mpt_handle_event_sync() of interrupt context
7770 */
7772 }
7774 {
7802 rc);
7803 }
7809 }
7811 {
7812 pMpi2EventDataSasBroadcastPrimitive_t sas_broadcast;
7827 ESC_SAS_HBA_PORT_BROADCAST,
7828 SAS_PORT_BROADCAST_CHANGE,
7833 ESC_SAS_HBA_PORT_BROADCAST,
7834 SAS_PORT_BROADCAST_SES,
7839 ESC_SAS_HBA_PORT_BROADCAST,
7840 SAS_PORT_BROADCAST_D01_4,
7845 ESC_SAS_HBA_PORT_BROADCAST,
7846 SAS_PORT_BROADCAST_D04_7,
7851 ESC_SAS_HBA_PORT_BROADCAST,
7852 SAS_PORT_BROADCAST_D16_7,
7857 ESC_SAS_HBA_PORT_BROADCAST,
7858 SAS_PORT_BROADCAST_D29_7,
7863 ESC_SAS_HBA_PORT_BROADCAST,
7864 SAS_PORT_BROADCAST_D24_0,
7869 ESC_SAS_HBA_PORT_BROADCAST,
7870 SAS_PORT_BROADCAST_D27_4,
7878 }
7883 }
7885 {
7900 /*
7901 * Get latest RAID info and then find the DevHandle for this
7902 * event in the configuration. If the DevHandle is not found
7903 * just exit the event.
7904 */
7913 }
7914 }
7915 }
7918 }
7922 {
7925 state;
7929 ", auto-config of hot-swap drives is %s"
7930 ", write caching is %s"
7933 MPI2_RAIDVOL0_SETTING_AUTO_CONFIG_HSWAP_DISABLE
7935 i == MPI2_RAIDVOL0_SETTING_UNCHANGED
7937 i == MPI2_RAIDVOL0_SETTING_DISABLE_WRITE_CACHING
7939 i == MPI2_RAIDVOL0_SETTING_ENABLE_WRITE_CACHING
7944 }
7946 {
7952 state == MPI2_RAID_VOL_STATE_OPTIMAL
7954 state == MPI2_RAID_VOL_STATE_DEGRADED
7956 state == MPI2_RAID_VOL_STATE_ONLINE
7958 state == MPI2_RAID_VOL_STATE_INITIALIZING
7960 state == MPI2_RAID_VOL_STATE_FAILED
7962 state == MPI2_RAID_VOL_STATE_MISSING
7966 }
7968 {
7974 vol,
7975 state & MPI2_RAIDVOL0_STATUS_FLAG_ENABLED
7977 state & MPI2_RAIDVOL0_STATUS_FLAG_QUIESCED
7979 state & MPI2_RAIDVOL0_STATUS_FLAG_VOLUME_INACTIVE
7981 state &
7982 MPI2_RAIDVOL0_STATUS_FLAG_BAD_BLOCK_TABLE_FULL
7984 state &
7985 MPI2_RAIDVOL0_STATUS_FLAG_RESYNC_IN_PROGRESS
7987 state & MPI2_RAIDVOL0_STATUS_FLAG_BACKGROUND_INIT
7989 state &
7990 MPI2_RAIDVOL0_STATUS_FLAG_CAPACITY_EXPANSION
7992 state &
7993 MPI2_RAIDVOL0_STATUS_FLAG_CONSISTENCY_CHECK
7995 state & MPI2_RAIDVOL0_STATUS_FLAG_DATA_SCRUB
7998 }
8001 }
8003 }
8005 {
8031 " PhysDiskNum %d with DevHandle 0x%x in slot %d "
8032 "for enclosure with handle 0x%x is now in hot "
8041 " PhysDiskNum %d with DevHandle 0x%x in slot %d "
8042 "for enclosure with handle 0x%x is now "
8044 enchandle,
8045 status & MPI2_PHYSDISK0_STATUS_FLAG_INACTIVE_VOLUME
8047 status & MPI2_PHYSDISK0_STATUS_FLAG_OUT_OF_SYNC
8049 status & MPI2_PHYSDISK0_STATUS_FLAG_QUIESCED
8051 status &
8052 MPI2_PHYSDISK0_STATUS_FLAG_WRITE_CACHE_ENABLED
8054 status & MPI2_PHYSDISK0_STATUS_FLAG_OCE_TARGET
8060 " PhysDiskNum %d with DevHandle 0x%x in slot %d "
8063 state == MPI2_RAID_PD_STATE_OPTIMAL
8065 state == MPI2_RAID_PD_STATE_REBUILDING
8067 state == MPI2_RAID_PD_STATE_DEGRADED
8069 state == MPI2_RAID_PD_STATE_HOT_SPARE
8071 state == MPI2_RAID_PD_STATE_ONLINE
8073 state == MPI2_RAID_PD_STATE_OFFLINE
8075 state == MPI2_RAID_PD_STATE_NOT_COMPATIBLE
8077 state == MPI2_RAID_PD_STATE_NOT_CONFIGURED
8081 }
8083 }
8088 }
8090 /*
8091 * Return the reply frame to the free queue.
8092 */
8096 DDI_DMA_SYNC_FORDEV);
8099 }
8103 }
8105 /*
8106 * invoked from timeout() to restart qfull cmds with throttle == 0
8107 */
8108 static void
8110 {
8123 MAX_THROTTLE);
8124 }
8125 }
8126 }
8129 }
8131 void
8133 {
8141 /*
8142 * Task Management cmds are removed in their own routines. Also,
8143 * we don't want to modify timeout based on TM cmds.
8144 */
8147 }
8151 /*
8152 * remove the cmd.
8153 */
8160 /*
8161 * only decrement per target ncmds if command
8162 * has a target associated with it.
8163 */
8166 /*
8167 * reset throttle if we just ran an untagged command
8168 * to a tagged target
8169 */
8173 }
8175 /*
8176 * Remove this command from the active queue.
8177 */
8180 cmd_active_link);
8182 }
8183 }
8184 }
8186 /*
8187 * This is all we need to do for ioc commands.
8188 */
8192 }
8195 }
8197 /*
8198 * accept all cmds on the tx_waitq if any and then
8199 * start a fresh request from the top of the device queue.
8200 *
8201 * since there are always cmds queued on the tx_waitq, and rare cmds on
8202 * the instance waitq, so this function should not be invoked in the ISR,
8203 * the mptsas_restart_waitq() is invoked in the ISR instead. otherwise, the
8204 * burden belongs to the IO dispatch CPUs is moved the interrupt CPU.
8205 */
8206 static void
8208 {
8214 }
8217 }
8219 /*
8220 * start a fresh request from the top of the device queue
8221 */
8222 static void
8224 {
8232 /*
8233 * If there is a reset delay, don't start any cmds. Otherwise, start
8234 * as many cmds as possible.
8235 * Since SMID 0 is reserved and the TM slot is reserved, the actual max
8236 * commands is m_max_requests - 2.
8237 */
8244 /*
8245 * passthru command get slot need
8246 * set CFLAG_PREPARED.
8247 */
8251 }
8254 }
8257 /*
8258 * Send the config page request and delete it
8259 * from the waitq.
8260 */
8264 }
8267 }
8270 /*
8271 * Send the FW Diag request and delete if from
8272 * the waitq.
8273 */
8277 }
8280 }
8286 }
8294 }
8295 }
8297 }
8298 }
8299 /*
8300 * Cmds are queued if tran_start() doesn't get the m_mutexlock(no wait).
8301 * Accept all those queued cmds before new cmd is accept so that the
8302 * cmds are sent in order.
8303 */
8304 static void
8306 {
8312 /*
8313 * A Bus Reset could occur at any time and flush the tx_waitq,
8314 * so we cannot count on the tx_waitq to contain even one cmd.
8315 * And when the m_tx_waitq_mutex is released and run
8316 * mptsas_accept_pkt(), the tx_waitq may be flushed.
8317 */
8323 }
8326 }
8333 }
8334 }
8337 /*
8338 * mpt tag type lookup
8339 */
8343 static int
8345 {
8349 pMpi2SCSIIORequest_t io_request;
8362 /*
8363 * Set SMID and increment index. Rollover to 1 instead of 0 if index
8364 * is at the max. 0 is an invalid SMID, so we call the first index 1.
8365 */
8368 /*
8369 * It is possible for back to back device reset to
8370 * happen before the reset delay has expired. That's
8371 * ok, just let the device reset go out on the bus.
8372 */
8375 }
8377 /*
8378 * if a non-tagged cmd is submitted to an active tagged target
8379 * then drain before submitting this cmd; SCSI-2 allows RQSENSE
8380 * to be untagged
8381 */
8392 }
8397 }
8399 }
8401 /*
8402 * Set correct tag bits.
8403 */
8419 }
8423 }
8425 }
8429 }
8434 /*
8435 * Mapping of the buffer was done in mptsas_pkt_alloc_extern().
8436 * Calculate the DMA address with the same offset.
8437 */
8450 }
8457 MPI2_FUNCTION_SCSI_IO_REQUEST);
8469 }
8471 /*
8472 * setup the Scatter/Gather DMA list for this request
8473 */
8479 MPI2_SGE_FLAGS_END_OF_BUFFER |
8480 MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
8482 }
8484 /*
8485 * save ARQ information
8486 */
8497 DDI_DMA_SYNC_FORDEV);
8499 /*
8500 * Build request descriptor and write it to the request desc post reg.
8501 */
8506 /*
8507 * Start timeout.
8508 */
8511 #ifdef MPTSAS_TEST
8512 /*
8513 * Force timeouts to happen immediately.
8514 */
8517 #endif
8521 /*
8522 * Common case is that this is the last pending expiration
8523 * (or queue is empty). Insert at head of the queue.
8524 */
8527 /*
8528 * Queue is not empty and first element expires later than
8529 * this command. Search for element expiring sooner.
8530 */
8536 }
8537 }
8539 /*
8540 * No element found expiring sooner, append to
8541 * non-empty queue.
8542 */
8544 cmd_active_link);
8545 }
8546 }
8552 }
8554 }
8556 /*
8557 * Select a helper thread to handle current doneq
8558 */
8559 static void
8561 {
8568 /*
8569 * If the completed command on help thread[i] less than
8570 * doneq_thread_threshold, then pick the thread[i]. Otherwise
8571 * pick a thread which has least completed command.
8572 */
8579 }
8583 }
8585 }
8590 }
8592 /*
8593 * move the current global doneq to the doneq of thead[t]
8594 */
8595 static void
8597 {
8605 }
8611 }
8612 }
8614 void
8616 {
8619 /* Check all acc and dma handles */
8621 DDI_SUCCESS) ||
8623 DDI_SUCCESS) ||
8625 DDI_SUCCESS) ||
8627 DDI_SUCCESS) ||
8629 DDI_SUCCESS) ||
8631 DDI_SUCCESS) ||
8633 DDI_SUCCESS) ||
8635 DDI_SUCCESS)) {
8637 DDI_SERVICE_UNAFFECTED);
8639 DDI_FME_VER0);
8642 }
8644 DDI_SUCCESS) ||
8646 DDI_SUCCESS) ||
8648 DDI_SUCCESS) ||
8650 DDI_SUCCESS) ||
8652 DDI_SUCCESS) ||
8654 DDI_SUCCESS)) {
8656 DDI_SERVICE_UNAFFECTED);
8659 }
8665 }
8668 DDI_SUCCESS) ||
8670 DDI_SUCCESS)))) {
8674 }
8675 }
8677 /*
8678 * These routines manipulate the queue of commands that
8679 * are waiting for their completion routines to be called.
8680 * The queue is usually in FIFO order but on an MP system
8681 * it's possible for the completion routines to get out
8682 * of order. If that's a problem you need to add a global
8683 * mutex around the code that calls the completion routine
8684 * in the interrupt handler.
8685 */
8686 static void
8688 {
8700 /*
8701 * only add scsi pkts that have completion routines to
8702 * the doneq. no intr cmds do not have callbacks.
8703 */
8708 }
8709 }
8713 {
8717 /* pop one off the done queue */
8719 /* if the queue is now empty fix the tail pointer */
8723 }
8726 }
8728 }
8730 static void
8732 {
8744 /*
8745 * run the completion routines of all the
8746 * completed commands
8747 */
8751 /* run this command's completion routine */
8756 }
8759 }
8760 }
8762 /*
8763 * These routines manipulate the target's queue of pending requests
8764 */
8765 void
8767 {
8776 }
8782 }
8783 }
8787 {
8800 }
8801 }
8803 }
8805 /*
8806 * remove specified cmd from the middle of the wait queue.
8807 */
8808 static void
8810 {
8819 }
8830 }
8842 }
8844 }
8846 }
8850 {
8859 }
8861 /*
8862 * remove specified cmd from the middle of the tx_waitq.
8863 */
8864 static void
8866 {
8881 }
8893 }
8895 }
8897 }
8899 /*
8900 * device and bus reset handling
8901 *
8902 * Notes:
8903 * - RESET_ALL: reset the controller
8904 * - RESET_TARGET: reset the target specified in scsi_address
8905 */
8906 static int
8908 {
8918 }
8920 level));
8923 /*
8924 * if we are not in panic set up a reset delay for this target
8925 */
8930 }
8934 /*
8935 * The transport layer expect to only see TRUE and
8936 * FALSE. Therefore, we will adjust the return value
8937 * if mptsas_do_scsi_reset returns FAILED.
8938 */
8942 }
8944 static int
8946 {
8954 devhdl);
8955 }
8957 /*
8958 * Issue a Target Reset message to the target specified but not to a
8959 * disk making up a raid volume. Just look through the RAID config
8960 * Phys Disk list of DevHandles. If the target's DevHandle is in this
8961 * list, then don't reset this target.
8962 */
8968 }
8969 }
8970 }
8977 }
8979 static int
8982 {
8989 }
8991 static int
8993 {
9005 }
9006 }
9008 static int
9010 {
9012 }
9014 void
9016 {
9020 /*
9021 * if the bus is draining/quiesced, no changes to the throttles
9022 * are allowed. Not allowing change of throttles during draining
9023 * limits error recovery but will reduce draining time
9024 *
9025 * all throttles should have been set to HOLD_THROTTLE
9026 */
9029 }
9035 }
9036 }
9038 /*
9039 * Clean up from a device reset.
9040 * For the case of target reset, this function clears the waitq of all
9041 * commands for a particular target. For the case of abort task set, this
9042 * function clears the waitq of all commonds for a particular target/lun.
9043 */
9044 static void
9046 {
9050 uchar_t reason;
9051 uint_t stat;
9052 hrtime_t timestamp;
9058 /*
9059 * Make sure the I/O Controller has flushed all cmds
9060 * that are associated with this target for a target reset
9061 * and target/lun for abort task set.
9062 * Account for TM requests, which use the last SMID.
9063 */
9073 /*
9074 * When timeout requested, propagate
9075 * proper reason and statistics to
9076 * target drivers.
9077 */
9080 }
9083 tasktype));
9088 }
9093 /*FALLTHROUGH*/
9099 tasktype));
9103 stat);
9105 }
9109 }
9110 }
9112 /*
9113 * Flush the waitq and tx_waitq of this target's cmds
9114 */
9129 }
9131 }
9143 }
9145 }
9151 /*FALLTHROUGH*/
9160 }
9162 }
9174 }
9176 }
9181 tasktype);
9183 }
9184 }
9186 /*
9187 * Clean up hba state, abort all outstanding command and commands in waitq
9188 * reset timeout of all targets.
9189 */
9190 static void
9192 {
9199 /*
9200 * The I/O Controller should have already sent back
9201 * all commands via the scsi I/O reply frame. Make
9202 * sure all commands have been flushed.
9203 * Account for TM request, which use the last SMID.
9204 */
9210 /*
9211 * Need to make sure to tell everyone that might be
9212 * waiting on this command that it's going to fail. If
9213 * we get here, this command will never timeout because
9214 * the active command table is going to be re-allocated,
9215 * so there will be nothing to check against a time out.
9216 * Instead, mark the command as failed due to reset.
9217 */
9219 STAT_BUS_RESET);
9226 }
9228 }
9231 slot));
9237 }
9239 /*
9240 * Flush the waitq.
9241 */
9253 }
9254 }
9256 /*
9257 * Flush the tx_waitq
9258 */
9265 }
9268 /*
9269 * Drain the taskqs prior to reallocating resources. The thread
9270 * passing through here could be launched from either (dr)
9271 * or (event) taskqs so only wait on the 'other' queue since
9272 * waiting on 'this' queue is a deadlock condition.
9273 */
9281 }
9283 /*
9284 * set pkt_reason and OR in pkt_statistics flag
9285 */
9286 static void
9288 uint_t stat)
9289 {
9298 }
9300 }
9301 }
9303 static void
9305 {
9314 }
9316 }
9318 static void
9320 {
9330 }
9333 }
9335 /*
9336 * mptsas_watch_reset_delay(_subr) is invoked by timeout() and checks every
9337 * mpt instance for active reset delays
9338 */
9339 static void
9341 {
9356 }
9360 }
9365 }
9366 }
9368 static int
9370 {
9383 MPTSAS_WATCH_RESET_DELAY_TICK;
9387 MAX_THROTTLE);
9388 restart++;
9391 }
9392 }
9393 }
9397 }
9399 }
9401 #ifdef MPTSAS_TEST
9402 static void
9404 {
9410 }
9413 }
9414 }
9415 }
9416 #endif
9418 /*
9419 * abort handling:
9420 *
9421 * Notes:
9422 * - if pkt is not NULL, abort just that command
9423 * - if pkt is NULL, abort all outstanding commands for target
9424 */
9425 static int
9427 {
9434 tran_tgt_private;
9445 }
9447 static int
9449 {
9456 /*
9457 * Abort the command pkt on the target/lun in ap. If pkt is
9458 * NULL, abort all outstanding commands on that target/lun.
9459 * If you can abort them, return 1, else return 0.
9460 * Each packet that's aborted should be sent back to the target
9461 * driver through the callback routine, with pkt_reason set to
9462 * CMD_ABORTED.
9463 *
9464 * abort cmd pkt on HBA hardware; clean out of outstanding
9465 * command lists, etc.
9466 */
9468 /* abort the specified packet */
9476 STAT_ABORTED);
9480 }
9482 /*
9483 * Have mpt firmware abort this command
9484 */
9491 /*
9492 * The transport layer expects only TRUE and FALSE.
9493 * Therefore, if mptsas_ioc_task_management returns
9494 * FAILED we will return FALSE.
9495 */
9499 }
9500 }
9502 /*
9503 * If pkt is NULL then abort task set
9504 */
9508 /*
9509 * The transport layer expects only TRUE and FALSE.
9510 * Therefore, if mptsas_ioc_task_management returns
9511 * FAILED we will return FALSE.
9512 */
9516 #ifdef MPTSAS_TEST
9519 }
9520 #endif
9522 done:
9525 }
9527 /*
9528 * capability handling:
9529 * (*tran_getcap). Get the capability named, and return its value.
9530 */
9531 static int
9533 {
9546 }
9586 MPI2_IOCFACTS_CAPABILITY_TLR)
9588 else
9594 }
9600 }
9602 /*
9603 * (*tran_setcap). Set the capability named to the value given.
9604 */
9605 static int
9607 {
9617 }
9624 }
9634 /*
9635 * None of these are settable via
9636 * the capability interface.
9637 */
9640 /*
9641 * We cannot turn off arq so return false if asked to
9642 */
9647 }
9652 MAX_THROTTLE);
9669 }
9672 }
9674 /*
9675 * Utility routine for mptsas_ifsetcap/ifgetcap
9676 */
9677 /*ARGSUSED*/
9678 static int
9680 {
9688 }
9690 static int
9692 {
9697 /*
9698 * if there are active commands, then we cannot
9699 * change size of active slots array.
9700 */
9708 }
9709 /*
9710 * Since SMID 0 is reserved and the TM slot is reserved, the
9711 * number of slots that can be used at any one time is
9712 * m_max_requests - 2.
9713 */
9722 }
9724 static void
9726 {
9735 }
9737 /*
9738 * Error logging, printing, and debug print routines.
9739 */
9742 /*PRINTFLIKE3*/
9743 void
9745 {
9753 }
9765 }
9768 }
9770 #ifdef MPTSAS_DEBUG
9771 /*
9772 * Use a circular buffer to log messages to private memory.
9773 * Increment idx atomically to minimize risk to miss lines.
9774 * It's fast and does not hold up the proceedings too much.
9775 */
9781 /*PRINTFLIKE1*/
9782 void
9784 {
9795 }
9797 /*PRINTFLIKE1*/
9798 void
9800 {
9810 #ifdef PROM_PRINTF
9812 #else
9814 #endif
9816 }
9817 #endif
9819 /*
9820 * timeout handling
9821 */
9822 static void
9824 {
9837 /* Skip device if not powered on */
9845 }
9846 }
9848 /*
9849 * Check if controller is in a FAULT state. If so, reset it.
9850 */
9860 }
9861 }
9863 /*
9864 * For now, always call mptsas_watchsubr.
9865 */
9871 }
9874 }
9881 }
9883 static void
9885 {
9888 /*
9889 * If we were draining due to a qfull condition,
9890 * go back to full throttle.
9891 */
9897 }
9904 /*
9905 * Earliest command timeout expired. Drain throttle.
9906 */
9909 /*
9910 * Check for remaining commands.
9911 */
9914 /*
9915 * Wait for remaining commands to complete or
9916 * time out.
9917 */
9920 }
9922 /*
9923 * All command timeouts expired.
9924 */
9935 }
9936 }
9938 static void
9940 {
9950 #ifdef MPTSAS_TEST
9952 mptsas_test_untagged++;
9953 }
9954 #endif
9956 /*
9957 * Check for commands stuck in active slot
9958 * Account for TM requests, which use the last SMID.
9959 */
9964 /*
9965 * There seems to be a command stuck
9966 * in the active slot. Drain throttle.
9967 */
9970 DRAIN_THROTTLE);
9973 CFLAG_FW_DIAG)) {
9974 /*
9975 * passthrough command timeout
9976 */
9978 CFLAG_TIMEOUT);
9982 }
9983 }
9984 }
9985 }
9990 }
9995 }
9996 }
9998 /*
9999 * timeout recovery
10000 */
10001 static void
10003 {
10016 }
10023 /*
10024 * Abort all outstanding commands on the device.
10025 */
10030 }
10031 }
10033 /*
10034 * Device / Hotplug control
10035 */
10036 static int
10038 {
10047 }
10049 static int
10051 {
10060 }
10062 static int
10064 {
10070 /* Set all the throttles to zero */
10074 }
10076 /* If there are any outstanding commands in the queue */
10082 /*
10083 * Quiesce has been interrupted
10084 */
10089 }
10097 }
10101 /* Bus has been quiesced */
10107 }
10108 }
10109 /* Bus was not busy - QUIESCED */
10113 }
10115 static int
10117 {
10126 }
10130 }
10132 static void
10134 {
10142 /* Command queue has been drained */
10145 /*
10146 * The throttle may have been reset because
10147 * of a SCSI bus reset
10148 */
10152 }
10157 }
10158 }
10160 }
10162 /*ARGSUSED*/
10163 static void
10165 {
10176 }
10184 }
10186 static void
10188 pMpi2SGESimple64_t sgep)
10189 {
10192 ddi_dma_cookie_t data_cookie;
10193 ddi_dma_cookie_t dataout_cookie;
10203 MPI2_SGE_FLAGS_END_OF_BUFFER |
10204 MPI2_SGE_FLAGS_HOST_TO_IOC |
10205 MPI2_SGE_FLAGS_64_BIT_ADDRESSING) <<
10206 MPI2_SGE_FLAGS_SHIFT);
10214 sgep++;
10215 }
10218 MPI2_SGE_FLAGS_LAST_ELEMENT |
10219 MPI2_SGE_FLAGS_END_OF_BUFFER |
10220 MPI2_SGE_FLAGS_END_OF_LIST |
10221 MPI2_SGE_FLAGS_64_BIT_ADDRESSING) <<
10222 MPI2_SGE_FLAGS_SHIFT);
10225 MPI2_SGE_FLAGS_SHIFT);
10228 MPI2_SGE_FLAGS_SHIFT);
10229 }
10231 sge_flags);
10237 }
10239 static void
10241 pMpi2IeeeSgeSimple64_t ieeesgep)
10242 {
10245 ddi_dma_cookie_t data_cookie;
10246 ddi_dma_cookie_t dataout_cookie;
10254 MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR);
10263 ieeesgep++;
10264 }
10272 }
10274 static void
10276 {
10277 caddr_t memp;
10278 pMPI2RequestHeader_t request_hdrp;
10297 /*
10298 * Store the passthrough message in memory location
10299 * corresponding to our slot number
10300 */
10307 }
10314 /*
10315 * Add an SGE, even if the length is zero.
10316 */
10325 }
10330 pMpi2SCSIIORequest_t scsi_io_req;
10331 caddr_t arsbuf;
10339 /*
10340 * Mapping of the buffer was done in
10341 * mptsas_do_passthru().
10342 * Calculate the DMA address with the same offset.
10343 */
10357 }
10362 ars_dmaaddrlow);
10364 /*
10365 * Put SGE for data and data_out buffer at the end of
10366 * scsi_io_request message header.(64 bytes in total)
10367 * Set SGLOffset0 value
10368 */
10372 /*
10373 * Setup descriptor info. RAID passthrough must use the
10374 * default request descriptor which is already set, so if this
10375 * is a SCSI IO request, change the descriptor to SCSI IO.
10376 */
10381 }
10383 DDI_DMA_SYNC_FORDEV);
10384 }
10386 /*
10387 * We must wait till the message has been completed before
10388 * beginning the next message so we wait for this one to
10389 * finish.
10390 */
10398 }
10399 }
10414 /*
10415 * Prepare the pt for a SAS2 FW_DOWNLOAD request.
10416 */
10417 static void
10419 {
10420 pMpi2FWDownloadTCSGE_t tcsge;
10421 pMpi2FWDownloadRequest req;
10423 /*
10424 * If SAS3, call separate function.
10425 */
10429 }
10431 /*
10432 * User requests should come in with the Transaction
10433 * context element where the SGL will go. Putting the
10434 * SGL after that seems to work, but don't really know
10435 * why. Other drivers tend to create an extra SGL and
10436 * refer to the TCE through that.
10437 */
10443 }
10456 }
10458 /*
10459 * Prepare the pt for a SAS3 FW_DOWNLOAD request.
10460 */
10461 static void
10463 {
10464 pMpi2FWDownloadTCSGE_t tcsge;
10465 pMpi2FWDownloadRequest req2;
10466 pMpi25FWDownloadRequest req25;
10468 /*
10469 * User requests should come in with the Transaction
10470 * context element where the SGL will go. The new firmware
10471 * Doesn't use TCE and has space in the main request for
10472 * this information. So move to the right place.
10473 */
10480 }
10494 }
10496 /*
10497 * Prepare the pt for a SAS2 FW_UPLOAD request.
10498 */
10499 static void
10501 {
10502 pMpi2FWUploadTCSGE_t tcsge;
10503 pMpi2FWUploadRequest_t req;
10505 /*
10506 * If SAS3, call separate function.
10507 */
10511 }
10513 /*
10514 * User requests should come in with the Transaction
10515 * context element where the SGL will go. Putting the
10516 * SGL after that seems to work, but don't really know
10517 * why. Other drivers tend to create an extra SGL and
10518 * refer to the TCE through that.
10519 */
10525 }
10538 }
10540 /*
10541 * Prepare the pt a SAS3 FW_UPLOAD request.
10542 */
10543 static void
10545 {
10546 pMpi2FWUploadTCSGE_t tcsge;
10547 pMpi2FWUploadRequest_t req2;
10548 pMpi25FWUploadRequest_t req25;
10550 /*
10551 * User requests should come in with the Transaction
10552 * context element where the SGL will go. The new firmware
10553 * Doesn't use TCE and has space in the main request for
10554 * this information. So move to the right place.
10555 */
10562 }
10576 }
10578 /*
10579 * Prepare the pt for an IOC_FACTS request.
10580 */
10581 static void
10583 {
10597 }
10599 /*
10600 * Prepare the pt for a PORT_FACTS request.
10601 */
10602 static void
10604 {
10618 }
10620 /*
10621 * Prepare pt for a SATA_PASSTHROUGH request.
10622 */
10623 static void
10625 {
10638 }
10640 static void
10642 {
10655 }
10657 /*
10658 * Prepare pt for a CONFIG request.
10659 */
10660 static void
10662 {
10675 }
10677 /*
10678 * Prepare pt for a SCSI_IO_REQ request.
10679 */
10680 static void
10682 {
10695 }
10697 /*
10698 * Prepare the mptsas_cmd for a SAS_IO_UNIT_CONTROL request.
10699 */
10700 static void
10702 {
10706 }
10708 /*
10709 * A set of functions to prepare an mptsas_cmd for the various
10710 * supported requests.
10711 */
10713 U8 Function;
10722 mpi_pre_sata_passthrough },
10724 mpi_pre_smp_passthrough},
10726 mpi_pre_scsi_io_req},
10729 mpi_pre_sas_io_unit_control },
10731 };
10733 static void
10735 {
10736 pMPI2RequestHeader_t hdr;
10748 }
10749 }
10754 }
10757 static int
10762 {
10763 mptsas_pt_request_t pt;
10764 mptsas_dma_alloc_state_t data_dma_state;
10765 mptsas_dma_alloc_state_t dataout_dma_state;
10766 caddr_t memp;
10770 pMPI2RequestHeader_t request_hdrp;
10771 pMPI2RequestHeader_t request_msg;
10772 pMPI2DefaultReply_t reply_msg;
10773 Mpi2SCSIIOReply_t rep_msg;
10785 /*
10786 * copy in the request buffer since it could be used by
10787 * another thread when the pt request into waitq
10788 */
10794 }
10801 pMpi2SCSITaskManagementRequest_t task;
10806 mode);
10811 }
10813 }
10822 }
10834 }
10835 }
10837 }
10840 }
10849 }
10860 }
10861 }
10865 }
10871 }
10890 /*
10891 * Form a blank cmd/pkt to store the acknowledgement message
10892 */
10904 boolean_t ret;
10919 }
10928 }
10935 /*
10936 * Save the command in a slot
10937 */
10939 /*
10940 * Once passthru command get slot, set cmd_flags
10941 * CFLAG_PREPARED.
10942 */
10947 }
10951 }
10961 }
10968 }
10971 /*
10972 * cmd_rfm is zero means the command reply is a CONTEXT
10973 * reply and no PCI Write to post the free reply SMFA
10974 * because no reply message frame is used.
10975 * cmd_rfm is non-zero means the reply is a ADDRESS
10976 * reply and reply message frame is used.
10977 */
10980 DDI_DMA_SYNC_FORCPU);
10984 }
10991 }
10996 }
11002 }
11016 }
11020 mode)) {
11026 }
11027 }
11036 }
11037 }
11038 }
11043 DDI_DMA_SYNC_FORCPU);
11047 mode)) {
11053 }
11054 }
11055 }
11056 }
11058 out:
11059 /*
11060 * Put the reply frame back on the free queue, increment the free
11061 * index, and write the new index to the free index register. But only
11062 * if this reply is an ADDRESS reply.
11063 */
11069 DDI_DMA_SYNC_FORDEV);
11072 }
11075 }
11080 }
11084 }
11085 }
11090 DDI_SUCCESS) {
11092 DDI_SERVICE_UNAFFECTED);
11094 }
11096 }
11099 DDI_SUCCESS) {
11101 DDI_SERVICE_UNAFFECTED);
11103 }
11105 }
11109 }
11110 }
11116 }
11118 static int
11120 {
11121 /*
11122 * If timeout is 0, set timeout to default of 60 seconds.
11123 */
11126 }
11139 }
11140 /*
11141 * Send passthru request messages
11142 */
11153 }
11154 }
11156 static uint8_t
11158 {
11164 }
11165 }
11168 }
11170 static void
11172 {
11173 pMpi2DiagBufferPostRequest_t pDiag_post_msg;
11174 pMpi2DiagReleaseRequest_t pDiag_release_msg;
11182 /*
11183 * Form the diag message depending on the post or release function.
11184 */
11201 i++) {
11205 }
11224 }
11226 /*
11227 * Send the message
11228 */
11230 DDI_DMA_SYNC_FORDEV);
11232 MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
11236 DDI_SUCCESS) ||
11238 DDI_SUCCESS)) {
11240 }
11241 }
11243 static int
11246 {
11247 mptsas_diag_request_t diag;
11251 pMpi2DiagBufferPostReply_t reply;
11255 /*
11256 * If buffer is not enabled, just leave.
11257 */
11262 }
11264 /*
11265 * Clear some flags initially.
11266 */
11271 /*
11272 * Get a cmd buffer from the cmd buffer pool
11273 */
11278 }
11289 /*
11290 * Form a blank cmd/pkt to store the acknowledgement message
11291 */
11298 /*
11299 * Save the command in a slot
11300 */
11302 /*
11303 * Once passthru command get slot, set cmd_flags
11304 * CFLAG_PREPARED.
11305 */
11310 }
11314 }
11320 }
11322 /*
11323 * cmd_rfm points to the reply message if a reply was given. Check the
11324 * IOCStatus to make sure everything went OK with the FW diag request
11325 * and set buffer flags.
11326 */
11330 DDI_DMA_SYNC_FORCPU);
11335 /*
11336 * Get the reply message data
11337 */
11345 /*
11346 * If post failed quit.
11347 */
11354 }
11356 /*
11357 * Post was successful.
11358 */
11363 }
11365 out:
11366 /*
11367 * Put the reply frame back on the free queue, increment the free
11368 * index, and write the new index to the free index register. But only
11369 * if this reply is an ADDRESS reply.
11370 */
11376 DDI_DMA_SYNC_FORDEV);
11379 }
11382 }
11386 }
11389 }
11392 }
11394 static int
11398 {
11399 mptsas_diag_request_t diag;
11403 pMpi2DiagReleaseReply_t reply;
11407 /*
11408 * If buffer is not enabled, just leave.
11409 */
11416 }
11418 /*
11419 * Clear some flags initially.
11420 */
11425 /*
11426 * Get a cmd buffer from the cmd buffer pool
11427 */
11433 }
11444 /*
11445 * Form a blank cmd/pkt to store the acknowledgement message
11446 */
11453 /*
11454 * Save the command in a slot
11455 */
11457 /*
11458 * Once passthru command get slot, set cmd_flags
11459 * CFLAG_PREPARED.
11460 */
11465 }
11469 }
11475 }
11477 /*
11478 * cmd_rfm points to the reply message if a reply was given. Check the
11479 * IOCStatus to make sure everything went OK with the FW diag request
11480 * and set buffer flags.
11481 */
11485 DDI_DMA_SYNC_FORCPU);
11490 /*
11491 * Get the reply message data
11492 */
11498 /*
11499 * If release failed quit.
11500 */
11506 iocloginfo));
11508 }
11510 /*
11511 * Release was successful.
11512 */
11516 /*
11517 * If this was for an UNREGISTER diag type command, clear the
11518 * unique ID.
11519 */
11522 }
11523 }
11525 out:
11526 /*
11527 * Put the reply frame back on the free queue, increment the free
11528 * index, and write the new index to the free index register. But only
11529 * if this reply is an ADDRESS reply.
11530 */
11536 DDI_DMA_SYNC_FORDEV);
11539 }
11542 }
11546 }
11549 }
11552 }
11554 static int
11557 {
11571 /*
11572 * Check for valid buffer type
11573 */
11577 }
11579 /*
11580 * Get the current buffer and look up the unique ID. The unique ID
11581 * should not be found. If it is, the ID is already in use.
11582 */
11588 }
11590 /*
11591 * The buffer's unique ID should not be registered yet, and the given
11592 * unique ID cannot be 0.
11593 */
11598 }
11600 /*
11601 * If this buffer is already posted as immediate, just change owner.
11602 */
11608 }
11610 /*
11611 * Post a new buffer after checking if it's enabled. The DMA buffer
11612 * that is allocated will be contiguous (sgl_len = 1).
11613 */
11617 }
11625 }
11627 /*
11628 * Copy the given info to the diag buffer and post the buffer.
11629 */
11634 i++) {
11637 }
11638 }
11644 DDI_SUCCESS) {
11649 }
11651 /*
11652 * In case there was a failure, free the DMA buffer.
11653 */
11656 }
11659 }
11661 static int
11664 {
11674 /*
11675 * Get the current buffer and look up the unique ID. The unique ID
11676 * should be there.
11677 */
11682 }
11686 /*
11687 * Try to release the buffer from FW before freeing it. If release
11688 * fails, don't free the DMA buffer in case FW tries to access it
11689 * later. If buffer is not owned by firmware, can't release it.
11690 */
11696 }
11698 /*
11699 * At this point, return the current status no matter what happens with
11700 * the DMA buffer.
11701 */
11705 DDI_SUCCESS) {
11709 DDI_SERVICE_UNAFFECTED);
11710 }
11712 }
11715 }
11717 static int
11720 {
11729 /*
11730 * If ID is valid, query on ID.
11731 * If ID is invalid, query on buffer type.
11732 */
11738 }
11744 }
11745 }
11747 /*
11748 * Fill query structure with the diag buffer info.
11749 */
11755 i++) {
11758 }
11759 }
11766 /*
11767 * Set/Clear application flags
11768 */
11773 }
11776 MPTSAS_FW_DIAG_FLAG_BUFFER_VALID;
11780 }
11783 MPTSAS_FW_DIAG_FLAG_FW_BUFFER_ACCESS;
11787 }
11790 }
11792 static int
11796 {
11806 /*
11807 * Get the current buffer and look up the unique ID. The unique ID
11808 * should be there.
11809 */
11814 }
11818 /*
11819 * Make sure requested read is within limits
11820 */
11825 }
11827 /*
11828 * Copy the requested data from DMA to the diag_read_buffer. The DMA
11829 * buffer that was allocated is one contiguous buffer.
11830 */
11834 DDI_DMA_SYNC_FORCPU);
11839 }
11840 }
11843 /*
11844 * Set or clear the Force Release flag.
11845 */
11850 }
11852 /*
11853 * If buffer is to be reregistered, make sure it's not already owned by
11854 * firmware first.
11855 */
11860 return_code);
11861 }
11862 }
11865 }
11867 static int
11870 {
11880 /*
11881 * Get the current buffer and look up the unique ID. The unique ID
11882 * should be there.
11883 */
11888 }
11892 /*
11893 * If buffer is not owned by firmware, it's already been released.
11894 */
11898 }
11900 /*
11901 * Release the buffer.
11902 */
11904 MPTSAS_FW_DIAG_TYPE_RELEASE);
11906 }
11908 static int
11911 {
11912 mptsas_fw_diag_register_t diag_register;
11913 mptsas_fw_diag_unregister_t diag_unregister;
11914 mptsas_fw_diag_query_t diag_query;
11915 mptsas_diag_read_buffer_t diag_read_buffer;
11916 mptsas_fw_diag_release_t diag_release;
11929 MPTSAS_FW_DIAG_ERROR_INVALID_PARAMETER;
11932 }
11936 }
11938 return_code);
11944 MPTSAS_FW_DIAG_ERROR_INVALID_PARAMETER;
11947 }
11951 }
11953 return_code);
11959 MPTSAS_FW_DIAG_ERROR_INVALID_PARAMETER;
11962 }
11966 }
11968 return_code);
11973 }
11974 }
11981 }
11987 MPTSAS_FW_DIAG_ERROR_INVALID_PARAMETER;
11990 }
11994 ioctl_mode);
12000 }
12001 }
12007 MPTSAS_FW_DIAG_ERROR_INVALID_PARAMETER;
12010 }
12014 }
12016 return_code);
12023 }
12029 }
12032 }
12034 static int
12036 {
12038 mptsas_diag_action_t driver_data;
12042 /*
12043 * Copy the user data to a driver data buffer.
12044 */
12047 /*
12048 * Send diag action request if Action is valid
12049 */
12058 mode);
12067 }
12070 }
12073 }
12076 }
12079 }
12081 /*
12082 * This routine handles the "event query" ioctl.
12083 */
12084 static int
12087 {
12089 mptsas_event_query_t driverdata;
12097 }
12105 }
12108 }
12110 /*
12111 * This routine handles the "event enable" ioctl.
12112 */
12113 static int
12116 {
12118 mptsas_event_enable_t driverdata;
12125 }
12132 }
12134 }
12136 /*
12137 * This routine handles the "event report" ioctl.
12138 */
12139 static int
12142 {
12144 mptsas_event_report_t driverdata;
12166 }
12170 }
12171 }
12175 }
12178 }
12182 }
12184 static void
12186 {
12188 uint_t reglen;
12190 /*
12191 * Lookup the 'reg' property and extract the other data
12192 */
12195 DDI_PROP_SUCCESS) {
12196 /*
12197 * Extract the PCI data from the 'reg' property first DWORD.
12198 * The entry looks like the following:
12199 * First DWORD:
12200 * Bits 0 - 7 8-bit Register number
12201 * Bits 8 - 10 3-bit Function number
12202 * Bits 11 - 15 5-bit Device number
12203 * Bits 16 - 23 8-bit Bus number
12204 * Bits 24 - 25 2-bit Address Space type identifier
12205 *
12206 */
12215 /*
12216 * If we can't determine the PCI data then we fill in FF's for
12217 * the data to indicate this.
12218 */
12222 }
12224 /*
12225 * Saved in the mpt->m_fwversion
12226 */
12228 }
12230 static void
12232 {
12237 MPTIOCTL_ADAPTER_TYPE_SAS3 :
12238 MPTIOCTL_ADAPTER_TYPE_SAS2;
12246 }
12248 static void
12250 {
12252 uint_t reglen;
12254 /*
12255 * Lookup the 'reg' property and extract the other data
12256 */
12259 DDI_PROP_SUCCESS) {
12260 /*
12261 * Extract the PCI data from the 'reg' property first DWORD.
12262 * The entry looks like the following:
12263 * First DWORD:
12264 * Bits 8 - 10 3-bit Function number
12265 * Bits 11 - 15 5-bit Device number
12266 * Bits 16 - 23 8-bit Bus number
12267 */
12273 /*
12274 * If we can't determine the PCI info then we fill in FF's for
12275 * the data to indicate this.
12276 */
12280 }
12282 /*
12283 * Now get the interrupt vector and the pci header. The vector can
12284 * only be 0 right now. The header is the first 256 bytes of config
12285 * space.
12286 */
12290 i);
12291 }
12292 }
12294 static int
12296 {
12298 mptsas_reg_access_t driverdata;
12303 /*
12304 * IO access is not supported.
12305 */
12323 }
12336 }
12339 }
12343 }
12345 static int
12347 {
12349 mptsas_led_control_t lc;
12354 }
12363 }
12369 /* Locate the target we're interrogating... */
12374 /* We could not find a target for that enclosure/slot. */
12377 }
12380 /* Update our internal LED state. */
12384 /* Flush it to the controller. */
12388 }
12390 /* Return our internal LED state. */
12396 }
12399 }
12401 static int
12403 {
12419 }
12421 /* Find out how many targets there are. */
12425 count++;
12426 }
12429 /*
12430 * If we haven't been asked to copy out information on each target,
12431 * then just return the count.
12432 */
12437 /*
12438 * If we haven't been given a large enough buffer to copy out into,
12439 * let the caller know.
12440 */
12445 }
12453 /*
12454 * The number of targets changed while we weren't
12455 * looking, so give up.
12456 */
12461 }
12466 i++;
12467 }
12471 /* Copy out the disk information to the caller. */
12475 }
12479 copy_out:
12483 }
12486 }
12488 static int
12491 {
12494 mptsas_update_flash_t flashdata;
12495 mptsas_pass_thru_t passthru_data;
12496 mptsas_adapter_data_t adapter_data;
12497 mptsas_pci_info_t pci_info;
12510 }
12514 /*
12515 * Called from iport node, get the states
12516 */
12521 }
12523 }
12524 /* Make sure power level is D0 before accessing registers */
12531 DDI_SUCCESS) {
12533 "mptsas%d: mptsas_ioctl: Raise power "
12537 }
12540 }
12543 }
12549 }
12550 /*
12551 * The following code control the OK2RM LED, it doesn't affect
12552 * the ioctl return status.
12553 */
12557 NDI_SUCCESS) {
12559 }
12567 }
12573 }
12580 }
12584 }
12586 }
12599 }
12606 }
12608 /*
12609 * Reset the chip to start using the new
12610 * firmware. Reset if failed also.
12611 */
12615 }
12619 /*
12620 * The user has requested to pass through a command to
12621 * be executed by the MPT firmware. Call our routine
12622 * which does this. Only allow one passthru IOCTL at
12623 * one time. Other threads will block on
12624 * m_passthru_mutex, which is of adaptive variant.
12625 */
12630 }
12639 /*
12640 * The user has requested to read adapter data. Call
12641 * our routine which does this.
12642 */
12648 }
12662 }
12666 }
12669 /*
12670 * The user has requested to read pci info. Call
12671 * our routine which does this.
12672 */
12680 }
12689 }
12693 /*
12694 * The user has done a diag buffer action. Call our
12695 * routine which does this. Only allow one diag action
12696 * at one time.
12697 */
12702 }
12710 /*
12711 * The user has done an event query. Call our routine
12712 * which does this.
12713 */
12718 /*
12719 * The user has done an event enable. Call our routine
12720 * which does this.
12721 */
12726 /*
12727 * The user has done an event report. Call our routine
12728 * which does this.
12729 */
12734 /*
12735 * The user has requested register access. Call our
12736 * routine which does this.
12737 */
12743 rval);
12745 }
12747 out:
12749 }
12751 int
12753 {
12759 /*
12760 * Set a flag telling I/O path that we're processing a reset. This is
12761 * needed because after the reset is complete, the hash table still
12762 * needs to be rebuilt. If I/Os are started before the hash table is
12763 * rebuilt, I/O errors will occur. This flag allows I/Os to be marked
12764 * so that they can be retried.
12765 */
12768 /*
12769 * Wait until all the allocated sense data buffers for DMA are freed.
12770 */
12774 /*
12775 * Set all throttles to HOLD
12776 */
12780 }
12782 /*
12783 * Disable interrupts
12784 */
12787 /*
12788 * Abort all commands: outstanding commands, commands in waitq and
12789 * tx_waitq.
12790 */
12793 /*
12794 * Reinitialize the chip.
12795 */
12798 }
12800 /*
12801 * Enable interrupts again
12802 */
12805 /*
12806 * If mptsas_init_chip was successful, update the driver data.
12807 */
12810 }
12812 /*
12813 * Reset the throttles
12814 */
12818 }
12826 }
12828 /*
12829 * Clear the reset flag so that I/Os can continue.
12830 */
12834 }
12836 static int
12838 {
12839 ddi_dma_cookie_t cookie;
12843 /*
12844 * Check to see if the firmware image is valid
12845 */
12847 MPI2_DIAG_FLASH_BAD_SIG) {
12850 }
12852 /*
12853 * Reset the chip
12854 */
12859 }
12863 }
12864 /*
12865 * Setup configuration space
12866 */
12871 }
12873 /*
12874 * IOC facts can change after a diag reset so all buffers that are
12875 * based on these numbers must be de-allocated and re-allocated. Get
12876 * new IOC facts each time chip is initialized.
12877 */
12881 }
12885 }
12886 /*
12887 * Allocate request message frames, reply free queue, reply descriptor
12888 * post queue, and reply message frames using latest IOC facts.
12889 */
12893 }
12897 }
12901 }
12905 }
12909 }
12911 mur:
12912 /*
12913 * Re-Initialize ioc to operational state
12914 */
12918 }
12922 /*
12923 * Initialize reply post index. Reply free index is initialized after
12924 * the next loop.
12925 */
12928 /*
12929 * Initialize the Reply Free Queue with the physical addresses of our
12930 * reply frames.
12931 */
12938 }
12940 DDI_DMA_SYNC_FORDEV);
12942 /*
12943 * Initialize the reply free index to one past the last frame on the
12944 * queue. This will signify that the queue is empty to start with.
12945 */
12949 /*
12950 * Initialize the reply post queue to 0xFFFFFFFF,0xFFFFFFFF's.
12951 */
12956 }
12958 DDI_DMA_SYNC_FORDEV);
12960 /*
12961 * Enable ports
12962 */
12966 }
12968 /*
12969 * enable events
12970 */
12975 }
12977 /*
12978 * We need checks in attach and these.
12979 * chip_init is called in mult. places
12980 */
12983 DDI_SUCCESS) ||
12985 DDI_SUCCESS) ||
12987 DDI_SUCCESS) ||
12989 DDI_SUCCESS) ||
12991 DDI_SUCCESS) ||
12993 DDI_SUCCESS)) {
12996 }
12998 /* Check all acc handles */
13001 DDI_SUCCESS) ||
13003 DDI_SUCCESS) ||
13005 DDI_SUCCESS) ||
13007 DDI_SUCCESS) ||
13009 DDI_SUCCESS) ||
13011 DDI_SUCCESS) ||
13013 DDI_SUCCESS)) {
13016 }
13020 fail:
13022 }
13024 static int
13026 {
13031 /*
13032 * Check if capabilities list is supported and if so,
13033 * get initial capabilities pointer and clear bits 0,1.
13034 */
13041 }
13043 /*
13044 * Walk capabilities if supported.
13045 */
13048 /*
13049 * Check that we haven't exceeded the maximum number of
13050 * capabilities and that the pointer is in a valid range.
13051 */
13056 }
13060 caps_ptr);
13062 }
13064 /*
13065 * Get next capability and check that it is valid.
13066 * For now, we only support power management.
13067 */
13076 /* Save PMCSR offset */
13079 /*
13080 * The following capabilities are valid. Any others
13081 * will cause a message to be logged.
13082 */
13091 "?mptsas%d unrecognized capability "
13094 }
13096 /*
13097 * Get next capabilities pointer and clear bits 0,1.
13098 */
13101 }
13103 }
13105 static int
13107 {
13110 NULL,
13113 NULL
13114 };
13119 }
13120 /*
13121 * If PCI's capability does not support PM, then don't need
13122 * to registe the pm-components
13123 */
13126 /*
13127 * If power management is supported by this chip, create
13128 * pm-components property for the power management framework
13129 */
13139 }
13141 /*
13142 * Power on device.
13143 */
13151 PCI_PMCSR_D0);
13152 }
13156 }
13158 /*
13159 * Set pm idle delay.
13160 */
13165 }
13167 static int
13169 {
13175 /* Get supported interrupt types */
13180 }
13184 /*
13185 * Try MSI, but fall back to FIXED
13186 */
13192 }
13193 }
13202 }
13203 }
13206 }
13208 static void
13210 {
13212 }
13214 /*
13215 * mptsas_add_intrs:
13216 *
13217 * Register FIXED or MSI interrupts.
13218 */
13219 static int
13221 {
13228 /* Get number of interrupts */
13235 }
13237 /* Get number of available interrupts */
13244 }
13249 }
13251 /* Mpt only have one interrupt routine */
13254 }
13256 /* Allocate an array of interrupt handles */
13262 /* call ddi_intr_alloc() */
13268 ret);
13271 }
13273 /* use interrupt count returned or abort? */
13277 }
13281 /*
13282 * Get priority for first msi, assume remaining are all the same
13283 */
13288 /* Free already allocated intr */
13291 }
13295 }
13297 /* Test for high level mutex */
13302 /* Free already allocated intr */
13305 }
13309 }
13311 /* Call ddi_intr_add_handler() */
13318 /* Free already allocated intr */
13321 }
13325 }
13326 }
13332 /* Free already allocated intr */
13335 }
13339 }
13341 /*
13342 * Enable interrupts
13343 */
13345 /* Call ddi_intr_block_enable() for MSI interrupts */
13348 /* Call ddi_intr_enable for MSI or FIXED interrupts */
13351 }
13352 }
13354 }
13356 /*
13357 * mptsas_rem_intrs:
13358 *
13359 * Unregister FIXED or MSI interrupts
13360 */
13361 static void
13363 {
13368 /* Disable all interrupts */
13370 /* Call ddi_intr_block_disable() */
13375 }
13376 }
13378 /* Call ddi_intr_remove_handler() */
13382 }
13385 }
13387 /*
13388 * The IO fault service error handling callback function
13389 */
13390 /*ARGSUSED*/
13391 static int
13393 {
13394 /*
13395 * as the driver can always deal with an error in any dma or
13396 * access handle, we can just return the fme_status value.
13397 */
13400 }
13402 /*
13403 * mptsas_fm_init - initialize fma capabilities and register with IO
13404 * fault services.
13405 */
13406 static void
13408 {
13409 /*
13410 * Need to change iblock to priority for new MSI intr
13411 */
13412 ddi_iblock_cookie_t fm_ibc;
13414 /* Only register with IO Fault Services if we have some capability */
13416 /* Adjust access and dma attributes for FMA */
13421 /*
13422 * Register capabilities with IO Fault Services.
13423 * mpt->m_fm_capabilities will be updated to indicate
13424 * capabilities actually supported (not requested.)
13425 */
13428 /*
13429 * Initialize pci ereport capabilities if ereport
13430 * capable (should always be.)
13431 */
13435 }
13437 /*
13438 * Register error callback if error callback capable.
13439 */
13443 }
13444 }
13445 }
13447 /*
13448 * mptsas_fm_fini - Releases fma capabilities and un-registers with IO
13449 * fault services.
13450 *
13451 */
13452 static void
13454 {
13455 /* Only unregister FMA capabilities if registered */
13458 /*
13459 * Un-register error callback if error callback capable.
13460 */
13464 }
13466 /*
13467 * Release any resources allocated by pci_ereport_setup()
13468 */
13473 }
13475 /* Unregister from IO Fault Services */
13478 /* Adjust access and dma attributes for FMA */
13483 }
13484 }
13486 int
13488 {
13489 ddi_fm_error_t de;
13495 }
13497 int
13499 {
13500 ddi_fm_error_t de;
13506 }
13508 void
13510 {
13519 }
13520 }
13522 static int
13525 {
13529 mptsas_phymask_t phymask;
13544 }
13547 MPI2_SAS_DEVICE_INFO_SATA_DEVICE |
13551 }
13553 /*
13554 * Check if the dev handle is for a Phys Disk. If so, set return value
13555 * and exit. Don't add Phys Disks to hash.
13556 */
13563 }
13564 }
13565 }
13567 /*
13568 * Get SATA Device Name from SAS device page0 for
13569 * sata device, if device name doesn't exist, set mta_wwn to
13570 * 0 for direct attached SATA. For the device behind the expander
13571 * we still can use STP address assigned by expander.
13572 */
13574 MPI2_SAS_DEVICE_INFO_ATAPI_DEVICE)) {
13575 /* alloc a temporary target to send the cmd to */
13587 }
13593 }
13597 }
13607 }
13612 }
13614 uint64_t
13616 {
13627 inq83_retry:
13635 }
13636 /* According to SAT2, the first descriptor is logic unit name */
13641 }
13650 /* The data is not ready, wait and retry */
13651 inq83_retry--;
13654 }
13658 }
13659 out:
13662 }
13664 static int
13667 {
13684 }
13698 }
13700 }
13703 }
13705 }
13707 static int
13711 {
13717 /*
13718 * scsi_hba_tran_t->tran_tgt_private is used to pass the address
13719 * information to scsi_init_pkt, allocate a scsi_hba_tran structure
13720 * to simulate the cmds from sd
13721 */
13726 }
13733 }
13744 }
13749 }
13752 }
13755 }
13758 out:
13761 }
13764 }
13767 }
13769 }
13770 static int
13772 {
13784 ptr++;
13787 }
13799 }
13810 }
13817 }
13824 out:
13831 }
13833 /*
13834 * mptsas_parse_smp_name() is to parse sas wwn string
13835 * which format is "wWWN"
13836 */
13837 static int
13839 {
13844 }
13846 ptr++;
13849 }
13851 }
13853 static int
13856 {
13871 }
13876 }
13877 /*
13878 * Hold the nexus across the bus_config
13879 */
13884 /* parse wwid/target name out of name given */
13888 }
13889 ptr++;
13891 /*
13892 * This is a SMP target device
13893 */
13898 }
13901 /*
13902 * OBP could pass down a non-canonical form
13903 * bootpath without LUN part when LUN is 0.
13904 * So driver need adjust the string.
13905 */
13910 ptr++;
13911 }
13913 /*
13914 * The device path is wWWID format and the device
13915 * is not SMP target device.
13916 */
13921 }
13928 childp);
13929 }
13931 /*
13932 * If this is CD/DVD device in OBP path, the
13933 * ndi_busop_bus_config can be skipped as config one
13934 * operation is done above.
13935 */
13941 }
13945 }
13947 /*
13948 * DDI group instructed us to use this flag.
13949 */
13957 }
13962 }
13969 }
13971 static int
13974 {
13988 }
13992 }
13994 static int
13997 {
14003 /*
14004 * Get the physical port associated to the iport
14005 */
14011 /*
14012 * didn't match any device by searching
14013 */
14015 }
14016 /*
14017 * If the LUN already exists and the status is online,
14018 * we just return the pointer to dev_info_t directly.
14019 * For the mdi_pathinfo node, we'll handle it in
14020 * mptsas_create_virt_lun()
14021 * TODO should be also in mptsas_handle_dr
14022 */
14026 /*
14027 * TODO Another senario is, we hotplug the same disk
14028 * on the same slot, the devhdl changed, is this
14029 * possible?
14030 * tgt_private->t_private != ptgt
14031 */
14033 /*
14034 * The device has changed although the devhdl is the
14035 * same (Enclosure mapping mode, change drive on the
14036 * same slot)
14037 */
14039 }
14041 }
14044 /*
14045 * Configure IR volume
14046 */
14049 }
14053 }
14055 static int
14058 {
14061 mptsas_phymask_t phymask;
14064 /*
14065 * Get the physical port associated to the iport
14066 */
14072 /*
14073 * didn't match any device by searching
14074 */
14076 }
14078 /*
14079 * If the LUN already exists and the status is online,
14080 * we just return the pointer to dev_info_t directly.
14081 * For the mdi_pathinfo node, we'll handle it in
14082 * mptsas_create_virt_lun().
14083 */
14088 }
14093 }
14095 static int
14098 {
14105 /* determine report luns addressing type */
14107 /*
14108 * Vendors in the field have been found to be concatenating
14109 * bus/target/lun to equal the complete lun value instead
14110 * of switching to flat space addressing
14111 */
14112 /* 00b - peripheral device addressing method */
14114 /* FALLTHRU */
14115 /* 10b - logical unit addressing method */
14117 /* FALLTHRU */
14118 /* 01b - flat space addressing method */
14120 /* byte0 bit0-5=msb lun byte1 bit0-7=lsb lun */
14128 }
14129 }
14131 static int
14133 {
14160 /*
14161 * It's a SATA without Device Name
14162 * So don't try multi-LUNs
14163 */
14167 /*
14168 * need configure and create node
14169 */
14171 }
14172 }
14174 /*
14175 * WWN (SAS address or Device Name exist)
14176 */
14178 MPI2_SAS_DEVICE_INFO_ATAPI_DEVICE)) {
14179 /*
14180 * SATA device with Device Name
14181 * So don't try multi-LUNs
14182 */
14187 }
14188 }
14197 retry++;
14199 }
14211 retry++;
14213 }
14219 }
14228 /*
14229 * find out the number of luns returned by the SCSI ReportLun call
14230 * and allocate buffer space
14231 */
14237 }
14242 }
14246 else
14248 ptgt);
14251 MPTSAS_DEV_GONE);
14252 }
14253 }
14258 }
14260 static int
14262 {
14276 }
14287 }
14291 }
14293 /*
14294 * configure all RAID volumes for virtual iport
14295 */
14296 static void
14298 {
14304 /*
14305 * Get latest RAID info and search for any Volume DevHandles. If any
14306 * are found, configure the volume.
14307 */
14319 }
14320 }
14321 }
14323 }
14325 static void
14328 {
14353 }
14358 }
14361 DDI_SUCCESS) {
14363 }
14370 }
14371 }
14374 }
14376 /*
14377 * The lun has not been there already
14378 */
14380 NDI_DEVI_REMOVE);
14381 }
14382 }
14394 }
14399 }
14406 }
14407 }
14410 }
14413 /*
14414 * The lun has not been there already
14415 */
14417 NDI_DEVI_REMOVE);
14418 }
14419 }
14420 }
14422 void
14424 {
14429 mptsas_smp_t smp_node;
14431 /*
14432 * Get latest RAID info.
14433 */
14443 }
14446 }
14448 /*
14449 * Config target devices
14450 */
14453 /*
14454 * Do loop to get sas device page 0 by GetNextHandle till the
14455 * the last handle. If the sas device is a SATA/SSP target,
14456 * we try to config it.
14457 */
14460 page_address =
14462 MPI2_SAS_DEVICE_PGAD_FORM_MASK) |
14470 }
14473 }
14475 }
14477 void
14479 {
14485 /*
14486 * TODO after hard reset, update the driver data structures
14487 * 1. update port/phymask mapping table mpt->m_phy_info
14488 * 2. invalid all the entries in hash table
14489 * m_devhdl = 0xffff and m_deviceinfo = 0
14490 * 3. call sas_device_page/expander_page to update hash table
14491 */
14494 /*
14495 * Remove all the devhdls for existing entries but leave their
14496 * addresses alone. In update_hashtab() below, we'll find all
14497 * targets that are still present and reassociate them with
14498 * their potentially new devhdls. Leaving the targets around in
14499 * this fashion allows them to be used on the tx waitq even
14500 * while IOC reset is occurring.
14501 */
14507 }
14512 }
14517 }
14519 static void
14521 {
14525 mptsas_phymask_t phy_mask;
14529 /*
14530 * Get the phymask associated to the iport
14531 */
14535 /*
14536 * Enumerate RAID volumes here (phymask == 0).
14537 */
14541 }
14547 }
14557 }
14558 }
14567 }
14568 }
14570 }
14572 static int
14574 {
14580 /*
14581 * The return value means the SCMD_REPORT_LUNS
14582 * did not execute successfully. The target maybe
14583 * doesn't support such command.
14584 */
14586 }
14588 }
14590 /*
14591 * Return fail if not all the childs/paths are freed.
14592 * if there is any path under the HBA, the return value will be always fail
14593 * because we didn't call mdi_pi_free for path
14594 */
14595 static int
14597 {
14613 }
14616 }
14622 }
14625 NDI_DEVI_REMOVE);
14630 DDI_PROP_SUCCESS) {
14632 "unable to create property for "
14634 }
14635 }
14636 }
14645 }
14649 }
14655 }
14658 NDI_DEVI_REMOVE);
14659 /*
14660 * driver will not invoke mdi_pi_free, so path will not
14661 * be freed forever, return DDI_FAILURE.
14662 */
14664 }
14666 }
14668 static int
14671 {
14684 }
14686 /*
14687 * Make sure node is attached otherwise
14688 * it won't have related cache nodes to
14689 * clean up. i_ddi_devi_attached is
14690 * similiar to i_ddi_node_state(cdip) >=
14691 * DS_ATTACHED.
14692 */
14695 /* Get full devname */
14698 /* Clean cache */
14700 DV_CLEAN_FORCE);
14702 }
14708 }
14711 }
14714 }
14718 {
14729 }
14734 }
14737 }
14739 }
14741 static int
14743 {
14756 /*
14757 * Make sure node is attached otherwise
14758 * it won't have related cache nodes to
14759 * clean up. i_ddi_devi_attached is
14760 * similiar to i_ddi_node_state(cdip) >=
14761 * DS_ATTACHED.
14762 */
14765 /* Get full devname */
14768 /* Clean cache */
14770 DV_CLEAN_FORCE);
14772 }
14777 }
14781 {
14795 }
14799 }
14802 }
14807 }
14812 {
14825 }
14829 {
14838 }
14842 {
14851 }
14855 {
14869 }
14871 static int
14874 {
14880 ddi_devid_t devid;
14886 /*
14887 * For DVD/CD ROM and tape devices and optical
14888 * devices, we won't try to enumerate them under
14889 * scsi_vhci, so no need to try page83
14890 */
14896 /*
14897 * The LCA returns good SCSI status, but corrupt page 83 data the first
14898 * time it is queried. The solution is to keep trying to request page83
14899 * and verify the GUID is not (DDI_NOT_WELL_FORMED) in
14900 * mptsas_inq83_retry_timeout seconds. If the timeout expires, driver
14901 * give up to get VPD page at this stage and fail the enumeration.
14902 */
14915 }
14916 /*
14917 * create DEVID from inquiry data
14918 */
14923 /*
14924 * extract GUID from DEVID
14925 */
14928 /*
14929 * Do not enable MPXIO if the strlen(guid) is greater
14930 * than MPTSAS_MAX_GUID_LEN, this constrain would be
14931 * handled by framework later.
14932 */
14938 "lun:%x doesn't have a valid GUID, "
14939 "multipathing for this drive is "
14941 }
14942 }
14944 /*
14945 * devid no longer needed
14946 */
14950 /*
14951 * return value of ddi_devid_scsi_encode equal to
14952 * DDI_NOT_WELL_FORMED means DEVID_RETRY, it worth
14953 * to retry inquiry page 0x83 and get GUID.
14954 */
14963 }
14964 }
14969 }
14973 create_lun:
14977 }
14982 }
14983 out:
14985 /*
14986 * guid no longer needed
14987 */
14989 }
14993 }
14995 static int
14998 {
15038 }
15047 /*
15048 * Same path back online again.
15049 */
15058 ptgt);
15062 }
15066 lun);
15069 }
15072 /*
15073 * The GUID of the LUN has changed which maybe
15074 * because customer mapped another volume to the
15075 * same LUN.
15076 */
15078 "target:%x, lun:%x was changed, maybe "
15079 "because someone mapped another volume "
15086 "target:%x, lun:%x offline "
15091 }
15092 }
15096 lun);
15100 }
15101 }
15108 }
15109 }
15113 /*
15114 * if nodename can't be determined then print a message and skip it
15115 */
15121 }
15124 /* The property is needed by MPAPI */
15134 }
15148 }
15157 }
15163 target);
15166 }
15169 DDI_PROP_SUCCESS) {
15175 }
15179 "create prop for target %d lun %d "
15185 /*
15186 * Direct attached SATA device without DeviceName
15187 */
15189 "create prop for SAS target %d lun %d "
15193 }
15197 MPI2_SAS_DEVICE_PGAD_FORM_MASK) |
15208 }
15221 }
15225 /*
15226 * If this device direct attached to the controller
15227 * set the attached-port to the base wwid
15228 */
15232 pdev_sas_wwn);
15234 /*
15235 * Update the iport's attached-port to guid
15236 */
15241 }
15244 DDI_PROP_SUCCESS) {
15246 "mptsas unable to create "
15247 "property for iport target-port"
15249 wwn_str);
15252 }
15256 }
15260 DDI_PROP_SUCCESS) {
15263 attached_wwn_str);
15266 }
15271 /*
15272 * set obp path for pathinfo
15273 */
15278 DDI_SUCCESS) {
15281 component);
15284 }
15285 }
15289 MPI2_SAS_DEVICE_INFO_ATAPI_DEVICE)) {
15292 DDI_PROP_SUCCESS) {
15294 "failed to create pm-capable "
15298 }
15299 }
15300 /*
15301 * Create the phy-num property
15302 */
15310 }
15318 }
15321 }
15322 virt_create_done:
15327 }
15328 }
15333 }
15336 }
15339 }
15342 }
15344 static int
15347 {
15383 /*
15384 * generate compatible property with binding-set "mpt"
15385 */
15389 /*
15390 * if nodename can't be determined then print a message and skip it
15391 */
15396 }
15401 /*
15402 * if lun alloc success, set props
15403 */
15408 DDI_PROP_SUCCESS) {
15414 }
15419 DDI_PROP_SUCCESS) {
15425 }
15434 }
15436 /*
15437 * We need the SAS WWN for non-multipath devices, so
15438 * we'll use the same property as that multipathing
15439 * devices need to present for MPAPI. If we don't have
15440 * a WWN (e.g. parallel SCSI), don't create the prop.
15441 */
15448 "create property for SAS target %d lun %d "
15452 }
15459 "create property for SAS target %d lun %d "
15465 DDI_PROP_SUCCESS)) {
15466 /*
15467 * Direct attached SATA device without DeviceName
15468 */
15470 "create property for SAS target %d lun %d "
15474 }
15479 "create property for SAS target %d lun %d"
15483 }
15487 "to create guid property for target %d "
15491 }
15493 /*
15494 * The following code is to set properties for SM-HBA support,
15495 * it doesn't apply to RAID volumes
15496 */
15503 MPI2_SAS_DEVICE_PGAD_FORM_MASK) |
15515 }
15528 }
15532 /*
15533 * If this device direct attached to the controller
15534 * set the attached-port to the base wwid
15535 */
15539 pdev_sas_wwn);
15541 /*
15542 * Update the iport's attached-port to guid
15543 */
15548 }
15551 DDI_PROP_SUCCESS) {
15553 "mptsas unable to create "
15554 "property for iport target-port"
15556 wwn_str);
15559 }
15563 }
15567 DDI_PROP_SUCCESS) {
15569 "mptsas unable to create "
15571 attached_wwn_str);
15574 }
15579 DDI_PROP_SUCCESS) {
15581 "mptsas unable to create "
15585 }
15586 }
15591 DDI_PROP_SUCCESS) {
15593 "mptsas unable to create "
15597 }
15598 }
15600 phys_raid_lun:
15601 /*
15602 * if this is a SAS controller, and the target is a SATA
15603 * drive, set the 'pm-capable' property for sd and if on
15604 * an OPL platform, also check if this is an ATAPI
15605 * device.
15606 */
15609 MPI2_SAS_DEVICE_INFO_ATAPI_DEVICE)) {
15615 DDI_PROP_SUCCESS) {
15617 "failed to create pm-capable "
15621 }
15623 }
15626 /*
15627 * add 'obp-path' properties for devinfo
15628 */
15638 }
15642 "unable to set obp-path for SAS "
15646 }
15647 }
15648 /*
15649 * Create the phy-num property for non-raid disk
15650 */
15654 DDI_PROP_SUCCESS) {
15656 "failed to create phy-num property for "
15660 }
15661 }
15662 phys_create_done:
15663 /*
15664 * If props were setup ok, online the lun
15665 */
15667 /*
15668 * Try to online the new node
15669 */
15671 }
15677 }
15679 /*
15680 * If success set rtn flag, else unwire alloc'd lun
15681 */
15688 }
15689 }
15695 }
15698 }
15702 }
15704 static int
15706 {
15710 /* XXX An HBA driver should not be allocating an smp_device. */
15718 }
15720 static int
15722 {
15728 /*
15729 * Get the physical port associated to the iport
15730 * PHYMASK TODO
15731 */
15734 /*
15735 * Find the smp node in hash table with specified sas address and
15736 * physical port
15737 */
15741 }
15746 }
15748 static int
15751 {
15756 mptsas_smp_t dev_info;
15775 /*
15776 * Probe smp device, prevent the node of removed device from being
15777 * configured succesfully
15778 */
15781 }
15785 }
15789 /*
15790 * if lun alloc success, set props
15791 */
15793 /*
15794 * Set the flavor of the child to be SMP flavored
15795 */
15800 DDI_PROP_SUCCESS) {
15803 wwn_str);
15806 }
15810 DDI_PROP_SUCCESS) {
15813 wwn_str);
15816 }
15827 "mptsas unable to get expander "
15831 }
15835 MPI2_SAS_DEVICE_PGAD_FORM_MASK) |
15846 }
15849 MPI2_SAS_DEVICE_PGAD_FORM_MASK) |
15861 }
15864 /*
15865 * If this smp direct attached to the controller
15866 * set the attached-port to the base wwid
15867 */
15871 sas_wwn);
15875 }
15879 DDI_PROP_SUCCESS) {
15882 attached_wwn_str);
15885 }
15891 wwn_str);
15894 }
15896 /*
15897 * check the smp to see whether it direct
15898 * attached to the controller
15899 */
15903 }
15908 }
15909 /*
15910 * this iport is an old iport, we need to
15911 * reconfig the props for it.
15912 */
15915 DDI_PROP_SUCCESS) {
15917 MPTSAS_VIRTUAL_PORT);
15921 }
15933 }
15934 }
15938 numphys++;
15939 }
15940 }
15941 /*
15942 * Update PHY info for smhba
15943 */
15949 }
15957 DDI_PROP_SUCCESS) {
15959 MPTSAS_NUM_PHYS);
15963 }
15964 /*
15965 * Add parent's props for SMHBA support
15966 */
15969 DDI_PROP_SUCCESS) {
15971 SCSI_ADDR_PROP_ATTACHED_PORT);
15975 }
15977 smp_create_done:
15978 /*
15979 * If props were setup ok, online the lun
15980 */
15982 /*
15983 * Try to online the new node
15984 */
15986 }
15988 /*
15989 * If success set rtn flag, else unwire alloc'd lun
15990 */
15996 }
15997 }
16000 }
16002 /* smp transport routine */
16004 {
16006 Mpi2SmpPassthroughRequest_t req;
16007 Mpi2SmpPassthroughReply_t rep;
16017 /*
16018 * Need to compose a SMP request message
16019 * and call mptsas_do_passthru() function
16020 */
16031 }
16039 }
16042 }
16056 }
16057 /* do passthrough success, check the smp status */
16074 }
16076 }
16082 }
16085 }
16087 /*
16088 * If we didn't get a match, we need to get sas page0 for each device, and
16089 * untill we get a match. If failed, return NULL
16090 */
16093 {
16100 /*
16101 * PHY named device must be direct attached and attaches to
16102 * narrow port, if the iport is not parent of the device which
16103 * we are looking for.
16104 */
16107 j++;
16108 }
16113 /*
16114 * Must be a narrow port and single device attached to the narrow port
16115 * So the physical port num of device which is equal to the iport's
16116 * port num is the device what we are looking for.
16117 */
16129 }
16134 }
16136 /* If didn't get a match, come here */
16148 }
16152 }
16157 }
16158 }
16162 }
16164 /*
16165 * The ptgt->m_addr.mta_wwn contains the wwid for each disk.
16166 * For Raid volumes, we need to check m_raidvol[x].m_raidwwid
16167 * If we didn't get a match, we need to get sas page0 for each device, and
16168 * untill we get a match
16169 * If failed, return NULL
16170 */
16173 {
16178 mptsas_target_addr_t addr;
16187 }
16190 /*
16191 * It's IR volume
16192 */
16196 }
16199 }
16204 }
16206 /* If didn't get a match, come here */
16219 }
16223 }
16229 }
16230 }
16234 }
16238 {
16243 mptsas_target_addr_t addr;
16252 }
16257 }
16259 /* If didn't get a match, come here */
16269 }
16276 }
16277 }
16281 }
16283 mptsas_target_t *
16286 {
16288 mptsas_target_addr_t addr;
16298 }
16303 }
16309 /* Initialized the tgt structure */
16319 }
16321 static void
16323 {
16328 }
16332 {
16333 mptsas_target_addr_t addr;
16339 /*
16340 * If there's already a matching SMP target, update its fields
16341 * in place. Since the address is not changing, it's safe to do
16342 * this. We cannot just bcopy() here because the structure we've
16343 * been given has invalid hash links.
16344 */
16348 }
16354 }
16356 /*
16357 * Functions for SGPIO LED support
16358 */
16361 {
16372 }
16375 {
16383 }
16388 }
16390 }
16392 static int
16394 {
16397 /* Build an MPI2 Slot Status based on our view of the world */
16405 /* Write it to the controller */
16409 MPI2_SEP_REQ_ACTION_WRITE_STATUS));
16410 }
16412 /*
16413 * send sep request, use enclosure/slot addressing
16414 */
16415 static int
16418 {
16419 Mpi2SepRequest_t req;
16420 Mpi2SepReply_t rep;
16425 /*
16426 * We only support SEP control of directly-attached targets, in which
16427 * case the "SEP" we're talking to is a virtual one contained within
16428 * the HBA itself. This is necessary because DA targets typically have
16429 * no other mechanism for LED control. Targets for which a separate
16430 * enclosure service processor exists should be controlled via ses(7d)
16431 * or sgen(7d). Furthermore, since such requests can time out, they
16432 * should be made in user context rather than in response to
16433 * asynchronous fabric changes.
16434 *
16435 * In addition, we do not support this operation for RAID volumes,
16436 * since there is no slot associated with them.
16437 */
16441 }
16453 }
16460 }
16461 /* do passthrough success, check the ioc status */
16487 }
16488 }
16491 }
16494 }
16496 int
16500 {
16501 ddi_dma_cookie_t new_cookie;
16503 uint_t ncookie;
16511 }
16519 }
16528 }
16531 }
16533 void
16535 {
16543 }