include/sys/pci_impl.h

   1 /*
   2  * CDDL HEADER START
   3  *
   4  * The contents of this file are subject to the terms of the
   5  * Common Development and Distribution License (the "License").
   6  * You may not use this file except in compliance with the License.
   7  *
   8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
   9  * or http://www.opensolaris.org/os/licensing.
  10  * See the License for the specific language governing permissions
  11  * and limitations under the License.
  12  *
  13  * When distributing Covered Code, include this CDDL HEADER in each
  14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
  15  * If applicable, add the following below this CDDL HEADER, with the
  16  * fields enclosed by brackets "[]" replaced with your own identifying
  17  * information: Portions Copyright [yyyy] [name of copyright owner]
  18  *
  19  * CDDL HEADER END
  20  */
  21 /*
  22  * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
  23  * Use is subject to license terms.
  24  */
  25
  26 #ifndef _SYS_PCI_IMPL_H
  27 #define _SYS_PCI_IMPL_H
  28
  29 #include <sys/dditypes.h>
  30 #include <sys/memlist.h>
  31
  32 #ifdef __cplusplus
  33 extern "C" {
  34 #endif
  35
  36 #if defined(__i386) || defined(__amd64)
  37
  38 /*
  39  * There are two ways to access the PCI configuration space on X86
  40  *      Access method 2 is the older method
  41  *      Access method 1 is the newer method and is preferred because
  42  *        of the problems in trying to lock the configuration space
  43  *        for MP machines using method 2.  See PCI Local BUS Specification
  44  *        Revision 2.0 section 3.6.4.1 for more details.
  45  *
  46  * In addition, on IBM Sandalfoot and a few related machines there's
  47  * still another mechanism.  See PReP 1.1 section 6.1.7.
  48  */
  49
  50 #define PCI_MECHANISM_UNKNOWN           -1
  51 #define PCI_MECHANISM_NONE              0
  52 #if defined(__i386) || defined(__amd64)
  53 #define PCI_MECHANISM_1                 1
  54 #define PCI_MECHANISM_2                 2
  55 #else
  56 #error "Unknown processor type"
  57 #endif
  58
  59
  60 #ifndef FALSE
  61 #define FALSE   0
  62 #endif
  63
  64 #ifndef TRUE
  65 #define TRUE    1
  66 #endif
  67
  68 #define PCI_FUNC_MASK                   0x07
  69
  70 /* these macros apply to Configuration Mechanism #1 */
  71 #define PCI_CONFADD             0xcf8
  72 #define PCI_PMC                 0xcfb
  73 #define PCI_CONFDATA            0xcfc
  74 #define PCI_CONE                0x80000000
  75 #define PCI_CADDR1(bus, device, function, reg) \
  76                 (PCI_CONE | (((bus) & 0xff) << 16) | (((device & 0x1f)) << 11) \
  77                             | (((function) & 0x7) << 8) | ((reg) & 0xfc))
  78
  79 /* these macros apply to Configuration Mechanism #2 */
  80 #define PCI_CSE_PORT            0xcf8
  81 #define PCI_FORW_PORT           0xcfa
  82 #define PCI_CADDR2(device, indx) \
  83                 (0xc000 | (((device) & 0xf) <<  8) | (indx))
  84
  85 typedef struct  pci_acc_cfblk {
  86         uchar_t c_busnum;               /* bus number */
  87         uchar_t c_devnum;               /* device number */
  88         uchar_t c_funcnum;              /* function number */
  89         uchar_t c_fill;                 /* reserve field */
  90 } pci_acc_cfblk_t;
  91
  92 struct pci_bus_resource {
  93         struct memlist *io_avail;       /* available free io res */
  94         struct memlist *io_used;        /* used io res */
  95         struct memlist *mem_avail;      /* available free mem res */
  96         struct memlist *mem_used;       /* used mem res */
  97         struct memlist *pmem_avail; /* available free prefetchable mem res */
  98         struct memlist *pmem_used; /* used prefetchable mem res */
  99         struct memlist *bus_avail;      /* available free bus res */
 100                         /* bus_space_used not needed; can read from regs */
 101         dev_info_t *dip;        /* devinfo node */
 102         void *privdata;         /* private data for configuration */
 103         uchar_t par_bus;        /* parent bus number */
 104         uchar_t sub_bus;        /* highest bus number beyond this bridge */
 105         uchar_t root_addr;      /* legacy peer bus address assignment */
 106         uchar_t num_cbb;        /* # of CardBus Bridges on the bus */
 107         boolean_t io_reprogram; /* need io reprog on this bus */
 108         boolean_t mem_reprogram;        /* need mem reprog on this bus */
 109         boolean_t subtractive;  /* subtractive PPB */
 110         uint_t mem_size;        /* existing children required MEM space size */
 111         uint_t io_size;         /* existing children required I/O space size */
 112 };
 113
 114 extern struct pci_bus_resource *pci_bus_res;
 115
 116 /*
 117  * For now, x86-only to avoid conflicts with <sys/memlist_impl.h>
 118  */
 119 #define memlist_find            memlist_find_pci
 120 #define memlist_insert          memlist_insert_pci
 121
 122 extern struct memlist *memlist_alloc(void);
 123 extern void memlist_free(struct memlist *);
 124 extern void memlist_free_all(struct memlist **);
 125 extern void memlist_insert(struct memlist **, uint64_t, uint64_t);
 126 extern int memlist_remove(struct memlist **, uint64_t, uint64_t);
 127 extern uint64_t memlist_find(struct memlist **, uint64_t, int);
 128 extern uint64_t memlist_find_with_startaddr(struct memlist **, uint64_t,
 129     uint64_t, int);
 130 extern void memlist_dump(struct memlist *);
 131 extern void memlist_subsume(struct memlist **, struct memlist **);
 132 extern void memlist_merge(struct memlist **, struct memlist **);
 133 extern struct memlist *memlist_dup(struct memlist *);
 134 extern int memlist_count(struct memlist *);
 135
 136 #endif /* __i386 || __amd64 */
 137
 138 /* Definitions for minor numbers */
 139 #define PCI_MINOR_NUM(x, y)             (((uint_t)(x) << 8) | ((y) & 0xFF))
 140 #define PCI_MINOR_NUM_TO_PCI_DEVNUM(x)  ((x) & 0xFF)
 141 #define PCI_MINOR_NUM_TO_INSTANCE(x)    ((x) >> 8)
 142 #define PCI_DEVCTL_MINOR                0xFF
 143
 144 /*
 145  * Minor numbers for dedicated pcitool nodes.
 146  * Note that FF and FE minor numbers are used for other minor nodes.
 147  */
 148 #define PCI_TOOL_REG_MINOR_NUM          0xFD
 149 #define PCI_TOOL_INTR_MINOR_NUM         0xFC
 150
 151 /* pci devctl soft state flag */
 152 #define PCI_SOFT_STATE_CLOSED           0x0
 153 #define PCI_SOFT_STATE_OPEN             0x1
 154 #define PCI_SOFT_STATE_OPEN_EXCL        0x2
 155
 156 /*
 157  * PCI capability related definitions.
 158  */
 159
 160 /*
 161  * Minimum number of dwords to be saved.
 162  */
 163 #define PCI_MSI_MIN_WORDS       3
 164 #define PCI_PCIX_MIN_WORDS      2
 165 #define PCI_PCIE_MIN_WORDS      5
 166
 167 /*
 168  * Total number of dwords to be saved.
 169  */
 170 #define PCI_PMCAP_NDWORDS       2
 171 #define PCI_AGP_NDWORDS         3
 172 #define PCI_SLOTID_NDWORDS      1
 173 #define PCI_MSIX_NDWORDS        3
 174 #define PCI_CAP_SZUNKNOWN       0
 175
 176 #define PCI_HTCAP_SLPRI_NDWORDS         7
 177 #define PCI_HTCAP_HOSTSEC_NDWORDS       6
 178 #define PCI_HTCAP_INTCONF_NDWORDS       2
 179 #define PCI_HTCAP_REVID_NDWORDS         1
 180 #define PCI_HTCAP_UNITID_CLUMP_NDWORDS  3
 181 #define PCI_HTCAP_ECFG_NDWORDS          3
 182 #define PCI_HTCAP_ADDRMAP_NDWORDS       PCI_CAP_SZUNKNOWN       /* variable */
 183 #define PCI_HTCAP_MSIMAP_NDWORDS        3
 184 #define PCI_HTCAP_DIRROUTE_NDWORDS      3
 185 #define PCI_HTCAP_VCSET_NDWORDS         3
 186 #define PCI_HTCAP_RETRYMODE_NDWORDS     3
 187 #define PCI_HTCAP_GEN3_NDWORDS          10
 188 #define PCI_HTCAP_FUNCEXT_NDWORDS       PCI_CAP_SZUNKNOWN       /* variable */
 189 #define PCI_HTCAP_PM_NDWORDS            2
 190
 191
 192 #define CAP_ID(confhdl, cap_ptr, xspace)                \
 193         ((xspace) ? 0 : pci_config_get8((confhdl), (cap_ptr) + PCI_CAP_ID))
 194
 195 #define NEXT_CAP(confhdl, cap_ptr, xspace)      \
 196         ((xspace) ? 0 :                         \
 197         pci_config_get8((confhdl), (cap_ptr) + PCI_CAP_NEXT_PTR))
 198
 199 extern int pci_resource_setup(dev_info_t *);
 200 extern void pci_resource_destroy(dev_info_t *);
 201
 202 #ifdef __cplusplus
 203 }
 204 #endif
 205
 206 #endif /* _SYS_PCI_IMPL_H */