usr/src/cmd/mdb/i86pc/modules/apix/apix.c

   1 /*
   2  * CDDL HEADER START
   3  *
   4  * The contents of this file are subject to the terms of the
   5  * Common Development and Distribution License (the "License").
   6  * You may not use this file except in compliance with the License.
   7  *
   8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
   9  * or http://www.opensolaris.org/os/licensing.
  10  * See the License for the specific language governing permissions
  11  * and limitations under the License.
  12  *
  13  * When distributing Covered Code, include this CDDL HEADER in each
  14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
  15  * If applicable, add the following below this CDDL HEADER, with the
  16  * fields enclosed by brackets "[]" replaced with your own identifying
  17  * information: Portions Copyright [yyyy] [name of copyright owner]
  18  *
  19  * CDDL HEADER END
  20  */
  21 /*
  22  * Copyright (c) 2010, Oracle and/or its affiliates. All rights reserved.
  23  */
  24
  25 #include "intr_common.h"
  26
  27 /*
  28  * Globals
  29  */
  30 static apic_irq_t       *irq_tbl[APIC_MAX_VECTOR+1];
  31 static char             level_tbl[APIC_MAX_VECTOR+1];
  32 static apix_impl_t *d_apixs[NCPU];
  33 static int d_ncpus = NCPU;
  34
  35
  36 /*
  37  * Dump interrupt information for apix PSM.
  38  */
  39 /* ARGSUSED */
  40 int
  41 interrupt_dump_apix(uintptr_t addr, uint_t flags, int argc,
  42     const mdb_arg_t *argv)
  43 {
  44         int i, j;
  45         apix_impl_t apix;
  46         apix_vector_t apix_vector;
  47         struct autovec av;
  48         apic_irq_t apic_irq;
  49
  50         option_flags = 0;
  51         if (mdb_getopts(argc, argv,
  52             'd', MDB_OPT_SETBITS, INTR_DISPLAY_DRVR_INST, &option_flags,
  53             'i', MDB_OPT_SETBITS, INTR_DISPLAY_INTRSTAT, &option_flags,
  54             NULL) != argc)
  55                 return (DCMD_USAGE);
  56
  57         if (mdb_readvar(&d_apixs, "apixs") == -1) {
  58                 mdb_warn("failed to read apixs");
  59                 return (DCMD_ERR);
  60         }
  61
  62         if (mdb_readvar(&d_ncpus, "apic_nproc") == -1) {
  63                 mdb_warn("failed to read apic_nproc");
  64                 d_ncpus = NCPU;
  65         }
  66         if (d_ncpus == 0 || d_ncpus > NCPU)
  67                 d_ncpus = NCPU;
  68
  69         if (mdb_readvar(&irq_tbl, "apic_irq_table") == -1) {
  70                 mdb_warn("failed to read apic_irq_table");
  71                 return (DCMD_ERR);
  72         }
  73
  74         if (mdb_readvar(&level_tbl, "apic_level_intr") == -1) {
  75                 mdb_warn("failed to read apic_level_intr");
  76                 return (DCMD_ERR);
  77         }
  78
  79         /* Print the header first */
  80         if (option_flags & INTR_DISPLAY_INTRSTAT)
  81                 mdb_printf("%<u>CPU ");
  82         else
  83                 mdb_printf("%<u>CPU/Vect  IRQ IPL Bus    Trg Type   "
  84                     "Share APIC/INT# ");
  85         mdb_printf("%s %</u>\n", option_flags & INTR_DISPLAY_DRVR_INST ?
  86             "Driver Name(s)" : "ISR");
  87
  88         /* Walk all the entries */
  89         for (i = 0; i < d_ncpus; i++) {
  90                 /* Read the per CPU apix entry */
  91                 if (mdb_vread(&apix, sizeof (apix_impl_t),
  92                     (uintptr_t)d_apixs[i]) == -1)
  93                         continue;
  94                 for (j = 0; j < APIX_NVECTOR; j++) {
  95                         /* Read the vector entry */
  96                         if (mdb_vread(&apix_vector, sizeof (apix_vector_t),
  97                             (uintptr_t)apix.x_vectbl[j]) == -1)
  98                                 continue;
  99                         /* If invalid vector state; continue */
 100                         if (apix_vector.v_state == APIX_STATE_FREED ||
 101                             apix_vector.v_state == APIX_STATE_OBSOLETED)
 102                                 continue;
 103                         if (apix_vector.v_type == APIX_TYPE_IPI)
 104                                 continue;
 105                         if (mdb_vread(&av, sizeof (struct autovec),
 106                             (uintptr_t)(apix_vector.v_autovect)) == -1)
 107                                 continue;
 108                         if ((apix_vector.v_type == APIX_TYPE_FIXED) &&
 109                             (mdb_vread(&apic_irq, sizeof (apic_irq_t),
 110                             (uintptr_t)irq_tbl[apix_vector.v_inum]) == -1))
 111                                 continue;
 112
 113                         apix_interrupt_dump(&apix_vector, &apic_irq, &av,
 114                             NULL, level_tbl[apix_vector.v_inum]);
 115                 }
 116         }
 117         /* print IPIs */
 118         if (mdb_vread(&apix, sizeof (apix_impl_t),
 119             (uintptr_t)d_apixs[0]) != -1) {
 120                 for (j = 0; j < APIX_NVECTOR; j++) {
 121                         /* Read the vector entry */
 122                         if (mdb_vread(&apix_vector, sizeof (apix_vector_t),
 123                             (uintptr_t)apix.x_vectbl[j]) == -1)
 124                                 continue;
 125                         /* If invalid vector state; continue */
 126                         if (apix_vector.v_state == APIX_STATE_FREED ||
 127                             apix_vector.v_state == APIX_STATE_OBSOLETED)
 128                                 continue;
 129                         if (apix_vector.v_type != APIX_TYPE_IPI)
 130                                 continue;
 131                         if (mdb_vread(&av, sizeof (struct autovec),
 132                             (uintptr_t)(apix_vector.v_autovect)) == -1) {
 133                                 /* v_share for poke_cpu is 0 */
 134                                 if (apix_vector.v_share != 0)
 135                                         continue;
 136                         }
 137                         apix_interrupt_ipi_dump(&apix_vector, &av, NULL);
 138                 }
 139         }
 140
 141         return (DCMD_OK);
 142 }
 143
 144 /*
 145  * MDB module linkage information:
 146  *
 147  * We declare a list of structures describing our dcmds, and a function
 148  * named _mdb_init to return a pointer to our module information.
 149  */
 150 static const mdb_dcmd_t dcmds[] = {
 151         { "interrupts", "?[-di]", "print interrupts", interrupt_dump_apix,
 152             interrupt_help},
 153         { "softint", "?[-d]", "print soft interrupts", soft_interrupt_dump,
 154             soft_interrupt_help},
 155 #ifdef _KMDB
 156         { "apic", NULL, "print apic register contents", apic },
 157         { "ioapic", NULL, "print ioapic register contents", ioapic },
 158 #endif /* _KMDB */
 159         { NULL }
 160 };
 161
 162 static const mdb_modinfo_t modinfo = { MDB_API_VERSION, dcmds, NULL };
 163
 164 const mdb_modinfo_t *
 165 _mdb_init(void)
 166 {
 167         GElf_Sym        sym;
 168
 169         if (mdb_lookup_by_name("gld_intr", &sym) != -1)
 170                 if (GELF_ST_TYPE(sym.st_info) == STT_FUNC)
 171                         gld_intr_addr = (uintptr_t)sym.st_value;
 172
 173         return (&modinfo);
 174 }