VEX/priv/ir_defs.c

   1
   2 /*---------------------------------------------------------------*/
   3 /*--- begin                                         ir_defs.c ---*/
   4 /*---------------------------------------------------------------*/
   5
   6 /*
   7    This file is part of Valgrind, a dynamic binary instrumentation
   8    framework.
   9
  10    Copyright (C) 2004-2017 OpenWorks LLP
  11       info@open-works.net
  12
  13    This program is free software; you can redistribute it and/or
  14    modify it under the terms of the GNU General Public License as
  15    published by the Free Software Foundation; either version 2 of the
  16    License, or (at your option) any later version.
  17
  18    This program is distributed in the hope that it will be useful, but
  19    WITHOUT ANY WARRANTY; without even the implied warranty of
  20    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  21    General Public License for more details.
  22
  23    You should have received a copy of the GNU General Public License
  24    along with this program; if not, see <http://www.gnu.org/licenses/>.
  25
  26    The GNU General Public License is contained in the file COPYING.
  27
  28    Neither the names of the U.S. Department of Energy nor the
  29    University of California nor the names of its contributors may be
  30    used to endorse or promote products derived from this software
  31    without prior written permission.
  32 */
  33
  34 #include "libvex_basictypes.h"
  35 #include "libvex_ir.h"
  36 #include "libvex.h"
  37
  38 #include "main_util.h"
  39
  40
  41 /*---------------------------------------------------------------*/
  42 /*--- Printing the IR                                         ---*/
  43 /*---------------------------------------------------------------*/
  44
  45 void ppIRType ( IRType ty )
  46 {
  47    switch (ty) {
  48       case Ity_INVALID: vex_printf("Ity_INVALID"); break;
  49       case Ity_I1:      vex_printf( "I1");   break;
  50       case Ity_I8:      vex_printf( "I8");   break;
  51       case Ity_I16:     vex_printf( "I16");  break;
  52       case Ity_I32:     vex_printf( "I32");  break;
  53       case Ity_I64:     vex_printf( "I64");  break;
  54       case Ity_I128:    vex_printf( "I128"); break;
  55       case Ity_F16:     vex_printf( "F16");  break;
  56       case Ity_F32:     vex_printf( "F32");  break;
  57       case Ity_F64:     vex_printf( "F64");  break;
  58       case Ity_F128:    vex_printf( "F128"); break;
  59       case Ity_D32:     vex_printf( "D32");  break;
  60       case Ity_D64:     vex_printf( "D64");  break;
  61       case Ity_D128:    vex_printf( "D128"); break;
  62       case Ity_V128:    vex_printf( "V128"); break;
  63       case Ity_V256:    vex_printf( "V256"); break;
  64       default: vex_printf("ty = 0x%x\n", (UInt)ty);
  65                vpanic("ppIRType");
  66    }
  67 }
  68
  69 void ppIRConst ( const IRConst* con )
  70 {
  71    union { ULong i64; Double f64; UInt i32; Float f32; } u;
  72    vassert(sizeof(ULong) == sizeof(Double));
  73    switch (con->tag) {
  74       case Ico_U1:   vex_printf( "%d:I1",        con->Ico.U1 ? 1 : 0); break;
  75       case Ico_U8:   vex_printf( "0x%x:I8",      (UInt)(con->Ico.U8)); break;
  76       case Ico_U16:  vex_printf( "0x%x:I16",     (UInt)(con->Ico.U16)); break;
  77       case Ico_U32:  vex_printf( "0x%x:I32",     (UInt)(con->Ico.U32)); break;
  78       case Ico_U64:  vex_printf( "0x%llx:I64",   (ULong)(con->Ico.U64)); break;
  79       case Ico_U128: vex_printf( "I128{0x%04x}", (UInt)(con->Ico.U128)); break;
  80       case Ico_F32:  u.f32 = con->Ico.F32;
  81                      vex_printf( "F32{0x%x}",   u.i32);
  82                      break;
  83       case Ico_F32i: vex_printf( "F32i{0x%x}",   con->Ico.F32i); break;
  84       case Ico_F64:  u.f64 = con->Ico.F64;
  85                      vex_printf( "F64{0x%llx}",  u.i64);
  86                      break;
  87       case Ico_F64i: vex_printf( "F64i{0x%llx}", con->Ico.F64i); break;
  88       case Ico_V128: vex_printf( "V128{0x%04x}", (UInt)(con->Ico.V128)); break;
  89       case Ico_V256: vex_printf( "V256{0x%08x}", con->Ico.V256); break;
  90       default: vpanic("ppIRConst");
  91    }
  92 }
  93
  94 void ppIRCallee ( const IRCallee* ce )
  95 {
  96    vex_printf("%s", ce->name);
  97    if (ce->regparms > 0)
  98       vex_printf("[rp=%d]", ce->regparms);
  99    if (ce->mcx_mask > 0)
 100       vex_printf("[mcx=0x%x]", ce->mcx_mask);
 101    vex_printf("{%p}", (void*)ce->addr);
 102 }
 103
 104 void ppIRRegArray ( const IRRegArray* arr )
 105 {
 106    vex_printf("(%d:%dx", arr->base, arr->nElems);
 107    ppIRType(arr->elemTy);
 108    vex_printf(")");
 109 }
 110
 111 void ppIRTemp ( IRTemp tmp )
 112 {
 113    if (tmp == IRTemp_INVALID)
 114       vex_printf("IRTemp_INVALID");
 115    else
 116       vex_printf( "t%u", tmp);
 117 }
 118
 119 void ppIROp ( IROp op )
 120 {
 121    const HChar* str = NULL;
 122    IROp   base;
 123    switch (op) {
 124       case Iop_Add8 ... Iop_Add64:
 125          str = "Add"; base = Iop_Add8; break;
 126       case Iop_Sub8 ... Iop_Sub64:
 127          str = "Sub"; base = Iop_Sub8; break;
 128       case Iop_Mul8 ... Iop_Mul64:
 129          str = "Mul"; base = Iop_Mul8; break;
 130       case Iop_Or8 ... Iop_Or64:
 131          str = "Or"; base = Iop_Or8; break;
 132       case Iop_And8 ... Iop_And64:
 133          str = "And"; base = Iop_And8; break;
 134       case Iop_Xor8 ... Iop_Xor64:
 135          str = "Xor"; base = Iop_Xor8; break;
 136       case Iop_Shl8 ... Iop_Shl64:
 137          str = "Shl"; base = Iop_Shl8; break;
 138       case Iop_Shr8 ... Iop_Shr64:
 139          str = "Shr"; base = Iop_Shr8; break;
 140       case Iop_Sar8 ... Iop_Sar64:
 141          str = "Sar"; base = Iop_Sar8; break;
 142       case Iop_CmpEQ8 ... Iop_CmpEQ64:
 143          str = "CmpEQ"; base = Iop_CmpEQ8; break;
 144       case Iop_CmpNE8 ... Iop_CmpNE64:
 145          str = "CmpNE"; base = Iop_CmpNE8; break;
 146       case Iop_CasCmpEQ8 ... Iop_CasCmpEQ64:
 147          str = "CasCmpEQ"; base = Iop_CasCmpEQ8; break;
 148       case Iop_CasCmpNE8 ... Iop_CasCmpNE64:
 149          str = "CasCmpNE"; base = Iop_CasCmpNE8; break;
 150       case Iop_ExpCmpNE8 ... Iop_ExpCmpNE64:
 151          str = "ExpCmpNE"; base = Iop_ExpCmpNE8; break;
 152       case Iop_Not8 ... Iop_Not64:
 153          str = "Not"; base = Iop_Not8; break;
 154       /* other cases must explicitly "return;" */
 155       case Iop_8Uto16:   vex_printf("8Uto16");  return;
 156       case Iop_8Uto32:   vex_printf("8Uto32");  return;
 157       case Iop_16Uto32:  vex_printf("16Uto32"); return;
 158       case Iop_8Sto16:   vex_printf("8Sto16");  return;
 159       case Iop_8Sto32:   vex_printf("8Sto32");  return;
 160       case Iop_16Sto32:  vex_printf("16Sto32"); return;
 161       case Iop_32Sto64:  vex_printf("32Sto64"); return;
 162       case Iop_32Uto64:  vex_printf("32Uto64"); return;
 163       case Iop_32to8:    vex_printf("32to8");   return;
 164       case Iop_16Uto64:  vex_printf("16Uto64"); return;
 165       case Iop_16Sto64:  vex_printf("16Sto64"); return;
 166       case Iop_8Uto64:   vex_printf("8Uto64"); return;
 167       case Iop_8Sto64:   vex_printf("8Sto64"); return;
 168       case Iop_64to16:   vex_printf("64to16"); return;
 169       case Iop_64to8:    vex_printf("64to8");  return;
 170
 171       case Iop_Not1:     vex_printf("Not1");    return;
 172       case Iop_And1:     vex_printf("And1");    return;
 173       case Iop_Or1:      vex_printf("Or1");     return;
 174       case Iop_32to1:    vex_printf("32to1");   return;
 175       case Iop_64to1:    vex_printf("64to1");   return;
 176       case Iop_1Uto8:    vex_printf("1Uto8");   return;
 177       case Iop_1Uto32:   vex_printf("1Uto32");  return;
 178       case Iop_1Uto64:   vex_printf("1Uto64");  return;
 179       case Iop_1Sto8:    vex_printf("1Sto8");  return;
 180       case Iop_1Sto16:   vex_printf("1Sto16");  return;
 181       case Iop_1Sto32:   vex_printf("1Sto32");  return;
 182       case Iop_1Sto64:   vex_printf("1Sto64");  return;
 183
 184       case Iop_MullS8:   vex_printf("MullS8");  return;
 185       case Iop_MullS16:  vex_printf("MullS16"); return;
 186       case Iop_MullS32:  vex_printf("MullS32"); return;
 187       case Iop_MullS64:  vex_printf("MullS64"); return;
 188       case Iop_MullU8:   vex_printf("MullU8");  return;
 189       case Iop_MullU16:  vex_printf("MullU16"); return;
 190       case Iop_MullU32:  vex_printf("MullU32"); return;
 191       case Iop_MullU64:  vex_printf("MullU64"); return;
 192
 193       case Iop_Clz64:    vex_printf("Clz64"); return;
 194       case Iop_Clz32:    vex_printf("Clz32"); return;
 195       case Iop_Ctz64:    vex_printf("Ctz64"); return;
 196       case Iop_Ctz32:    vex_printf("Ctz32"); return;
 197
 198       case Iop_ClzNat64: vex_printf("ClzNat64"); return;
 199       case Iop_ClzNat32: vex_printf("ClzNat32"); return;
 200       case Iop_CtzNat64: vex_printf("CtzNat64"); return;
 201       case Iop_CtzNat32: vex_printf("CtzNat32"); return;
 202
 203       case Iop_PopCount64: vex_printf("PopCount64"); return;
 204       case Iop_PopCount32: vex_printf("PopCount32"); return;
 205
 206       case Iop_CmpLT32S: vex_printf("CmpLT32S"); return;
 207       case Iop_CmpLE32S: vex_printf("CmpLE32S"); return;
 208       case Iop_CmpLT32U: vex_printf("CmpLT32U"); return;
 209       case Iop_CmpLE32U: vex_printf("CmpLE32U"); return;
 210
 211       case Iop_CmpLT64S: vex_printf("CmpLT64S"); return;
 212       case Iop_CmpLE64S: vex_printf("CmpLE64S"); return;
 213       case Iop_CmpLT64U: vex_printf("CmpLT64U"); return;
 214       case Iop_CmpLE64U: vex_printf("CmpLE64U"); return;
 215
 216       case Iop_CmpNEZ8:  vex_printf("CmpNEZ8"); return;
 217       case Iop_CmpNEZ16: vex_printf("CmpNEZ16"); return;
 218       case Iop_CmpNEZ32: vex_printf("CmpNEZ32"); return;
 219       case Iop_CmpNEZ64: vex_printf("CmpNEZ64"); return;
 220
 221       case Iop_CmpwNEZ32: vex_printf("CmpwNEZ32"); return;
 222       case Iop_CmpwNEZ64: vex_printf("CmpwNEZ64"); return;
 223
 224       case Iop_Left8:  vex_printf("Left8"); return;
 225       case Iop_Left16: vex_printf("Left16"); return;
 226       case Iop_Left32: vex_printf("Left32"); return;
 227       case Iop_Left64: vex_printf("Left64"); return;
 228       case Iop_Max32U: vex_printf("Max32U"); return;
 229
 230       case Iop_CmpORD32U: vex_printf("CmpORD32U"); return;
 231       case Iop_CmpORD32S: vex_printf("CmpORD32S"); return;
 232
 233       case Iop_CmpORD64U: vex_printf("CmpORD64U"); return;
 234       case Iop_CmpORD64S: vex_printf("CmpORD64S"); return;
 235
 236       case Iop_DivU32: vex_printf("DivU32"); return;
 237       case Iop_DivS32: vex_printf("DivS32"); return;
 238       case Iop_DivU64: vex_printf("DivU64"); return;
 239       case Iop_DivS64: vex_printf("DivS64"); return;
 240       case Iop_DivU64E: vex_printf("DivU64E"); return;
 241       case Iop_DivS64E: vex_printf("DivS64E"); return;
 242       case Iop_DivU32E: vex_printf("DivU32E"); return;
 243       case Iop_DivS32E: vex_printf("DivS32E"); return;
 244
 245       case Iop_DivModU64to32: vex_printf("DivModU64to32"); return;
 246       case Iop_DivModS64to32: vex_printf("DivModS64to32"); return;
 247
 248       case Iop_DivModU32to32: vex_printf("DivModU32to32"); return;
 249       case Iop_DivModS32to32: vex_printf("DivModS32to32"); return;
 250
 251       case Iop_DivModU128to64: vex_printf("DivModU128to64"); return;
 252       case Iop_DivModS128to64: vex_printf("DivModS128to64"); return;
 253
 254       case Iop_DivModS64to64: vex_printf("DivModS64to64"); return;
 255       case Iop_DivModU64to64: vex_printf("DivModU64to64"); return;
 256
 257       case Iop_16HIto8:  vex_printf("16HIto8"); return;
 258       case Iop_16to8:    vex_printf("16to8");   return;
 259       case Iop_8HLto16:  vex_printf("8HLto16"); return;
 260
 261       case Iop_32HIto16: vex_printf("32HIto16"); return;
 262       case Iop_32to16:   vex_printf("32to16");   return;
 263       case Iop_16HLto32: vex_printf("16HLto32"); return;
 264
 265       case Iop_64HIto32: vex_printf("64HIto32"); return;
 266       case Iop_64to32:   vex_printf("64to32");   return;
 267       case Iop_32HLto64: vex_printf("32HLto64"); return;
 268
 269       case Iop_128HIto64: vex_printf("128HIto64"); return;
 270       case Iop_128to64:   vex_printf("128to64");   return;
 271       case Iop_64HLto128: vex_printf("64HLto128"); return;
 272
 273       case Iop_CmpF32:    vex_printf("CmpF32");    return;
 274       case Iop_F32toI32S: vex_printf("F32toI32S");  return;
 275       case Iop_F32toI64S: vex_printf("F32toI64S");  return;
 276       case Iop_I32StoF32: vex_printf("I32StoF32");  return;
 277       case Iop_I64StoF32: vex_printf("I64StoF32");  return;
 278
 279       case Iop_AddF64:    vex_printf("AddF64"); return;
 280       case Iop_SubF64:    vex_printf("SubF64"); return;
 281       case Iop_MulF64:    vex_printf("MulF64"); return;
 282       case Iop_DivF64:    vex_printf("DivF64"); return;
 283       case Iop_AddF64r32: vex_printf("AddF64r32"); return;
 284       case Iop_SubF64r32: vex_printf("SubF64r32"); return;
 285       case Iop_MulF64r32: vex_printf("MulF64r32"); return;
 286       case Iop_DivF64r32: vex_printf("DivF64r32"); return;
 287       case Iop_AddF32:    vex_printf("AddF32"); return;
 288       case Iop_SubF32:    vex_printf("SubF32"); return;
 289       case Iop_MulF32:    vex_printf("MulF32"); return;
 290       case Iop_DivF32:    vex_printf("DivF32"); return;
 291       case Iop_SubF16:    vex_printf("SubF16"); return;
 292       case Iop_AddF16:    vex_printf("AddF16"); return;
 293
 294         /* 128 bit floating point */
 295       case Iop_AddF128:   vex_printf("AddF128");  return;
 296       case Iop_SubF128:   vex_printf("SubF128");  return;
 297       case Iop_MulF128:   vex_printf("MulF128");  return;
 298       case Iop_DivF128:   vex_printf("DivF128");  return;
 299
 300       case Iop_TruncF128toI128S:  vex_printf("TruncF128toI128S"); return;
 301       case Iop_TruncF128toI64S:   vex_printf("TruncF128toI64S");  return;
 302       case Iop_TruncF128toI32S:   vex_printf("TruncF128toI32S");  return;
 303       case Iop_TruncF128toI128U:  vex_printf("TruncF128toI128U"); return;
 304       case Iop_TruncF128toI64U:   vex_printf("TruncF128toI64U");  return;
 305       case Iop_TruncF128toI32U:   vex_printf("TruncF128toI32U");  return;
 306
 307       case Iop_MAddF128:   vex_printf("MAddF128");  return;
 308       case Iop_MSubF128:   vex_printf("MSubF128");  return;
 309       case Iop_NegMAddF128:   vex_printf("NegMAddF128");  return;
 310       case Iop_NegMSubF128:   vex_printf("NegMSubF128");  return;
 311
 312       case Iop_AbsF128:   vex_printf("AbsF128");  return;
 313       case Iop_NegF128:   vex_printf("NegF128");  return;
 314       case Iop_SqrtF128:  vex_printf("SqrtF128"); return;
 315       case Iop_CmpF128:   vex_printf("CmpF128");  return;
 316
 317       case Iop_F64HLtoF128: vex_printf("F64HLtoF128"); return;
 318       case Iop_F128HItoF64: vex_printf("F128HItoF64"); return;
 319       case Iop_F128LOtoF64: vex_printf("F128LOtoF64"); return;
 320       case Iop_I32StoF128: vex_printf("I32StoF128"); return;
 321       case Iop_I64StoF128: vex_printf("I64StoF128"); return;
 322       case Iop_I128StoF128: vex_printf("I128StoF128"); return;
 323       case Iop_I32UtoF128: vex_printf("I32UtoF128"); return;
 324       case Iop_I64UtoF128: vex_printf("I64UtoF128"); return;
 325       case Iop_I128UtoF128: vex_printf("I128UtoF128"); return;
 326       case Iop_F128toI32S: vex_printf("F128toI32S"); return;
 327       case Iop_F128toI64S: vex_printf("F128toI64S"); return;
 328       case Iop_F128toI32U: vex_printf("F128toI32U"); return;
 329       case Iop_F128toI64U: vex_printf("F128toI64U"); return;
 330       case Iop_F32toF128:  vex_printf("F32toF128");  return;
 331       case Iop_F64toF128:  vex_printf("F64toF128");  return;
 332       case Iop_F128toF64:  vex_printf("F128toF64");  return;
 333       case Iop_F128toF32:  vex_printf("F128toF32");  return;
 334       case Iop_F128toI128S: vex_printf("F128toI128");  return;
 335       case Iop_RndF128:    vex_printf("RndF128");  return;
 336       case Iop_I128StoD128: vex_printf("I128StoD128"); return;
 337       case Iop_D128toI128S: vex_printf("D128toI128S"); return;
 338
 339       case Iop_MAddF32:    vex_printf("MAddF32"); return;
 340       case Iop_MSubF32:    vex_printf("MSubF32"); return;
 341
 342       case Iop_ScaleF64:      vex_printf("ScaleF64"); return;
 343       case Iop_AtanF64:       vex_printf("AtanF64"); return;
 344       case Iop_Yl2xF64:       vex_printf("Yl2xF64"); return;
 345       case Iop_Yl2xp1F64:     vex_printf("Yl2xp1F64"); return;
 346       case Iop_PRemF64:       vex_printf("PRemF64"); return;
 347       case Iop_PRemC3210F64:  vex_printf("PRemC3210F64"); return;
 348       case Iop_PRem1F64:      vex_printf("PRem1F64"); return;
 349       case Iop_PRem1C3210F64: vex_printf("PRem1C3210F64"); return;
 350       case Iop_NegF64:        vex_printf("NegF64"); return;
 351       case Iop_AbsF64:        vex_printf("AbsF64"); return;
 352       case Iop_NegF32:        vex_printf("NegF32"); return;
 353       case Iop_AbsF32:        vex_printf("AbsF32"); return;
 354       case Iop_NegF16:        vex_printf("NegF16"); return;
 355       case Iop_AbsF16:        vex_printf("AbsF16"); return;
 356       case Iop_SqrtF64:       vex_printf("SqrtF64"); return;
 357       case Iop_SqrtF32:       vex_printf("SqrtF32"); return;
 358       case Iop_SqrtF16:       vex_printf("SqrtF16"); return;
 359       case Iop_SinF64:    vex_printf("SinF64"); return;
 360       case Iop_CosF64:    vex_printf("CosF64"); return;
 361       case Iop_TanF64:    vex_printf("TanF64"); return;
 362       case Iop_2xm1F64:   vex_printf("2xm1F64"); return;
 363
 364       case Iop_MAddF64:    vex_printf("MAddF64"); return;
 365       case Iop_MSubF64:    vex_printf("MSubF64"); return;
 366       case Iop_MAddF64r32: vex_printf("MAddF64r32"); return;
 367       case Iop_MSubF64r32: vex_printf("MSubF64r32"); return;
 368
 369       case Iop_RSqrtEst5GoodF64: vex_printf("RSqrtEst5GoodF64"); return;
 370       case Iop_RoundF64toF64_NEAREST: vex_printf("RoundF64toF64_NEAREST"); return;
 371       case Iop_RoundF64toF64_NegINF: vex_printf("RoundF64toF64_NegINF"); return;
 372       case Iop_RoundF64toF64_PosINF: vex_printf("RoundF64toF64_PosINF"); return;
 373       case Iop_RoundF64toF64_ZERO: vex_printf("RoundF64toF64_ZERO"); return;
 374
 375       case Iop_TruncF64asF32: vex_printf("TruncF64asF32"); return;
 376
 377       case Iop_RecpExpF64: vex_printf("RecpExpF64"); return;
 378       case Iop_RecpExpF32: vex_printf("RecpExpF32"); return;
 379
 380       case Iop_MaxNumF64: vex_printf("MaxNumF64"); return;
 381       case Iop_MinNumF64: vex_printf("MinNumF64"); return;
 382       case Iop_MaxNumF32: vex_printf("MaxNumF32"); return;
 383       case Iop_MinNumF32: vex_printf("MinNumF32"); return;
 384
 385       case Iop_F16toF64: vex_printf("F16toF64"); return;
 386       case Iop_F64toF16: vex_printf("F64toF16"); return;
 387       case Iop_F16toF32: vex_printf("F16toF32"); return;
 388       case Iop_F32toF16: vex_printf("F32toF16"); return;
 389
 390       case Iop_QAdd32S: vex_printf("QAdd32S"); return;
 391       case Iop_QSub32S: vex_printf("QSub32S"); return;
 392       case Iop_Add16x2:   vex_printf("Add16x2"); return;
 393       case Iop_Sub16x2:   vex_printf("Sub16x2"); return;
 394       case Iop_QAdd16Sx2: vex_printf("QAdd16Sx2"); return;
 395       case Iop_QAdd16Ux2: vex_printf("QAdd16Ux2"); return;
 396       case Iop_QSub16Sx2: vex_printf("QSub16Sx2"); return;
 397       case Iop_QSub16Ux2: vex_printf("QSub16Ux2"); return;
 398       case Iop_HAdd16Ux2: vex_printf("HAdd16Ux2"); return;
 399       case Iop_HAdd16Sx2: vex_printf("HAdd16Sx2"); return;
 400       case Iop_HSub16Ux2: vex_printf("HSub16Ux2"); return;
 401       case Iop_HSub16Sx2: vex_printf("HSub16Sx2"); return;
 402
 403       case Iop_Add8x4:   vex_printf("Add8x4"); return;
 404       case Iop_Sub8x4:   vex_printf("Sub8x4"); return;
 405       case Iop_QAdd8Sx4: vex_printf("QAdd8Sx4"); return;
 406       case Iop_QAdd8Ux4: vex_printf("QAdd8Ux4"); return;
 407       case Iop_QSub8Sx4: vex_printf("QSub8Sx4"); return;
 408       case Iop_QSub8Ux4: vex_printf("QSub8Ux4"); return;
 409       case Iop_HAdd8Ux4: vex_printf("HAdd8Ux4"); return;
 410       case Iop_HAdd8Sx4: vex_printf("HAdd8Sx4"); return;
 411       case Iop_HSub8Ux4: vex_printf("HSub8Ux4"); return;
 412       case Iop_HSub8Sx4: vex_printf("HSub8Sx4"); return;
 413       case Iop_Sad8Ux4:  vex_printf("Sad8Ux4"); return;
 414
 415       case Iop_CmpNEZ16x2: vex_printf("CmpNEZ16x2"); return;
 416       case Iop_CmpNEZ8x4:  vex_printf("CmpNEZ8x4"); return;
 417       case Iop_Reverse8sIn32_x1: vex_printf("Reverse8sIn32_x1"); return;
 418
 419       case Iop_CmpF64:    vex_printf("CmpF64"); return;
 420
 421       case Iop_F64toI16S: vex_printf("F64toI16S"); return;
 422       case Iop_F64toI32S: vex_printf("F64toI32S"); return;
 423       case Iop_F64toI64S: vex_printf("F64toI64S"); return;
 424       case Iop_F64toI64U: vex_printf("F64toI64U"); return;
 425       case Iop_F32toI32U: vex_printf("F32toI32U");  return;
 426       case Iop_F32toI64U: vex_printf("F32toI64U");  return;
 427
 428       case Iop_F64toI32U: vex_printf("F64toI32U"); return;
 429
 430       case Iop_I32StoF64: vex_printf("I32StoF64"); return;
 431       case Iop_I64StoF64: vex_printf("I64StoF64"); return;
 432       case Iop_I64UtoF64: vex_printf("I64UtoF64"); return;
 433       case Iop_I32UtoF32: vex_printf("I32UtoF32"); return;
 434       case Iop_I64UtoF32: vex_printf("I64UtoF32"); return;
 435
 436       case Iop_I32UtoF64: vex_printf("I32UtoF64"); return;
 437
 438       case Iop_F32toF64: vex_printf("F32toF64"); return;
 439       case Iop_F64toF32: vex_printf("F64toF32"); return;
 440
 441       case Iop_RoundF128toInt: vex_printf("RoundF128toInt"); return;
 442       case Iop_RoundF64toInt: vex_printf("RoundF64toInt"); return;
 443       case Iop_RoundF64toIntA0: vex_printf("RoundF64toIntA0"); return;
 444       case Iop_RoundF64toIntE: vex_printf("RoundF64toIntE"); return;
 445       case Iop_RoundF32toInt: vex_printf("RoundF32toInt"); return;
 446       case Iop_RoundF32toIntA0: vex_printf("RoundF32toIntA0"); return;
 447       case Iop_RoundF32toIntE: vex_printf("RoundF32toIntE"); return;
 448       case Iop_RoundF64toF32: vex_printf("RoundF64toF32"); return;
 449
 450       case Iop_ReinterpV128asI128: vex_printf("ReinterpV128asI128"); return;
 451       case Iop_ReinterpI128asV128: vex_printf("ReinterpI128asV128"); return;
 452       case Iop_ReinterpF128asI128: vex_printf("ReinterpF128asI128"); return;
 453       case Iop_ReinterpI128asF128: vex_printf("ReinterpI128asF128"); return;
 454       case Iop_ReinterpF64asI64: vex_printf("ReinterpF64asI64"); return;
 455       case Iop_ReinterpI64asF64: vex_printf("ReinterpI64asF64"); return;
 456       case Iop_ReinterpF32asI32: vex_printf("ReinterpF32asI32"); return;
 457       case Iop_ReinterpI32asF32: vex_printf("ReinterpI32asF32"); return;
 458
 459       case Iop_I32UtoF32x4_DEP: vex_printf("I32UtoF32x4_DEP"); return;
 460       case Iop_I32StoF32x4_DEP: vex_printf("I32StoF32x4_DEP"); return;
 461
 462       case Iop_I32StoF32x4: vex_printf("I32StoF32x4"); return;
 463       case Iop_F32toI32Sx4: vex_printf("F32toI32Sx4"); return;
 464
 465       case Iop_F32toF16x4_DEP: vex_printf("F32toF16x4_DEP"); return;
 466       case Iop_F32toF16x4: vex_printf("F32toF16x4"); return;
 467       case Iop_F16toF32x4: vex_printf("F16toF32x4"); return;
 468       case Iop_F16toF64x2: vex_printf("F16toF64x2"); return;
 469       case Iop_F64toF16x2_DEP: vex_printf("F64toF16x2_DEP"); return;
 470
 471       case Iop_RSqrtEst32Fx4: vex_printf("RSqrtEst32Fx4"); return;
 472       case Iop_RSqrtEst32Ux4: vex_printf("RSqrtEst32Ux4"); return;
 473       case Iop_RSqrtEst32Fx2: vex_printf("RSqrtEst32Fx2"); return;
 474       case Iop_RSqrtEst32Ux2: vex_printf("RSqrtEst32Ux2"); return;
 475
 476       case Iop_QF32toI32Ux4_RZ: vex_printf("QF32toI32Ux4_RZ"); return;
 477       case Iop_QF32toI32Sx4_RZ: vex_printf("QF32toI32Sx4_RZ"); return;
 478
 479       case Iop_F32toI32Ux4_RZ: vex_printf("F32toI32Ux4_RZ"); return;
 480       case Iop_F32toI32Sx4_RZ: vex_printf("F32toI32Sx4_RZ"); return;
 481
 482       case Iop_I32UtoF32x2_DEP: vex_printf("I32UtoF32x2_DEP"); return;
 483       case Iop_I32StoF32x2_DEP: vex_printf("I32StoF32x2_DEP"); return;
 484
 485       case Iop_F32toI32Ux2_RZ: vex_printf("F32toI32Ux2_RZ"); return;
 486       case Iop_F32toI32Sx2_RZ: vex_printf("F32toI32Sx2_RZ"); return;
 487
 488       case Iop_RoundF32x4_RM: vex_printf("RoundF32x4_RM"); return;
 489       case Iop_RoundF32x4_RP: vex_printf("RoundF32x4_RP"); return;
 490       case Iop_RoundF32x4_RN: vex_printf("RoundF32x4_RN"); return;
 491       case Iop_RoundF32x4_RZ: vex_printf("RoundF32x4_RZ"); return;
 492
 493       case Iop_Abs8x8: vex_printf("Abs8x8"); return;
 494       case Iop_Abs16x4: vex_printf("Abs16x4"); return;
 495       case Iop_Abs32x2: vex_printf("Abs32x2"); return;
 496       case Iop_Add8x8: vex_printf("Add8x8"); return;
 497       case Iop_Add16x4: vex_printf("Add16x4"); return;
 498       case Iop_Add32x2: vex_printf("Add32x2"); return;
 499       case Iop_QAdd8Ux8: vex_printf("QAdd8Ux8"); return;
 500       case Iop_QAdd16Ux4: vex_printf("QAdd16Ux4"); return;
 501       case Iop_QAdd32Ux2: vex_printf("QAdd32Ux2"); return;
 502       case Iop_QAdd64Ux1: vex_printf("QAdd64Ux1"); return;
 503       case Iop_QAdd8Sx8: vex_printf("QAdd8Sx8"); return;
 504       case Iop_QAdd16Sx4: vex_printf("QAdd16Sx4"); return;
 505       case Iop_QAdd32Sx2: vex_printf("QAdd32Sx2"); return;
 506       case Iop_QAdd64Sx1: vex_printf("QAdd64Sx1"); return;
 507       case Iop_PwAdd8x8: vex_printf("PwAdd8x8"); return;
 508       case Iop_PwAdd16x4: vex_printf("PwAdd16x4"); return;
 509       case Iop_PwAdd32x2: vex_printf("PwAdd32x2"); return;
 510       case Iop_PwAdd32Fx2: vex_printf("PwAdd32Fx2"); return;
 511       case Iop_PwAddL8Ux8: vex_printf("PwAddL8Ux8"); return;
 512       case Iop_PwAddL16Ux4: vex_printf("PwAddL16Ux4"); return;
 513       case Iop_PwAddL32Ux2: vex_printf("PwAddL32Ux2"); return;
 514       case Iop_PwAddL8Sx8: vex_printf("PwAddL8Sx8"); return;
 515       case Iop_PwAddL16Sx4: vex_printf("PwAddL16Sx4"); return;
 516       case Iop_PwAddL32Sx2: vex_printf("PwAddL32Sx2"); return;
 517       case Iop_Sub8x8: vex_printf("Sub8x8"); return;
 518       case Iop_Sub16x4: vex_printf("Sub16x4"); return;
 519       case Iop_Sub32x2: vex_printf("Sub32x2"); return;
 520       case Iop_QSub8Ux8: vex_printf("QSub8Ux8"); return;
 521       case Iop_QSub16Ux4: vex_printf("QSub16Ux4"); return;
 522       case Iop_QSub32Ux2: vex_printf("QSub32Ux2"); return;
 523       case Iop_QSub64Ux1: vex_printf("QSub64Ux1"); return;
 524       case Iop_QSub8Sx8: vex_printf("QSub8Sx8"); return;
 525       case Iop_QSub16Sx4: vex_printf("QSub16Sx4"); return;
 526       case Iop_QSub32Sx2: vex_printf("QSub32Sx2"); return;
 527       case Iop_QSub64Sx1: vex_printf("QSub64Sx1"); return;
 528       case Iop_Mul8x8: vex_printf("Mul8x8"); return;
 529       case Iop_Mul16x4: vex_printf("Mul16x4"); return;
 530       case Iop_Mul32x2: vex_printf("Mul32x2"); return;
 531       case Iop_Mul32Fx2: vex_printf("Mul32Fx2"); return;
 532       case Iop_PolynomialMul8x8: vex_printf("PolynomialMul8x8"); return;
 533       case Iop_MulHi16Ux4: vex_printf("MulHi16Ux4"); return;
 534       case Iop_MulHi16Sx4: vex_printf("MulHi16Sx4"); return;
 535       case Iop_QDMulHi16Sx4: vex_printf("QDMulHi16Sx4"); return;
 536       case Iop_QDMulHi32Sx2: vex_printf("QDMulHi32Sx2"); return;
 537       case Iop_QRDMulHi16Sx4: vex_printf("QRDMulHi16Sx4"); return;
 538       case Iop_QRDMulHi32Sx2: vex_printf("QRDMulHi32Sx2"); return;
 539       case Iop_QDMull16Sx4: vex_printf("QDMull16Sx4"); return;
 540       case Iop_QDMull32Sx2: vex_printf("QDMull32Sx2"); return;
 541       case Iop_Avg8Ux8: vex_printf("Avg8Ux8"); return;
 542       case Iop_Avg16Ux4: vex_printf("Avg16Ux4"); return;
 543       case Iop_Max8Sx8: vex_printf("Max8Sx8"); return;
 544       case Iop_Max16Sx4: vex_printf("Max16Sx4"); return;
 545       case Iop_Max32Sx2: vex_printf("Max32Sx2"); return;
 546       case Iop_Max8Ux8: vex_printf("Max8Ux8"); return;
 547       case Iop_Max16Ux4: vex_printf("Max16Ux4"); return;
 548       case Iop_Max32Ux2: vex_printf("Max32Ux2"); return;
 549       case Iop_Min8Sx8: vex_printf("Min8Sx8"); return;
 550       case Iop_Min16Sx4: vex_printf("Min16Sx4"); return;
 551       case Iop_Min32Sx2: vex_printf("Min32Sx2"); return;
 552       case Iop_Min8Ux8: vex_printf("Min8Ux8"); return;
 553       case Iop_Min16Ux4: vex_printf("Min16Ux4"); return;
 554       case Iop_Min32Ux2: vex_printf("Min32Ux2"); return;
 555       case Iop_PwMax8Sx8: vex_printf("PwMax8Sx8"); return;
 556       case Iop_PwMax16Sx4: vex_printf("PwMax16Sx4"); return;
 557       case Iop_PwMax32Sx2: vex_printf("PwMax32Sx2"); return;
 558       case Iop_PwMax8Ux8: vex_printf("PwMax8Ux8"); return;
 559       case Iop_PwMax16Ux4: vex_printf("PwMax16Ux4"); return;
 560       case Iop_PwMax32Ux2: vex_printf("PwMax32Ux2"); return;
 561       case Iop_PwMin8Sx8: vex_printf("PwMin8Sx8"); return;
 562       case Iop_PwMin16Sx4: vex_printf("PwMin16Sx4"); return;
 563       case Iop_PwMin32Sx2: vex_printf("PwMin32Sx2"); return;
 564       case Iop_PwMin8Ux8: vex_printf("PwMin8Ux8"); return;
 565       case Iop_PwMin16Ux4: vex_printf("PwMin16Ux4"); return;
 566       case Iop_PwMin32Ux2: vex_printf("PwMin32Ux2"); return;
 567       case Iop_CmpEQ8x8: vex_printf("CmpEQ8x8"); return;
 568       case Iop_CmpEQ16x4: vex_printf("CmpEQ16x4"); return;
 569       case Iop_CmpEQ32x2: vex_printf("CmpEQ32x2"); return;
 570       case Iop_CmpGT8Ux8: vex_printf("CmpGT8Ux8"); return;
 571       case Iop_CmpGT16Ux4: vex_printf("CmpGT16Ux4"); return;
 572       case Iop_CmpGT32Ux2: vex_printf("CmpGT32Ux2"); return;
 573       case Iop_CmpGT8Sx8: vex_printf("CmpGT8Sx8"); return;
 574       case Iop_CmpGT16Sx4: vex_printf("CmpGT16Sx4"); return;
 575       case Iop_CmpGT32Sx2: vex_printf("CmpGT32Sx2"); return;
 576       case Iop_Cnt8x8: vex_printf("Cnt8x8"); return;
 577       case Iop_Clz8x8: vex_printf("Clz8x8"); return;
 578       case Iop_Clz16x4: vex_printf("Clz16x4"); return;
 579       case Iop_Clz32x2: vex_printf("Clz32x2"); return;
 580       case Iop_Cls8x8: vex_printf("Cls8x8"); return;
 581       case Iop_Cls16x4: vex_printf("Cls16x4"); return;
 582       case Iop_Cls32x2: vex_printf("Cls32x2"); return;
 583       case Iop_ShlN8x8: vex_printf("ShlN8x8"); return;
 584       case Iop_ShlN16x4: vex_printf("ShlN16x4"); return;
 585       case Iop_ShlN32x2: vex_printf("ShlN32x2"); return;
 586       case Iop_ShrN8x8: vex_printf("ShrN8x8"); return;
 587       case Iop_ShrN16x4: vex_printf("ShrN16x4"); return;
 588       case Iop_ShrN32x2: vex_printf("ShrN32x2"); return;
 589       case Iop_SarN8x8: vex_printf("SarN8x8"); return;
 590       case Iop_SarN16x4: vex_printf("SarN16x4"); return;
 591       case Iop_SarN32x2: vex_printf("SarN32x2"); return;
 592       case Iop_QNarrowBin16Sto8Ux8: vex_printf("QNarrowBin16Sto8Ux8"); return;
 593       case Iop_QNarrowBin16Sto8Sx8: vex_printf("QNarrowBin16Sto8Sx8"); return;
 594       case Iop_QNarrowBin32Sto16Sx4: vex_printf("QNarrowBin32Sto16Sx4"); return;
 595       case Iop_QNarrowBin64Sto32Sx4: vex_printf("QNarrowBin64Sto32Sx4"); return;
 596       case Iop_QNarrowBin64Uto32Ux4: vex_printf("QNarrowBin64Uto32Ux4"); return;
 597       case Iop_NarrowBin16to8x8: vex_printf("NarrowBin16to8x8"); return;
 598       case Iop_NarrowBin32to16x4: vex_printf("NarrowBin32to16x4"); return;
 599       case Iop_NarrowBin64to32x4: vex_printf("NarrowBin64to32x4"); return;
 600       case Iop_InterleaveHI8x8: vex_printf("InterleaveHI8x8"); return;
 601       case Iop_InterleaveHI16x4: vex_printf("InterleaveHI16x4"); return;
 602       case Iop_InterleaveHI32x2: vex_printf("InterleaveHI32x2"); return;
 603       case Iop_InterleaveLO8x8: vex_printf("InterleaveLO8x8"); return;
 604       case Iop_InterleaveLO16x4: vex_printf("InterleaveLO16x4"); return;
 605       case Iop_InterleaveLO32x2: vex_printf("InterleaveLO32x2"); return;
 606       case Iop_CatOddLanes8x8: vex_printf("CatOddLanes8x8"); return;
 607       case Iop_CatOddLanes16x4: vex_printf("CatOddLanes16x4"); return;
 608       case Iop_CatEvenLanes8x8: vex_printf("CatEvenLanes8x8"); return;
 609       case Iop_CatEvenLanes16x4: vex_printf("CatEvenLanes16x4"); return;
 610       case Iop_InterleaveOddLanes8x8: vex_printf("InterleaveOddLanes8x8"); return;
 611       case Iop_InterleaveOddLanes16x4: vex_printf("InterleaveOddLanes16x4"); return;
 612       case Iop_InterleaveEvenLanes8x8: vex_printf("InterleaveEvenLanes8x8"); return;
 613       case Iop_InterleaveEvenLanes16x4: vex_printf("InterleaveEvenLanes16x4"); return;
 614       case Iop_Shl8x8: vex_printf("Shl8x8"); return;
 615       case Iop_Shl16x4: vex_printf("Shl16x4"); return;
 616       case Iop_Shl32x2: vex_printf("Shl32x2"); return;
 617       case Iop_Shr8x8: vex_printf("Shr8x8"); return;
 618       case Iop_Shr16x4: vex_printf("Shr16x4"); return;
 619       case Iop_Shr32x2: vex_printf("Shr32x2"); return;
 620       case Iop_QShl8x8: vex_printf("QShl8x8"); return;
 621       case Iop_QShl16x4: vex_printf("QShl16x4"); return;
 622       case Iop_QShl32x2: vex_printf("QShl32x2"); return;
 623       case Iop_QShl64x1: vex_printf("QShl64x1"); return;
 624       case Iop_QSal8x8: vex_printf("QSal8x8"); return;
 625       case Iop_QSal16x4: vex_printf("QSal16x4"); return;
 626       case Iop_QSal32x2: vex_printf("QSal32x2"); return;
 627       case Iop_QSal64x1: vex_printf("QSal64x1"); return;
 628       case Iop_QShlNsatUU8x8: vex_printf("QShlNsatUU8x8"); return;
 629       case Iop_QShlNsatUU16x4: vex_printf("QShlNsatUU16x4"); return;
 630       case Iop_QShlNsatUU32x2: vex_printf("QShlNsatUU32x2"); return;
 631       case Iop_QShlNsatUU64x1: vex_printf("QShlNsatUU64x1"); return;
 632       case Iop_QShlNsatSU8x8: vex_printf("QShlNsatSU8x8"); return;
 633       case Iop_QShlNsatSU16x4: vex_printf("QShlNsatSU16x4"); return;
 634       case Iop_QShlNsatSU32x2: vex_printf("QShlNsatSU32x2"); return;
 635       case Iop_QShlNsatSU64x1: vex_printf("QShlNsatSU64x1"); return;
 636       case Iop_QShlNsatSS8x8: vex_printf("QShlNsatSS8x8"); return;
 637       case Iop_QShlNsatSS16x4: vex_printf("QShlNsatSS16x4"); return;
 638       case Iop_QShlNsatSS32x2: vex_printf("QShlNsatSS32x2"); return;
 639       case Iop_QShlNsatSS64x1: vex_printf("QShlNsatSS64x1"); return;
 640       case Iop_Sar8x8: vex_printf("Sar8x8"); return;
 641       case Iop_Sar16x4: vex_printf("Sar16x4"); return;
 642       case Iop_Sar32x2: vex_printf("Sar32x2"); return;
 643       case Iop_Sal8x8: vex_printf("Sal8x8"); return;
 644       case Iop_Sal16x4: vex_printf("Sal16x4"); return;
 645       case Iop_Sal32x2: vex_printf("Sal32x2"); return;
 646       case Iop_Sal64x1: vex_printf("Sal64x1"); return;
 647       case Iop_Perm8x8: vex_printf("Perm8x8"); return;
 648       case Iop_PermOrZero8x8: vex_printf("PermOrZero8x8"); return;
 649       case Iop_Reverse8sIn16_x4: vex_printf("Reverse8sIn16_x4"); return;
 650       case Iop_Reverse8sIn32_x2: vex_printf("Reverse8sIn32_x2"); return;
 651       case Iop_Reverse16sIn32_x2: vex_printf("Reverse16sIn32_x2"); return;
 652       case Iop_Reverse8sIn64_x1: vex_printf("Reverse8sIn64_x1"); return;
 653       case Iop_Reverse16sIn64_x1: vex_printf("Reverse16sIn64_x1"); return;
 654       case Iop_Reverse32sIn64_x1: vex_printf("Reverse32sIn64_x1"); return;
 655       case Iop_Abs32Fx2: vex_printf("Abs32Fx2"); return;
 656       case Iop_GetMSBs8x8: vex_printf("GetMSBs8x8"); return;
 657       case Iop_GetMSBs8x16: vex_printf("GetMSBs8x16"); return;
 658
 659       case Iop_CmpNEZ32x2: vex_printf("CmpNEZ32x2"); return;
 660       case Iop_CmpNEZ16x4: vex_printf("CmpNEZ16x4"); return;
 661       case Iop_CmpNEZ8x8:  vex_printf("CmpNEZ8x8"); return;
 662
 663       case Iop_Add16Fx8:  vex_printf("Add16Fx8"); return;
 664       case Iop_Sub16Fx8:  vex_printf("Sub16Fx8"); return;
 665       case Iop_Add32Fx4:  vex_printf("Add32Fx4"); return;
 666       case Iop_Add32Fx2:  vex_printf("Add32Fx2"); return;
 667       case Iop_Add32F0x4: vex_printf("Add32F0x4"); return;
 668       case Iop_Add64Fx2:  vex_printf("Add64Fx2"); return;
 669       case Iop_Add64F0x2: vex_printf("Add64F0x2"); return;
 670
 671       case Iop_Div32Fx4:  vex_printf("Div32Fx4"); return;
 672       case Iop_Div32F0x4: vex_printf("Div32F0x4"); return;
 673       case Iop_Div64Fx2:  vex_printf("Div64Fx2"); return;
 674       case Iop_Div64F0x2: vex_printf("Div64F0x2"); return;
 675
 676       case Iop_Max32Fx8:  vex_printf("Max32Fx8"); return;
 677       case Iop_Max32Fx4:  vex_printf("Max32Fx4"); return;
 678       case Iop_Max32Fx2:  vex_printf("Max32Fx2"); return;
 679       case Iop_PwMax32Fx4:  vex_printf("PwMax32Fx4"); return;
 680       case Iop_PwMax32Fx2:  vex_printf("PwMax32Fx2"); return;
 681       case Iop_Max32F0x4: vex_printf("Max32F0x4"); return;
 682       case Iop_Max64Fx4:  vex_printf("Max64Fx4"); return;
 683       case Iop_Max64Fx2:  vex_printf("Max64Fx2"); return;
 684       case Iop_Max64F0x2: vex_printf("Max64F0x2"); return;
 685
 686       case Iop_Min32Fx8:  vex_printf("Min32Fx8"); return;
 687       case Iop_Min32Fx4:  vex_printf("Min32Fx4"); return;
 688       case Iop_Min32Fx2:  vex_printf("Min32Fx2"); return;
 689       case Iop_PwMin32Fx4:  vex_printf("PwMin32Fx4"); return;
 690       case Iop_PwMin32Fx2:  vex_printf("PwMin32Fx2"); return;
 691       case Iop_Min32F0x4: vex_printf("Min32F0x4"); return;
 692       case Iop_Min64Fx4:  vex_printf("Min64Fx4"); return;
 693       case Iop_Min64Fx2:  vex_printf("Min64Fx2"); return;
 694       case Iop_Min64F0x2: vex_printf("Min64F0x2"); return;
 695
 696       case Iop_Mul32Fx4:  vex_printf("Mul32Fx4"); return;
 697       case Iop_Mul32F0x4: vex_printf("Mul32F0x4"); return;
 698       case Iop_Mul64Fx2:  vex_printf("Mul64Fx2"); return;
 699       case Iop_Mul64F0x2: vex_printf("Mul64F0x2"); return;
 700
 701       case Iop_RecipEst32Ux2: vex_printf("RecipEst32Ux2"); return;
 702       case Iop_RecipEst32Fx2: vex_printf("RecipEst32Fx2"); return;
 703       case Iop_RecipEst32Fx4: vex_printf("RecipEst32Fx4"); return;
 704       case Iop_RecipEst32Fx8: vex_printf("RecipEst32Fx8"); return;
 705       case Iop_RecipEst32Ux4: vex_printf("RecipEst32Ux4"); return;
 706       case Iop_RecipEst32F0x4: vex_printf("RecipEst32F0x4"); return;
 707       case Iop_RecipStep32Fx2: vex_printf("RecipStep32Fx2"); return;
 708       case Iop_RecipStep32Fx4: vex_printf("RecipStep32Fx4"); return;
 709       case Iop_RecipEst64Fx2: vex_printf("RecipEst64Fx2"); return;
 710       case Iop_RecipStep64Fx2: vex_printf("RecipStep64Fx2"); return;
 711
 712       case Iop_Abs16Fx8:  vex_printf("Abs16Fx8"); return;
 713       case Iop_Abs32Fx4:  vex_printf("Abs32Fx4"); return;
 714       case Iop_Abs64Fx2:  vex_printf("Abs64Fx2"); return;
 715       case Iop_RSqrtStep32Fx4:  vex_printf("RSqrtStep32Fx4"); return;
 716       case Iop_RSqrtStep64Fx2:  vex_printf("RSqrtStep64Fx2"); return;
 717       case Iop_RSqrtStep32Fx2:  vex_printf("RSqrtStep32Fx2"); return;
 718       case Iop_RSqrtEst64Fx2: vex_printf("RSqrtEst64Fx2"); return;
 719
 720       case Iop_RSqrtEst32F0x4: vex_printf("RSqrtEst32F0x4"); return;
 721       case Iop_RSqrtEst32Fx8: vex_printf("RSqrtEst32Fx8"); return;
 722
 723       case Iop_Sqrt16Fx8:  vex_printf("Sqrt16Fx8"); return;
 724       case Iop_Sqrt32Fx4:  vex_printf("Sqrt32Fx4"); return;
 725       case Iop_Sqrt32F0x4: vex_printf("Sqrt32F0x4"); return;
 726       case Iop_Sqrt64Fx2:  vex_printf("Sqrt64Fx2"); return;
 727       case Iop_Sqrt64F0x2: vex_printf("Sqrt64F0x2"); return;
 728       case Iop_Sqrt32Fx8:  vex_printf("Sqrt32Fx8"); return;
 729       case Iop_Sqrt64Fx4:  vex_printf("Sqrt64Fx4"); return;
 730
 731       case Iop_Scale2_32Fx4: vex_printf("Scale2_32Fx4"); return;
 732       case Iop_Scale2_64Fx2: vex_printf("Scale2_64Fx2"); return;
 733       case Iop_Log2_32Fx4: vex_printf("Log2_32Fx4"); return;
 734       case Iop_Log2_64Fx2: vex_printf("Log2_64Fx2"); return;
 735       case Iop_Exp2_32Fx4: vex_printf("Iop_Exp2_32Fx4"); return;
 736
 737       case Iop_Sub32Fx4:  vex_printf("Sub32Fx4"); return;
 738       case Iop_Sub32Fx2:  vex_printf("Sub32Fx2"); return;
 739       case Iop_Sub32F0x4: vex_printf("Sub32F0x4"); return;
 740       case Iop_Sub64Fx2:  vex_printf("Sub64Fx2"); return;
 741       case Iop_Sub64F0x2: vex_printf("Sub64F0x2"); return;
 742
 743       case Iop_CmpEQ32Fx4: vex_printf("CmpEQ32Fx4"); return;
 744       case Iop_CmpLT32Fx4: vex_printf("CmpLT32Fx4"); return;
 745       case Iop_CmpLE32Fx4: vex_printf("CmpLE32Fx4"); return;
 746       case Iop_CmpGT32Fx4: vex_printf("CmpGT32Fx4"); return;
 747       case Iop_CmpGE32Fx4: vex_printf("CmpGE32Fx4"); return;
 748       case Iop_CmpUN32Fx4: vex_printf("CmpUN32Fx4"); return;
 749       case Iop_CmpEQ64Fx2: vex_printf("CmpEQ64Fx2"); return;
 750       case Iop_CmpLT64Fx2: vex_printf("CmpLT64Fx2"); return;
 751       case Iop_CmpLE64Fx2: vex_printf("CmpLE64Fx2"); return;
 752       case Iop_CmpUN64Fx2: vex_printf("CmpUN64Fx2"); return;
 753       case Iop_CmpGT32Fx2: vex_printf("CmpGT32Fx2"); return;
 754       case Iop_CmpEQ32Fx2: vex_printf("CmpEQ32Fx2"); return;
 755       case Iop_CmpGE32Fx2: vex_printf("CmpGE32Fx2"); return;
 756       case Iop_CmpLT16Fx8: vex_printf("CmpLT16Fx8"); return;
 757       case Iop_CmpLE16Fx8: vex_printf("CmpLE16Fx8"); return;
 758       case Iop_CmpEQ16Fx8: vex_printf("CmpEQ16Fx8"); return;
 759
 760       case Iop_CmpEQ32F0x4: vex_printf("CmpEQ32F0x4"); return;
 761       case Iop_CmpLT32F0x4: vex_printf("CmpLT32F0x4"); return;
 762       case Iop_CmpLE32F0x4: vex_printf("CmpLE32F0x4"); return;
 763       case Iop_CmpUN32F0x4: vex_printf("CmpUN32F0x4"); return;
 764       case Iop_CmpEQ64F0x2: vex_printf("CmpEQ64F0x2"); return;
 765       case Iop_CmpLT64F0x2: vex_printf("CmpLT64F0x2"); return;
 766       case Iop_CmpLE64F0x2: vex_printf("CmpLE64F0x2"); return;
 767       case Iop_CmpUN64F0x2: vex_printf("CmpUN64F0x2"); return;
 768
 769       case Iop_Neg64Fx2: vex_printf("Neg64Fx2"); return;
 770       case Iop_Neg32Fx4: vex_printf("Neg32Fx4"); return;
 771       case Iop_Neg32Fx2: vex_printf("Neg32Fx2"); return;
 772       case Iop_Neg16Fx8: vex_printf("Neg16Fx8"); return;
 773
 774       case Iop_F32x4_2toQ16x8: vex_printf("F32x4_2toQ16x8"); return;
 775       case Iop_F64x2_2toQ32x4: vex_printf("F64x2_2toQ32x4"); return;
 776
 777       case Iop_V128to64:   vex_printf("V128to64");   return;
 778       case Iop_V128HIto64: vex_printf("V128HIto64"); return;
 779       case Iop_64HLtoV128: vex_printf("64HLtoV128"); return;
 780
 781       case Iop_64UtoV128:   vex_printf("64UtoV128"); return;
 782       case Iop_SetV128lo64: vex_printf("SetV128lo64"); return;
 783
 784       case Iop_ZeroHI64ofV128:  vex_printf("ZeroHI64ofV128"); return;
 785       case Iop_ZeroHI96ofV128:  vex_printf("ZeroHI96ofV128"); return;
 786       case Iop_ZeroHI112ofV128: vex_printf("ZeroHI112ofV128"); return;
 787       case Iop_ZeroHI120ofV128: vex_printf("ZeroHI120ofV128"); return;
 788
 789       case Iop_32UtoV128:   vex_printf("32UtoV128"); return;
 790       case Iop_V128to32:    vex_printf("V128to32"); return;
 791       case Iop_SetV128lo32: vex_printf("SetV128lo32"); return;
 792
 793       case Iop_Dup8x16: vex_printf("Dup8x16"); return;
 794       case Iop_Dup16x8: vex_printf("Dup16x8"); return;
 795       case Iop_Dup32x4: vex_printf("Dup32x4"); return;
 796       case Iop_Dup8x8: vex_printf("Dup8x8"); return;
 797       case Iop_Dup16x4: vex_printf("Dup16x4"); return;
 798       case Iop_Dup32x2: vex_printf("Dup32x2"); return;
 799
 800       case Iop_NotV128:    vex_printf("NotV128"); return;
 801       case Iop_AndV128:    vex_printf("AndV128"); return;
 802       case Iop_OrV128:     vex_printf("OrV128");  return;
 803       case Iop_XorV128:    vex_printf("XorV128"); return;
 804
 805       case Iop_CmpNEZ8x16: vex_printf("CmpNEZ8x16"); return;
 806       case Iop_CmpNEZ16x8: vex_printf("CmpNEZ16x8"); return;
 807       case Iop_CmpNEZ32x4: vex_printf("CmpNEZ32x4"); return;
 808       case Iop_CmpNEZ64x2: vex_printf("CmpNEZ64x2"); return;
 809       case Iop_CmpNEZ128x1: vex_printf("CmpNEZ128x1"); return;
 810
 811       case Iop_Abs8x16: vex_printf("Abs8x16"); return;
 812       case Iop_Abs16x8: vex_printf("Abs16x8"); return;
 813       case Iop_Abs32x4: vex_printf("Abs32x4"); return;
 814       case Iop_Abs64x2: vex_printf("Abs64x2"); return;
 815
 816       case Iop_Add8x16:   vex_printf("Add8x16"); return;
 817       case Iop_Add16x8:   vex_printf("Add16x8"); return;
 818       case Iop_Add32x4:   vex_printf("Add32x4"); return;
 819       case Iop_Add64x2:   vex_printf("Add64x2"); return;
 820       case Iop_Add128x1:  vex_printf("Add128x1"); return;
 821       case Iop_QAdd8Ux16: vex_printf("QAdd8Ux16"); return;
 822       case Iop_QAdd16Ux8: vex_printf("QAdd16Ux8"); return;
 823       case Iop_QAdd32Ux4: vex_printf("QAdd32Ux4"); return;
 824       case Iop_QAdd8Sx16: vex_printf("QAdd8Sx16"); return;
 825       case Iop_QAdd16Sx8: vex_printf("QAdd16Sx8"); return;
 826       case Iop_QAdd32Sx4: vex_printf("QAdd32Sx4"); return;
 827       case Iop_QAdd64Ux2: vex_printf("QAdd64Ux2"); return;
 828       case Iop_QAdd64Sx2: vex_printf("QAdd64Sx2"); return;
 829
 830       case Iop_QAddExtUSsatSS8x16: vex_printf("QAddExtUSsatSS8x16"); return;
 831       case Iop_QAddExtUSsatSS16x8: vex_printf("QAddExtUSsatSS16x8"); return;
 832       case Iop_QAddExtUSsatSS32x4: vex_printf("QAddExtUSsatSS32x4"); return;
 833       case Iop_QAddExtUSsatSS64x2: vex_printf("QAddExtUSsatSS64x2"); return;
 834       case Iop_QAddExtSUsatUU8x16: vex_printf("QAddExtSUsatUU8x16"); return;
 835       case Iop_QAddExtSUsatUU16x8: vex_printf("QAddExtSUsatUU16x8"); return;
 836       case Iop_QAddExtSUsatUU32x4: vex_printf("QAddExtSUsatUU32x4"); return;
 837       case Iop_QAddExtSUsatUU64x2: vex_printf("QAddExtSUsatUU64x2"); return;
 838
 839       case Iop_PwAdd8x16: vex_printf("PwAdd8x16"); return;
 840       case Iop_PwAdd16x8: vex_printf("PwAdd16x8"); return;
 841       case Iop_PwAdd32x4: vex_printf("PwAdd32x4"); return;
 842       case Iop_PwAddL8Ux16: vex_printf("PwAddL8Ux16"); return;
 843       case Iop_PwAddL16Ux8: vex_printf("PwAddL16Ux8"); return;
 844       case Iop_PwAddL32Ux4: vex_printf("PwAddL32Ux4"); return;
 845       case Iop_PwAddL64Ux2: vex_printf("PwAddL64Ux2"); return;
 846       case Iop_PwAddL8Sx16: vex_printf("PwAddL8Sx16"); return;
 847       case Iop_PwAddL16Sx8: vex_printf("PwAddL16Sx8"); return;
 848       case Iop_PwAddL32Sx4: vex_printf("PwAddL32Sx4"); return;
 849       case Iop_PwExtUSMulQAdd8x16: vex_printf("PwExtUSMulQAdd8x16"); return;
 850
 851       case Iop_Sub8x16:   vex_printf("Sub8x16"); return;
 852       case Iop_Sub16x8:   vex_printf("Sub16x8"); return;
 853       case Iop_Sub32x4:   vex_printf("Sub32x4"); return;
 854       case Iop_Sub64x2:   vex_printf("Sub64x2"); return;
 855       case Iop_Sub128x1:  vex_printf("Sub128x1"); return;
 856       case Iop_QSub8Ux16: vex_printf("QSub8Ux16"); return;
 857       case Iop_QSub16Ux8: vex_printf("QSub16Ux8"); return;
 858       case Iop_QSub32Ux4: vex_printf("QSub32Ux4"); return;
 859       case Iop_QSub8Sx16: vex_printf("QSub8Sx16"); return;
 860       case Iop_QSub16Sx8: vex_printf("QSub16Sx8"); return;
 861       case Iop_QSub32Sx4: vex_printf("QSub32Sx4"); return;
 862       case Iop_QSub64Ux2: vex_printf("QSub64Ux2"); return;
 863       case Iop_QSub64Sx2: vex_printf("QSub64Sx2"); return;
 864
 865       case Iop_Mul8x16:    vex_printf("Mul8x16"); return;
 866       case Iop_Mul16x8:    vex_printf("Mul16x8"); return;
 867       case Iop_Mul32x4:    vex_printf("Mul32x4"); return;
 868       case Iop_Mull8Ux8:    vex_printf("Mull8Ux8"); return;
 869       case Iop_Mull8Sx8:    vex_printf("Mull8Sx8"); return;
 870       case Iop_Mull16Ux4:    vex_printf("Mull16Ux4"); return;
 871       case Iop_Mull16Sx4:    vex_printf("Mull16Sx4"); return;
 872       case Iop_Mull32Ux2:    vex_printf("Mull32Ux2"); return;
 873       case Iop_Mull32Sx2:    vex_printf("Mull32Sx2"); return;
 874       case Iop_PolynomialMul8x16: vex_printf("PolynomialMul8x16"); return;
 875       case Iop_PolynomialMull8x8: vex_printf("PolynomialMull8x8"); return;
 876       case Iop_MulHi8Ux16: vex_printf("MulHi8Ux16"); return;
 877       case Iop_MulHi16Ux8: vex_printf("MulHi16Ux8"); return;
 878       case Iop_MulHi32Ux4: vex_printf("MulHi32Ux4"); return;
 879       case Iop_MulHi8Sx16: vex_printf("MulHi8Sx16"); return;
 880       case Iop_MulHi16Sx8: vex_printf("MulHi16Sx8"); return;
 881       case Iop_MulHi32Sx4: vex_printf("MulHi32Sx4"); return;
 882       case Iop_QDMulHi16Sx8: vex_printf("QDMulHi16Sx8"); return;
 883       case Iop_QDMulHi32Sx4: vex_printf("QDMulHi32Sx4"); return;
 884       case Iop_QRDMulHi16Sx8: vex_printf("QRDMulHi16Sx8"); return;
 885       case Iop_QRDMulHi32Sx4: vex_printf("QRDMulHi32Sx4"); return;
 886
 887       case Iop_MullEven8Ux16: vex_printf("MullEven8Ux16"); return;
 888       case Iop_MullEven16Ux8: vex_printf("MullEven16Ux8"); return;
 889       case Iop_MullEven32Ux4: vex_printf("MullEven32Ux4"); return;
 890       case Iop_MullEven8Sx16: vex_printf("MullEven8Sx16"); return;
 891       case Iop_MullEven16Sx8: vex_printf("MullEven16Sx8"); return;
 892       case Iop_MullEven32Sx4: vex_printf("MullEven32Sx4"); return;
 893
 894       case Iop_PolynomialMulAdd8x16:
 895          vex_printf("PolynomialMulAdd8x16"); return;
 896       case Iop_PolynomialMulAdd16x8:
 897          vex_printf("PolynomialMulAdd16x8"); return;
 898       case Iop_PolynomialMulAdd32x4:
 899          vex_printf("PolynomialMulAdd32x4"); return;
 900       case Iop_PolynomialMulAdd64x2:
 901          vex_printf("PolynomialMulAdd64x2"); return;
 902
 903       case Iop_Avg8Ux16: vex_printf("Avg8Ux16"); return;
 904       case Iop_Avg16Ux8: vex_printf("Avg16Ux8"); return;
 905       case Iop_Avg32Ux4: vex_printf("Avg32Ux4"); return;
 906       case Iop_Avg64Ux2: vex_printf("Avg64Ux2"); return;
 907       case Iop_Avg8Sx16: vex_printf("Avg8Sx16"); return;
 908       case Iop_Avg16Sx8: vex_printf("Avg16Sx8"); return;
 909       case Iop_Avg32Sx4: vex_printf("Avg32Sx4"); return;
 910       case Iop_Avg64Sx2: vex_printf("Avg64Sx2"); return;
 911
 912       case Iop_Max8Sx16: vex_printf("Max8Sx16"); return;
 913       case Iop_Max16Sx8: vex_printf("Max16Sx8"); return;
 914       case Iop_Max32Sx4: vex_printf("Max32Sx4"); return;
 915       case Iop_Max64Sx2: vex_printf("Max64Sx2"); return;
 916       case Iop_Max8Ux16: vex_printf("Max8Ux16"); return;
 917       case Iop_Max16Ux8: vex_printf("Max16Ux8"); return;
 918       case Iop_Max32Ux4: vex_printf("Max32Ux4"); return;
 919       case Iop_Max64Ux2: vex_printf("Max64Ux2"); return;
 920
 921       case Iop_Min8Sx16: vex_printf("Min8Sx16"); return;
 922       case Iop_Min16Sx8: vex_printf("Min16Sx8"); return;
 923       case Iop_Min32Sx4: vex_printf("Min32Sx4"); return;
 924       case Iop_Min64Sx2: vex_printf("Min64Sx2"); return;
 925       case Iop_Min8Ux16: vex_printf("Min8Ux16"); return;
 926       case Iop_Min16Ux8: vex_printf("Min16Ux8"); return;
 927       case Iop_Min32Ux4: vex_printf("Min32Ux4"); return;
 928       case Iop_Min64Ux2: vex_printf("Min64Ux2"); return;
 929
 930       case Iop_CmpEQ8x16:  vex_printf("CmpEQ8x16"); return;
 931       case Iop_CmpEQ16x8:  vex_printf("CmpEQ16x8"); return;
 932       case Iop_CmpEQ32x4:  vex_printf("CmpEQ32x4"); return;
 933       case Iop_CmpEQ64x2:  vex_printf("CmpEQ64x2"); return;
 934       case Iop_CmpGT8Sx16: vex_printf("CmpGT8Sx16"); return;
 935       case Iop_CmpGT16Sx8: vex_printf("CmpGT16Sx8"); return;
 936       case Iop_CmpGT32Sx4: vex_printf("CmpGT32Sx4"); return;
 937       case Iop_CmpGT64Sx2: vex_printf("CmpGT64Sx2"); return;
 938       case Iop_CmpGT8Ux16: vex_printf("CmpGT8Ux16"); return;
 939       case Iop_CmpGT16Ux8: vex_printf("CmpGT16Ux8"); return;
 940       case Iop_CmpGT32Ux4: vex_printf("CmpGT32Ux4"); return;
 941       case Iop_CmpGT64Ux2: vex_printf("CmpGT64Ux2"); return;
 942
 943       case Iop_Cnt8x16: vex_printf("Cnt8x16"); return;
 944       case Iop_Clz8x16: vex_printf("Clz8x16"); return;
 945       case Iop_Clz16x8: vex_printf("Clz16x8"); return;
 946       case Iop_Clz32x4: vex_printf("Clz32x4"); return;
 947       case Iop_Clz64x2: vex_printf("Clz64x2"); return;
 948       case Iop_Cls8x16: vex_printf("Cls8x16"); return;
 949       case Iop_Cls16x8: vex_printf("Cls16x8"); return;
 950       case Iop_Cls32x4: vex_printf("Cls32x4"); return;
 951       case Iop_Ctz8x16: vex_printf("Iop_Ctz8x16"); return;
 952       case Iop_Ctz16x8: vex_printf("Iop_Ctz16x8"); return;
 953       case Iop_Ctz32x4: vex_printf("Iop_Ctz32x4"); return;
 954       case Iop_Ctz64x2: vex_printf("Iop_Ctz64x2"); return;
 955
 956       case Iop_ShlV128: vex_printf("ShlV128"); return;
 957       case Iop_ShrV128: vex_printf("ShrV128"); return;
 958       case Iop_SarV128: vex_printf("SarV128"); return;
 959
 960       case Iop_ShlN8x16: vex_printf("ShlN8x16"); return;
 961       case Iop_ShlN16x8: vex_printf("ShlN16x8"); return;
 962       case Iop_ShlN32x4: vex_printf("ShlN32x4"); return;
 963       case Iop_ShlN64x2: vex_printf("ShlN64x2"); return;
 964       case Iop_ShrN8x16: vex_printf("ShrN8x16"); return;
 965       case Iop_ShrN16x8: vex_printf("ShrN16x8"); return;
 966       case Iop_ShrN32x4: vex_printf("ShrN32x4"); return;
 967       case Iop_ShrN64x2: vex_printf("ShrN64x2"); return;
 968       case Iop_SarN8x16: vex_printf("SarN8x16"); return;
 969       case Iop_SarN16x8: vex_printf("SarN16x8"); return;
 970       case Iop_SarN32x4: vex_printf("SarN32x4"); return;
 971       case Iop_SarN64x2: vex_printf("SarN64x2"); return;
 972
 973       case Iop_Shl8x16: vex_printf("Shl8x16"); return;
 974       case Iop_Shl16x8: vex_printf("Shl16x8"); return;
 975       case Iop_Shl32x4: vex_printf("Shl32x4"); return;
 976       case Iop_Shl64x2: vex_printf("Shl64x2"); return;
 977       case Iop_QSal8x16: vex_printf("QSal8x16"); return;
 978       case Iop_QSal16x8: vex_printf("QSal16x8"); return;
 979       case Iop_QSal32x4: vex_printf("QSal32x4"); return;
 980       case Iop_QSal64x2: vex_printf("QSal64x2"); return;
 981       case Iop_QShl8x16: vex_printf("QShl8x16"); return;
 982       case Iop_QShl16x8: vex_printf("QShl16x8"); return;
 983       case Iop_QShl32x4: vex_printf("QShl32x4"); return;
 984       case Iop_QShl64x2: vex_printf("QShl64x2"); return;
 985       case Iop_QShlNsatSS8x16: vex_printf("QShlNsatSS8x16"); return;
 986       case Iop_QShlNsatSS16x8: vex_printf("QShlNsatSS16x8"); return;
 987       case Iop_QShlNsatSS32x4: vex_printf("QShlNsatSS32x4"); return;
 988       case Iop_QShlNsatSS64x2: vex_printf("QShlNsatSS64x2"); return;
 989       case Iop_QShlNsatUU8x16: vex_printf("QShlNsatUU8x16"); return;
 990       case Iop_QShlNsatUU16x8: vex_printf("QShlNsatUU16x8"); return;
 991       case Iop_QShlNsatUU32x4: vex_printf("QShlNsatUU32x4"); return;
 992       case Iop_QShlNsatUU64x2: vex_printf("QShlNsatUU64x2"); return;
 993       case Iop_QShlNsatSU8x16: vex_printf("QShlNsatSU8x16"); return;
 994       case Iop_QShlNsatSU16x8: vex_printf("QShlNsatSU16x8"); return;
 995       case Iop_QShlNsatSU32x4: vex_printf("QShlNsatSU32x4"); return;
 996       case Iop_QShlNsatSU64x2: vex_printf("QShlNsatSU64x2"); return;
 997       case Iop_Shr8x16: vex_printf("Shr8x16"); return;
 998       case Iop_Shr16x8: vex_printf("Shr16x8"); return;
 999       case Iop_Shr32x4: vex_printf("Shr32x4"); return;
1000       case Iop_Shr64x2: vex_printf("Shr64x2"); return;
1001       case Iop_Sar8x16: vex_printf("Sar8x16"); return;
1002       case Iop_Sar16x8: vex_printf("Sar16x8"); return;
1003       case Iop_Sar32x4: vex_printf("Sar32x4"); return;
1004       case Iop_Sar64x2: vex_printf("Sar64x2"); return;
1005       case Iop_Sal8x16: vex_printf("Sal8x16"); return;
1006       case Iop_Sal16x8: vex_printf("Sal16x8"); return;
1007       case Iop_Sal32x4: vex_printf("Sal32x4"); return;
1008       case Iop_Sal64x2: vex_printf("Sal64x2"); return;
1009       case Iop_Rol8x16: vex_printf("Rol8x16"); return;
1010       case Iop_Rol16x8: vex_printf("Rol16x8"); return;
1011       case Iop_Rol32x4: vex_printf("Rol32x4"); return;
1012       case Iop_Rol64x2: vex_printf("Rol64x2"); return;
1013
1014       case Iop_QandUQsh8x16: vex_printf("QandUQsh8x16"); return;
1015       case Iop_QandUQsh16x8: vex_printf("QandUQsh16x8"); return;
1016       case Iop_QandUQsh32x4: vex_printf("QandUQsh32x4"); return;
1017       case Iop_QandUQsh64x2: vex_printf("QandUQsh64x2"); return;
1018       case Iop_QandSQsh8x16: vex_printf("QandSQsh8x16"); return;
1019       case Iop_QandSQsh16x8: vex_printf("QandSQsh16x8"); return;
1020       case Iop_QandSQsh32x4: vex_printf("QandSQsh32x4"); return;
1021       case Iop_QandSQsh64x2: vex_printf("QandSQsh64x2"); return;
1022       case Iop_QandUQRsh8x16: vex_printf("QandUQRsh8x16"); return;
1023       case Iop_QandUQRsh16x8: vex_printf("QandUQRsh16x8"); return;
1024       case Iop_QandUQRsh32x4: vex_printf("QandUQRsh32x4"); return;
1025       case Iop_QandUQRsh64x2: vex_printf("QandUQRsh64x2"); return;
1026       case Iop_QandSQRsh8x16: vex_printf("QandSQRsh8x16"); return;
1027       case Iop_QandSQRsh16x8: vex_printf("QandSQRsh16x8"); return;
1028       case Iop_QandSQRsh32x4: vex_printf("QandSQRsh32x4"); return;
1029       case Iop_QandSQRsh64x2: vex_printf("QandSQRsh64x2"); return;
1030
1031       case Iop_Sh8Sx16: vex_printf("Sh8Sx16"); return;
1032       case Iop_Sh16Sx8: vex_printf("Sh16Sx8"); return;
1033       case Iop_Sh32Sx4: vex_printf("Sh32Sx4"); return;
1034       case Iop_Sh64Sx2: vex_printf("Sh64Sx2"); return;
1035       case Iop_Sh8Ux16: vex_printf("Sh8Ux16"); return;
1036       case Iop_Sh16Ux8: vex_printf("Sh16Ux8"); return;
1037       case Iop_Sh32Ux4: vex_printf("Sh32Ux4"); return;
1038       case Iop_Sh64Ux2: vex_printf("Sh64Ux2"); return;
1039       case Iop_Rsh8Sx16: vex_printf("Rsh8Sx16"); return;
1040       case Iop_Rsh16Sx8: vex_printf("Rsh16Sx8"); return;
1041       case Iop_Rsh32Sx4: vex_printf("Rsh32Sx4"); return;
1042       case Iop_Rsh64Sx2: vex_printf("Rsh64Sx2"); return;
1043       case Iop_Rsh8Ux16: vex_printf("Rsh8Ux16"); return;
1044       case Iop_Rsh16Ux8: vex_printf("Rsh16Ux8"); return;
1045       case Iop_Rsh32Ux4: vex_printf("Rsh32Ux4"); return;
1046       case Iop_Rsh64Ux2: vex_printf("Rsh64Ux2"); return;
1047
1048       case Iop_QandQShrNnarrow16Uto8Ux8:
1049          vex_printf("QandQShrNnarrow16Uto8Ux8"); return;
1050       case Iop_QandQShrNnarrow32Uto16Ux4:
1051          vex_printf("QandQShrNnarrow32Uto16Ux4"); return;
1052       case Iop_QandQShrNnarrow64Uto32Ux2:
1053          vex_printf("QandQShrNnarrow64Uto32Ux2"); return;
1054       case Iop_QandQSarNnarrow16Sto8Sx8:
1055          vex_printf("QandQSarNnarrow16Sto8Sx8"); return;
1056       case Iop_QandQSarNnarrow32Sto16Sx4:
1057          vex_printf("QandQSarNnarrow32Sto16Sx4"); return;
1058       case Iop_QandQSarNnarrow64Sto32Sx2:
1059          vex_printf("QandQSarNnarrow64Sto32Sx2"); return;
1060       case Iop_QandQSarNnarrow16Sto8Ux8:
1061          vex_printf("QandQSarNnarrow16Sto8Ux8"); return;
1062       case Iop_QandQSarNnarrow32Sto16Ux4:
1063          vex_printf("QandQSarNnarrow32Sto16Ux4"); return;
1064       case Iop_QandQSarNnarrow64Sto32Ux2:
1065          vex_printf("QandQSarNnarrow64Sto32Ux2"); return;
1066       case Iop_QandQRShrNnarrow16Uto8Ux8:
1067          vex_printf("QandQRShrNnarrow16Uto8Ux8"); return;
1068       case Iop_QandQRShrNnarrow32Uto16Ux4:
1069          vex_printf("QandQRShrNnarrow32Uto16Ux4"); return;
1070       case Iop_QandQRShrNnarrow64Uto32Ux2:
1071          vex_printf("QandQRShrNnarrow64Uto32Ux2"); return;
1072       case Iop_QandQRSarNnarrow16Sto8Sx8:
1073          vex_printf("QandQRSarNnarrow16Sto8Sx8"); return;
1074       case Iop_QandQRSarNnarrow32Sto16Sx4:
1075          vex_printf("QandQRSarNnarrow32Sto16Sx4"); return;
1076       case Iop_QandQRSarNnarrow64Sto32Sx2:
1077          vex_printf("QandQRSarNnarrow64Sto32Sx2"); return;
1078       case Iop_QandQRSarNnarrow16Sto8Ux8:
1079          vex_printf("QandQRSarNnarrow16Sto8Ux8"); return;
1080       case Iop_QandQRSarNnarrow32Sto16Ux4:
1081          vex_printf("QandQRSarNnarrow32Sto16Ux4"); return;
1082       case Iop_QandQRSarNnarrow64Sto32Ux2:
1083          vex_printf("QandQRSarNnarrow64Sto32Ux2"); return;
1084
1085       case Iop_NarrowBin16to8x16:    vex_printf("NarrowBin16to8x16"); return;
1086       case Iop_NarrowBin32to16x8:    vex_printf("NarrowBin32to16x8"); return;
1087       case Iop_QNarrowBin16Uto8Ux16: vex_printf("QNarrowBin16Uto8Ux16"); return;
1088       case Iop_QNarrowBin32Sto16Ux8: vex_printf("QNarrowBin32Sto16Ux8"); return;
1089       case Iop_QNarrowBin16Sto8Ux16: vex_printf("QNarrowBin16Sto8Ux16"); return;
1090       case Iop_QNarrowBin32Uto16Ux8: vex_printf("QNarrowBin32Uto16Ux8"); return;
1091       case Iop_QNarrowBin16Sto8Sx16: vex_printf("QNarrowBin16Sto8Sx16"); return;
1092       case Iop_QNarrowBin32Sto16Sx8: vex_printf("QNarrowBin32Sto16Sx8"); return;
1093       case Iop_NarrowUn16to8x8:     vex_printf("NarrowUn16to8x8");  return;
1094       case Iop_NarrowUn32to16x4:    vex_printf("NarrowUn32to16x4"); return;
1095       case Iop_NarrowUn64to32x2:    vex_printf("NarrowUn64to32x2"); return;
1096       case Iop_QNarrowUn16Uto8Ux8:  vex_printf("QNarrowUn16Uto8Ux8");  return;
1097       case Iop_QNarrowUn32Uto16Ux4: vex_printf("QNarrowUn32Uto16Ux4"); return;
1098       case Iop_QNarrowUn64Uto32Ux2: vex_printf("QNarrowUn64Uto32Ux2"); return;
1099       case Iop_QNarrowUn16Sto8Sx8:  vex_printf("QNarrowUn16Sto8Sx8");  return;
1100       case Iop_QNarrowUn32Sto16Sx4: vex_printf("QNarrowUn32Sto16Sx4"); return;
1101       case Iop_QNarrowUn64Sto32Sx2: vex_printf("QNarrowUn64Sto32Sx2"); return;
1102       case Iop_QNarrowUn16Sto8Ux8:  vex_printf("QNarrowUn16Sto8Ux8");  return;
1103       case Iop_QNarrowUn32Sto16Ux4: vex_printf("QNarrowUn32Sto16Ux4"); return;
1104       case Iop_QNarrowUn64Sto32Ux2: vex_printf("QNarrowUn64Sto32Ux2"); return;
1105       case Iop_Widen8Uto16x8:  vex_printf("Widen8Uto16x8");  return;
1106       case Iop_Widen16Uto32x4: vex_printf("Widen16Uto32x4"); return;
1107       case Iop_Widen32Uto64x2: vex_printf("Widen32Uto64x2"); return;
1108       case Iop_Widen8Sto16x8:  vex_printf("Widen8Sto16x8");  return;
1109       case Iop_Widen16Sto32x4: vex_printf("Widen16Sto32x4"); return;
1110       case Iop_Widen32Sto64x2: vex_printf("Widen32Sto64x2"); return;
1111
1112       case Iop_InterleaveHI8x16: vex_printf("InterleaveHI8x16"); return;
1113       case Iop_InterleaveHI16x8: vex_printf("InterleaveHI16x8"); return;
1114       case Iop_InterleaveHI32x4: vex_printf("InterleaveHI32x4"); return;
1115       case Iop_InterleaveHI64x2: vex_printf("InterleaveHI64x2"); return;
1116       case Iop_InterleaveLO8x16: vex_printf("InterleaveLO8x16"); return;
1117       case Iop_InterleaveLO16x8: vex_printf("InterleaveLO16x8"); return;
1118       case Iop_InterleaveLO32x4: vex_printf("InterleaveLO32x4"); return;
1119       case Iop_InterleaveLO64x2: vex_printf("InterleaveLO64x2"); return;
1120
1121       case Iop_CatOddLanes8x16: vex_printf("CatOddLanes8x16"); return;
1122       case Iop_CatOddLanes16x8: vex_printf("CatOddLanes16x8"); return;
1123       case Iop_CatOddLanes32x4: vex_printf("CatOddLanes32x4"); return;
1124       case Iop_CatEvenLanes8x16: vex_printf("CatEvenLanes8x16"); return;
1125       case Iop_CatEvenLanes16x8: vex_printf("CatEvenLanes16x8"); return;
1126       case Iop_CatEvenLanes32x4: vex_printf("CatEvenLanes32x4"); return;
1127
1128       case Iop_InterleaveOddLanes8x16: vex_printf("InterleaveOddLanes8x16"); return;
1129       case Iop_InterleaveOddLanes16x8: vex_printf("InterleaveOddLanes16x8"); return;
1130       case Iop_InterleaveOddLanes32x4: vex_printf("InterleaveOddLanes32x4"); return;
1131       case Iop_InterleaveEvenLanes8x16: vex_printf("InterleaveEvenLanes8x16"); return;
1132       case Iop_InterleaveEvenLanes16x8: vex_printf("InterleaveEvenLanes16x8"); return;
1133       case Iop_InterleaveEvenLanes32x4: vex_printf("InterleaveEvenLanes32x4"); return;
1134       case Iop_PackOddLanes8x16: vex_printf("InterleavePackOddLanes8x16"); return;
1135       case Iop_PackOddLanes16x8: vex_printf("InterleavePackOddLanes16x8"); return;
1136       case Iop_PackOddLanes32x4: vex_printf("InterleavePackOddLanes32x4"); return;
1137       case Iop_PackEvenLanes8x16: vex_printf("InterleavePackEvenLanes8x16"); return;
1138       case Iop_PackEvenLanes16x8: vex_printf("InterleavePackEvenLanes16x8"); return;
1139       case Iop_PackEvenLanes32x4: vex_printf("InterleavePackEvenLanes32x4"); return;
1140
1141       case Iop_GetElem8x16: vex_printf("GetElem8x16"); return;
1142       case Iop_GetElem16x8: vex_printf("GetElem16x8"); return;
1143       case Iop_GetElem32x4: vex_printf("GetElem32x4"); return;
1144       case Iop_GetElem64x2: vex_printf("GetElem64x2"); return;
1145
1146       case Iop_SetElem8x16: vex_printf("SetElem8x16"); return;
1147       case Iop_SetElem16x8: vex_printf("SetElem16x8"); return;
1148       case Iop_SetElem32x4: vex_printf("SetElem32x4"); return;
1149       case Iop_SetElem64x2: vex_printf("SetElem64x2"); return;
1150
1151       case Iop_GetElem8x8: vex_printf("GetElem8x8"); return;
1152       case Iop_GetElem16x4: vex_printf("GetElem16x4"); return;
1153       case Iop_GetElem32x2: vex_printf("GetElem32x2"); return;
1154       case Iop_SetElem8x8: vex_printf("SetElem8x8"); return;
1155       case Iop_SetElem16x4: vex_printf("SetElem16x4"); return;
1156       case Iop_SetElem32x2: vex_printf("SetElem32x2"); return;
1157
1158       case Iop_Slice64: vex_printf("Slice64"); return;
1159       case Iop_SliceV128: vex_printf("SliceV128"); return;
1160
1161       case Iop_Perm8x16: vex_printf("Perm8x16"); return;
1162       case Iop_PermOrZero8x16: vex_printf("PermOrZero8x16"); return;
1163       case Iop_Perm32x4: vex_printf("Perm32x4"); return;
1164       case Iop_Perm8x16x2: vex_printf("Perm8x16x2"); return;
1165       case Iop_Reverse8sIn16_x8: vex_printf("Reverse8sIn16_x8"); return;
1166       case Iop_Reverse8sIn32_x4: vex_printf("Reverse8sIn32_x4"); return;
1167       case Iop_Reverse16sIn32_x4: vex_printf("Reverse16sIn32_x4"); return;
1168       case Iop_Reverse8sIn64_x2: vex_printf("Reverse8sIn64_x2"); return;
1169       case Iop_Reverse16sIn64_x2: vex_printf("Reverse16sIn64_x2"); return;
1170       case Iop_Reverse32sIn64_x2: vex_printf("Reverse32sIn64_x2"); return;
1171       case Iop_Reverse1sIn8_x16: vex_printf("Reverse1sIn8_x16"); return;
1172
1173       case Iop_F32ToFixed32Ux4_RZ: vex_printf("F32ToFixed32Ux4_RZ"); return;
1174       case Iop_F32ToFixed32Sx4_RZ: vex_printf("F32ToFixed32Sx4_RZ"); return;
1175       case Iop_Fixed32UToF32x4_RN: vex_printf("Fixed32UToF32x4_RN"); return;
1176       case Iop_Fixed32SToF32x4_RN: vex_printf("Fixed32SToF32x4_RN"); return;
1177       case Iop_F32ToFixed32Ux2_RZ: vex_printf("F32ToFixed32Ux2_RZ"); return;
1178       case Iop_F32ToFixed32Sx2_RZ: vex_printf("F32ToFixed32Sx2_RZ"); return;
1179       case Iop_Fixed32UToF32x2_RN: vex_printf("Fixed32UToF32x2_RN"); return;
1180       case Iop_Fixed32SToF32x2_RN: vex_printf("Fixed32SToF32x2_RN"); return;
1181
1182       case Iop_D32toD64:  vex_printf("D32toD64");   return;
1183       case Iop_D64toD32:  vex_printf("D64toD32");   return;
1184       case Iop_AddD64:  vex_printf("AddD64");   return;
1185       case Iop_SubD64:  vex_printf("SubD64");   return;
1186       case Iop_MulD64:  vex_printf("MulD64");   return;
1187       case Iop_DivD64:  vex_printf("DivD64");   return;
1188       case Iop_ShlD64:  vex_printf("ShlD64"); return;
1189       case Iop_ShrD64:  vex_printf("ShrD64"); return;
1190       case Iop_D64toI32S:  vex_printf("D64toI32S");  return;
1191       case Iop_D64toI32U:  vex_printf("D64toI32U");  return;
1192       case Iop_D64toI64S:  vex_printf("D64toI64S");  return;
1193       case Iop_D64toI64U:  vex_printf("D64toI64U");  return;
1194       case Iop_I32StoD64:  vex_printf("I32StoD64");  return;
1195       case Iop_I32UtoD64:  vex_printf("I32UtoD64");  return;
1196       case Iop_I64StoD64:  vex_printf("I64StoD64");  return;
1197       case Iop_I64UtoD64:  vex_printf("I64UtoD64");  return;
1198       case Iop_I32StoD128: vex_printf("I32StoD128"); return;
1199       case Iop_I32UtoD128: vex_printf("I32UtoD128"); return;
1200       case Iop_I64StoD128: vex_printf("I64StoD128"); return;
1201       case Iop_I64UtoD128: vex_printf("I64UtoD128"); return;
1202       case Iop_D64toD128:  vex_printf("D64toD128");  return;
1203       case Iop_D128toD64:  vex_printf("D128toD64");  return;
1204       case Iop_D128toI32S: vex_printf("D128toI32S"); return;
1205       case Iop_D128toI32U: vex_printf("D128toI32U"); return;
1206       case Iop_D128toI64S: vex_printf("D128toI64S"); return;
1207       case Iop_D128toI64U: vex_printf("D128toI64U"); return;
1208       case Iop_F32toD32:   vex_printf("F32toD32");   return;
1209       case Iop_F32toD64:   vex_printf("F32toD64");   return;
1210       case Iop_F32toD128:  vex_printf("F32toD128");  return;
1211       case Iop_F64toD32:   vex_printf("F64toD32");   return;
1212       case Iop_F64toD64:   vex_printf("F64toD64");   return;
1213       case Iop_F64toD128:  vex_printf("F64toD128");  return;
1214       case Iop_F128toD32:  vex_printf("F128toD32");  return;
1215       case Iop_F128toD64:  vex_printf("F128toD64");  return;
1216       case Iop_F128toD128: vex_printf("F128toD128"); return;
1217       case Iop_D32toF32:   vex_printf("D32toF32");   return;
1218       case Iop_D32toF64:   vex_printf("D32toF64");   return;
1219       case Iop_D32toF128:  vex_printf("D32toF128");  return;
1220       case Iop_D64toF32:   vex_printf("D64toF32");   return;
1221       case Iop_D64toF64:   vex_printf("D64toF64");   return;
1222       case Iop_D64toF128:  vex_printf("D64toF128");  return;
1223       case Iop_D128toF32:  vex_printf("D128toF32");  return;
1224       case Iop_D128toF64:  vex_printf("D128toF64");  return;
1225       case Iop_D128toF128: vex_printf("D128toF128"); return;
1226       case Iop_AddD128: vex_printf("AddD128");  return;
1227       case Iop_SubD128: vex_printf("SubD128");  return;
1228       case Iop_MulD128: vex_printf("MulD128");  return;
1229       case Iop_DivD128: vex_printf("DivD128");  return;
1230       case Iop_ShlD128: vex_printf("ShlD128");  return;
1231       case Iop_ShrD128: vex_printf("ShrD128");  return;
1232       case Iop_RoundD64toInt:  vex_printf("RoundD64toInt");  return;
1233       case Iop_RoundD128toInt: vex_printf("RoundD128toInt"); return;
1234       case Iop_QuantizeD64:    vex_printf("QuantizeD64");    return;
1235       case Iop_QuantizeD128:   vex_printf("QuantizeD128");   return;
1236       case Iop_ExtractExpD64:  vex_printf("ExtractExpD64");  return;
1237       case Iop_ExtractExpD128: vex_printf("ExtractExpD128"); return;
1238       case Iop_ExtractSigD64:  vex_printf("ExtractSigD64");  return;
1239       case Iop_ExtractSigD128: vex_printf("ExtractSigD128"); return;
1240       case Iop_InsertExpD64:   vex_printf("InsertExpD64");   return;
1241       case Iop_InsertExpD128:  vex_printf("InsertExpD128");  return;
1242       case Iop_CmpD64:         vex_printf("CmpD64");     return;
1243       case Iop_CmpD128:        vex_printf("CmpD128");    return;
1244       case Iop_CmpExpD64:      vex_printf("CmpExpD64");  return;
1245       case Iop_CmpExpD128:     vex_printf("CmpExpD128"); return;
1246       case Iop_D64HLtoD128: vex_printf("D64HLtoD128");   return;
1247       case Iop_D128HItoD64: vex_printf("D128HItoD64");   return;
1248       case Iop_D128LOtoD64: vex_printf("D128LOtoD64");   return;
1249       case Iop_SignificanceRoundD64: vex_printf("SignificanceRoundD64");
1250          return;
1251       case Iop_SignificanceRoundD128: vex_printf("SignificanceRoundD128");
1252          return;
1253       case Iop_ReinterpI64asD64: vex_printf("ReinterpI64asD64"); return;
1254       case Iop_ReinterpD64asI64: vex_printf("ReinterpD64asI64"); return;
1255       case Iop_V256to64_0: vex_printf("V256to64_0"); return;
1256       case Iop_V256to64_1: vex_printf("V256to64_1"); return;
1257       case Iop_V256to64_2: vex_printf("V256to64_2"); return;
1258       case Iop_V256to64_3: vex_printf("V256to64_3"); return;
1259       case Iop_64x4toV256: vex_printf("64x4toV256"); return;
1260       case Iop_V256toV128_0: vex_printf("V256toV128_0"); return;
1261       case Iop_V256toV128_1: vex_printf("V256toV128_1"); return;
1262       case Iop_V128HLtoV256: vex_printf("V128HLtoV256"); return;
1263       case Iop_DPBtoBCD: vex_printf("DPBtoBCD"); return;
1264       case Iop_BCDtoDPB: vex_printf("BCDtoDPB"); return;
1265       case Iop_Add64Fx4: vex_printf("Add64Fx4"); return;
1266       case Iop_Sub64Fx4: vex_printf("Sub64Fx4"); return;
1267       case Iop_Mul64Fx4: vex_printf("Mul64Fx4"); return;
1268       case Iop_Div64Fx4: vex_printf("Div64Fx4"); return;
1269       case Iop_Add32Fx8: vex_printf("Add32Fx8"); return;
1270       case Iop_Sub32Fx8: vex_printf("Sub32Fx8"); return;
1271       case Iop_Mul32Fx8: vex_printf("Mul32Fx8"); return;
1272       case Iop_Div32Fx8: vex_printf("Div32Fx8"); return;
1273       case Iop_I32StoF32x8: vex_printf("I32StoF32x8"); return;
1274       case Iop_F32toI32Sx8: vex_printf("F32toI32Sx8"); return;
1275       case Iop_F32toF16x8: vex_printf("F32toF16x8"); return;
1276       case Iop_F16toF32x8: vex_printf("F16toF32x8"); return;
1277       case Iop_AndV256: vex_printf("AndV256"); return;
1278       case Iop_OrV256:  vex_printf("OrV256"); return;
1279       case Iop_XorV256: vex_printf("XorV256"); return;
1280       case Iop_NotV256: vex_printf("NotV256"); return;
1281       case Iop_CmpNEZ64x4: vex_printf("CmpNEZ64x4"); return;
1282       case Iop_CmpNEZ32x8: vex_printf("CmpNEZ32x8"); return;
1283       case Iop_CmpNEZ16x16: vex_printf("CmpNEZ16x16"); return;
1284       case Iop_CmpNEZ8x32: vex_printf("CmpNEZ8x32"); return;
1285
1286       case Iop_Add8x32:   vex_printf("Add8x32"); return;
1287       case Iop_Add16x16:  vex_printf("Add16x16"); return;
1288       case Iop_Add32x8:   vex_printf("Add32x8"); return;
1289       case Iop_Add64x4:   vex_printf("Add64x4"); return;
1290       case Iop_Sub8x32:   vex_printf("Sub8x32"); return;
1291       case Iop_Sub16x16:  vex_printf("Sub16x16"); return;
1292       case Iop_Sub32x8:   vex_printf("Sub32x8"); return;
1293       case Iop_Sub64x4:   vex_printf("Sub64x4"); return;
1294       case Iop_QAdd8Ux32: vex_printf("QAdd8Ux32"); return;
1295       case Iop_QAdd16Ux16: vex_printf("QAdd16Ux16"); return;
1296       case Iop_QAdd8Sx32: vex_printf("QAdd8Sx32"); return;
1297       case Iop_QAdd16Sx16: vex_printf("QAdd16Sx16"); return;
1298       case Iop_QSub8Ux32: vex_printf("QSub8Ux32"); return;
1299       case Iop_QSub16Ux16: vex_printf("QSub16Ux16"); return;
1300       case Iop_QSub8Sx32: vex_printf("QSub8Sx32"); return;
1301       case Iop_QSub16Sx16: vex_printf("QSub16Sx16"); return;
1302
1303       case Iop_Mul16x16:    vex_printf("Mul16x16"); return;
1304       case Iop_Mul32x8:     vex_printf("Mul32x8"); return;
1305       case Iop_MulHi16Ux16: vex_printf("MulHi16Ux16"); return;
1306       case Iop_MulHi16Sx16: vex_printf("MulHi16Sx16"); return;
1307
1308       case Iop_Avg8Ux32:  vex_printf("Avg8Ux32"); return;
1309       case Iop_Avg16Ux16: vex_printf("Avg16Ux16"); return;
1310
1311       case Iop_Max8Sx32:  vex_printf("Max8Sx32"); return;
1312       case Iop_Max16Sx16: vex_printf("Max16Sx16"); return;
1313       case Iop_Max32Sx8:  vex_printf("Max32Sx8"); return;
1314       case Iop_Max8Ux32:  vex_printf("Max8Ux32"); return;
1315       case Iop_Max16Ux16: vex_printf("Max16Ux16"); return;
1316       case Iop_Max32Ux8:  vex_printf("Max32Ux8"); return;
1317
1318       case Iop_Min8Sx32:  vex_printf("Min8Sx32"); return;
1319       case Iop_Min16Sx16: vex_printf("Min16Sx16"); return;
1320       case Iop_Min32Sx8:  vex_printf("Min32Sx8"); return;
1321       case Iop_Min8Ux32:  vex_printf("Min8Ux32"); return;
1322       case Iop_Min16Ux16: vex_printf("Min16Ux16"); return;
1323       case Iop_Min32Ux8:  vex_printf("Min32Ux8"); return;
1324
1325       case Iop_CmpEQ8x32:   vex_printf("CmpEQ8x32"); return;
1326       case Iop_CmpEQ16x16:  vex_printf("CmpEQ16x16"); return;
1327       case Iop_CmpEQ32x8:   vex_printf("CmpEQ32x8"); return;
1328       case Iop_CmpEQ64x4:   vex_printf("CmpEQ64x4"); return;
1329       case Iop_CmpGT8Sx32:  vex_printf("CmpGT8Sx32"); return;
1330       case Iop_CmpGT16Sx16: vex_printf("CmpGT16Sx16"); return;
1331       case Iop_CmpGT32Sx8:  vex_printf("CmpGT32Sx8"); return;
1332       case Iop_CmpGT64Sx4:  vex_printf("CmpGT64Sx4"); return;
1333
1334       case Iop_ShlN16x16:  vex_printf("ShlN16x16"); return;
1335       case Iop_ShlN32x8:   vex_printf("ShlN32x8"); return;
1336       case Iop_ShlN64x4:   vex_printf("ShlN64x4"); return;
1337       case Iop_ShrN16x16:  vex_printf("ShrN16x16"); return;
1338       case Iop_ShrN32x8:   vex_printf("ShrN32x8"); return;
1339       case Iop_ShrN64x4:   vex_printf("ShrN64x4"); return;
1340       case Iop_SarN16x16:  vex_printf("SarN16x16"); return;
1341       case Iop_SarN32x8:   vex_printf("SarN32x8"); return;
1342
1343       case Iop_Perm32x8:   vex_printf("Perm32x8"); return;
1344
1345       case Iop_CipherV128:   vex_printf("CipherV128"); return;
1346       case Iop_CipherLV128:  vex_printf("CipherLV128"); return;
1347       case Iop_NCipherV128:  vex_printf("NCipherV128"); return;
1348       case Iop_NCipherLV128: vex_printf("NCipherLV128"); return;
1349       case Iop_CipherSV128:  vex_printf("CipherSV128"); return;
1350
1351       case Iop_SHA256:  vex_printf("SHA256"); return;
1352       case Iop_SHA512:  vex_printf("SHA512"); return;
1353       case Iop_BCDAdd:  vex_printf("BCDAdd"); return;
1354       case Iop_BCDSub:  vex_printf("BCDSub"); return;
1355       case Iop_I128StoBCD128:  vex_printf("bcdcfsq."); return;
1356       case Iop_BCD128toI128S:  vex_printf("bcdctsq."); return;
1357       case Iop_Rotx32:  vex_printf("bitswap"); return;
1358       case Iop_Rotx64:  vex_printf("dbitswap"); return;
1359
1360       case Iop_PwBitMtxXpose64x2: vex_printf("BitMatrixTranspose64x2"); return;
1361
1362       case Iop_DivU128: vex_printf("DivU128"); return;
1363       case Iop_DivS128: vex_printf("DivS128"); return;
1364       case Iop_DivU128E: vex_printf("DivU128E"); return;
1365       case Iop_DivS128E: vex_printf("DivS128E"); return;
1366       case Iop_ModU128: vex_printf("ModU128"); return;
1367       case Iop_ModS128: vex_printf("ModS128"); return;
1368       case Iop_2xMultU64Add128CarryOut: vex_printf("2xMultU64Add128CarryOut");
1369          return;
1370
1371       default: vpanic("ppIROp(1)");
1372    }
1373
1374    vassert(str);
1375    switch (op - base) {
1376       case 0: vex_printf("%s",str); vex_printf("8"); break;
1377       case 1: vex_printf("%s",str); vex_printf("16"); break;
1378       case 2: vex_printf("%s",str); vex_printf("32"); break;
1379       case 3: vex_printf("%s",str); vex_printf("64"); break;
1380       default: vpanic("ppIROp(2)");
1381    }
1382 }
1383
1384 // A very few primops might trap (eg, divide by zero).  We need to be able to
1385 // identify them.
1386 Bool primopMightTrap ( IROp op )
1387 {
1388    switch (op) {
1389
1390    // The few potentially trapping ones
1391    case Iop_DivU32: case Iop_DivS32: case Iop_DivU64: case Iop_DivS64:
1392    case Iop_DivU64E: case Iop_DivS64E: case Iop_DivU32E: case Iop_DivS32E:
1393    case Iop_DivModU64to32: case Iop_DivModS64to32: case Iop_DivModU128to64:
1394    case Iop_DivModS128to64: case Iop_DivModS64to64: case Iop_DivModU64to64:
1395    case Iop_DivModS32to32: case Iop_DivModU32to32: case Iop_DivU128:
1396    case Iop_DivS128: case Iop_DivU128E: case Iop_DivS128E: case Iop_ModU128:
1397    case Iop_ModS128:
1398       return True;
1399
1400    // All the rest are non-trapping
1401    case Iop_Add8: case Iop_Add16: case Iop_Add32: case Iop_Add64:
1402    case Iop_Sub8: case Iop_Sub16: case Iop_Sub32: case Iop_Sub64:
1403    case Iop_Mul8: case Iop_Mul16: case Iop_Mul32: case Iop_Mul64:
1404    case Iop_Or8: case Iop_Or16: case Iop_Or32: case Iop_Or64:
1405    case Iop_And8: case Iop_And16: case Iop_And32: case Iop_And64:
1406    case Iop_Xor8: case Iop_Xor16: case Iop_Xor32: case Iop_Xor64:
1407    case Iop_Shl8: case Iop_Shl16: case Iop_Shl32: case Iop_Shl64:
1408    case Iop_Shr8: case Iop_Shr16: case Iop_Shr32: case Iop_Shr64:
1409    case Iop_Sar8: case Iop_Sar16: case Iop_Sar32: case Iop_Sar64:
1410    case Iop_CmpEQ8: case Iop_CmpEQ16: case Iop_CmpEQ32: case Iop_CmpEQ64:
1411    case Iop_CmpNE8: case Iop_CmpNE16: case Iop_CmpNE32: case Iop_CmpNE64:
1412    case Iop_Not8: case Iop_Not16: case Iop_Not32: case Iop_Not64:
1413    case Iop_CasCmpEQ8: case Iop_CasCmpEQ16: case Iop_CasCmpEQ32:
1414    case Iop_CasCmpEQ64: case Iop_CasCmpNE8: case Iop_CasCmpNE16:
1415    case Iop_CasCmpNE32: case Iop_CasCmpNE64: case Iop_ExpCmpNE8:
1416    case Iop_ExpCmpNE16: case Iop_ExpCmpNE32: case Iop_ExpCmpNE64:
1417    case Iop_MullS8: case Iop_MullS16: case Iop_MullS32: case Iop_MullS64:
1418    case Iop_MullU8: case Iop_MullU16: case Iop_MullU32: case Iop_MullU64:
1419    case Iop_Clz64: case Iop_Clz32: case Iop_Ctz64: case Iop_Ctz32:
1420    case Iop_ClzNat64: case Iop_ClzNat32: case Iop_CtzNat64: case Iop_CtzNat32:
1421    case Iop_PopCount64: case Iop_PopCount32:
1422    case Iop_CmpLT32S: case Iop_CmpLT64S: case Iop_CmpLE32S: case Iop_CmpLE64S:
1423    case Iop_CmpLT32U: case Iop_CmpLT64U: case Iop_CmpLE32U: case Iop_CmpLE64U:
1424    case Iop_CmpNEZ8: case Iop_CmpNEZ16: case Iop_CmpNEZ32: case Iop_CmpNEZ64:
1425    case Iop_CmpwNEZ32: case Iop_CmpwNEZ64:
1426    case Iop_Left8: case Iop_Left16: case Iop_Left32: case Iop_Left64:
1427    case Iop_Max32U: case Iop_CmpORD32U: case Iop_CmpORD64U:
1428    case Iop_CmpORD32S: case Iop_CmpORD64S:
1429    case Iop_8Uto16: case Iop_8Uto32: case Iop_8Uto64:
1430    case Iop_16Uto32: case Iop_16Uto64: case Iop_32Uto64:
1431    case Iop_8Sto16: case Iop_8Sto32: case Iop_8Sto64:
1432    case Iop_16Sto32: case Iop_16Sto64: case Iop_32Sto64:
1433    case Iop_64to8: case Iop_32to8: case Iop_64to16:
1434    case Iop_16to8: case Iop_16HIto8: case Iop_8HLto16: case Iop_32to16:
1435    case Iop_32HIto16: case Iop_16HLto32: case Iop_64to32: case Iop_64HIto32:
1436    case Iop_32HLto64: case Iop_128to64: case Iop_128HIto64: case Iop_64HLto128:
1437    case Iop_Not1: case Iop_And1: case Iop_Or1: case Iop_32to1: case Iop_64to1:
1438    case Iop_1Uto8: case Iop_1Uto32: case Iop_1Uto64: case Iop_1Sto8:
1439    case Iop_1Sto16: case Iop_1Sto32: case Iop_1Sto64:
1440    case Iop_AddF64: case Iop_SubF64: case Iop_MulF64: case Iop_DivF64:
1441    case Iop_AddF32: case Iop_SubF32: case Iop_MulF32: case Iop_DivF32:
1442    case Iop_AddF64r32: case Iop_SubF64r32: case Iop_MulF64r32:
1443    case Iop_DivF64r32: case Iop_NegF64: case Iop_AbsF64:
1444    case Iop_NegF32: case Iop_AbsF32: case Iop_SqrtF64: case Iop_SqrtF32:
1445    case Iop_NegF16: case Iop_AbsF16: case Iop_SqrtF16: case Iop_SubF16:
1446    case Iop_AddF16:
1447    case Iop_CmpF64: case Iop_CmpF32: case Iop_CmpF16: case Iop_CmpF128:
1448    case Iop_F64toI16S:
1449    case Iop_F64toI32S: case Iop_F64toI64S: case Iop_F64toI64U:
1450    case Iop_F64toI32U: case Iop_I32StoF64: case Iop_I64StoF64:
1451    case Iop_I64UtoF64: case Iop_I64UtoF32: case Iop_I32UtoF32:
1452    case Iop_I32UtoF64: case Iop_F32toI32S: case Iop_F32toI64S:
1453    case Iop_F32toI32U: case Iop_F32toI64U: case Iop_I32StoF32:
1454    case Iop_I64StoF32: case Iop_F32toF64: case Iop_F64toF32:
1455    case Iop_ReinterpF64asI64: case Iop_ReinterpI64asF64:
1456    case Iop_ReinterpF32asI32: case Iop_ReinterpI32asF32:
1457    case Iop_ReinterpV128asI128: case Iop_ReinterpI128asV128:
1458    case Iop_ReinterpF128asI128: case Iop_ReinterpI128asF128:
1459    case Iop_F64HLtoF128: case Iop_F128HItoF64: case Iop_F128LOtoF64:
1460    case Iop_AddF128: case Iop_SubF128: case Iop_MulF128: case Iop_DivF128:
1461    case Iop_MAddF128: case Iop_MSubF128: case Iop_NegMAddF128:
1462    case Iop_NegMSubF128: case Iop_NegF128: case Iop_AbsF128:
1463    case Iop_SqrtF128: case Iop_I32StoF128: case Iop_I64StoF128:
1464    case Iop_I32UtoF128: case Iop_I64UtoF128: case Iop_F32toF128:
1465    case Iop_F64toF128: case Iop_F128toI32S: case Iop_F128toI64S:
1466    case Iop_F128toI32U: case Iop_F128toI64U: case Iop_F128toI128S:
1467    case Iop_F128toF64: case Iop_F128toF32: case Iop_I128UtoF128:
1468    case Iop_I128StoD128: case Iop_D128toI128S:
1469    case Iop_I128StoF128: case Iop_RndF128:
1470    case Iop_TruncF128toI32S: case Iop_TruncF128toI32U:
1471    case Iop_TruncF128toI64U: case Iop_TruncF128toI128U:
1472    case Iop_TruncF128toI128S:
1473    case Iop_TruncF128toI64S: case Iop_AtanF64: case Iop_Yl2xF64:
1474    case Iop_Yl2xp1F64: case Iop_PRemF64: case Iop_PRemC3210F64:
1475    case Iop_PRem1F64: case Iop_PRem1C3210F64: case Iop_ScaleF64:
1476    case Iop_SinF64: case Iop_CosF64: case Iop_TanF64:
1477    case Iop_2xm1F64: case Iop_RoundF128toInt:
1478    case Iop_RoundF64toInt: case Iop_RoundF64toIntA0: case Iop_RoundF64toIntE:
1479    case Iop_RoundF32toInt: case Iop_RoundF32toIntA0: case Iop_RoundF32toIntE:
1480    case Iop_MAddF32: case Iop_MSubF32:
1481    case Iop_MAddF64: case Iop_MSubF64:
1482    case Iop_MAddF64r32: case Iop_MSubF64r32:
1483    case Iop_RSqrtEst5GoodF64: case Iop_RoundF64toF64_NEAREST:
1484    case Iop_RoundF64toF64_NegINF: case Iop_RoundF64toF64_PosINF:
1485    case Iop_RoundF64toF64_ZERO: case Iop_TruncF64asF32: case Iop_RoundF64toF32:
1486    case Iop_RecpExpF64: case Iop_RecpExpF32: case Iop_MaxNumF64:
1487    case Iop_MinNumF64: case Iop_MaxNumF32: case Iop_MinNumF32:
1488    case Iop_F16toF64: case Iop_F64toF16: case Iop_F16toF32:
1489    case Iop_F32toF16: case Iop_QAdd32S: case Iop_QSub32S:
1490    case Iop_Add16x2: case Iop_Sub16x2:
1491    case Iop_QAdd16Sx2: case Iop_QAdd16Ux2:
1492    case Iop_QSub16Sx2: case Iop_QSub16Ux2:
1493    case Iop_HAdd16Ux2: case Iop_HAdd16Sx2:
1494    case Iop_HSub16Ux2: case Iop_HSub16Sx2:
1495    case Iop_Add8x4: case Iop_Sub8x4:
1496    case Iop_QAdd8Sx4: case Iop_QAdd8Ux4:
1497    case Iop_QSub8Sx4: case Iop_QSub8Ux4:
1498    case Iop_HAdd8Ux4: case Iop_HAdd8Sx4:
1499    case Iop_HSub8Ux4: case Iop_HSub8Sx4: case Iop_Sad8Ux4:
1500    case Iop_CmpNEZ16x2: case Iop_CmpNEZ8x4: case Iop_Reverse8sIn32_x1:
1501    case Iop_I32UtoF32x2_DEP: case Iop_I32StoF32x2_DEP:
1502    case Iop_F32toI32Ux2_RZ: case Iop_F32toI32Sx2_RZ:
1503    case Iop_F32ToFixed32Ux2_RZ: case Iop_F32ToFixed32Sx2_RZ:
1504    case Iop_Fixed32UToF32x2_RN: case Iop_Fixed32SToF32x2_RN:
1505    case Iop_Max32Fx2:  case Iop_Min32Fx2:
1506    case Iop_PwMax32Fx2: case Iop_PwMin32Fx2:
1507    case Iop_CmpEQ32Fx2: case Iop_CmpGT32Fx2: case Iop_CmpGE32Fx2:
1508    case Iop_RecipEst32Fx2: case Iop_RecipStep32Fx2: case Iop_RSqrtEst32Fx2:
1509    case Iop_RSqrtStep32Fx2: case Iop_Neg32Fx2: case Iop_Abs32Fx2:
1510    case Iop_CmpNEZ8x8: case Iop_CmpNEZ16x4: case Iop_CmpNEZ32x2:
1511    case Iop_Add8x8: case Iop_Add16x4: case Iop_Add32x2:
1512    case Iop_QAdd8Ux8: case Iop_QAdd16Ux4: case Iop_QAdd32Ux2: case Iop_QAdd64Ux1:
1513    case Iop_QAdd8Sx8: case Iop_QAdd16Sx4: case Iop_QAdd32Sx2: case Iop_QAdd64Sx1:
1514    case Iop_PwAdd8x8: case Iop_PwAdd16x4: case Iop_PwAdd32x2:
1515    case Iop_PwMax8Sx8: case Iop_PwMax16Sx4: case Iop_PwMax32Sx2:
1516    case Iop_PwMax8Ux8: case Iop_PwMax16Ux4: case Iop_PwMax32Ux2:
1517    case Iop_PwMin8Sx8: case Iop_PwMin16Sx4: case Iop_PwMin32Sx2:
1518    case Iop_PwMin8Ux8: case Iop_PwMin16Ux4: case Iop_PwMin32Ux2:
1519    case Iop_PwAddL8Ux8: case Iop_PwAddL16Ux4: case Iop_PwAddL32Ux2:
1520    case Iop_PwAddL8Sx8: case Iop_PwAddL16Sx4: case Iop_PwAddL32Sx2:
1521    case Iop_Sub8x8: case Iop_Sub16x4: case Iop_Sub32x2:
1522    case Iop_QSub8Ux8: case Iop_QSub16Ux4: case Iop_QSub32Ux2: case Iop_QSub64Ux1:
1523    case Iop_QSub8Sx8: case Iop_QSub16Sx4: case Iop_QSub32Sx2: case Iop_QSub64Sx1:
1524    case Iop_Abs8x8: case Iop_Abs16x4: case Iop_Abs32x2:
1525    case Iop_Mul8x8: case Iop_Mul16x4: case Iop_Mul32x2:
1526    case Iop_Mul32Fx2: case Iop_MulHi16Ux4: case Iop_MulHi16Sx4:
1527    case Iop_PolynomialMul8x8: case Iop_QDMulHi16Sx4: case Iop_QDMulHi32Sx2:
1528    case Iop_QRDMulHi16Sx4: case Iop_QRDMulHi32Sx2: case Iop_Avg8Ux8:
1529    case Iop_Avg16Ux4: case Iop_Max8Sx8: case Iop_Max16Sx4: case Iop_Max32Sx2:
1530    case Iop_Max8Ux8: case Iop_Max16Ux4: case Iop_Max32Ux2:
1531    case Iop_Min8Sx8: case Iop_Min16Sx4: case Iop_Min32Sx2:
1532    case Iop_Min8Ux8: case Iop_Min16Ux4: case Iop_Min32Ux2:
1533    case Iop_CmpEQ8x8: case Iop_CmpEQ16x4: case Iop_CmpEQ32x2:
1534    case Iop_CmpGT8Ux8: case Iop_CmpGT16Ux4: case Iop_CmpGT32Ux2:
1535    case Iop_CmpGT8Sx8: case Iop_CmpGT16Sx4: case Iop_CmpGT32Sx2:
1536    case Iop_Cnt8x8: case Iop_Clz8x8: case Iop_Clz16x4: case Iop_Clz32x2:
1537    case Iop_Cls8x8: case Iop_Cls16x4: case Iop_Cls32x2: case Iop_Clz64x2:
1538    case Iop_Ctz8x16: case Iop_Ctz16x8: case Iop_Ctz32x4: case Iop_Ctz64x2:
1539    case Iop_Shl8x8: case Iop_Shl16x4: case Iop_Shl32x2:
1540    case Iop_Shr8x8: case Iop_Shr16x4: case Iop_Shr32x2:
1541    case Iop_Sar8x8: case Iop_Sar16x4: case Iop_Sar32x2:
1542    case Iop_Sal8x8: case Iop_Sal16x4: case Iop_Sal32x2: case Iop_Sal64x1:
1543    case Iop_ShlN8x8: case Iop_ShlN16x4: case Iop_ShlN32x2:
1544    case Iop_ShrN8x8: case Iop_ShrN16x4: case Iop_ShrN32x2:
1545    case Iop_SarN8x8: case Iop_SarN16x4: case Iop_SarN32x2:
1546    case Iop_QShl8x8: case Iop_QShl16x4: case Iop_QShl32x2: case Iop_QShl64x1:
1547    case Iop_QSal8x8: case Iop_QSal16x4: case Iop_QSal32x2: case Iop_QSal64x1:
1548    case Iop_QShlNsatSU8x8: case Iop_QShlNsatSU16x4:
1549    case Iop_QShlNsatSU32x2: case Iop_QShlNsatSU64x1:
1550    case Iop_QShlNsatUU8x8: case Iop_QShlNsatUU16x4:
1551    case Iop_QShlNsatUU32x2: case Iop_QShlNsatUU64x1:
1552    case Iop_QShlNsatSS8x8: case Iop_QShlNsatSS16x4:
1553    case Iop_QShlNsatSS32x2: case Iop_QShlNsatSS64x1:
1554    case Iop_QNarrowBin16Sto8Ux8:
1555    case Iop_QNarrowBin16Sto8Sx8: case Iop_QNarrowBin32Sto16Sx4:
1556    case Iop_NarrowBin16to8x8: case Iop_NarrowBin32to16x4:
1557    case Iop_InterleaveHI8x8: case Iop_InterleaveHI16x4:
1558    case Iop_InterleaveHI32x2:
1559    case Iop_InterleaveLO8x8: case Iop_InterleaveLO16x4:
1560    case Iop_InterleaveLO32x2:
1561    case Iop_InterleaveOddLanes8x8: case Iop_InterleaveEvenLanes8x8:
1562    case Iop_InterleaveOddLanes16x4: case Iop_InterleaveEvenLanes16x4:
1563    case Iop_CatOddLanes8x8: case Iop_CatOddLanes16x4:
1564    case Iop_CatEvenLanes8x8: case Iop_CatEvenLanes16x4:
1565    case Iop_GetElem8x8: case Iop_GetElem16x4: case Iop_GetElem32x2:
1566    case Iop_SetElem8x8: case Iop_SetElem16x4: case Iop_SetElem32x2:
1567    case Iop_Dup8x8: case Iop_Dup16x4: case Iop_Dup32x2:
1568    case Iop_Slice64: case Iop_Reverse8sIn16_x4:
1569    case Iop_Reverse8sIn32_x2: case Iop_Reverse16sIn32_x2:
1570    case Iop_Reverse8sIn64_x1: case Iop_Reverse16sIn64_x1:
1571    case Iop_Reverse32sIn64_x1: case Iop_Perm8x8: case Iop_PermOrZero8x8:
1572    case Iop_GetMSBs8x8: case Iop_RecipEst32Ux2: case Iop_RSqrtEst32Ux2:
1573    case Iop_AddD64: case Iop_SubD64: case Iop_MulD64: case Iop_DivD64:
1574    case Iop_AddD128: case Iop_SubD128: case Iop_MulD128: case Iop_DivD128:
1575    case Iop_ShlD64: case Iop_ShrD64:
1576    case Iop_ShlD128: case Iop_ShrD128:
1577    case Iop_D32toD64: case Iop_D64toD128: case Iop_I32StoD128:
1578    case Iop_I32UtoD128: case Iop_I64StoD128: case Iop_I64UtoD128:
1579    case Iop_D64toD32: case Iop_D128toD64: case Iop_I32StoD64:
1580    case Iop_I32UtoD64: case Iop_I64StoD64: case Iop_I64UtoD64:
1581    case Iop_D64toI32S: case Iop_D64toI32U: case Iop_D64toI64S:
1582    case Iop_D64toI64U: case Iop_D128toI32S: case Iop_D128toI32U:
1583    case Iop_D128toI64S: case Iop_D128toI64U: case Iop_F32toD32:
1584    case Iop_F32toD64: case Iop_F32toD128: case Iop_F64toD32:
1585    case Iop_F64toD64: case Iop_F64toD128: case Iop_F128toD32:
1586    case Iop_F128toD64: case Iop_F128toD128: case Iop_D32toF32:
1587    case Iop_D32toF64: case Iop_D32toF128: case Iop_D64toF32: case Iop_D64toF64:
1588    case Iop_D64toF128: case Iop_D128toF32: case Iop_D128toF64:
1589    case Iop_D128toF128: case Iop_RoundD64toInt: case Iop_RoundD128toInt:
1590    case Iop_CmpD64: case Iop_CmpD128: case Iop_CmpExpD64:
1591    case Iop_CmpExpD128: case Iop_QuantizeD64: case Iop_QuantizeD128:
1592    case Iop_SignificanceRoundD64: case Iop_SignificanceRoundD128:
1593    case Iop_ExtractExpD64: case Iop_ExtractExpD128: case Iop_ExtractSigD64:
1594    case Iop_ExtractSigD128: case Iop_InsertExpD64: case Iop_InsertExpD128:
1595    case Iop_D64HLtoD128: case Iop_D128HItoD64: case Iop_D128LOtoD64:
1596    case Iop_DPBtoBCD: case Iop_BCDtoDPB: case Iop_BCDAdd: case Iop_BCDSub:
1597    case Iop_I128StoBCD128: case Iop_BCD128toI128S: case Iop_ReinterpI64asD64:
1598    case Iop_ReinterpD64asI64:
1599    case Iop_Add16Fx8: case Iop_Sub16Fx8:
1600    case Iop_Add32Fx4: case Iop_Sub32Fx4: case Iop_Mul32Fx4: case Iop_Div32Fx4:
1601    case Iop_Max32Fx4: case Iop_Min32Fx4:
1602    case Iop_Add32Fx2: case Iop_Sub32Fx2:
1603    case Iop_CmpEQ32Fx4: case Iop_CmpLT32Fx4:
1604    case Iop_CmpLE32Fx4: case Iop_CmpUN32Fx4:
1605    case Iop_CmpGT32Fx4: case Iop_CmpGE32Fx4:
1606    case Iop_PwMax32Fx4: case Iop_PwMin32Fx4:
1607    case Iop_Abs32Fx4: case Iop_Neg32Fx4: case Iop_Sqrt32Fx4:
1608    case Iop_Abs16Fx8: case Iop_Neg16Fx8: case Iop_Sqrt16Fx8:
1609    case Iop_RecipEst32Fx4: case Iop_RecipStep32Fx4: case Iop_RSqrtEst32Fx4:
1610    case Iop_Scale2_32Fx4: case Iop_Log2_32Fx4: case Iop_Exp2_32Fx4:
1611    case Iop_RSqrtStep32Fx4:
1612    case Iop_I32UtoF32x4_DEP: case Iop_I32StoF32x4_DEP: case Iop_I32StoF32x4:
1613    case Iop_F32toI32Sx4: case Iop_F32toI32Ux4_RZ: case Iop_F32toI32Sx4_RZ:
1614    case Iop_QF32toI32Ux4_RZ: case Iop_QF32toI32Sx4_RZ:
1615    case Iop_RoundF32x4_RM: case Iop_RoundF32x4_RP:
1616    case Iop_RoundF32x4_RN: case Iop_RoundF32x4_RZ:
1617    case Iop_F32ToFixed32Ux4_RZ: case Iop_F32ToFixed32Sx4_RZ:
1618    case Iop_Fixed32UToF32x4_RN: case Iop_Fixed32SToF32x4_RN:
1619    case Iop_F32toF16x4_DEP: case Iop_F32toF16x4: case Iop_F16toF32x4:
1620    case Iop_F64toF16x2_DEP: case Iop_F16toF64x2: case Iop_F32x4_2toQ16x8:
1621    case Iop_Add32F0x4: case Iop_Sub32F0x4: case Iop_Mul32F0x4:
1622    case Iop_Div32F0x4: case Iop_Max32F0x4: case Iop_Min32F0x4:
1623    case Iop_CmpEQ32F0x4: case Iop_CmpLT32F0x4: case Iop_CmpLE32F0x4:
1624    case Iop_CmpUN32F0x4:
1625    case Iop_RecipEst32F0x4: case Iop_Sqrt32F0x4: case Iop_RSqrtEst32F0x4:
1626    case Iop_Add64Fx2: case Iop_Sub64Fx2: case Iop_Mul64Fx2: case Iop_Div64Fx2:
1627    case Iop_Max64Fx2: case Iop_Min64Fx2:
1628    case Iop_CmpEQ64Fx2: case Iop_CmpLT64Fx2: case Iop_CmpLE64Fx2:
1629    case Iop_CmpLT16Fx8: case Iop_CmpLE16Fx8: case Iop_CmpEQ16Fx8:
1630    case Iop_CmpUN64Fx2: case Iop_Abs64Fx2: case Iop_Neg64Fx2:
1631    case Iop_Sqrt64Fx2: case Iop_Scale2_64Fx2: case Iop_Log2_64Fx2:
1632    case Iop_RecipEst64Fx2: case Iop_RecipStep64Fx2: case Iop_RSqrtEst64Fx2:
1633    case Iop_RSqrtStep64Fx2: case Iop_F64x2_2toQ32x4:
1634    case Iop_Add64F0x2: case Iop_Sub64F0x2: case Iop_Mul64F0x2:
1635    case Iop_Div64F0x2: case Iop_Max64F0x2: case Iop_Min64F0x2:
1636    case Iop_CmpEQ64F0x2: case Iop_CmpLT64F0x2: case Iop_CmpLE64F0x2:
1637    case Iop_CmpUN64F0x2: case Iop_Sqrt64F0x2: case Iop_V128to64:
1638    case Iop_V128HIto64: case Iop_64HLtoV128: case Iop_64UtoV128:
1639    case Iop_SetV128lo64: case Iop_ZeroHI64ofV128: case Iop_ZeroHI96ofV128:
1640    case Iop_ZeroHI112ofV128: case Iop_ZeroHI120ofV128: case Iop_32UtoV128:
1641    case Iop_V128to32: case Iop_SetV128lo32: case Iop_NotV128:
1642    case Iop_AndV128: case Iop_OrV128: case Iop_XorV128:
1643    case Iop_ShlV128: case Iop_ShrV128: case Iop_SarV128:
1644    case Iop_CmpNEZ8x16: case Iop_CmpNEZ16x8: case Iop_CmpNEZ32x4:
1645    case Iop_CmpNEZ64x2: case Iop_CmpNEZ128x1:
1646    case Iop_Add8x16: case Iop_Add16x8: case Iop_Add32x4:
1647    case Iop_Add64x2: case Iop_Add128x1:
1648    case Iop_QAdd8Ux16: case Iop_QAdd16Ux8: case Iop_QAdd32Ux4:
1649    case Iop_QAdd64Ux2:
1650    case Iop_QAdd8Sx16: case Iop_QAdd16Sx8: case Iop_QAdd32Sx4:
1651    case Iop_QAdd64Sx2:
1652    case Iop_QAddExtUSsatSS8x16: case Iop_QAddExtUSsatSS16x8:
1653    case Iop_QAddExtUSsatSS32x4: case Iop_QAddExtUSsatSS64x2:
1654    case Iop_QAddExtSUsatUU8x16: case Iop_QAddExtSUsatUU16x8:
1655    case Iop_QAddExtSUsatUU32x4: case Iop_QAddExtSUsatUU64x2:
1656    case Iop_Sub8x16: case Iop_Sub16x8: case Iop_Sub32x4:
1657    case Iop_Sub64x2: case Iop_Sub128x1:
1658    case Iop_QSub8Ux16: case Iop_QSub16Ux8: case Iop_QSub32Ux4:
1659    case Iop_QSub64Ux2:
1660    case Iop_QSub8Sx16: case Iop_QSub16Sx8: case Iop_QSub32Sx4:
1661    case Iop_QSub64Sx2:
1662    case Iop_Mul8x16: case Iop_Mul16x8: case Iop_Mul32x4:
1663    case Iop_MulHi8Ux16: case Iop_MulHi16Ux8: case Iop_MulHi32Ux4:
1664    case Iop_MulHi8Sx16: case Iop_MulHi16Sx8: case Iop_MulHi32Sx4:
1665    case Iop_MullEven8Ux16: case Iop_MullEven16Ux8: case Iop_MullEven32Ux4:
1666    case Iop_MullEven8Sx16: case Iop_MullEven16Sx8: case Iop_MullEven32Sx4:
1667    case Iop_Mull8Ux8: case Iop_Mull8Sx8:
1668    case Iop_Mull16Ux4: case Iop_Mull16Sx4:
1669    case Iop_Mull32Ux2: case Iop_Mull32Sx2:
1670    case Iop_QDMull16Sx4: case Iop_QDMull32Sx2:
1671    case Iop_QDMulHi16Sx8: case Iop_QDMulHi32Sx4:
1672    case Iop_QRDMulHi16Sx8: case Iop_QRDMulHi32Sx4:
1673    case Iop_PolynomialMul8x16: case Iop_PolynomialMull8x8:
1674    case Iop_PolynomialMulAdd8x16: case Iop_PolynomialMulAdd16x8:
1675    case Iop_PolynomialMulAdd32x4: case Iop_PolynomialMulAdd64x2:
1676    case Iop_PwAdd8x16: case Iop_PwAdd16x8: case Iop_PwAdd32x4:
1677    case Iop_PwAdd32Fx2: case Iop_PwAddL8Ux16: case Iop_PwAddL16Ux8:
1678    case Iop_PwAddL32Ux4: case Iop_PwAddL64Ux2:
1679    case Iop_PwAddL8Sx16: case Iop_PwAddL16Sx8: case Iop_PwAddL32Sx4:
1680    case Iop_PwExtUSMulQAdd8x16:
1681    case Iop_PwBitMtxXpose64x2:
1682    case Iop_Abs8x16: case Iop_Abs16x8: case Iop_Abs32x4: case Iop_Abs64x2:
1683    case Iop_Avg8Ux16: case Iop_Avg16Ux8: case Iop_Avg32Ux4: case Iop_Avg64Ux2:
1684    case Iop_Avg8Sx16: case Iop_Avg16Sx8: case Iop_Avg32Sx4: case Iop_Avg64Sx2:
1685    case Iop_Max8Sx16: case Iop_Max16Sx8: case Iop_Max32Sx4: case Iop_Max64Sx2:
1686    case Iop_Max8Ux16: case Iop_Max16Ux8: case Iop_Max32Ux4: case Iop_Max64Ux2:
1687    case Iop_Min8Sx16: case Iop_Min16Sx8: case Iop_Min32Sx4: case Iop_Min64Sx2:
1688    case Iop_Min8Ux16: case Iop_Min16Ux8: case Iop_Min32Ux4: case Iop_Min64Ux2:
1689    case Iop_CmpEQ8x16: case Iop_CmpEQ16x8: case Iop_CmpEQ32x4:
1690    case Iop_CmpEQ64x2:
1691    case Iop_CmpGT8Sx16: case Iop_CmpGT16Sx8: case Iop_CmpGT32Sx4:
1692    case Iop_CmpGT64Sx2:
1693    case Iop_CmpGT8Ux16: case Iop_CmpGT16Ux8: case Iop_CmpGT32Ux4:
1694    case Iop_CmpGT64Ux2:
1695    case Iop_Cnt8x16:
1696    case Iop_Clz8x16: case Iop_Clz16x8: case Iop_Clz32x4:
1697    case Iop_Cls8x16: case Iop_Cls16x8: case Iop_Cls32x4:
1698    case Iop_ShlN8x16: case Iop_ShlN16x8: case Iop_ShlN32x4: case Iop_ShlN64x2:
1699    case Iop_ShrN8x16: case Iop_ShrN16x8: case Iop_ShrN32x4: case Iop_ShrN64x2:
1700    case Iop_SarN8x16: case Iop_SarN16x8: case Iop_SarN32x4: case Iop_SarN64x2:
1701    case Iop_Shl8x16: case Iop_Shl16x8: case Iop_Shl32x4: case Iop_Shl64x2:
1702    case Iop_Shr8x16: case Iop_Shr16x8: case Iop_Shr32x4: case Iop_Shr64x2:
1703    case Iop_Sar8x16: case Iop_Sar16x8: case Iop_Sar32x4: case Iop_Sar64x2:
1704    case Iop_Sal8x16: case Iop_Sal16x8: case Iop_Sal32x4: case Iop_Sal64x2:
1705    case Iop_Rol8x16: case Iop_Rol16x8: case Iop_Rol32x4: case Iop_Rol64x2:
1706    case Iop_QShl8x16: case Iop_QShl16x8: case Iop_QShl32x4: case Iop_QShl64x2:
1707    case Iop_QSal8x16: case Iop_QSal16x8: case Iop_QSal32x4: case Iop_QSal64x2:
1708    case Iop_QShlNsatSU8x16: case Iop_QShlNsatSU16x8:
1709    case Iop_QShlNsatSU32x4: case Iop_QShlNsatSU64x2:
1710    case Iop_QShlNsatUU8x16: case Iop_QShlNsatUU16x8:
1711    case Iop_QShlNsatUU32x4: case Iop_QShlNsatUU64x2:
1712    case Iop_QShlNsatSS8x16: case Iop_QShlNsatSS16x8:
1713    case Iop_QShlNsatSS32x4: case Iop_QShlNsatSS64x2:
1714    case Iop_QandUQsh8x16: case Iop_QandUQsh16x8:
1715    case Iop_QandUQsh32x4: case Iop_QandUQsh64x2:
1716    case Iop_QandSQsh8x16: case Iop_QandSQsh16x8:
1717    case Iop_QandSQsh32x4: case Iop_QandSQsh64x2:
1718    case Iop_QandUQRsh8x16: case Iop_QandUQRsh16x8:
1719    case Iop_QandUQRsh32x4: case Iop_QandUQRsh64x2:
1720    case Iop_QandSQRsh8x16: case Iop_QandSQRsh16x8:
1721    case Iop_QandSQRsh32x4: case Iop_QandSQRsh64x2:
1722    case Iop_Sh8Sx16: case Iop_Sh16Sx8: case Iop_Sh32Sx4: case Iop_Sh64Sx2:
1723    case Iop_Sh8Ux16: case Iop_Sh16Ux8: case Iop_Sh32Ux4: case Iop_Sh64Ux2:
1724    case Iop_Rsh8Sx16: case Iop_Rsh16Sx8: case Iop_Rsh32Sx4: case Iop_Rsh64Sx2:
1725    case Iop_Rsh8Ux16: case Iop_Rsh16Ux8: case Iop_Rsh32Ux4: case Iop_Rsh64Ux2:
1726    case Iop_QandQShrNnarrow16Uto8Ux8:
1727    case Iop_QandQShrNnarrow32Uto16Ux4: case Iop_QandQShrNnarrow64Uto32Ux2:
1728    case Iop_QandQSarNnarrow16Sto8Sx8:
1729    case Iop_QandQSarNnarrow32Sto16Sx4: case Iop_QandQSarNnarrow64Sto32Sx2:
1730    case Iop_QandQSarNnarrow16Sto8Ux8:
1731    case Iop_QandQSarNnarrow32Sto16Ux4: case Iop_QandQSarNnarrow64Sto32Ux2:
1732    case Iop_QandQRShrNnarrow16Uto8Ux8:
1733    case Iop_QandQRShrNnarrow32Uto16Ux4: case Iop_QandQRShrNnarrow64Uto32Ux2:
1734    case Iop_QandQRSarNnarrow16Sto8Sx8:
1735    case Iop_QandQRSarNnarrow32Sto16Sx4: case Iop_QandQRSarNnarrow64Sto32Sx2:
1736    case Iop_QandQRSarNnarrow16Sto8Ux8:
1737    case Iop_QandQRSarNnarrow32Sto16Ux4: case Iop_QandQRSarNnarrow64Sto32Ux2:
1738    case Iop_QNarrowBin16Sto8Ux16: case Iop_QNarrowBin32Sto16Ux8:
1739    case Iop_QNarrowBin16Sto8Sx16: case Iop_QNarrowBin32Sto16Sx8:
1740    case Iop_QNarrowBin16Uto8Ux16: case Iop_QNarrowBin32Uto16Ux8:
1741    case Iop_NarrowBin16to8x16: case Iop_NarrowBin32to16x8:
1742    case Iop_QNarrowBin64Sto32Sx4: case Iop_QNarrowBin64Uto32Ux4:
1743    case Iop_NarrowBin64to32x4:
1744    case Iop_NarrowUn16to8x8: case Iop_NarrowUn32to16x4:
1745    case Iop_NarrowUn64to32x2:
1746    case Iop_QNarrowUn16Sto8Sx8: case Iop_QNarrowUn32Sto16Sx4:
1747    case Iop_QNarrowUn64Sto32Sx2:
1748    case Iop_QNarrowUn16Sto8Ux8: case Iop_QNarrowUn32Sto16Ux4:
1749    case Iop_QNarrowUn64Sto32Ux2:
1750    case Iop_QNarrowUn16Uto8Ux8: case Iop_QNarrowUn32Uto16Ux4:
1751    case Iop_QNarrowUn64Uto32Ux2:
1752    case Iop_Widen8Uto16x8: case Iop_Widen16Uto32x4: case Iop_Widen32Uto64x2:
1753    case Iop_Widen8Sto16x8: case Iop_Widen16Sto32x4: case Iop_Widen32Sto64x2:
1754    case Iop_InterleaveHI8x16: case Iop_InterleaveHI16x8:
1755    case Iop_InterleaveHI32x4: case Iop_InterleaveHI64x2:
1756    case Iop_InterleaveLO8x16: case Iop_InterleaveLO16x8:
1757    case Iop_InterleaveLO32x4: case Iop_InterleaveLO64x2:
1758    case Iop_InterleaveOddLanes8x16: case Iop_InterleaveEvenLanes8x16:
1759    case Iop_InterleaveOddLanes16x8: case Iop_InterleaveEvenLanes16x8:
1760    case Iop_InterleaveOddLanes32x4: case Iop_InterleaveEvenLanes32x4:
1761    case Iop_PackOddLanes8x16: case Iop_PackEvenLanes8x16:
1762    case Iop_PackOddLanes16x8: case Iop_PackEvenLanes16x8:
1763    case Iop_PackOddLanes32x4: case Iop_PackEvenLanes32x4:
1764    case Iop_CatOddLanes8x16: case Iop_CatOddLanes16x8: case Iop_CatOddLanes32x4:
1765    case Iop_CatEvenLanes8x16: case Iop_CatEvenLanes16x8:
1766    case Iop_CatEvenLanes32x4:
1767    case Iop_GetElem8x16: case Iop_GetElem16x8: case Iop_GetElem32x4:
1768    case Iop_GetElem64x2:
1769    case Iop_SetElem8x16: case Iop_SetElem16x8: case Iop_SetElem32x4:
1770    case Iop_SetElem64x2:
1771    case Iop_Dup8x16: case Iop_Dup16x8: case Iop_Dup32x4:
1772    case Iop_SliceV128: case Iop_Reverse8sIn16_x8:
1773    case Iop_Reverse8sIn32_x4: case Iop_Reverse16sIn32_x4:
1774    case Iop_Reverse8sIn64_x2: case Iop_Reverse16sIn64_x2:
1775    case Iop_Reverse32sIn64_x2: case Iop_Reverse1sIn8_x16: case Iop_Perm8x16:
1776    case Iop_Perm32x4: case Iop_PermOrZero8x16: case Iop_Perm8x16x2:
1777    case Iop_GetMSBs8x16: case Iop_RecipEst32Ux4: case Iop_RSqrtEst32Ux4:
1778    case Iop_MulI128by10: case Iop_MulI128by10Carry: case Iop_MulI128by10E:
1779    case Iop_MulI128by10ECarry: case Iop_V256to64_0: case Iop_V256to64_1:
1780    case Iop_V256to64_2: case Iop_V256to64_3: case Iop_64x4toV256:
1781    case Iop_V256toV128_0: case Iop_V256toV128_1: case Iop_V128HLtoV256:
1782    case Iop_AndV256: case Iop_OrV256: case Iop_XorV256:
1783    case Iop_NotV256:
1784    case Iop_CmpNEZ8x32: case Iop_CmpNEZ16x16: case Iop_CmpNEZ32x8:
1785    case Iop_CmpNEZ64x4:
1786    case Iop_Add8x32: case Iop_Add16x16: case Iop_Add32x8: case Iop_Add64x4:
1787    case Iop_Sub8x32: case Iop_Sub16x16: case Iop_Sub32x8: case Iop_Sub64x4:
1788    case Iop_CmpEQ8x32: case Iop_CmpEQ16x16: case Iop_CmpEQ32x8:
1789    case Iop_CmpEQ64x4:
1790    case Iop_CmpGT8Sx32: case Iop_CmpGT16Sx16: case Iop_CmpGT32Sx8:
1791    case Iop_CmpGT64Sx4:
1792    case Iop_ShlN16x16: case Iop_ShlN32x8: case Iop_ShlN64x4:
1793    case Iop_ShrN16x16: case Iop_ShrN32x8: case Iop_ShrN64x4:
1794    case Iop_SarN16x16: case Iop_SarN32x8:
1795    case Iop_Max8Sx32: case Iop_Max16Sx16: case Iop_Max32Sx8:
1796    case Iop_Max8Ux32: case Iop_Max16Ux16: case Iop_Max32Ux8:
1797    case Iop_Min8Sx32: case Iop_Min16Sx16: case Iop_Min32Sx8:
1798    case Iop_Min8Ux32: case Iop_Min16Ux16: case Iop_Min32Ux8:
1799    case Iop_Mul16x16: case Iop_Mul32x8:
1800    case Iop_MulHi16Ux16: case Iop_MulHi16Sx16:
1801    case Iop_QAdd8Ux32: case Iop_QAdd16Ux16:
1802    case Iop_QAdd8Sx32: case Iop_QAdd16Sx16:
1803    case Iop_QSub8Ux32: case Iop_QSub16Ux16:
1804    case Iop_QSub8Sx32: case Iop_QSub16Sx16:
1805    case Iop_Avg8Ux32: case Iop_Avg16Ux16:
1806    case Iop_Perm32x8:
1807    case Iop_CipherV128: case Iop_CipherLV128: case Iop_CipherSV128:
1808    case Iop_NCipherV128: case Iop_NCipherLV128:
1809    case Iop_SHA512: case Iop_SHA256:
1810    case Iop_Add64Fx4: case Iop_Sub64Fx4: case Iop_Mul64Fx4: case Iop_Div64Fx4:
1811    case Iop_Add32Fx8: case Iop_Sub32Fx8: case Iop_Mul32Fx8: case Iop_Div32Fx8:
1812    case Iop_I32StoF32x8: case Iop_F32toI32Sx8: case Iop_F32toF16x8:
1813    case Iop_F16toF32x8: case Iop_Sqrt32Fx8: case Iop_Sqrt64Fx4:
1814    case Iop_RSqrtEst32Fx8: case Iop_RecipEst32Fx8:
1815    case Iop_Max32Fx8: case Iop_Min32Fx8:
1816    case Iop_Max64Fx4: case Iop_Min64Fx4:
1817    case Iop_Rotx32: case Iop_Rotx64:
1818    case Iop_2xMultU64Add128CarryOut:
1819       return False;
1820
1821    case Iop_INVALID: case Iop_LAST:
1822       vpanic("primopMightTrap INVALID, LAST");
1823
1824    }
1825
1826    vpanic("primopMightTrap");
1827 }
1828
1829 void ppIRExpr ( const IRExpr* e )
1830 {
1831   Int i;
1832   switch (e->tag) {
1833     case Iex_Binder:
1834       vex_printf("BIND-%d", e->Iex.Binder.binder);
1835       break;
1836     case Iex_Get:
1837       vex_printf( "GET:" );
1838       ppIRType(e->Iex.Get.ty);
1839       vex_printf("(%d)", e->Iex.Get.offset);
1840       break;
1841     case Iex_GetI:
1842       vex_printf( "GETI" );
1843       ppIRRegArray(e->Iex.GetI.descr);
1844       vex_printf("[");
1845       ppIRExpr(e->Iex.GetI.ix);
1846       vex_printf(",%d]", e->Iex.GetI.bias);
1847       break;
1848     case Iex_RdTmp:
1849       ppIRTemp(e->Iex.RdTmp.tmp);
1850       break;
1851     case Iex_Qop: {
1852       const IRQop *qop = e->Iex.Qop.details;
1853       ppIROp(qop->op);
1854       vex_printf( "(" );
1855       ppIRExpr(qop->arg1);
1856       vex_printf( "," );
1857       ppIRExpr(qop->arg2);
1858       vex_printf( "," );
1859       ppIRExpr(qop->arg3);
1860       vex_printf( "," );
1861       ppIRExpr(qop->arg4);
1862       vex_printf( ")" );
1863       break;
1864     }
1865     case Iex_Triop: {
1866       const IRTriop *triop = e->Iex.Triop.details;
1867       ppIROp(triop->op);
1868       vex_printf( "(" );
1869       ppIRExpr(triop->arg1);
1870       vex_printf( "," );
1871       ppIRExpr(triop->arg2);
1872       vex_printf( "," );
1873       ppIRExpr(triop->arg3);
1874       vex_printf( ")" );
1875       break;
1876     }
1877     case Iex_Binop:
1878       ppIROp(e->Iex.Binop.op);
1879       vex_printf( "(" );
1880       ppIRExpr(e->Iex.Binop.arg1);
1881       vex_printf( "," );
1882       ppIRExpr(e->Iex.Binop.arg2);
1883       vex_printf( ")" );
1884       break;
1885     case Iex_Unop:
1886       ppIROp(e->Iex.Unop.op);
1887       vex_printf( "(" );
1888       ppIRExpr(e->Iex.Unop.arg);
1889       vex_printf( ")" );
1890       break;
1891     case Iex_Load:
1892       vex_printf( "LD%s:", e->Iex.Load.end==Iend_LE ? "le" : "be" );
1893       ppIRType(e->Iex.Load.ty);
1894       vex_printf( "(" );
1895       ppIRExpr(e->Iex.Load.addr);
1896       vex_printf( ")" );
1897       break;
1898     case Iex_Const:
1899       ppIRConst(e->Iex.Const.con);
1900       break;
1901     case Iex_CCall:
1902       ppIRCallee(e->Iex.CCall.cee);
1903       vex_printf("(");
1904       for (i = 0; e->Iex.CCall.args[i] != NULL; i++) {
1905         IRExpr* arg = e->Iex.CCall.args[i];
1906         ppIRExpr(arg);
1907
1908         if (e->Iex.CCall.args[i+1] != NULL) {
1909           vex_printf(",");
1910         }
1911       }
1912       vex_printf("):");
1913       ppIRType(e->Iex.CCall.retty);
1914       break;
1915     case Iex_ITE:
1916       vex_printf("ITE(");
1917       ppIRExpr(e->Iex.ITE.cond);
1918       vex_printf(",");
1919       ppIRExpr(e->Iex.ITE.iftrue);
1920       vex_printf(",");
1921       ppIRExpr(e->Iex.ITE.iffalse);
1922       vex_printf(")");
1923       break;
1924     case Iex_VECRET:
1925       vex_printf("VECRET");
1926       break;
1927     case Iex_GSPTR:
1928       vex_printf("GSPTR");
1929       break;
1930     default:
1931       vpanic("ppIRExpr");
1932   }
1933 }
1934
1935 void ppIREffect ( IREffect fx )
1936 {
1937    switch (fx) {
1938       case Ifx_None:   vex_printf("noFX"); return;
1939       case Ifx_Read:   vex_printf("RdFX"); return;
1940       case Ifx_Write:  vex_printf("WrFX"); return;
1941       case Ifx_Modify: vex_printf("MoFX"); return;
1942       default: vpanic("ppIREffect");
1943    }
1944 }
1945
1946 void ppIRDirty ( const IRDirty* d )
1947 {
1948    Int i;
1949    if (d->tmp != IRTemp_INVALID) {
1950       ppIRTemp(d->tmp);
1951       vex_printf(" = ");
1952    }
1953    vex_printf("DIRTY ");
1954    ppIRExpr(d->guard);
1955    if (d->mFx != Ifx_None) {
1956       vex_printf(" ");
1957       ppIREffect(d->mFx);
1958       vex_printf("-mem(");
1959       ppIRExpr(d->mAddr);
1960       vex_printf(",%d)", d->mSize);
1961    }
1962    for (i = 0; i < d->nFxState; i++) {
1963       vex_printf(" ");
1964       ppIREffect(d->fxState[i].fx);
1965       vex_printf("-gst(%u,%u", (UInt)d->fxState[i].offset,
1966                                (UInt)d->fxState[i].size);
1967       if (d->fxState[i].nRepeats > 0) {
1968          vex_printf(",reps%u,step%u", (UInt)d->fxState[i].nRepeats,
1969                                       (UInt)d->fxState[i].repeatLen);
1970       }
1971       vex_printf(")");
1972    }
1973    vex_printf(" ::: ");
1974    ppIRCallee(d->cee);
1975    vex_printf("(");
1976    for (i = 0; d->args[i] != NULL; i++) {
1977       IRExpr* arg = d->args[i];
1978       ppIRExpr(arg);
1979
1980       if (d->args[i+1] != NULL) {
1981          vex_printf(",");
1982       }
1983    }
1984    vex_printf(")");
1985 }
1986
1987 void ppIRCAS ( const IRCAS* cas )
1988 {
1989    /* Print even structurally invalid constructions, as an aid to
1990       debugging. */
1991    if (cas->oldHi != IRTemp_INVALID) {
1992       ppIRTemp(cas->oldHi);
1993       vex_printf(",");
1994    }
1995    ppIRTemp(cas->oldLo);
1996    vex_printf(" = CAS%s(", cas->end==Iend_LE ? "le" : "be" );
1997    ppIRExpr(cas->addr);
1998    vex_printf("::");
1999    if (cas->expdHi) {
2000       ppIRExpr(cas->expdHi);
2001       vex_printf(",");
2002    }
2003    ppIRExpr(cas->expdLo);
2004    vex_printf("->");
2005    if (cas->dataHi) {
2006       ppIRExpr(cas->dataHi);
2007       vex_printf(",");
2008    }
2009    ppIRExpr(cas->dataLo);
2010    vex_printf(")");
2011 }
2012
2013 void ppIRPutI ( const IRPutI* puti )
2014 {
2015    vex_printf( "PUTI" );
2016    ppIRRegArray(puti->descr);
2017    vex_printf("[");
2018    ppIRExpr(puti->ix);
2019    vex_printf(",%d] = ", puti->bias);
2020    ppIRExpr(puti->data);
2021 }
2022
2023 void ppIRStoreG ( const IRStoreG* sg )
2024 {
2025    vex_printf("if (");
2026    ppIRExpr(sg->guard);
2027    vex_printf(") { ST%s(", sg->end==Iend_LE ? "le" : "be");
2028    ppIRExpr(sg->addr);
2029    vex_printf(") = ");
2030    ppIRExpr(sg->data);
2031    vex_printf(" }");
2032 }
2033
2034 void ppIRLoadGOp ( IRLoadGOp cvt )
2035 {
2036    switch (cvt) {
2037       case ILGop_INVALID:   vex_printf("ILGop_INVALID"); break;
2038       case ILGop_IdentV128: vex_printf("IdentV128"); break;
2039       case ILGop_Ident64:   vex_printf("Ident64"); break;
2040       case ILGop_Ident32:   vex_printf("Ident32"); break;
2041       case ILGop_16Uto32:   vex_printf("16Uto32"); break;
2042       case ILGop_16Sto32:   vex_printf("16Sto32"); break;
2043       case ILGop_8Uto32:    vex_printf("8Uto32"); break;
2044       case ILGop_8Sto32:    vex_printf("8Sto32"); break;
2045       default: vpanic("ppIRLoadGOp");
2046    }
2047 }
2048
2049 void ppIRLoadG ( const IRLoadG* lg )
2050 {
2051    ppIRTemp(lg->dst);
2052    vex_printf(" = if-strict (");
2053    ppIRExpr(lg->guard);
2054    vex_printf(") ");
2055    ppIRLoadGOp(lg->cvt);
2056    vex_printf("(LD%s(", lg->end==Iend_LE ? "le" : "be");
2057    ppIRExpr(lg->addr);
2058    vex_printf(")) else ");
2059    ppIRExpr(lg->alt);
2060 }
2061
2062 void ppIRJumpKind ( IRJumpKind kind )
2063 {
2064    switch (kind) {
2065       case Ijk_Boring:        vex_printf("Boring"); break;
2066       case Ijk_Call:          vex_printf("Call"); break;
2067       case Ijk_Ret:           vex_printf("Return"); break;
2068       case Ijk_ClientReq:     vex_printf("ClientReq"); break;
2069       case Ijk_Yield:         vex_printf("Yield"); break;
2070       case Ijk_EmWarn:        vex_printf("EmWarn"); break;
2071       case Ijk_EmFail:        vex_printf("EmFail"); break;
2072       case Ijk_NoDecode:      vex_printf("NoDecode"); break;
2073       case Ijk_MapFail:       vex_printf("MapFail"); break;
2074       case Ijk_InvalICache:   vex_printf("InvalICache"); break;
2075       case Ijk_FlushDCache:   vex_printf("FlushDCache"); break;
2076       case Ijk_NoRedir:       vex_printf("NoRedir"); break;
2077       case Ijk_SigILL:        vex_printf("SigILL"); break;
2078       case Ijk_SigTRAP:       vex_printf("SigTRAP"); break;
2079       case Ijk_SigSEGV:       vex_printf("SigSEGV"); break;
2080       case Ijk_SigBUS:        vex_printf("SigBUS"); break;
2081       case Ijk_SigFPE:        vex_printf("SigFPE"); break;
2082       case Ijk_SigFPE_IntDiv: vex_printf("SigFPE_IntDiv"); break;
2083       case Ijk_SigFPE_IntOvf: vex_printf("SigFPE_IntOvf"); break;
2084       case Ijk_Sys_syscall:   vex_printf("Sys_syscall"); break;
2085       case Ijk_Sys_int32:     vex_printf("Sys_int32"); break;
2086       case Ijk_Sys_int128:    vex_printf("Sys_int128"); break;
2087       case Ijk_Sys_int129:    vex_printf("Sys_int129"); break;
2088       case Ijk_Sys_int130:    vex_printf("Sys_int130"); break;
2089       case Ijk_Sys_int145:    vex_printf("Sys_int145"); break;
2090       case Ijk_Sys_int210:    vex_printf("Sys_int210"); break;
2091       case Ijk_Sys_sysenter:  vex_printf("Sys_sysenter"); break;
2092       case Ijk_Extension:     vex_printf("Extension"); break;
2093       default:                vpanic("ppIRJumpKind");
2094    }
2095 }
2096
2097 void ppIRMBusEvent ( IRMBusEvent event )
2098 {
2099    switch (event) {
2100       case Imbe_Fence:
2101          vex_printf("Fence"); break;
2102       case Imbe_CancelReservation:
2103          vex_printf("CancelReservation"); break;
2104       default:
2105          vpanic("ppIRMBusEvent");
2106    }
2107 }
2108
2109 void ppIRStmt ( const IRStmt* s )
2110 {
2111    if (!s) {
2112       vex_printf("!!! IRStmt* which is NULL !!!");
2113       return;
2114    }
2115    switch (s->tag) {
2116       case Ist_NoOp:
2117          vex_printf("IR-NoOp");
2118          break;
2119       case Ist_IMark:
2120          vex_printf( "------ IMark(0x%lx, %u, %u) ------",
2121                      s->Ist.IMark.addr, s->Ist.IMark.len,
2122                      (UInt)s->Ist.IMark.delta);
2123          break;
2124       case Ist_AbiHint:
2125          vex_printf("====== AbiHint(");
2126          ppIRExpr(s->Ist.AbiHint.base);
2127          vex_printf(", %d, ", s->Ist.AbiHint.len);
2128          ppIRExpr(s->Ist.AbiHint.nia);
2129          vex_printf(") ======");
2130          break;
2131       case Ist_Put:
2132          vex_printf( "PUT(%d) = ", s->Ist.Put.offset);
2133          ppIRExpr(s->Ist.Put.data);
2134          break;
2135       case Ist_PutI:
2136          ppIRPutI(s->Ist.PutI.details);
2137          break;
2138       case Ist_WrTmp:
2139          ppIRTemp(s->Ist.WrTmp.tmp);
2140          vex_printf( " = " );
2141          ppIRExpr(s->Ist.WrTmp.data);
2142          break;
2143       case Ist_Store:
2144          vex_printf( "ST%s(", s->Ist.Store.end==Iend_LE ? "le" : "be" );
2145          ppIRExpr(s->Ist.Store.addr);
2146          vex_printf( ") = ");
2147          ppIRExpr(s->Ist.Store.data);
2148          break;
2149       case Ist_StoreG:
2150          ppIRStoreG(s->Ist.StoreG.details);
2151          break;
2152       case Ist_LoadG:
2153          ppIRLoadG(s->Ist.LoadG.details);
2154          break;
2155       case Ist_CAS:
2156          ppIRCAS(s->Ist.CAS.details);
2157          break;
2158       case Ist_LLSC:
2159          if (s->Ist.LLSC.storedata == NULL) {
2160             ppIRTemp(s->Ist.LLSC.result);
2161             vex_printf(" = LD%s-Linked(",
2162                        s->Ist.LLSC.end==Iend_LE ? "le" : "be");
2163             ppIRExpr(s->Ist.LLSC.addr);
2164             vex_printf(")");
2165          } else {
2166             ppIRTemp(s->Ist.LLSC.result);
2167             vex_printf(" = ( ST%s-Cond(",
2168                        s->Ist.LLSC.end==Iend_LE ? "le" : "be");
2169             ppIRExpr(s->Ist.LLSC.addr);
2170             vex_printf(") = ");
2171             ppIRExpr(s->Ist.LLSC.storedata);
2172             vex_printf(" )");
2173          }
2174          break;
2175       case Ist_Dirty:
2176          ppIRDirty(s->Ist.Dirty.details);
2177          break;
2178       case Ist_MBE:
2179          vex_printf("IR-");
2180          ppIRMBusEvent(s->Ist.MBE.event);
2181          break;
2182       case Ist_Exit:
2183          vex_printf( "if (" );
2184          ppIRExpr(s->Ist.Exit.guard);
2185          vex_printf( ") { PUT(%d) = ", s->Ist.Exit.offsIP);
2186          ppIRConst(s->Ist.Exit.dst);
2187          vex_printf("; exit-");
2188          ppIRJumpKind(s->Ist.Exit.jk);
2189          vex_printf(" } ");
2190          break;
2191       default:
2192          vpanic("ppIRStmt");
2193    }
2194 }
2195
2196 void ppIRTypeEnv ( const IRTypeEnv* env )
2197 {
2198    UInt i;
2199    for (i = 0; i < env->types_used; i++) {
2200       if (i % 8 == 0)
2201          vex_printf( "   ");
2202       ppIRTemp(i);
2203       vex_printf( ":");
2204       ppIRType(env->types[i]);
2205       if (i % 8 == 7)
2206          vex_printf( "\n");
2207       else
2208          vex_printf( "   ");
2209    }
2210    if (env->types_used > 0 && env->types_used % 8 != 7)
2211       vex_printf( "\n");
2212 }
2213
2214 void ppIRSB ( const IRSB* bb )
2215 {
2216    Int i;
2217    vex_printf("IRSB {\n");
2218    ppIRTypeEnv(bb->tyenv);
2219    vex_printf("\n");
2220    for (i = 0; i < bb->stmts_used; i++) {
2221       vex_printf( "   ");
2222       ppIRStmt(bb->stmts[i]);
2223       vex_printf( "\n");
2224    }
2225    vex_printf( "   PUT(%d) = ", bb->offsIP );
2226    ppIRExpr( bb->next );
2227    vex_printf( "; exit-");
2228    ppIRJumpKind(bb->jumpkind);
2229    vex_printf( "\n}\n");
2230 }
2231
2232
2233 /*---------------------------------------------------------------*/
2234 /*--- Constructors                                            ---*/
2235 /*---------------------------------------------------------------*/
2236
2237
2238 /* Constructors -- IRConst */
2239
2240 IRConst* IRConst_U1 ( Bool bit )
2241 {
2242    IRConst* c = LibVEX_Alloc_inline(sizeof(IRConst));
2243    c->tag     = Ico_U1;
2244    c->Ico.U1  = bit;
2245    /* call me paranoid; I don't care :-) */
2246    vassert(bit == False || bit == True);
2247    return c;
2248 }
2249 IRConst* IRConst_U8 ( UChar u8 )
2250 {
2251    IRConst* c = LibVEX_Alloc_inline(sizeof(IRConst));
2252    c->tag     = Ico_U8;
2253    c->Ico.U8  = u8;
2254    return c;
2255 }
2256 IRConst* IRConst_U16 ( UShort u16 )
2257 {
2258    IRConst* c = LibVEX_Alloc_inline(sizeof(IRConst));
2259    c->tag     = Ico_U16;
2260    c->Ico.U16 = u16;
2261    return c;
2262 }
2263 IRConst* IRConst_U32 ( UInt u32 )
2264 {
2265    IRConst* c = LibVEX_Alloc_inline(sizeof(IRConst));
2266    c->tag     = Ico_U32;
2267    c->Ico.U32 = u32;
2268    return c;
2269 }
2270 IRConst* IRConst_U64 ( ULong u64 )
2271 {
2272    IRConst* c = LibVEX_Alloc_inline(sizeof(IRConst));
2273    c->tag     = Ico_U64;
2274    c->Ico.U64 = u64;
2275    return c;
2276 }
2277 IRConst* IRConst_U128 ( UShort con )
2278 {
2279    IRConst* c  = LibVEX_Alloc_inline(sizeof(IRConst));
2280    c->tag      = Ico_U128;
2281    c->Ico.U128 = con;
2282    return c;
2283 }
2284 IRConst* IRConst_F32 ( Float f32 )
2285 {
2286    IRConst* c = LibVEX_Alloc_inline(sizeof(IRConst));
2287    c->tag     = Ico_F32;
2288    c->Ico.F32 = f32;
2289    return c;
2290 }
2291 IRConst* IRConst_F32i ( UInt f32i )
2292 {
2293    IRConst* c  = LibVEX_Alloc_inline(sizeof(IRConst));
2294    c->tag      = Ico_F32i;
2295    c->Ico.F32i = f32i;
2296    return c;
2297 }
2298 IRConst* IRConst_F64 ( Double f64 )
2299 {
2300    IRConst* c = LibVEX_Alloc_inline(sizeof(IRConst));
2301    c->tag     = Ico_F64;
2302    c->Ico.F64 = f64;
2303    return c;
2304 }
2305 IRConst* IRConst_F64i ( ULong f64i )
2306 {
2307    IRConst* c  = LibVEX_Alloc_inline(sizeof(IRConst));
2308    c->tag      = Ico_F64i;
2309    c->Ico.F64i = f64i;
2310    return c;
2311 }
2312 IRConst* IRConst_V128 ( UShort con )
2313 {
2314    IRConst* c  = LibVEX_Alloc_inline(sizeof(IRConst));
2315    c->tag      = Ico_V128;
2316    c->Ico.V128 = con;
2317    return c;
2318 }
2319 IRConst* IRConst_V256 ( UInt con )
2320 {
2321    IRConst* c  = LibVEX_Alloc_inline(sizeof(IRConst));
2322    c->tag      = Ico_V256;
2323    c->Ico.V256 = con;
2324    return c;
2325 }
2326
2327 /* Constructors -- IRCallee */
2328
2329 IRCallee* mkIRCallee ( Int regparms, const HChar* name, void* addr )
2330 {
2331    IRCallee* ce = LibVEX_Alloc_inline(sizeof(IRCallee));
2332    ce->regparms = regparms;
2333    ce->name     = name;
2334    ce->addr     = addr;
2335    ce->mcx_mask = 0;
2336    vassert(regparms >= 0 && regparms <= 3);
2337    vassert(name != NULL);
2338    vassert(addr != 0);
2339    return ce;
2340 }
2341
2342
2343 /* Constructors -- IRRegArray */
2344
2345 IRRegArray* mkIRRegArray ( Int base, IRType elemTy, Int nElems )
2346 {
2347    IRRegArray* arr = LibVEX_Alloc_inline(sizeof(IRRegArray));
2348    arr->base       = base;
2349    arr->elemTy     = elemTy;
2350    arr->nElems     = nElems;
2351    vassert(!(arr->base < 0 || arr->base > 10000 /* somewhat arbitrary */));
2352    vassert(!(arr->elemTy == Ity_I1));
2353    vassert(!(arr->nElems <= 0 || arr->nElems > 500 /* somewhat arbitrary */));
2354    return arr;
2355 }
2356
2357
2358 /* Constructors -- IRExpr */
2359
2360 IRExpr* IRExpr_Binder ( Int binder ) {
2361    IRExpr* e            = LibVEX_Alloc_inline(sizeof(IRExpr));
2362    e->tag               = Iex_Binder;
2363    e->Iex.Binder.binder = binder;
2364    return e;
2365 }
2366 IRExpr* IRExpr_Get ( Int off, IRType ty ) {
2367    IRExpr* e         = LibVEX_Alloc_inline(sizeof(IRExpr));
2368    e->tag            = Iex_Get;
2369    e->Iex.Get.offset = off;
2370    e->Iex.Get.ty     = ty;
2371    return e;
2372 }
2373 IRExpr* IRExpr_GetI ( IRRegArray* descr, IRExpr* ix, Int bias ) {
2374    IRExpr* e         = LibVEX_Alloc_inline(sizeof(IRExpr));
2375    e->tag            = Iex_GetI;
2376    e->Iex.GetI.descr = descr;
2377    e->Iex.GetI.ix    = ix;
2378    e->Iex.GetI.bias  = bias;
2379    return e;
2380 }
2381 IRExpr* IRExpr_RdTmp ( IRTemp tmp ) {
2382    IRExpr* e        = LibVEX_Alloc_inline(sizeof(IRExpr));
2383    e->tag           = Iex_RdTmp;
2384    e->Iex.RdTmp.tmp = tmp;
2385    return e;
2386 }
2387 IRExpr* IRExpr_Qop ( IROp op, IRExpr* arg1, IRExpr* arg2,
2388                               IRExpr* arg3, IRExpr* arg4 ) {
2389    IRExpr* e       = LibVEX_Alloc_inline(sizeof(IRExpr));
2390    IRQop*  qop     = LibVEX_Alloc_inline(sizeof(IRQop));
2391    qop->op         = op;
2392    qop->arg1       = arg1;
2393    qop->arg2       = arg2;
2394    qop->arg3       = arg3;
2395    qop->arg4       = arg4;
2396    e->tag          = Iex_Qop;
2397    e->Iex.Qop.details = qop;
2398    return e;
2399 }
2400 IRExpr* IRExpr_Triop  ( IROp op, IRExpr* arg1,
2401                                  IRExpr* arg2, IRExpr* arg3 ) {
2402    IRExpr*  e         = LibVEX_Alloc_inline(sizeof(IRExpr));
2403    IRTriop* triop     = LibVEX_Alloc_inline(sizeof(IRTriop));
2404    triop->op         = op;
2405    triop->arg1       = arg1;
2406    triop->arg2       = arg2;
2407    triop->arg3       = arg3;
2408    e->tag            = Iex_Triop;
2409    e->Iex.Triop.details = triop;
2410    return e;
2411 }
2412 IRExpr* IRExpr_Binop ( IROp op, IRExpr* arg1, IRExpr* arg2 ) {
2413    IRExpr* e         = LibVEX_Alloc_inline(sizeof(IRExpr));
2414    e->tag            = Iex_Binop;
2415    e->Iex.Binop.op   = op;
2416    e->Iex.Binop.arg1 = arg1;
2417    e->Iex.Binop.arg2 = arg2;
2418    return e;
2419 }
2420 IRExpr* IRExpr_Unop ( IROp op, IRExpr* arg ) {
2421    IRExpr* e       = LibVEX_Alloc_inline(sizeof(IRExpr));
2422    e->tag          = Iex_Unop;
2423    e->Iex.Unop.op  = op;
2424    e->Iex.Unop.arg = arg;
2425    return e;
2426 }
2427 IRExpr* IRExpr_Load ( IREndness end, IRType ty, IRExpr* addr ) {
2428    IRExpr* e        = LibVEX_Alloc_inline(sizeof(IRExpr));
2429    e->tag           = Iex_Load;
2430    e->Iex.Load.end  = end;
2431    e->Iex.Load.ty   = ty;
2432    e->Iex.Load.addr = addr;
2433    vassert(end == Iend_LE || end == Iend_BE);
2434    return e;
2435 }
2436 IRExpr* IRExpr_Const ( IRConst* con ) {
2437    IRExpr* e        = LibVEX_Alloc_inline(sizeof(IRExpr));
2438    e->tag           = Iex_Const;
2439    e->Iex.Const.con = con;
2440    return e;
2441 }
2442 IRExpr* IRExpr_CCall ( IRCallee* cee, IRType retty, IRExpr** args ) {
2443    IRExpr* e          = LibVEX_Alloc_inline(sizeof(IRExpr));
2444    e->tag             = Iex_CCall;
2445    e->Iex.CCall.cee   = cee;
2446    e->Iex.CCall.retty = retty;
2447    e->Iex.CCall.args  = args;
2448    return e;
2449 }
2450 IRExpr* IRExpr_ITE ( IRExpr* cond, IRExpr* iftrue, IRExpr* iffalse ) {
2451    IRExpr* e          = LibVEX_Alloc_inline(sizeof(IRExpr));
2452    e->tag             = Iex_ITE;
2453    e->Iex.ITE.cond    = cond;
2454    e->Iex.ITE.iftrue  = iftrue;
2455    e->Iex.ITE.iffalse = iffalse;
2456    return e;
2457 }
2458 IRExpr* IRExpr_VECRET ( void ) {
2459    IRExpr* e = LibVEX_Alloc_inline(sizeof(IRExpr));
2460    e->tag    = Iex_VECRET;
2461    return e;
2462 }
2463 IRExpr* IRExpr_GSPTR ( void ) {
2464    IRExpr* e = LibVEX_Alloc_inline(sizeof(IRExpr));
2465    e->tag    = Iex_GSPTR;
2466    return e;
2467 }
2468
2469
2470 /* Constructors for NULL-terminated IRExpr expression vectors,
2471    suitable for use as arg lists in clean/dirty helper calls. */
2472
2473 IRExpr** mkIRExprVec_0 ( void ) {
2474    IRExpr** vec = LibVEX_Alloc_inline(1 * sizeof(IRExpr*));
2475    vec[0] = NULL;
2476    return vec;
2477 }
2478 IRExpr** mkIRExprVec_1 ( IRExpr* arg1 ) {
2479    IRExpr** vec = LibVEX_Alloc_inline(2 * sizeof(IRExpr*));
2480    vec[0] = arg1;
2481    vec[1] = NULL;
2482    return vec;
2483 }
2484 IRExpr** mkIRExprVec_2 ( IRExpr* arg1, IRExpr* arg2 ) {
2485    IRExpr** vec = LibVEX_Alloc_inline(3 * sizeof(IRExpr*));
2486    vec[0] = arg1;
2487    vec[1] = arg2;
2488    vec[2] = NULL;
2489    return vec;
2490 }
2491 IRExpr** mkIRExprVec_3 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3 ) {
2492    IRExpr** vec = LibVEX_Alloc_inline(4 * sizeof(IRExpr*));
2493    vec[0] = arg1;
2494    vec[1] = arg2;
2495    vec[2] = arg3;
2496    vec[3] = NULL;
2497    return vec;
2498 }
2499 IRExpr** mkIRExprVec_4 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3,
2500                          IRExpr* arg4 ) {
2501    IRExpr** vec = LibVEX_Alloc_inline(5 * sizeof(IRExpr*));
2502    vec[0] = arg1;
2503    vec[1] = arg2;
2504    vec[2] = arg3;
2505    vec[3] = arg4;
2506    vec[4] = NULL;
2507    return vec;
2508 }
2509 IRExpr** mkIRExprVec_5 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3,
2510                          IRExpr* arg4, IRExpr* arg5 ) {
2511    IRExpr** vec = LibVEX_Alloc_inline(6 * sizeof(IRExpr*));
2512    vec[0] = arg1;
2513    vec[1] = arg2;
2514    vec[2] = arg3;
2515    vec[3] = arg4;
2516    vec[4] = arg5;
2517    vec[5] = NULL;
2518    return vec;
2519 }
2520 IRExpr** mkIRExprVec_6 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3,
2521                          IRExpr* arg4, IRExpr* arg5, IRExpr* arg6 ) {
2522    IRExpr** vec = LibVEX_Alloc_inline(7 * sizeof(IRExpr*));
2523    vec[0] = arg1;
2524    vec[1] = arg2;
2525    vec[2] = arg3;
2526    vec[3] = arg4;
2527    vec[4] = arg5;
2528    vec[5] = arg6;
2529    vec[6] = NULL;
2530    return vec;
2531 }
2532 IRExpr** mkIRExprVec_7 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3,
2533                          IRExpr* arg4, IRExpr* arg5, IRExpr* arg6,
2534                          IRExpr* arg7 ) {
2535    IRExpr** vec = LibVEX_Alloc_inline(8 * sizeof(IRExpr*));
2536    vec[0] = arg1;
2537    vec[1] = arg2;
2538    vec[2] = arg3;
2539    vec[3] = arg4;
2540    vec[4] = arg5;
2541    vec[5] = arg6;
2542    vec[6] = arg7;
2543    vec[7] = NULL;
2544    return vec;
2545 }
2546 IRExpr** mkIRExprVec_8 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3,
2547                          IRExpr* arg4, IRExpr* arg5, IRExpr* arg6,
2548                          IRExpr* arg7, IRExpr* arg8 ) {
2549    IRExpr** vec = LibVEX_Alloc_inline(9 * sizeof(IRExpr*));
2550    vec[0] = arg1;
2551    vec[1] = arg2;
2552    vec[2] = arg3;
2553    vec[3] = arg4;
2554    vec[4] = arg5;
2555    vec[5] = arg6;
2556    vec[6] = arg7;
2557    vec[7] = arg8;
2558    vec[8] = NULL;
2559    return vec;
2560 }
2561 IRExpr** mkIRExprVec_9 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3,
2562                          IRExpr* arg4, IRExpr* arg5, IRExpr* arg6,
2563                          IRExpr* arg7, IRExpr* arg8, IRExpr* arg9 ) {
2564    IRExpr** vec = LibVEX_Alloc_inline(10 * sizeof(IRExpr*));
2565    vec[0] = arg1;
2566    vec[1] = arg2;
2567    vec[2] = arg3;
2568    vec[3] = arg4;
2569    vec[4] = arg5;
2570    vec[5] = arg6;
2571    vec[6] = arg7;
2572    vec[7] = arg8;
2573    vec[8] = arg9;
2574    vec[9] = NULL;
2575    return vec;
2576 }
2577 IRExpr** mkIRExprVec_13 ( IRExpr* arg1,  IRExpr* arg2,  IRExpr* arg3,
2578                           IRExpr* arg4,  IRExpr* arg5,  IRExpr* arg6,
2579                           IRExpr* arg7,  IRExpr* arg8,  IRExpr* arg9,
2580                           IRExpr* arg10, IRExpr* arg11, IRExpr* arg12,
2581                           IRExpr* arg13
2582  ) {
2583    IRExpr** vec = LibVEX_Alloc_inline(14 * sizeof(IRExpr*));
2584    vec[0]  = arg1;
2585    vec[1]  = arg2;
2586    vec[2]  = arg3;
2587    vec[3]  = arg4;
2588    vec[4]  = arg5;
2589    vec[5]  = arg6;
2590    vec[6]  = arg7;
2591    vec[7]  = arg8;
2592    vec[8]  = arg9;
2593    vec[9]  = arg10;
2594    vec[10] = arg11;
2595    vec[11] = arg12;
2596    vec[12] = arg13;
2597    vec[13] = NULL;
2598    return vec;
2599 }
2600
2601
2602 /* Constructors -- IRDirty */
2603
2604 IRDirty* emptyIRDirty ( void ) {
2605    IRDirty* d = LibVEX_Alloc_inline(sizeof(IRDirty));
2606    d->cee      = NULL;
2607    d->guard    = NULL;
2608    d->args     = NULL;
2609    d->tmp      = IRTemp_INVALID;
2610    d->mFx      = Ifx_None;
2611    d->mAddr    = NULL;
2612    d->mSize    = 0;
2613    d->nFxState = 0;
2614    return d;
2615 }
2616
2617
2618 /* Constructors -- IRCAS */
2619
2620 IRCAS* mkIRCAS ( IRTemp oldHi, IRTemp oldLo,
2621                  IREndness end, IRExpr* addr,
2622                  IRExpr* expdHi, IRExpr* expdLo,
2623                  IRExpr* dataHi, IRExpr* dataLo ) {
2624    IRCAS* cas = LibVEX_Alloc_inline(sizeof(IRCAS));
2625    cas->oldHi  = oldHi;
2626    cas->oldLo  = oldLo;
2627    cas->end    = end;
2628    cas->addr   = addr;
2629    cas->expdHi = expdHi;
2630    cas->expdLo = expdLo;
2631    cas->dataHi = dataHi;
2632    cas->dataLo = dataLo;
2633    return cas;
2634 }
2635
2636
2637 /* Constructors -- IRPutI */
2638
2639 IRPutI* mkIRPutI ( IRRegArray* descr, IRExpr* ix,
2640                    Int bias, IRExpr* data )
2641 {
2642    IRPutI* puti = LibVEX_Alloc_inline(sizeof(IRPutI));
2643    puti->descr  = descr;
2644    puti->ix     = ix;
2645    puti->bias   = bias;
2646    puti->data   = data;
2647    return puti;
2648 }
2649
2650
2651 /* Constructors -- IRStoreG and IRLoadG */
2652
2653 IRStoreG* mkIRStoreG ( IREndness end,
2654                        IRExpr* addr, IRExpr* data, IRExpr* guard )
2655 {
2656    IRStoreG* sg = LibVEX_Alloc_inline(sizeof(IRStoreG));
2657    sg->end      = end;
2658    sg->addr     = addr;
2659    sg->data     = data;
2660    sg->guard    = guard;
2661    return sg;
2662 }
2663
2664 IRLoadG* mkIRLoadG ( IREndness end, IRLoadGOp cvt,
2665                      IRTemp dst, IRExpr* addr, IRExpr* alt, IRExpr* guard )
2666 {
2667    IRLoadG* lg = LibVEX_Alloc_inline(sizeof(IRLoadG));
2668    lg->end     = end;
2669    lg->cvt     = cvt;
2670    lg->dst     = dst;
2671    lg->addr    = addr;
2672    lg->alt     = alt;
2673    lg->guard   = guard;
2674    return lg;
2675 }
2676
2677
2678 /* Constructors -- IRStmt */
2679
2680 IRStmt* IRStmt_NoOp ( void )
2681 {
2682    /* Just use a single static closure. */
2683    static IRStmt static_closure;
2684    static_closure.tag = Ist_NoOp;
2685    return &static_closure;
2686 }
2687 IRStmt* IRStmt_IMark ( Addr addr, UInt len, UChar delta ) {
2688    IRStmt* s          = LibVEX_Alloc_inline(sizeof(IRStmt));
2689    s->tag             = Ist_IMark;
2690    s->Ist.IMark.addr  = addr;
2691    s->Ist.IMark.len   = len;
2692    s->Ist.IMark.delta = delta;
2693    return s;
2694 }
2695 IRStmt* IRStmt_AbiHint ( IRExpr* base, Int len, IRExpr* nia ) {
2696    IRStmt* s           = LibVEX_Alloc_inline(sizeof(IRStmt));
2697    s->tag              = Ist_AbiHint;
2698    s->Ist.AbiHint.base = base;
2699    s->Ist.AbiHint.len  = len;
2700    s->Ist.AbiHint.nia  = nia;
2701    return s;
2702 }
2703 IRStmt* IRStmt_Put ( Int off, IRExpr* data ) {
2704    IRStmt* s         = LibVEX_Alloc_inline(sizeof(IRStmt));
2705    s->tag            = Ist_Put;
2706    s->Ist.Put.offset = off;
2707    s->Ist.Put.data   = data;
2708    return s;
2709 }
2710 IRStmt* IRStmt_PutI ( IRPutI* details ) {
2711    IRStmt* s          = LibVEX_Alloc_inline(sizeof(IRStmt));
2712    s->tag             = Ist_PutI;
2713    s->Ist.PutI.details = details;
2714    return s;
2715 }
2716 IRStmt* IRStmt_WrTmp ( IRTemp tmp, IRExpr* data ) {
2717    IRStmt* s         = LibVEX_Alloc_inline(sizeof(IRStmt));
2718    s->tag            = Ist_WrTmp;
2719    s->Ist.WrTmp.tmp  = tmp;
2720    s->Ist.WrTmp.data = data;
2721    return s;
2722 }
2723 IRStmt* IRStmt_Store ( IREndness end, IRExpr* addr, IRExpr* data ) {
2724    IRStmt* s         = LibVEX_Alloc_inline(sizeof(IRStmt));
2725    s->tag            = Ist_Store;
2726    s->Ist.Store.end  = end;
2727    s->Ist.Store.addr = addr;
2728    s->Ist.Store.data = data;
2729    vassert(end == Iend_LE || end == Iend_BE);
2730    return s;
2731 }
2732 IRStmt* IRStmt_StoreG ( IREndness end, IRExpr* addr, IRExpr* data,
2733                         IRExpr* guard ) {
2734    IRStmt* s             = LibVEX_Alloc_inline(sizeof(IRStmt));
2735    s->tag                = Ist_StoreG;
2736    s->Ist.StoreG.details = mkIRStoreG(end, addr, data, guard);
2737    vassert(end == Iend_LE || end == Iend_BE);
2738    return s;
2739 }
2740 IRStmt* IRStmt_LoadG ( IREndness end, IRLoadGOp cvt, IRTemp dst,
2741                        IRExpr* addr, IRExpr* alt, IRExpr* guard ) {
2742    IRStmt* s            = LibVEX_Alloc_inline(sizeof(IRStmt));
2743    s->tag               = Ist_LoadG;
2744    s->Ist.LoadG.details = mkIRLoadG(end, cvt, dst, addr, alt, guard);
2745    return s;
2746 }
2747 IRStmt* IRStmt_CAS ( IRCAS* cas ) {
2748    IRStmt* s          = LibVEX_Alloc_inline(sizeof(IRStmt));
2749    s->tag             = Ist_CAS;
2750    s->Ist.CAS.details = cas;
2751    return s;
2752 }
2753 IRStmt* IRStmt_LLSC ( IREndness end,
2754                       IRTemp result, IRExpr* addr, IRExpr* storedata ) {
2755    IRStmt* s = LibVEX_Alloc_inline(sizeof(IRStmt));
2756    s->tag                = Ist_LLSC;
2757    s->Ist.LLSC.end       = end;
2758    s->Ist.LLSC.result    = result;
2759    s->Ist.LLSC.addr      = addr;
2760    s->Ist.LLSC.storedata = storedata;
2761    return s;
2762 }
2763 IRStmt* IRStmt_Dirty ( IRDirty* d )
2764 {
2765    IRStmt* s            = LibVEX_Alloc_inline(sizeof(IRStmt));
2766    s->tag               = Ist_Dirty;
2767    s->Ist.Dirty.details = d;
2768    return s;
2769 }
2770 IRStmt* IRStmt_MBE ( IRMBusEvent event )
2771 {
2772    IRStmt* s        = LibVEX_Alloc_inline(sizeof(IRStmt));
2773    s->tag           = Ist_MBE;
2774    s->Ist.MBE.event = event;
2775    return s;
2776 }
2777 IRStmt* IRStmt_Exit ( IRExpr* guard, IRJumpKind jk, IRConst* dst,
2778                       Int offsIP ) {
2779    IRStmt* s          = LibVEX_Alloc_inline(sizeof(IRStmt));
2780    s->tag             = Ist_Exit;
2781    s->Ist.Exit.guard  = guard;
2782    s->Ist.Exit.jk     = jk;
2783    s->Ist.Exit.dst    = dst;
2784    s->Ist.Exit.offsIP = offsIP;
2785    return s;
2786 }
2787
2788
2789 /* Constructors -- IRTypeEnv */
2790
2791 IRTypeEnv* emptyIRTypeEnv ( void )
2792 {
2793    IRTypeEnv* env   = LibVEX_Alloc_inline(sizeof(IRTypeEnv));
2794    env->types       = LibVEX_Alloc_inline(8 * sizeof(IRType));
2795    env->types_size  = 8;
2796    env->types_used  = 0;
2797    return env;
2798 }
2799
2800
2801 /* Constructors -- IRSB */
2802
2803 IRSB* emptyIRSB ( void )
2804 {
2805    IRSB* bb       = LibVEX_Alloc_inline(sizeof(IRSB));
2806    bb->tyenv      = emptyIRTypeEnv();
2807    bb->stmts_used = 0;
2808    bb->stmts_size = 8;
2809    bb->stmts      = LibVEX_Alloc_inline(bb->stmts_size * sizeof(IRStmt*));
2810    bb->next       = NULL;
2811    bb->jumpkind   = Ijk_Boring;
2812    bb->offsIP     = 0;
2813    return bb;
2814 }
2815
2816
2817 /*---------------------------------------------------------------*/
2818 /*--- (Deep) copy constructors.  These make complete copies   ---*/
2819 /*--- the original, which can be modified without affecting   ---*/
2820 /*--- the original.                                           ---*/
2821 /*---------------------------------------------------------------*/
2822
2823 /* Copying IR Expr vectors (for call args). */
2824
2825 /* Shallow copy of an IRExpr vector */
2826
2827 IRExpr** shallowCopyIRExprVec ( IRExpr** vec )
2828 {
2829    Int      i;
2830    IRExpr** newvec;
2831    for (i = 0; vec[i]; i++)
2832       ;
2833    newvec = LibVEX_Alloc_inline((i+1)*sizeof(IRExpr*));
2834    for (i = 0; vec[i]; i++)
2835       newvec[i] = vec[i];
2836    newvec[i] = NULL;
2837    return newvec;
2838 }
2839
2840 /* Deep copy of an IRExpr vector */
2841
2842 IRExpr** deepCopyIRExprVec ( IRExpr *const * vec )
2843 {
2844    Int      i;
2845    IRExpr** newvec;
2846    for (i = 0; vec[i]; i++)
2847       ;
2848    newvec = LibVEX_Alloc_inline((i+1)*sizeof(IRExpr*));
2849    for (i = 0; vec[i]; i++)
2850       newvec[i] = deepCopyIRExpr(vec[i]);
2851    newvec[i] = NULL;
2852    return newvec;
2853 }
2854
2855 /* Deep copy constructors for all heap-allocated IR types follow. */
2856
2857 IRConst* deepCopyIRConst ( const IRConst* c )
2858 {
2859    switch (c->tag) {
2860       case Ico_U1:   return IRConst_U1(c->Ico.U1);
2861       case Ico_U8:   return IRConst_U8(c->Ico.U8);
2862       case Ico_U16:  return IRConst_U16(c->Ico.U16);
2863       case Ico_U32:  return IRConst_U32(c->Ico.U32);
2864       case Ico_U64:  return IRConst_U64(c->Ico.U64);
2865       case Ico_F32:  return IRConst_F32(c->Ico.F32);
2866       case Ico_F32i: return IRConst_F32i(c->Ico.F32i);
2867       case Ico_F64:  return IRConst_F64(c->Ico.F64);
2868       case Ico_F64i: return IRConst_F64i(c->Ico.F64i);
2869       case Ico_V128: return IRConst_V128(c->Ico.V128);
2870       case Ico_V256: return IRConst_V256(c->Ico.V256);
2871       default: vpanic("deepCopyIRConst");
2872    }
2873 }
2874
2875 IRCallee* deepCopyIRCallee ( const IRCallee* ce )
2876 {
2877    IRCallee* ce2 = mkIRCallee(ce->regparms, ce->name, ce->addr);
2878    ce2->mcx_mask = ce->mcx_mask;
2879    return ce2;
2880 }
2881
2882 IRRegArray* deepCopyIRRegArray ( const IRRegArray* d )
2883 {
2884    return mkIRRegArray(d->base, d->elemTy, d->nElems);
2885 }
2886
2887 IRExpr* deepCopyIRExpr ( const IRExpr* e )
2888 {
2889    switch (e->tag) {
2890       case Iex_Get:
2891          return IRExpr_Get(e->Iex.Get.offset, e->Iex.Get.ty);
2892       case Iex_GetI:
2893          return IRExpr_GetI(deepCopyIRRegArray(e->Iex.GetI.descr),
2894                             deepCopyIRExpr(e->Iex.GetI.ix),
2895                             e->Iex.GetI.bias);
2896       case Iex_RdTmp:
2897          return IRExpr_RdTmp(e->Iex.RdTmp.tmp);
2898       case Iex_Qop: {
2899          const IRQop* qop = e->Iex.Qop.details;
2900
2901          return IRExpr_Qop(qop->op,
2902                            deepCopyIRExpr(qop->arg1),
2903                            deepCopyIRExpr(qop->arg2),
2904                            deepCopyIRExpr(qop->arg3),
2905                            deepCopyIRExpr(qop->arg4));
2906       }
2907       case Iex_Triop:  {
2908          const IRTriop *triop = e->Iex.Triop.details;
2909
2910          return IRExpr_Triop(triop->op,
2911                              deepCopyIRExpr(triop->arg1),
2912                              deepCopyIRExpr(triop->arg2),
2913                              deepCopyIRExpr(triop->arg3));
2914       }
2915       case Iex_Binop:
2916          return IRExpr_Binop(e->Iex.Binop.op,
2917                              deepCopyIRExpr(e->Iex.Binop.arg1),
2918                              deepCopyIRExpr(e->Iex.Binop.arg2));
2919       case Iex_Unop:
2920          return IRExpr_Unop(e->Iex.Unop.op,
2921                             deepCopyIRExpr(e->Iex.Unop.arg));
2922       case Iex_Load:
2923          return IRExpr_Load(e->Iex.Load.end,
2924                             e->Iex.Load.ty,
2925                             deepCopyIRExpr(e->Iex.Load.addr));
2926       case Iex_Const:
2927          return IRExpr_Const(deepCopyIRConst(e->Iex.Const.con));
2928       case Iex_CCall:
2929          return IRExpr_CCall(deepCopyIRCallee(e->Iex.CCall.cee),
2930                              e->Iex.CCall.retty,
2931                              deepCopyIRExprVec(e->Iex.CCall.args));
2932
2933       case Iex_ITE:
2934          return IRExpr_ITE(deepCopyIRExpr(e->Iex.ITE.cond),
2935                            deepCopyIRExpr(e->Iex.ITE.iftrue),
2936                            deepCopyIRExpr(e->Iex.ITE.iffalse));
2937       case Iex_VECRET:
2938          return IRExpr_VECRET();
2939
2940       case Iex_GSPTR:
2941          return IRExpr_GSPTR();
2942
2943       case Iex_Binder:
2944          return IRExpr_Binder(e->Iex.Binder.binder);
2945
2946       default:
2947          vpanic("deepCopyIRExpr");
2948    }
2949 }
2950
2951 IRDirty* deepCopyIRDirty ( const IRDirty* d )
2952 {
2953    Int      i;
2954    IRDirty* d2 = emptyIRDirty();
2955    d2->cee   = deepCopyIRCallee(d->cee);
2956    d2->guard = deepCopyIRExpr(d->guard);
2957    d2->args  = deepCopyIRExprVec(d->args);
2958    d2->tmp   = d->tmp;
2959    d2->mFx   = d->mFx;
2960    d2->mAddr = d->mAddr==NULL ? NULL : deepCopyIRExpr(d->mAddr);
2961    d2->mSize = d->mSize;
2962    d2->nFxState = d->nFxState;
2963    for (i = 0; i < d2->nFxState; i++)
2964       d2->fxState[i] = d->fxState[i];
2965    return d2;
2966 }
2967
2968 IRCAS* deepCopyIRCAS ( const IRCAS* cas )
2969 {
2970    return mkIRCAS( cas->oldHi, cas->oldLo, cas->end,
2971                    deepCopyIRExpr(cas->addr),
2972                    cas->expdHi==NULL ? NULL : deepCopyIRExpr(cas->expdHi),
2973                    deepCopyIRExpr(cas->expdLo),
2974                    cas->dataHi==NULL ? NULL : deepCopyIRExpr(cas->dataHi),
2975                    deepCopyIRExpr(cas->dataLo) );
2976 }
2977
2978 IRPutI* deepCopyIRPutI ( const IRPutI * puti )
2979 {
2980   return mkIRPutI( deepCopyIRRegArray(puti->descr),
2981                    deepCopyIRExpr(puti->ix),
2982                    puti->bias,
2983                    deepCopyIRExpr(puti->data));
2984 }
2985
2986 IRStmt* deepCopyIRStmt ( const IRStmt* s )
2987 {
2988    switch (s->tag) {
2989       case Ist_NoOp:
2990          return IRStmt_NoOp();
2991       case Ist_AbiHint:
2992          return IRStmt_AbiHint(deepCopyIRExpr(s->Ist.AbiHint.base),
2993                                s->Ist.AbiHint.len,
2994                                deepCopyIRExpr(s->Ist.AbiHint.nia));
2995       case Ist_IMark:
2996          return IRStmt_IMark(s->Ist.IMark.addr,
2997                              s->Ist.IMark.len,
2998                              s->Ist.IMark.delta);
2999       case Ist_Put:
3000          return IRStmt_Put(s->Ist.Put.offset,
3001                            deepCopyIRExpr(s->Ist.Put.data));
3002       case Ist_PutI:
3003          return IRStmt_PutI(deepCopyIRPutI(s->Ist.PutI.details));
3004       case Ist_WrTmp:
3005          return IRStmt_WrTmp(s->Ist.WrTmp.tmp,
3006                              deepCopyIRExpr(s->Ist.WrTmp.data));
3007       case Ist_Store:
3008          return IRStmt_Store(s->Ist.Store.end,
3009                              deepCopyIRExpr(s->Ist.Store.addr),
3010                              deepCopyIRExpr(s->Ist.Store.data));
3011       case Ist_StoreG: {
3012          const IRStoreG* sg = s->Ist.StoreG.details;
3013          return IRStmt_StoreG(sg->end,
3014                               deepCopyIRExpr(sg->addr),
3015                               deepCopyIRExpr(sg->data),
3016                               deepCopyIRExpr(sg->guard));
3017       }
3018       case Ist_LoadG: {
3019          const IRLoadG* lg = s->Ist.LoadG.details;
3020          return IRStmt_LoadG(lg->end, lg->cvt, lg->dst,
3021                              deepCopyIRExpr(lg->addr),
3022                              deepCopyIRExpr(lg->alt),
3023                              deepCopyIRExpr(lg->guard));
3024       }
3025       case Ist_CAS:
3026          return IRStmt_CAS(deepCopyIRCAS(s->Ist.CAS.details));
3027       case Ist_LLSC:
3028          return IRStmt_LLSC(s->Ist.LLSC.end,
3029                             s->Ist.LLSC.result,
3030                             deepCopyIRExpr(s->Ist.LLSC.addr),
3031                             s->Ist.LLSC.storedata
3032                                ? deepCopyIRExpr(s->Ist.LLSC.storedata)
3033                                : NULL);
3034       case Ist_Dirty:
3035          return IRStmt_Dirty(deepCopyIRDirty(s->Ist.Dirty.details));
3036       case Ist_MBE:
3037          return IRStmt_MBE(s->Ist.MBE.event);
3038       case Ist_Exit:
3039          return IRStmt_Exit(deepCopyIRExpr(s->Ist.Exit.guard),
3040                             s->Ist.Exit.jk,
3041                             deepCopyIRConst(s->Ist.Exit.dst),
3042                             s->Ist.Exit.offsIP);
3043       default:
3044          vpanic("deepCopyIRStmt");
3045    }
3046 }
3047
3048 IRTypeEnv* deepCopyIRTypeEnv ( const IRTypeEnv* src )
3049 {
3050    Int        i;
3051    IRTypeEnv* dst = LibVEX_Alloc_inline(sizeof(IRTypeEnv));
3052    dst->types_size = src->types_size;
3053    dst->types_used = src->types_used;
3054    dst->types = LibVEX_Alloc_inline(dst->types_size * sizeof(IRType));
3055    for (i = 0; i < src->types_used; i++)
3056       dst->types[i] = src->types[i];
3057    return dst;
3058 }
3059
3060 IRSB* deepCopyIRSB ( const IRSB* bb )
3061 {
3062    Int      i;
3063    IRStmt** sts2;
3064    IRSB* bb2 = deepCopyIRSBExceptStmts(bb);
3065    bb2->stmts_used = bb2->stmts_size = bb->stmts_used;
3066    sts2 = LibVEX_Alloc_inline(bb2->stmts_used * sizeof(IRStmt*));
3067    for (i = 0; i < bb2->stmts_used; i++)
3068       sts2[i] = deepCopyIRStmt(bb->stmts[i]);
3069    bb2->stmts = sts2;
3070    return bb2;
3071 }
3072
3073 IRSB* deepCopyIRSBExceptStmts ( const IRSB* bb )
3074 {
3075    IRSB* bb2     = emptyIRSB();
3076    bb2->tyenv    = deepCopyIRTypeEnv(bb->tyenv);
3077    bb2->next     = deepCopyIRExpr(bb->next);
3078    bb2->jumpkind = bb->jumpkind;
3079    bb2->offsIP   = bb->offsIP;
3080    return bb2;
3081 }
3082
3083
3084 /*---------------------------------------------------------------*/
3085 /*--- Primop types                                            ---*/
3086 /*---------------------------------------------------------------*/
3087
3088 void typeOfPrimop ( IROp op,
3089                     /*OUTs*/
3090                     IRType* t_dst,
3091                     IRType* t_arg1, IRType* t_arg2,
3092                     IRType* t_arg3, IRType* t_arg4 )
3093 {
3094 #  define UNARY(_ta1,_td)                                      \
3095       *t_dst = (_td); *t_arg1 = (_ta1); break
3096 #  define BINARY(_ta1,_ta2,_td)                                \
3097      *t_dst = (_td); *t_arg1 = (_ta1); *t_arg2 = (_ta2); break
3098 #  define TERNARY(_ta1,_ta2,_ta3,_td)                          \
3099      *t_dst = (_td); *t_arg1 = (_ta1);                         \
3100      *t_arg2 = (_ta2); *t_arg3 = (_ta3); break
3101 #  define QUATERNARY(_ta1,_ta2,_ta3,_ta4,_td)                  \
3102      *t_dst = (_td); *t_arg1 = (_ta1);                         \
3103      *t_arg2 = (_ta2); *t_arg3 = (_ta3);                       \
3104      *t_arg4 = (_ta4); break
3105 #  define COMPARISON(_ta)                                      \
3106      *t_dst = Ity_I1; *t_arg1 = *t_arg2 = (_ta); break;
3107 #  define UNARY_COMPARISON(_ta)                                \
3108      *t_dst = Ity_I1; *t_arg1 = (_ta); break;
3109
3110    /* Rounding mode values are always Ity_I32, encoded as per
3111       IRRoundingMode */
3112    const IRType ity_RMode = Ity_I32;
3113
3114    *t_dst  = Ity_INVALID;
3115    *t_arg1 = Ity_INVALID;
3116    *t_arg2 = Ity_INVALID;
3117    *t_arg3 = Ity_INVALID;
3118    *t_arg4 = Ity_INVALID;
3119    switch (op) {
3120       case Iop_Add8: case Iop_Sub8: case Iop_Mul8:
3121       case Iop_Or8:  case Iop_And8: case Iop_Xor8:
3122          BINARY(Ity_I8,Ity_I8, Ity_I8);
3123
3124       case Iop_Add16: case Iop_Sub16: case Iop_Mul16:
3125       case Iop_Or16:  case Iop_And16: case Iop_Xor16:
3126          BINARY(Ity_I16,Ity_I16, Ity_I16);
3127
3128       case Iop_CmpORD32U:
3129       case Iop_CmpORD32S:
3130       case Iop_Add32: case Iop_Sub32: case Iop_Mul32:
3131       case Iop_Or32:  case Iop_And32: case Iop_Xor32:
3132       case Iop_Max32U:
3133       case Iop_QAdd32S: case Iop_QSub32S:
3134       case Iop_Add16x2: case Iop_Sub16x2:
3135       case Iop_QAdd16Sx2: case Iop_QAdd16Ux2:
3136       case Iop_QSub16Sx2: case Iop_QSub16Ux2:
3137       case Iop_HAdd16Ux2: case Iop_HAdd16Sx2:
3138       case Iop_HSub16Ux2: case Iop_HSub16Sx2:
3139       case Iop_Add8x4: case Iop_Sub8x4:
3140       case Iop_QAdd8Sx4: case Iop_QAdd8Ux4:
3141       case Iop_QSub8Sx4: case Iop_QSub8Ux4:
3142       case Iop_HAdd8Ux4: case Iop_HAdd8Sx4:
3143       case Iop_HSub8Ux4: case Iop_HSub8Sx4:
3144       case Iop_Sad8Ux4:
3145          BINARY(Ity_I32,Ity_I32, Ity_I32);
3146
3147       case Iop_Add64: case Iop_Sub64: case Iop_Mul64:
3148       case Iop_Or64:  case Iop_And64: case Iop_Xor64:
3149       case Iop_CmpORD64U:
3150       case Iop_CmpORD64S:
3151       case Iop_Avg8Ux8: case Iop_Avg16Ux4:
3152       case Iop_Add8x8: case Iop_Add16x4: case Iop_Add32x2:
3153       case Iop_Add32Fx2: case Iop_Sub32Fx2:
3154       case Iop_CmpEQ8x8: case Iop_CmpEQ16x4: case Iop_CmpEQ32x2:
3155       case Iop_CmpGT8Sx8: case Iop_CmpGT16Sx4: case Iop_CmpGT32Sx2:
3156       case Iop_CmpGT8Ux8: case Iop_CmpGT16Ux4: case Iop_CmpGT32Ux2:
3157       case Iop_CmpGT32Fx2: case Iop_CmpEQ32Fx2: case Iop_CmpGE32Fx2:
3158       case Iop_InterleaveHI8x8: case Iop_InterleaveLO8x8:
3159       case Iop_InterleaveHI16x4: case Iop_InterleaveLO16x4:
3160       case Iop_InterleaveHI32x2: case Iop_InterleaveLO32x2:
3161       case Iop_CatOddLanes8x8: case Iop_CatEvenLanes8x8:
3162       case Iop_CatOddLanes16x4: case Iop_CatEvenLanes16x4:
3163       case Iop_InterleaveOddLanes8x8: case Iop_InterleaveEvenLanes8x8:
3164       case Iop_InterleaveOddLanes16x4: case Iop_InterleaveEvenLanes16x4:
3165       case Iop_Perm8x8: case Iop_PermOrZero8x8:
3166       case Iop_Max8Ux8: case Iop_Max16Ux4: case Iop_Max32Ux2:
3167       case Iop_Max8Sx8: case Iop_Max16Sx4: case Iop_Max32Sx2:
3168       case Iop_Max32Fx2: case Iop_Min32Fx2:
3169       case Iop_PwMax32Fx2: case Iop_PwMin32Fx2:
3170       case Iop_Min8Ux8: case Iop_Min16Ux4: case Iop_Min32Ux2:
3171       case Iop_Min8Sx8: case Iop_Min16Sx4: case Iop_Min32Sx2:
3172       case Iop_PwMax8Ux8: case Iop_PwMax16Ux4: case Iop_PwMax32Ux2:
3173       case Iop_PwMax8Sx8: case Iop_PwMax16Sx4: case Iop_PwMax32Sx2:
3174       case Iop_PwMin8Ux8: case Iop_PwMin16Ux4: case Iop_PwMin32Ux2:
3175       case Iop_PwMin8Sx8: case Iop_PwMin16Sx4: case Iop_PwMin32Sx2:
3176       case Iop_Mul8x8: case Iop_Mul16x4: case Iop_Mul32x2:
3177       case Iop_Mul32Fx2:
3178       case Iop_PolynomialMul8x8:
3179       case Iop_MulHi16Sx4: case Iop_MulHi16Ux4:
3180       case Iop_QDMulHi16Sx4: case Iop_QDMulHi32Sx2:
3181       case Iop_QRDMulHi16Sx4: case Iop_QRDMulHi32Sx2:
3182       case Iop_QAdd8Sx8: case Iop_QAdd16Sx4:
3183       case Iop_QAdd32Sx2: case Iop_QAdd64Sx1:
3184       case Iop_QAdd8Ux8: case Iop_QAdd16Ux4:
3185       case Iop_QAdd32Ux2: case Iop_QAdd64Ux1:
3186       case Iop_PwAdd8x8: case Iop_PwAdd16x4: case Iop_PwAdd32x2:
3187       case Iop_PwAdd32Fx2:
3188       case Iop_QNarrowBin32Sto16Sx4:
3189       case Iop_QNarrowBin16Sto8Sx8: case Iop_QNarrowBin16Sto8Ux8:
3190       case Iop_NarrowBin16to8x8: case Iop_NarrowBin32to16x4:
3191       case Iop_Sub8x8: case Iop_Sub16x4: case Iop_Sub32x2:
3192       case Iop_QSub8Sx8: case Iop_QSub16Sx4:
3193       case Iop_QSub32Sx2: case Iop_QSub64Sx1:
3194       case Iop_QSub8Ux8: case Iop_QSub16Ux4:
3195       case Iop_QSub32Ux2: case Iop_QSub64Ux1:
3196       case Iop_Shl8x8: case Iop_Shl16x4: case Iop_Shl32x2:
3197       case Iop_Shr8x8: case Iop_Shr16x4: case Iop_Shr32x2:
3198       case Iop_Sar8x8: case Iop_Sar16x4: case Iop_Sar32x2:
3199       case Iop_Sal8x8: case Iop_Sal16x4: case Iop_Sal32x2: case Iop_Sal64x1:
3200       case Iop_QShl8x8: case Iop_QShl16x4: case Iop_QShl32x2: case Iop_QShl64x1:
3201       case Iop_QSal8x8: case Iop_QSal16x4: case Iop_QSal32x2: case Iop_QSal64x1:
3202       case Iop_RecipStep32Fx2:
3203       case Iop_RSqrtStep32Fx2:
3204          BINARY(Ity_I64,Ity_I64, Ity_I64);
3205
3206       case Iop_ShlN32x2: case Iop_ShlN16x4: case Iop_ShlN8x8:
3207       case Iop_ShrN32x2: case Iop_ShrN16x4: case Iop_ShrN8x8:
3208       case Iop_SarN32x2: case Iop_SarN16x4: case Iop_SarN8x8:
3209       case Iop_QShlNsatUU8x8:  case Iop_QShlNsatUU16x4:
3210       case Iop_QShlNsatUU32x2: case Iop_QShlNsatUU64x1:
3211       case Iop_QShlNsatSU8x8:  case Iop_QShlNsatSU16x4:
3212       case Iop_QShlNsatSU32x2: case Iop_QShlNsatSU64x1:
3213       case Iop_QShlNsatSS8x8:  case Iop_QShlNsatSS16x4:
3214       case Iop_QShlNsatSS32x2: case Iop_QShlNsatSS64x1:
3215          BINARY(Ity_I64,Ity_I8, Ity_I64);
3216
3217       case Iop_Shl8: case Iop_Shr8: case Iop_Sar8:
3218          BINARY(Ity_I8,Ity_I8, Ity_I8);
3219       case Iop_Shl16: case Iop_Shr16: case Iop_Sar16:
3220          BINARY(Ity_I16,Ity_I8, Ity_I16);
3221       case Iop_Shl32: case Iop_Shr32: case Iop_Sar32:
3222          BINARY(Ity_I32,Ity_I8, Ity_I32);
3223       case Iop_Shl64: case Iop_Shr64: case Iop_Sar64:
3224          BINARY(Ity_I64,Ity_I8, Ity_I64);
3225
3226       case Iop_Not8:
3227          UNARY(Ity_I8, Ity_I8);
3228       case Iop_Not16:
3229          UNARY(Ity_I16, Ity_I16);
3230       case Iop_Not32:
3231       case Iop_CmpNEZ16x2: case Iop_CmpNEZ8x4:
3232       case Iop_Reverse8sIn32_x1:
3233          UNARY(Ity_I32, Ity_I32);
3234
3235       case Iop_Not64:
3236       case Iop_CmpNEZ32x2: case Iop_CmpNEZ16x4: case Iop_CmpNEZ8x8:
3237       case Iop_Cnt8x8:
3238       case Iop_Clz8x8: case Iop_Clz16x4: case Iop_Clz32x2:
3239       case Iop_Cls8x8: case Iop_Cls16x4: case Iop_Cls32x2:
3240       case Iop_PwAddL8Ux8: case Iop_PwAddL16Ux4: case Iop_PwAddL32Ux2:
3241       case Iop_PwAddL8Sx8: case Iop_PwAddL16Sx4: case Iop_PwAddL32Sx2:
3242       case Iop_Reverse8sIn64_x1: case Iop_Reverse16sIn64_x1:
3243       case Iop_Reverse32sIn64_x1:
3244       case Iop_Reverse8sIn32_x2: case Iop_Reverse16sIn32_x2:
3245       case Iop_Reverse8sIn16_x4:
3246       case Iop_F32toI32Sx2_RZ: case Iop_F32toI32Ux2_RZ:
3247       case Iop_I32StoF32x2_DEP: case Iop_I32UtoF32x2_DEP:
3248       case Iop_RecipEst32Ux2: case Iop_RecipEst32Fx2:
3249       case Iop_Abs32Fx2:
3250       case Iop_RSqrtEst32Fx2:
3251       case Iop_RSqrtEst32Ux2:
3252       case Iop_Neg32Fx2:
3253       case Iop_Abs8x8: case Iop_Abs16x4: case Iop_Abs32x2:
3254          UNARY(Ity_I64, Ity_I64);
3255
3256       case Iop_CmpEQ8: case Iop_CmpNE8:
3257       case Iop_CasCmpEQ8: case Iop_CasCmpNE8: case Iop_ExpCmpNE8:
3258          COMPARISON(Ity_I8);
3259       case Iop_CmpEQ16: case Iop_CmpNE16:
3260       case Iop_CasCmpEQ16: case Iop_CasCmpNE16: case Iop_ExpCmpNE16:
3261          COMPARISON(Ity_I16);
3262       case Iop_CmpEQ32: case Iop_CmpNE32:
3263       case Iop_CasCmpEQ32: case Iop_CasCmpNE32: case Iop_ExpCmpNE32:
3264       case Iop_CmpLT32S: case Iop_CmpLE32S:
3265       case Iop_CmpLT32U: case Iop_CmpLE32U:
3266          COMPARISON(Ity_I32);
3267       case Iop_CmpEQ64: case Iop_CmpNE64:
3268       case Iop_CasCmpEQ64: case Iop_CasCmpNE64: case Iop_ExpCmpNE64:
3269       case Iop_CmpLT64S: case Iop_CmpLE64S:
3270       case Iop_CmpLT64U: case Iop_CmpLE64U:
3271          COMPARISON(Ity_I64);
3272
3273       case Iop_CmpNEZ8:  UNARY_COMPARISON(Ity_I8);
3274       case Iop_CmpNEZ16: UNARY_COMPARISON(Ity_I16);
3275       case Iop_CmpNEZ32: UNARY_COMPARISON(Ity_I32);
3276       case Iop_CmpNEZ64: UNARY_COMPARISON(Ity_I64);
3277
3278       case Iop_Left8:  UNARY(Ity_I8, Ity_I8);
3279       case Iop_Left16: UNARY(Ity_I16,Ity_I16);
3280       case Iop_CmpwNEZ32: case Iop_Left32: UNARY(Ity_I32,Ity_I32);
3281       case Iop_CmpwNEZ64: case Iop_Left64: UNARY(Ity_I64,Ity_I64);
3282
3283       case Iop_GetMSBs8x8:  UNARY(Ity_I64, Ity_I8);
3284       case Iop_GetMSBs8x16: UNARY(Ity_V128, Ity_I16);
3285
3286       case Iop_MullU8: case Iop_MullS8:
3287          BINARY(Ity_I8,Ity_I8, Ity_I16);
3288       case Iop_MullU16: case Iop_MullS16:
3289          BINARY(Ity_I16,Ity_I16, Ity_I32);
3290       case Iop_MullU32: case Iop_MullS32:
3291          BINARY(Ity_I32,Ity_I32, Ity_I64);
3292       case Iop_MullU64: case Iop_MullS64:
3293          BINARY(Ity_I64,Ity_I64, Ity_I128);
3294
3295       case Iop_Clz32: case Iop_Ctz32:
3296       case Iop_ClzNat32: case Iop_CtzNat32:
3297       case Iop_PopCount32:
3298          UNARY(Ity_I32, Ity_I32);
3299
3300       case Iop_Clz64: case Iop_Ctz64:
3301       case Iop_ClzNat64: case Iop_CtzNat64:
3302       case Iop_PopCount64:
3303          UNARY(Ity_I64, Ity_I64);
3304
3305       case Iop_DivU32: case Iop_DivS32: case Iop_DivU32E: case Iop_DivS32E:
3306          BINARY(Ity_I32,Ity_I32, Ity_I32);
3307
3308       case Iop_DivU64: case Iop_DivS64: case Iop_DivS64E: case Iop_DivU64E:
3309          BINARY(Ity_I64,Ity_I64, Ity_I64);
3310
3311       case Iop_DivModU64to32: case Iop_DivModS64to32:
3312          BINARY(Ity_I64, Ity_I32, Ity_I64);
3313
3314       case Iop_DivModU32to32: case Iop_DivModS32to32:
3315          BINARY(Ity_I32, Ity_I32, Ity_I64);
3316
3317       case Iop_DivModU128to64: case Iop_DivModS128to64:
3318          BINARY(Ity_I128,Ity_I64, Ity_I128);
3319
3320       case Iop_DivModU64to64: case Iop_DivModS64to64:
3321          BINARY(Ity_I64,Ity_I64, Ity_I128);
3322
3323       case Iop_16HIto8: case Iop_16to8:
3324          UNARY(Ity_I16, Ity_I8);
3325       case Iop_8HLto16:
3326          BINARY(Ity_I8,Ity_I8, Ity_I16);
3327
3328       case Iop_32HIto16: case Iop_32to16:
3329          UNARY(Ity_I32, Ity_I16);
3330       case Iop_16HLto32:
3331          BINARY(Ity_I16,Ity_I16, Ity_I32);
3332
3333       case Iop_64HIto32: case Iop_64to32:
3334          UNARY(Ity_I64, Ity_I32);
3335       case Iop_32HLto64:
3336          BINARY(Ity_I32,Ity_I32, Ity_I64);
3337
3338       case Iop_128HIto64: case Iop_128to64:
3339          UNARY(Ity_I128, Ity_I64);
3340       case Iop_64HLto128:
3341          BINARY(Ity_I64,Ity_I64, Ity_I128);
3342
3343       case Iop_Not1:
3344          UNARY(Ity_I1, Ity_I1);
3345       case Iop_And1:
3346       case Iop_Or1:
3347          BINARY(Ity_I1,Ity_I1, Ity_I1);
3348
3349       case Iop_1Uto8:  UNARY(Ity_I1, Ity_I8);
3350       case Iop_1Sto8:  UNARY(Ity_I1, Ity_I8);
3351       case Iop_1Sto16: UNARY(Ity_I1, Ity_I16);
3352       case Iop_1Uto32: case Iop_1Sto32: UNARY(Ity_I1, Ity_I32);
3353       case Iop_1Sto64: case Iop_1Uto64: UNARY(Ity_I1, Ity_I64);
3354       case Iop_32to1:  UNARY(Ity_I32, Ity_I1);
3355       case Iop_64to1:  UNARY(Ity_I64, Ity_I1);
3356
3357       case Iop_8Uto32: case Iop_8Sto32:
3358          UNARY(Ity_I8, Ity_I32);
3359
3360       case Iop_8Uto16: case Iop_8Sto16:
3361          UNARY(Ity_I8, Ity_I16);
3362
3363       case Iop_16Uto32: case Iop_16Sto32:
3364          UNARY(Ity_I16, Ity_I32);
3365
3366       case Iop_32Sto64: case Iop_32Uto64:
3367          UNARY(Ity_I32, Ity_I64);
3368
3369       case Iop_8Uto64: case Iop_8Sto64:
3370          UNARY(Ity_I8, Ity_I64);
3371
3372       case Iop_16Uto64: case Iop_16Sto64:
3373          UNARY(Ity_I16, Ity_I64);
3374       case Iop_64to16:
3375          UNARY(Ity_I64, Ity_I16);
3376
3377       case Iop_32to8: UNARY(Ity_I32, Ity_I8);
3378       case Iop_64to8: UNARY(Ity_I64, Ity_I8);
3379
3380       case Iop_AddF64:    case Iop_SubF64:
3381       case Iop_MulF64:    case Iop_DivF64:
3382       case Iop_AddF64r32: case Iop_SubF64r32:
3383       case Iop_MulF64r32: case Iop_DivF64r32:
3384          TERNARY(ity_RMode,Ity_F64,Ity_F64, Ity_F64);
3385
3386       case Iop_AddF32: case Iop_SubF32:
3387       case Iop_MulF32: case Iop_DivF32:
3388          TERNARY(ity_RMode,Ity_F32,Ity_F32, Ity_F32);
3389
3390       case Iop_AddF16:
3391       case Iop_SubF16:
3392          TERNARY(ity_RMode,Ity_F16, Ity_F16, Ity_F16);
3393
3394       case Iop_NegF64: case Iop_AbsF64:
3395          UNARY(Ity_F64, Ity_F64);
3396
3397       case Iop_NegF32: case Iop_AbsF32:
3398          UNARY(Ity_F32, Ity_F32);
3399
3400       case Iop_NegF16: case Iop_AbsF16:
3401          UNARY(Ity_F16, Ity_F16);
3402
3403       case Iop_SqrtF64:
3404       case Iop_RecpExpF64:
3405          BINARY(ity_RMode,Ity_F64, Ity_F64);
3406
3407       case Iop_SqrtF32:
3408       case Iop_RoundF32toInt:
3409       case Iop_RecpExpF32:
3410          BINARY(ity_RMode,Ity_F32, Ity_F32);
3411
3412       case Iop_RoundF32toIntA0:
3413       case Iop_RoundF32toIntE:
3414          UNARY(Ity_F32, Ity_F32);
3415
3416       case Iop_SqrtF16:
3417          BINARY(ity_RMode, Ity_F16, Ity_F16);
3418
3419       case Iop_MaxNumF64: case Iop_MinNumF64:
3420          BINARY(Ity_F64,Ity_F64, Ity_F64);
3421
3422       case Iop_MaxNumF32: case Iop_MinNumF32:
3423          BINARY(Ity_F32,Ity_F32, Ity_F32);
3424
3425      case Iop_CmpF16:
3426          BINARY(Ity_F16,Ity_F16, Ity_I32);
3427
3428      case Iop_CmpF32:
3429          BINARY(Ity_F32,Ity_F32, Ity_I32);
3430
3431       case Iop_CmpF64:
3432          BINARY(Ity_F64,Ity_F64, Ity_I32);
3433
3434       case Iop_CmpF128:
3435          BINARY(Ity_F128,Ity_F128, Ity_I32);
3436
3437       case Iop_F64toI16S: BINARY(ity_RMode,Ity_F64, Ity_I16);
3438       case Iop_F64toI32S: BINARY(ity_RMode,Ity_F64, Ity_I32);
3439       case Iop_F64toI64S: case Iop_F64toI64U:
3440          BINARY(ity_RMode,Ity_F64, Ity_I64);
3441
3442       case Iop_F64toI32U: BINARY(ity_RMode,Ity_F64, Ity_I32);
3443
3444       case Iop_I32StoF64: UNARY(Ity_I32, Ity_F64);
3445       case Iop_I64StoF64: BINARY(ity_RMode,Ity_I64, Ity_F64);
3446       case Iop_I64UtoF64: BINARY(ity_RMode,Ity_I64, Ity_F64);
3447       case Iop_I64UtoF32: BINARY(ity_RMode,Ity_I64, Ity_F32);
3448
3449       case Iop_I32UtoF64: UNARY(Ity_I32, Ity_F64);
3450
3451       case Iop_F32toI32S: BINARY(ity_RMode,Ity_F32, Ity_I32);
3452       case Iop_F32toI64S: BINARY(ity_RMode,Ity_F32, Ity_I64);
3453       case Iop_F32toI32U: BINARY(ity_RMode,Ity_F32, Ity_I32);
3454       case Iop_F32toI64U: BINARY(ity_RMode,Ity_F32, Ity_I64);
3455
3456       case Iop_I32UtoF32: BINARY(ity_RMode,Ity_I32, Ity_F32);
3457       case Iop_I32StoF32: BINARY(ity_RMode,Ity_I32, Ity_F32);
3458       case Iop_I64StoF32: BINARY(ity_RMode,Ity_I64, Ity_F32);
3459
3460       case Iop_F32toF64: UNARY(Ity_F32, Ity_F64);
3461       case Iop_F16toF64: UNARY(Ity_F16, Ity_F64);
3462       case Iop_F16toF32: UNARY(Ity_F16, Ity_F32);
3463
3464       case Iop_F64toF32: BINARY(ity_RMode,Ity_F64, Ity_F32);
3465       case Iop_F64toF16: BINARY(ity_RMode,Ity_F64, Ity_F16);
3466       case Iop_F32toF16: BINARY(ity_RMode,Ity_F32, Ity_F16);
3467
3468       case Iop_ReinterpV128asI128: UNARY(Ity_V128, Ity_I128);
3469       case Iop_ReinterpI128asV128: UNARY(Ity_I128, Ity_V128);
3470       case Iop_ReinterpI128asF128: UNARY(Ity_I128, Ity_F128);
3471       case Iop_ReinterpF128asI128: UNARY(Ity_F128, Ity_I128);
3472       case Iop_ReinterpI64asF64: UNARY(Ity_I64, Ity_F64);
3473       case Iop_ReinterpF64asI64: UNARY(Ity_F64, Ity_I64);
3474       case Iop_ReinterpI32asF32: UNARY(Ity_I32, Ity_F32);
3475       case Iop_ReinterpF32asI32: UNARY(Ity_F32, Ity_I32);
3476
3477       case Iop_I128StoF128: BINARY(ity_RMode, Ity_I128, Ity_F128);
3478       case Iop_I128UtoF128: BINARY(ity_RMode, Ity_I128, Ity_F128);
3479       case Iop_I128StoD128: BINARY(ity_RMode, Ity_I128, Ity_D128);
3480       case Iop_D128toI128S: BINARY(ity_RMode, Ity_D128, Ity_I128);
3481
3482       case Iop_AtanF64: case Iop_Yl2xF64:  case Iop_Yl2xp1F64:
3483       case Iop_ScaleF64: case Iop_PRemF64: case Iop_PRem1F64:
3484          TERNARY(ity_RMode,Ity_F64,Ity_F64, Ity_F64);
3485
3486       case Iop_PRemC3210F64: case Iop_PRem1C3210F64:
3487          TERNARY(ity_RMode,Ity_F64,Ity_F64, Ity_I32);
3488
3489       case Iop_SinF64: case Iop_CosF64: case Iop_TanF64:
3490       case Iop_2xm1F64:
3491       case Iop_RoundF64toInt: BINARY(ity_RMode,Ity_F64, Ity_F64);
3492
3493       case Iop_RoundF64toIntA0: case Iop_RoundF64toIntE:
3494          UNARY(Ity_F64, Ity_F64);
3495
3496       case Iop_MAddF64: case Iop_MSubF64:
3497       case Iop_MAddF64r32: case Iop_MSubF64r32:
3498          QUATERNARY(ity_RMode,Ity_F64,Ity_F64,Ity_F64, Ity_F64);
3499
3500       case Iop_RSqrtEst5GoodF64:
3501       case Iop_RoundF64toF64_NEAREST: case Iop_RoundF64toF64_NegINF:
3502       case Iop_RoundF64toF64_PosINF: case Iop_RoundF64toF64_ZERO:
3503          UNARY(Ity_F64, Ity_F64);
3504       case Iop_RoundF64toF32:
3505          BINARY(ity_RMode,Ity_F64, Ity_F64);
3506       case Iop_TruncF64asF32:
3507          UNARY(Ity_F64, Ity_F32);
3508
3509       case Iop_I32UtoF32x4_DEP:
3510       case Iop_I32StoF32x4_DEP:
3511       case Iop_QF32toI32Ux4_RZ:
3512       case Iop_QF32toI32Sx4_RZ:
3513       case Iop_F32toI32Ux4_RZ:
3514       case Iop_F32toI32Sx4_RZ:
3515       case Iop_RoundF32x4_RM:
3516       case Iop_RoundF32x4_RP:
3517       case Iop_RoundF32x4_RN:
3518       case Iop_RoundF32x4_RZ:
3519       case Iop_Abs64Fx2: case Iop_Abs32Fx4: case Iop_Abs16Fx8:
3520       case Iop_RSqrtEst32Fx4:
3521       case Iop_RSqrtEst32Ux4:
3522          UNARY(Ity_V128, Ity_V128);
3523
3524       case Iop_Sqrt64Fx2:
3525       case Iop_Sqrt32Fx4:
3526       case Iop_Sqrt16Fx8:
3527       case Iop_I32StoF32x4:
3528       case Iop_F32toI32Sx4:
3529          BINARY(ity_RMode,Ity_V128, Ity_V128);
3530
3531       case Iop_F32toF16x4:
3532          BINARY(ity_RMode,Ity_V128, Ity_I64);
3533
3534       case Iop_64HLtoV128:
3535          BINARY(Ity_I64,Ity_I64, Ity_V128);
3536
3537       case Iop_Scale2_32Fx4:
3538       case Iop_Scale2_64Fx2:
3539          TERNARY(ity_RMode,Ity_V128,Ity_V128, Ity_V128);
3540       case Iop_Log2_32Fx4:
3541       case Iop_Log2_64Fx2:
3542       case Iop_Exp2_32Fx4:
3543          UNARY(Ity_V128, Ity_V128);
3544
3545       case Iop_V128to64: case Iop_V128HIto64:
3546       case Iop_NarrowUn16to8x8:
3547       case Iop_NarrowUn32to16x4:
3548       case Iop_NarrowUn64to32x2:
3549       case Iop_QNarrowUn16Uto8Ux8:
3550       case Iop_QNarrowUn32Uto16Ux4:
3551       case Iop_QNarrowUn64Uto32Ux2:
3552       case Iop_QNarrowUn16Sto8Sx8:
3553       case Iop_QNarrowUn32Sto16Sx4:
3554       case Iop_QNarrowUn64Sto32Sx2:
3555       case Iop_QNarrowUn16Sto8Ux8:
3556       case Iop_QNarrowUn32Sto16Ux4:
3557       case Iop_QNarrowUn64Sto32Ux2:
3558       case Iop_F32toF16x4_DEP:
3559          UNARY(Ity_V128, Ity_I64);
3560
3561       case Iop_Widen8Uto16x8:
3562       case Iop_Widen16Uto32x4:
3563       case Iop_Widen32Uto64x2:
3564       case Iop_Widen8Sto16x8:
3565       case Iop_Widen16Sto32x4:
3566       case Iop_Widen32Sto64x2:
3567       case Iop_F16toF32x4:
3568          UNARY(Ity_I64, Ity_V128);
3569
3570       case Iop_V128to32:    UNARY(Ity_V128, Ity_I32);
3571       case Iop_32UtoV128:   UNARY(Ity_I32, Ity_V128);
3572       case Iop_64UtoV128:   UNARY(Ity_I64, Ity_V128);
3573       case Iop_SetV128lo32: BINARY(Ity_V128,Ity_I32, Ity_V128);
3574       case Iop_SetV128lo64: BINARY(Ity_V128,Ity_I64, Ity_V128);
3575
3576       case Iop_Dup8x16: UNARY(Ity_I8, Ity_V128);
3577       case Iop_Dup16x8: UNARY(Ity_I16, Ity_V128);
3578       case Iop_Dup32x4: UNARY(Ity_I32, Ity_V128);
3579       case Iop_Dup8x8:  UNARY(Ity_I8, Ity_I64);
3580       case Iop_Dup16x4: UNARY(Ity_I16, Ity_I64);
3581       case Iop_Dup32x2: UNARY(Ity_I32, Ity_I64);
3582
3583       case Iop_CmpLT16Fx8: case Iop_CmpLE16Fx8: case Iop_CmpEQ16Fx8:
3584       case Iop_CmpEQ32Fx4: case Iop_CmpLT32Fx4:
3585       case Iop_CmpEQ64Fx2: case Iop_CmpLT64Fx2:
3586       case Iop_CmpLE32Fx4: case Iop_CmpUN32Fx4:
3587       case Iop_CmpLE64Fx2: case Iop_CmpUN64Fx2:
3588       case Iop_CmpGT32Fx4: case Iop_CmpGE32Fx4:
3589       case Iop_CmpEQ32F0x4: case Iop_CmpLT32F0x4:
3590       case Iop_CmpEQ64F0x2: case Iop_CmpLT64F0x2:
3591       case Iop_CmpLE32F0x4: case Iop_CmpUN32F0x4:
3592       case Iop_CmpLE64F0x2: case Iop_CmpUN64F0x2:
3593       case Iop_Add32F0x4:
3594       case Iop_Add64F0x2:
3595       case Iop_Div32F0x4:
3596       case Iop_Div64F0x2:
3597       case Iop_Max32Fx4: case Iop_Max32F0x4:
3598       case Iop_PwMax32Fx4: case Iop_PwMin32Fx4:
3599       case Iop_Max64Fx2: case Iop_Max64F0x2:
3600       case Iop_Min32Fx4: case Iop_Min32F0x4:
3601       case Iop_Min64Fx2: case Iop_Min64F0x2:
3602       case Iop_Mul32F0x4:
3603       case Iop_Mul64F0x2:
3604       case Iop_Sub32F0x4:
3605       case Iop_Sub64F0x2:
3606       case Iop_AndV128: case Iop_OrV128: case Iop_XorV128:
3607       case Iop_Add8x16:   case Iop_Add16x8:
3608       case Iop_Add32x4:   case Iop_Add64x2: case Iop_Add128x1:
3609       case Iop_QAdd8Ux16: case Iop_QAdd16Ux8:
3610       case Iop_QAdd32Ux4: case Iop_QAdd64Ux2:
3611       case Iop_QAdd8Sx16: case Iop_QAdd16Sx8:
3612       case Iop_QAdd32Sx4: case Iop_QAdd64Sx2:
3613       case Iop_QAddExtUSsatSS8x16: case Iop_QAddExtUSsatSS16x8:
3614       case Iop_QAddExtUSsatSS32x4: case Iop_QAddExtUSsatSS64x2:
3615       case Iop_QAddExtSUsatUU8x16: case Iop_QAddExtSUsatUU16x8:
3616       case Iop_QAddExtSUsatUU32x4: case Iop_QAddExtSUsatUU64x2:
3617       case Iop_PwAdd8x16: case Iop_PwAdd16x8: case Iop_PwAdd32x4:
3618       case Iop_Sub8x16:   case Iop_Sub16x8:
3619       case Iop_Sub32x4:   case Iop_Sub64x2: case Iop_Sub128x1:
3620       case Iop_QSub8Ux16: case Iop_QSub16Ux8:
3621       case Iop_QSub32Ux4: case Iop_QSub64Ux2:
3622       case Iop_QSub8Sx16: case Iop_QSub16Sx8:
3623       case Iop_QSub32Sx4: case Iop_QSub64Sx2:
3624       case Iop_Mul8x16: case Iop_Mul16x8: case Iop_Mul32x4:
3625       case Iop_PolynomialMul8x16:
3626       case Iop_PolynomialMulAdd8x16: case Iop_PolynomialMulAdd16x8:
3627       case Iop_PolynomialMulAdd32x4: case Iop_PolynomialMulAdd64x2:
3628       case Iop_MulHi8Ux16: case Iop_MulHi16Ux8: case Iop_MulHi32Ux4:
3629       case Iop_MulHi8Sx16: case Iop_MulHi16Sx8: case Iop_MulHi32Sx4:
3630       case Iop_QDMulHi16Sx8: case Iop_QDMulHi32Sx4:
3631       case Iop_QRDMulHi16Sx8: case Iop_QRDMulHi32Sx4:
3632       case Iop_MullEven8Ux16: case Iop_MullEven16Ux8: case Iop_MullEven32Ux4:
3633       case Iop_MullEven8Sx16: case Iop_MullEven16Sx8: case Iop_MullEven32Sx4:
3634       case Iop_Avg8Ux16: case Iop_Avg16Ux8: case Iop_Avg32Ux4: case Iop_Avg64Ux2:
3635       case Iop_Avg8Sx16: case Iop_Avg16Sx8: case Iop_Avg32Sx4: case Iop_Avg64Sx2:
3636       case Iop_Max8Sx16: case Iop_Max16Sx8: case Iop_Max32Sx4:
3637       case Iop_Max64Sx2:
3638       case Iop_Max8Ux16: case Iop_Max16Ux8: case Iop_Max32Ux4:
3639       case Iop_Max64Ux2:
3640       case Iop_Min8Sx16: case Iop_Min16Sx8: case Iop_Min32Sx4:
3641       case Iop_Min64Sx2:
3642       case Iop_Min8Ux16: case Iop_Min16Ux8: case Iop_Min32Ux4:
3643       case Iop_Min64Ux2:
3644       case Iop_CmpEQ8x16:  case Iop_CmpEQ16x8:  case Iop_CmpEQ32x4:
3645       case Iop_CmpEQ64x2:
3646       case Iop_CmpGT8Sx16: case Iop_CmpGT16Sx8: case Iop_CmpGT32Sx4:
3647       case Iop_CmpGT64Sx2:
3648       case Iop_CmpGT8Ux16: case Iop_CmpGT16Ux8: case Iop_CmpGT32Ux4:
3649       case Iop_CmpGT64Ux2:
3650       case Iop_Shl8x16: case Iop_Shl16x8: case Iop_Shl32x4: case Iop_Shl64x2:
3651       case Iop_QShl8x16: case Iop_QShl16x8:
3652       case Iop_QShl32x4: case Iop_QShl64x2:
3653       case Iop_QSal8x16: case Iop_QSal16x8:
3654       case Iop_QSal32x4: case Iop_QSal64x2:
3655       case Iop_Shr8x16: case Iop_Shr16x8: case Iop_Shr32x4: case Iop_Shr64x2:
3656       case Iop_Sar8x16: case Iop_Sar16x8: case Iop_Sar32x4: case Iop_Sar64x2:
3657       case Iop_Sal8x16: case Iop_Sal16x8: case Iop_Sal32x4: case Iop_Sal64x2:
3658       case Iop_Rol8x16: case Iop_Rol16x8: case Iop_Rol32x4:case Iop_Rol64x2:
3659       case Iop_QNarrowBin16Sto8Ux16: case Iop_QNarrowBin32Sto16Ux8:
3660       case Iop_QNarrowBin16Sto8Sx16: case Iop_QNarrowBin32Sto16Sx8:
3661       case Iop_QNarrowBin16Uto8Ux16: case Iop_QNarrowBin32Uto16Ux8:
3662       case Iop_QNarrowBin64Sto32Sx4: case Iop_QNarrowBin64Uto32Ux4:
3663       case Iop_NarrowBin16to8x16:   case Iop_NarrowBin32to16x8:
3664       case Iop_NarrowBin64to32x4:
3665       case Iop_InterleaveHI8x16: case Iop_InterleaveHI16x8:
3666       case Iop_InterleaveHI32x4: case Iop_InterleaveHI64x2:
3667       case Iop_InterleaveLO8x16: case Iop_InterleaveLO16x8:
3668       case Iop_InterleaveLO32x4: case Iop_InterleaveLO64x2:
3669       case Iop_CatOddLanes8x16: case Iop_CatEvenLanes8x16:
3670       case Iop_CatOddLanes16x8: case Iop_CatEvenLanes16x8:
3671       case Iop_CatOddLanes32x4: case Iop_CatEvenLanes32x4:
3672       case Iop_InterleaveOddLanes8x16: case Iop_InterleaveEvenLanes8x16:
3673       case Iop_InterleaveOddLanes16x8: case Iop_InterleaveEvenLanes16x8:
3674       case Iop_InterleaveOddLanes32x4: case Iop_InterleaveEvenLanes32x4:
3675       case Iop_PackOddLanes8x16: case Iop_PackEvenLanes8x16:
3676       case Iop_PackOddLanes16x8: case Iop_PackEvenLanes16x8:
3677       case Iop_PackOddLanes32x4: case Iop_PackEvenLanes32x4:
3678       case Iop_Perm8x16: case Iop_PermOrZero8x16:
3679       case Iop_Perm32x4:
3680       case Iop_RecipStep32Fx4: case Iop_RecipStep64Fx2:
3681       case Iop_RSqrtStep32Fx4: case Iop_RSqrtStep64Fx2:
3682       case Iop_CipherV128:
3683       case Iop_CipherLV128:
3684       case Iop_NCipherV128:
3685       case Iop_NCipherLV128:
3686       case Iop_Sh8Sx16: case Iop_Sh16Sx8:
3687       case Iop_Sh32Sx4: case Iop_Sh64Sx2:
3688       case Iop_Sh8Ux16: case Iop_Sh16Ux8:
3689       case Iop_Sh32Ux4: case Iop_Sh64Ux2:
3690       case Iop_Rsh8Sx16: case Iop_Rsh16Sx8:
3691       case Iop_Rsh32Sx4: case Iop_Rsh64Sx2:
3692       case Iop_Rsh8Ux16: case Iop_Rsh16Ux8:
3693       case Iop_Rsh32Ux4: case Iop_Rsh64Ux2:
3694       case Iop_MulI128by10E:
3695       case Iop_MulI128by10ECarry:
3696       case Iop_PwExtUSMulQAdd8x16:
3697       case Iop_DivU128: case Iop_DivS128:
3698       case Iop_DivU128E: case Iop_DivS128E:
3699       case Iop_ModU128:  case Iop_ModS128:
3700          BINARY(Ity_V128,Ity_V128, Ity_V128);
3701
3702       case Iop_2xMultU64Add128CarryOut:
3703       case Iop_Perm8x16x2:
3704          TERNARY(Ity_V128, Ity_V128, Ity_V128, Ity_V128);
3705
3706       case Iop_PolynomialMull8x8:
3707       case Iop_Mull8Ux8: case Iop_Mull8Sx8:
3708       case Iop_Mull16Ux4: case Iop_Mull16Sx4:
3709       case Iop_Mull32Ux2: case Iop_Mull32Sx2:
3710          BINARY(Ity_I64, Ity_I64, Ity_V128);
3711
3712       case Iop_NotV128:
3713       case Iop_RecipEst32Fx4: case Iop_RecipEst32F0x4:
3714       case Iop_RecipEst64Fx2: case Iop_RSqrtEst64Fx2:
3715       case Iop_RecipEst32Ux4:
3716       case Iop_RSqrtEst32F0x4:
3717       case Iop_Sqrt32F0x4:
3718       case Iop_Sqrt64F0x2:
3719       case Iop_CmpNEZ8x16: case Iop_CmpNEZ16x8:
3720       case Iop_CmpNEZ32x4: case Iop_CmpNEZ64x2: case Iop_CmpNEZ128x1:
3721       case Iop_Cnt8x16:
3722       case Iop_Clz8x16: case Iop_Clz16x8: case Iop_Clz32x4: case Iop_Clz64x2:
3723       case Iop_Cls8x16: case Iop_Cls16x8: case Iop_Cls32x4:
3724       case Iop_PwAddL8Ux16: case Iop_PwAddL16Ux8: case Iop_PwAddL32Ux4:
3725       case Iop_PwAddL64Ux2:
3726       case Iop_PwAddL8Sx16: case Iop_PwAddL16Sx8: case Iop_PwAddL32Sx4:
3727       case Iop_Reverse8sIn64_x2: case Iop_Reverse16sIn64_x2:
3728       case Iop_Reverse32sIn64_x2:
3729       case Iop_Reverse8sIn32_x4: case Iop_Reverse16sIn32_x4:
3730       case Iop_Reverse8sIn16_x8:
3731       case Iop_Reverse1sIn8_x16:
3732       case Iop_Neg64Fx2: case Iop_Neg32Fx4: case Iop_Neg16Fx8:
3733       case Iop_Abs8x16: case Iop_Abs16x8: case Iop_Abs32x4: case Iop_Abs64x2:
3734       case Iop_CipherSV128:
3735       case Iop_PwBitMtxXpose64x2:
3736       case Iop_ZeroHI64ofV128:  case Iop_ZeroHI96ofV128:
3737       case Iop_ZeroHI112ofV128: case Iop_ZeroHI120ofV128:
3738       case Iop_F16toF64x2:
3739       case Iop_F64toF16x2_DEP:
3740       case Iop_MulI128by10:
3741       case Iop_MulI128by10Carry:
3742       case Iop_Ctz8x16: case Iop_Ctz16x8:
3743       case Iop_Ctz32x4: case Iop_Ctz64x2:
3744       case Iop_BCD128toI128S:
3745          UNARY(Ity_V128, Ity_V128);
3746
3747       case Iop_ShlV128: case Iop_ShrV128: case Iop_SarV128:
3748       case Iop_ShlN8x16: case Iop_ShlN16x8:
3749       case Iop_ShlN32x4: case Iop_ShlN64x2:
3750       case Iop_ShrN8x16: case Iop_ShrN16x8:
3751       case Iop_ShrN32x4: case Iop_ShrN64x2:
3752       case Iop_SarN8x16: case Iop_SarN16x8:
3753       case Iop_SarN32x4: case Iop_SarN64x2:
3754       case Iop_QShlNsatUU8x16: case Iop_QShlNsatUU16x8:
3755       case Iop_QShlNsatUU32x4: case Iop_QShlNsatUU64x2:
3756       case Iop_QShlNsatSU8x16: case Iop_QShlNsatSU16x8:
3757       case Iop_QShlNsatSU32x4: case Iop_QShlNsatSU64x2:
3758       case Iop_QShlNsatSS8x16: case Iop_QShlNsatSS16x8:
3759       case Iop_QShlNsatSS32x4: case Iop_QShlNsatSS64x2:
3760       case Iop_SHA256:    case Iop_SHA512:
3761       case Iop_QandQShrNnarrow16Uto8Ux8:
3762       case Iop_QandQShrNnarrow32Uto16Ux4:
3763       case Iop_QandQShrNnarrow64Uto32Ux2:
3764       case Iop_QandQSarNnarrow16Sto8Sx8:
3765       case Iop_QandQSarNnarrow32Sto16Sx4:
3766       case Iop_QandQSarNnarrow64Sto32Sx2:
3767       case Iop_QandQSarNnarrow16Sto8Ux8:
3768       case Iop_QandQSarNnarrow32Sto16Ux4:
3769       case Iop_QandQSarNnarrow64Sto32Ux2:
3770       case Iop_QandQRShrNnarrow16Uto8Ux8:
3771       case Iop_QandQRShrNnarrow32Uto16Ux4:
3772       case Iop_QandQRShrNnarrow64Uto32Ux2:
3773       case Iop_QandQRSarNnarrow16Sto8Sx8:
3774       case Iop_QandQRSarNnarrow32Sto16Sx4:
3775       case Iop_QandQRSarNnarrow64Sto32Sx2:
3776       case Iop_QandQRSarNnarrow16Sto8Ux8:
3777       case Iop_QandQRSarNnarrow32Sto16Ux4:
3778       case Iop_QandQRSarNnarrow64Sto32Ux2:
3779       case Iop_I128StoBCD128:
3780          BINARY(Ity_V128, Ity_I8, Ity_V128);
3781
3782       case Iop_F32ToFixed32Ux4_RZ:
3783       case Iop_F32ToFixed32Sx4_RZ:
3784       case Iop_Fixed32UToF32x4_RN:
3785       case Iop_Fixed32SToF32x4_RN:
3786          BINARY(Ity_V128, Ity_I8, Ity_V128);
3787
3788       case Iop_F32ToFixed32Ux2_RZ:
3789       case Iop_F32ToFixed32Sx2_RZ:
3790       case Iop_Fixed32UToF32x2_RN:
3791       case Iop_Fixed32SToF32x2_RN:
3792          BINARY(Ity_I64, Ity_I8, Ity_I64);
3793
3794       case Iop_GetElem8x16:
3795          BINARY(Ity_V128, Ity_I8, Ity_I8);
3796       case Iop_GetElem16x8:
3797          BINARY(Ity_V128, Ity_I8, Ity_I16);
3798       case Iop_GetElem32x4:
3799          BINARY(Ity_V128, Ity_I8, Ity_I32);
3800       case Iop_GetElem64x2:
3801          BINARY(Ity_V128, Ity_I8, Ity_I64);
3802       case Iop_SetElem8x16:
3803          TERNARY(Ity_V128, Ity_I8, Ity_I8, Ity_V128);
3804       case Iop_SetElem16x8:
3805          TERNARY(Ity_V128, Ity_I8, Ity_I16, Ity_V128);
3806       case Iop_SetElem32x4:
3807          TERNARY(Ity_V128, Ity_I8, Ity_I32, Ity_V128);
3808       case Iop_SetElem64x2:
3809          TERNARY(Ity_V128, Ity_I8, Ity_I64, Ity_V128);
3810       case Iop_GetElem8x8:
3811          BINARY(Ity_I64, Ity_I8, Ity_I8);
3812       case Iop_GetElem16x4:
3813          BINARY(Ity_I64, Ity_I8, Ity_I16);
3814       case Iop_GetElem32x2:
3815          BINARY(Ity_I64, Ity_I8, Ity_I32);
3816       case Iop_SetElem8x8:
3817          TERNARY(Ity_I64, Ity_I8, Ity_I8, Ity_I64);
3818       case Iop_SetElem16x4:
3819          TERNARY(Ity_I64, Ity_I8, Ity_I16, Ity_I64);
3820       case Iop_SetElem32x2:
3821          TERNARY(Ity_I64, Ity_I8, Ity_I32, Ity_I64);
3822
3823       case Iop_Slice64:
3824          TERNARY(Ity_I64, Ity_I64, Ity_I8, Ity_I64);
3825       case Iop_SliceV128:
3826          TERNARY(Ity_V128, Ity_V128, Ity_I8, Ity_V128);
3827
3828       case Iop_BCDAdd:
3829       case Iop_BCDSub:
3830          BINARY(Ity_V128, Ity_V128, Ity_V128);
3831
3832       case Iop_QDMull16Sx4: case Iop_QDMull32Sx2:
3833          BINARY(Ity_I64, Ity_I64, Ity_V128);
3834
3835       case Iop_MAddF32:
3836       case Iop_MSubF32:
3837          QUATERNARY(ity_RMode,Ity_F32,Ity_F32,Ity_F32, Ity_F32);
3838
3839       case Iop_F64HLtoF128:
3840         BINARY(Ity_F64,Ity_F64, Ity_F128);
3841
3842       case Iop_F128HItoF64:
3843       case Iop_F128LOtoF64:
3844         UNARY(Ity_F128, Ity_F64);
3845
3846       case Iop_AddF128:
3847       case Iop_SubF128:
3848       case Iop_MulF128:
3849       case Iop_DivF128:
3850          TERNARY(ity_RMode,Ity_F128,Ity_F128, Ity_F128);
3851
3852       case Iop_MAddF128:
3853       case Iop_MSubF128:
3854       case Iop_NegMAddF128:
3855       case Iop_NegMSubF128:
3856          QUATERNARY(ity_RMode,Ity_F128,Ity_F128,Ity_F128, Ity_F128);
3857
3858       case Iop_Add64Fx2: case Iop_Sub64Fx2:
3859       case Iop_Mul64Fx2: case Iop_Div64Fx2:
3860       case Iop_Add32Fx4: case Iop_Sub32Fx4:
3861       case Iop_Mul32Fx4: case Iop_Div32Fx4:
3862       case Iop_Add16Fx8: case Iop_Sub16Fx8:
3863       case Iop_F64x2_2toQ32x4: case Iop_F32x4_2toQ16x8:
3864          TERNARY(ity_RMode,Ity_V128,Ity_V128, Ity_V128);
3865
3866       case Iop_Add64Fx4: case Iop_Sub64Fx4:
3867       case Iop_Mul64Fx4: case Iop_Div64Fx4:
3868       case Iop_Add32Fx8: case Iop_Sub32Fx8:
3869       case Iop_Mul32Fx8: case Iop_Div32Fx8:
3870          TERNARY(ity_RMode,Ity_V256,Ity_V256, Ity_V256);
3871
3872       case Iop_NegF128:
3873       case Iop_AbsF128:
3874          UNARY(Ity_F128, Ity_F128);
3875
3876       case Iop_SqrtF128:
3877       case Iop_RoundF128toInt:
3878          BINARY(ity_RMode,Ity_F128, Ity_F128);
3879
3880       case Iop_I32StoF128: UNARY(Ity_I32, Ity_F128);
3881       case Iop_I64StoF128: UNARY(Ity_I64, Ity_F128);
3882
3883       case Iop_I32UtoF128: UNARY(Ity_I32, Ity_F128);
3884       case Iop_I64UtoF128: UNARY(Ity_I64, Ity_F128);
3885
3886       case Iop_F128toI32S: BINARY(ity_RMode,Ity_F128, Ity_I32);
3887       case Iop_F128toI64S: BINARY(ity_RMode,Ity_F128, Ity_I64);
3888
3889       case Iop_F128toI32U: BINARY(ity_RMode,Ity_F128, Ity_I32);
3890       case Iop_F128toI64U: BINARY(ity_RMode,Ity_F128, Ity_I64);
3891
3892       case Iop_F32toF128: UNARY(Ity_F32, Ity_F128);
3893       case Iop_F64toF128: UNARY(Ity_F64, Ity_F128);
3894
3895       case Iop_F128toF32: BINARY(ity_RMode,Ity_F128, Ity_F32);
3896       case Iop_F128toF64: BINARY(ity_RMode,Ity_F128, Ity_F64);
3897
3898       case Iop_TruncF128toI32S:
3899       case Iop_TruncF128toI64S:
3900       case Iop_TruncF128toI128S:
3901       case Iop_TruncF128toI32U:
3902       case Iop_TruncF128toI64U:
3903       case Iop_TruncF128toI128U:
3904          UNARY(Ity_F128, Ity_F128);
3905
3906       case Iop_F128toI128S:
3907       case Iop_RndF128:
3908          BINARY(ity_RMode,Ity_F128, Ity_F128);
3909
3910       case Iop_D32toD64:
3911          UNARY(Ity_D32, Ity_D64);
3912
3913       case Iop_ExtractExpD64:
3914          UNARY(Ity_D64, Ity_I64);
3915
3916       case Iop_ExtractSigD64:
3917          UNARY(Ity_D64, Ity_I64);
3918
3919       case Iop_InsertExpD64:
3920          BINARY(Ity_I64,Ity_D64, Ity_D64);
3921
3922       case Iop_ExtractExpD128:
3923          UNARY(Ity_D128, Ity_I64);
3924
3925       case Iop_ExtractSigD128:
3926         UNARY(Ity_D128, Ity_I64);
3927
3928       case Iop_InsertExpD128:
3929          BINARY(Ity_I64,Ity_D128, Ity_D128);
3930
3931       case Iop_D64toD128:
3932          UNARY(Ity_D64, Ity_D128);
3933
3934       case Iop_ReinterpD64asI64:
3935         UNARY(Ity_D64, Ity_I64);
3936
3937       case Iop_ReinterpI64asD64:
3938          UNARY(Ity_I64, Ity_D64);
3939
3940       case Iop_RoundD64toInt:
3941          BINARY(ity_RMode,Ity_D64, Ity_D64);
3942
3943       case Iop_RoundD128toInt:
3944          BINARY(ity_RMode,Ity_D128, Ity_D128);
3945
3946       case Iop_I32StoD128:
3947       case Iop_I32UtoD128:
3948          UNARY(Ity_I32, Ity_D128);
3949
3950       case Iop_I64StoD128:
3951          UNARY(Ity_I64, Ity_D128);
3952
3953       case Iop_I64UtoD128:
3954          UNARY(Ity_I64, Ity_D128);
3955
3956       case Iop_DPBtoBCD:
3957       case Iop_BCDtoDPB:
3958          UNARY(Ity_I64, Ity_I64);
3959
3960       case Iop_D128HItoD64:
3961       case Iop_D128LOtoD64:
3962          UNARY(Ity_D128, Ity_D64);
3963
3964       case Iop_D128toI64S:
3965          BINARY(ity_RMode, Ity_D128, Ity_I64);
3966
3967       case Iop_D128toI64U:
3968          BINARY(ity_RMode, Ity_D128, Ity_I64);
3969
3970       case Iop_D128toI32S:
3971       case Iop_D128toI32U:
3972          BINARY(ity_RMode, Ity_D128, Ity_I32);
3973
3974       case Iop_D64HLtoD128:
3975          BINARY(Ity_D64, Ity_D64, Ity_D128);
3976
3977       case Iop_ShlD64:
3978       case Iop_ShrD64:
3979          BINARY(Ity_D64, Ity_I8, Ity_D64 );
3980
3981       case Iop_D64toD32:
3982          BINARY(ity_RMode, Ity_D64, Ity_D32);
3983
3984       case Iop_D64toI32S:
3985       case Iop_D64toI32U:
3986          BINARY(ity_RMode, Ity_D64, Ity_I32);
3987
3988       case Iop_D64toI64S:
3989          BINARY(ity_RMode, Ity_D64, Ity_I64);
3990
3991       case Iop_D64toI64U:
3992          BINARY(ity_RMode, Ity_D64, Ity_I64);
3993
3994       case Iop_I32StoD64:
3995       case Iop_I32UtoD64:
3996          UNARY(Ity_I32, Ity_D64);
3997
3998       case Iop_I64StoD64:
3999          BINARY(ity_RMode, Ity_I64, Ity_D64);
4000
4001       case Iop_I64UtoD64:
4002          BINARY(ity_RMode, Ity_I64, Ity_D64);
4003
4004       case Iop_F32toD32:
4005          BINARY(ity_RMode, Ity_F32, Ity_D32);
4006
4007       case Iop_F32toD64:
4008          BINARY(ity_RMode, Ity_F32, Ity_D64);
4009
4010       case Iop_F32toD128:
4011          BINARY(ity_RMode, Ity_F32, Ity_D128);
4012
4013       case Iop_F64toD32:
4014          BINARY(ity_RMode, Ity_F64, Ity_D32);
4015
4016       case Iop_F64toD64:
4017          BINARY(ity_RMode, Ity_F64, Ity_D64);
4018
4019       case Iop_F64toD128:
4020          BINARY(ity_RMode, Ity_F64, Ity_D128);
4021
4022       case Iop_F128toD32:
4023          BINARY(ity_RMode, Ity_F128, Ity_D32);
4024
4025       case Iop_F128toD64:
4026          BINARY(ity_RMode, Ity_F128, Ity_D64);
4027
4028       case Iop_F128toD128:
4029          BINARY(ity_RMode, Ity_F128, Ity_D128);
4030
4031       case Iop_D32toF32:
4032          BINARY(ity_RMode, Ity_D32, Ity_F32);
4033
4034       case Iop_D32toF64:
4035          BINARY(ity_RMode, Ity_D32, Ity_F64);
4036
4037       case Iop_D32toF128:
4038          BINARY(ity_RMode, Ity_D32, Ity_F128);
4039
4040       case Iop_D64toF32:
4041          BINARY(ity_RMode, Ity_D64, Ity_F32);
4042
4043       case Iop_D64toF64:
4044          BINARY(ity_RMode, Ity_D64, Ity_F64);
4045
4046       case Iop_D64toF128:
4047          BINARY(ity_RMode, Ity_D64, Ity_F128);
4048
4049       case Iop_D128toF32:
4050          BINARY(ity_RMode, Ity_D128, Ity_F32);
4051
4052       case Iop_D128toF64:
4053          BINARY(ity_RMode, Ity_D128, Ity_F64);
4054
4055       case Iop_D128toF128:
4056          BINARY(ity_RMode, Ity_D128, Ity_F128);
4057
4058       case Iop_CmpD64:
4059       case Iop_CmpExpD64:
4060          BINARY(Ity_D64,Ity_D64, Ity_I32);
4061
4062       case Iop_CmpD128:
4063       case Iop_CmpExpD128:
4064          BINARY(Ity_D128,Ity_D128, Ity_I32);
4065
4066       case Iop_QuantizeD64:
4067          TERNARY(ity_RMode,Ity_D64,Ity_D64, Ity_D64);
4068
4069       case Iop_SignificanceRoundD64:
4070          TERNARY(ity_RMode, Ity_I8,Ity_D64, Ity_D64);
4071
4072       case Iop_QuantizeD128:
4073          TERNARY(ity_RMode,Ity_D128,Ity_D128, Ity_D128);
4074
4075       case Iop_SignificanceRoundD128:
4076          TERNARY(ity_RMode, Ity_I8,Ity_D128, Ity_D128);
4077
4078       case Iop_ShlD128:
4079       case Iop_ShrD128:
4080          BINARY(Ity_D128, Ity_I8, Ity_D128 );
4081
4082       case Iop_AddD64:
4083       case Iop_SubD64:
4084       case Iop_MulD64:
4085       case Iop_DivD64:
4086          TERNARY( ity_RMode, Ity_D64, Ity_D64, Ity_D64 );
4087
4088       case Iop_D128toD64:
4089          BINARY( ity_RMode, Ity_D128, Ity_D64 );
4090
4091       case Iop_AddD128:
4092       case Iop_SubD128:
4093       case Iop_MulD128:
4094       case Iop_DivD128:
4095          TERNARY(ity_RMode,Ity_D128,Ity_D128, Ity_D128);
4096
4097       case Iop_V256to64_0: case Iop_V256to64_1:
4098       case Iop_V256to64_2: case Iop_V256to64_3:
4099          UNARY(Ity_V256, Ity_I64);
4100
4101       case Iop_64x4toV256:
4102          QUATERNARY(Ity_I64, Ity_I64, Ity_I64, Ity_I64, Ity_V256);
4103
4104       case Iop_AndV256:  case Iop_OrV256:
4105       case Iop_XorV256:
4106       case Iop_Max32Fx8: case Iop_Min32Fx8:
4107       case Iop_Max64Fx4: case Iop_Min64Fx4:
4108       case Iop_Add8x32:  case Iop_Add16x16:
4109       case Iop_Add32x8:  case Iop_Add64x4:
4110       case Iop_Sub8x32:  case Iop_Sub16x16:
4111       case Iop_Sub32x8:  case Iop_Sub64x4:
4112       case Iop_Mul16x16: case Iop_Mul32x8:
4113       case Iop_MulHi16Ux16: case Iop_MulHi16Sx16:
4114       case Iop_Avg8Ux32: case Iop_Avg16Ux16:
4115       case Iop_Max8Sx32: case Iop_Max16Sx16: case Iop_Max32Sx8:
4116       case Iop_Max8Ux32: case Iop_Max16Ux16: case Iop_Max32Ux8:
4117       case Iop_Min8Sx32: case Iop_Min16Sx16: case Iop_Min32Sx8:
4118       case Iop_Min8Ux32: case Iop_Min16Ux16: case Iop_Min32Ux8:
4119       case Iop_CmpEQ8x32:  case Iop_CmpEQ16x16:
4120       case Iop_CmpEQ32x8:  case Iop_CmpEQ64x4:
4121       case Iop_CmpGT8Sx32: case Iop_CmpGT16Sx16:
4122       case Iop_CmpGT32Sx8: case Iop_CmpGT64Sx4:
4123       case Iop_QAdd8Ux32: case Iop_QAdd16Ux16:
4124       case Iop_QAdd8Sx32: case Iop_QAdd16Sx16:
4125       case Iop_QSub8Ux32: case Iop_QSub16Ux16:
4126       case Iop_QSub8Sx32: case Iop_QSub16Sx16:
4127       case Iop_Perm32x8:
4128          BINARY(Ity_V256,Ity_V256, Ity_V256);
4129
4130       case Iop_I32StoF32x8:
4131       case Iop_F32toI32Sx8:
4132          BINARY(ity_RMode,Ity_V256, Ity_V256);
4133
4134       case Iop_F32toF16x8:
4135          BINARY(ity_RMode,Ity_V256, Ity_V128);
4136
4137       case Iop_V256toV128_1: case Iop_V256toV128_0:
4138          UNARY(Ity_V256, Ity_V128);
4139
4140       case Iop_F16toF32x8:
4141          UNARY(Ity_V128, Ity_V256);
4142
4143       case Iop_QandUQsh8x16:  case Iop_QandUQsh16x8:
4144       case Iop_QandUQsh32x4:  case Iop_QandUQsh64x2:
4145       case Iop_QandSQsh8x16:  case Iop_QandSQsh16x8:
4146       case Iop_QandSQsh32x4:  case Iop_QandSQsh64x2:
4147       case Iop_QandUQRsh8x16: case Iop_QandUQRsh16x8:
4148       case Iop_QandUQRsh32x4: case Iop_QandUQRsh64x2:
4149       case Iop_QandSQRsh8x16: case Iop_QandSQRsh16x8:
4150       case Iop_QandSQRsh32x4: case Iop_QandSQRsh64x2:
4151       case Iop_V128HLtoV256:
4152          BINARY(Ity_V128,Ity_V128, Ity_V256);
4153
4154       case Iop_NotV256:
4155       case Iop_RSqrtEst32Fx8:
4156       case Iop_Sqrt32Fx8:
4157       case Iop_Sqrt64Fx4:
4158       case Iop_RecipEst32Fx8:
4159       case Iop_CmpNEZ8x32: case Iop_CmpNEZ16x16:
4160       case Iop_CmpNEZ64x4: case Iop_CmpNEZ32x8:
4161          UNARY(Ity_V256, Ity_V256);
4162
4163       case Iop_ShlN16x16: case Iop_ShlN32x8:
4164       case Iop_ShlN64x4:
4165       case Iop_ShrN16x16: case Iop_ShrN32x8:
4166       case Iop_ShrN64x4:
4167       case Iop_SarN16x16: case Iop_SarN32x8:
4168          BINARY(Ity_V256,Ity_I8, Ity_V256);
4169       case Iop_Rotx32:
4170          QUATERNARY(Ity_I32, Ity_I8, Ity_I8, Ity_I8, Ity_I32);
4171       case Iop_Rotx64:
4172          QUATERNARY(Ity_I64, Ity_I8, Ity_I8, Ity_I8, Ity_I64);
4173
4174       default:
4175          ppIROp(op);
4176          vpanic("typeOfPrimop");
4177    }
4178 #  undef UNARY
4179 #  undef BINARY
4180 #  undef TERNARY
4181 #  undef COMPARISON
4182 #  undef UNARY_COMPARISON
4183 }
4184
4185
4186 /*---------------------------------------------------------------*/
4187 /*--- Helper functions for the IR -- IR Basic Blocks          ---*/
4188 /*---------------------------------------------------------------*/
4189
4190 void addStmtToIRSB ( IRSB* bb, IRStmt* st )
4191 {
4192    Int i;
4193    if (bb->stmts_used == bb->stmts_size) {
4194       IRStmt** stmts2 = LibVEX_Alloc_inline(2 * bb->stmts_size * sizeof(IRStmt*));
4195       for (i = 0; i < bb->stmts_size; i++)
4196          stmts2[i] = bb->stmts[i];
4197       bb->stmts = stmts2;
4198       bb->stmts_size *= 2;
4199    }
4200    vassert(bb->stmts_used < bb->stmts_size);
4201    bb->stmts[bb->stmts_used] = st;
4202    bb->stmts_used++;
4203 }
4204
4205
4206 /*---------------------------------------------------------------*/
4207 /*--- Helper functions for the IR -- IR Type Environments     ---*/
4208 /*---------------------------------------------------------------*/
4209
4210 /* Allocate a new IRTemp, given its type. */
4211
4212 IRTemp newIRTemp ( IRTypeEnv* env, IRType ty )
4213 {
4214    vassert(env);
4215    vassert(env->types_used >= 0);
4216    vassert(env->types_size >= 0);
4217    vassert(env->types_used <= env->types_size);
4218    if (env->types_used < env->types_size) {
4219       env->types[env->types_used] = ty;
4220       return env->types_used++;
4221    } else {
4222       Int i;
4223       Int new_size = env->types_size==0 ? 8 : 2*env->types_size;
4224       IRType* new_types
4225          = LibVEX_Alloc_inline(new_size * sizeof(IRType));
4226       for (i = 0; i < env->types_used; i++)
4227          new_types[i] = env->types[i];
4228       env->types      = new_types;
4229       env->types_size = new_size;
4230       return newIRTemp(env, ty);
4231    }
4232 }
4233
4234
4235 /*---------------------------------------------------------------*/
4236 /*--- Helper functions for the IR -- finding types of exprs   ---*/
4237 /*---------------------------------------------------------------*/
4238
4239 inline
4240 IRType typeOfIRTemp ( const IRTypeEnv* env, IRTemp tmp )
4241 {
4242    vassert(tmp < env->types_used);
4243    return env->types[tmp];
4244 }
4245
4246 IRType typeOfIRConst ( const IRConst* con )
4247 {
4248    switch (con->tag) {
4249       case Ico_U1:    return Ity_I1;
4250       case Ico_U8:    return Ity_I8;
4251       case Ico_U16:   return Ity_I16;
4252       case Ico_U32:   return Ity_I32;
4253       case Ico_U64:   return Ity_I64;
4254       case Ico_U128:  return Ity_I128;
4255       case Ico_F32:   return Ity_F32;
4256       case Ico_F32i:  return Ity_F32;
4257       case Ico_F64:   return Ity_F64;
4258       case Ico_F64i:  return Ity_F64;
4259       case Ico_V128:  return Ity_V128;
4260       case Ico_V256:  return Ity_V256;
4261       default: vpanic("typeOfIRConst");
4262    }
4263 }
4264
4265 void typeOfIRLoadGOp ( IRLoadGOp cvt,
4266                        /*OUT*/IRType* t_res, /*OUT*/IRType* t_arg )
4267 {
4268    switch (cvt) {
4269       case ILGop_IdentV128:
4270          *t_res = Ity_V128; *t_arg = Ity_V128; break;
4271       case ILGop_Ident64:
4272          *t_res = Ity_I64; *t_arg = Ity_I64; break;
4273       case ILGop_Ident32:
4274          *t_res = Ity_I32; *t_arg = Ity_I32; break;
4275       case ILGop_16Uto32: case ILGop_16Sto32:
4276          *t_res = Ity_I32; *t_arg = Ity_I16; break;
4277       case ILGop_8Uto32: case ILGop_8Sto32:
4278          *t_res = Ity_I32; *t_arg = Ity_I8; break;
4279       default:
4280          vpanic("typeOfIRLoadGOp");
4281    }
4282 }
4283
4284 IRType typeOfIRExpr ( const IRTypeEnv* tyenv, const IRExpr* e )
4285 {
4286    IRType t_dst, t_arg1, t_arg2, t_arg3, t_arg4;
4287  start:
4288    switch (e->tag) {
4289       case Iex_Load:
4290          return e->Iex.Load.ty;
4291       case Iex_Get:
4292          return e->Iex.Get.ty;
4293       case Iex_GetI:
4294          return e->Iex.GetI.descr->elemTy;
4295       case Iex_RdTmp:
4296          return typeOfIRTemp(tyenv, e->Iex.RdTmp.tmp);
4297       case Iex_Const:
4298          return typeOfIRConst(e->Iex.Const.con);
4299       case Iex_Qop:
4300          typeOfPrimop(e->Iex.Qop.details->op,
4301                       &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4);
4302          return t_dst;
4303       case Iex_Triop:
4304          typeOfPrimop(e->Iex.Triop.details->op,
4305                       &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4);
4306          return t_dst;
4307       case Iex_Binop:
4308          typeOfPrimop(e->Iex.Binop.op,
4309                       &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4);
4310          return t_dst;
4311       case Iex_Unop:
4312          typeOfPrimop(e->Iex.Unop.op,
4313                       &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4);
4314          return t_dst;
4315       case Iex_CCall:
4316          return e->Iex.CCall.retty;
4317       case Iex_ITE:
4318          e = e->Iex.ITE.iffalse;
4319          goto start;
4320          /* return typeOfIRExpr(tyenv, e->Iex.ITE.iffalse); */
4321       case Iex_Binder:
4322          vpanic("typeOfIRExpr: Binder is not a valid expression");
4323       case Iex_VECRET:
4324          vpanic("typeOfIRExpr: VECRET is not a valid expression");
4325       case Iex_GSPTR:
4326          vpanic("typeOfIRExpr: GSPTR is not a valid expression");
4327       default:
4328          ppIRExpr(e);
4329          vpanic("typeOfIRExpr");
4330    }
4331 }
4332
4333 /* Is this any value actually in the enumeration 'IRType' ? */
4334 Bool isPlausibleIRType ( IRType ty )
4335 {
4336    switch (ty) {
4337       case Ity_INVALID: case Ity_I1:
4338       case Ity_I8: case Ity_I16: case Ity_I32:
4339       case Ity_I64: case Ity_I128:
4340       case Ity_F16: case Ity_F32: case Ity_F64: case Ity_F128:
4341       case Ity_D32: case Ity_D64: case Ity_D128:
4342       case Ity_V128: case Ity_V256:
4343          return True;
4344       default:
4345          return False;
4346    }
4347 }
4348
4349
4350 /*---------------------------------------------------------------*/
4351 /*--- Sanity checking -- FLATNESS                             ---*/
4352 /*---------------------------------------------------------------*/
4353
4354 /* Check that the canonical flatness constraints hold on an
4355    IRStmt. The only place where any expression is allowed to be
4356    non-atomic is the RHS of IRStmt_Tmp. */
4357
4358 /* Relies on:
4359    inline static Bool isAtom ( IRExpr* e ) {
4360       return e->tag == Iex_RdTmp || e->tag == Iex_Const;
4361    }
4362 */
4363
4364 static inline Bool isIRAtom_or_VECRET_or_GSPTR ( const IRExpr* e )
4365 {
4366   if (isIRAtom(e)) {
4367     return True;
4368   }
4369
4370   return UNLIKELY(is_IRExpr_VECRET_or_GSPTR(e));
4371 }
4372
4373 inline Bool isFlatIRStmt ( const IRStmt* st )
4374 {
4375    Int      i;
4376    const IRExpr*  e;
4377    const IRQop*   qop;
4378    const IRTriop* triop;
4379
4380    switch (st->tag) {
4381       case Ist_AbiHint:
4382          return isIRAtom(st->Ist.AbiHint.base)
4383                 && isIRAtom(st->Ist.AbiHint.nia);
4384       case Ist_Put:
4385          return isIRAtom(st->Ist.Put.data);
4386       case Ist_PutI: {
4387          const IRPutI *puti = st->Ist.PutI.details;
4388          return toBool( isIRAtom(puti->ix)
4389                         && isIRAtom(puti->data) );
4390       }
4391       case Ist_WrTmp:
4392          /* This is the only interesting case.  The RHS can be any
4393             expression, *but* all its subexpressions *must* be
4394             atoms. */
4395          e = st->Ist.WrTmp.data;
4396          switch (e->tag) {
4397             case Iex_Binder: return True;
4398             case Iex_Get:    return True;
4399             case Iex_GetI:   return isIRAtom(e->Iex.GetI.ix);
4400             case Iex_RdTmp:  return True;
4401             case Iex_Qop:    qop = e->Iex.Qop.details;
4402                              return toBool(
4403                                     isIRAtom(qop->arg1)
4404                                     && isIRAtom(qop->arg2)
4405                                     && isIRAtom(qop->arg3)
4406                                     && isIRAtom(qop->arg4));
4407             case Iex_Triop:  triop = e->Iex.Triop.details;
4408                              return toBool(
4409                                     isIRAtom(triop->arg1)
4410                                     && isIRAtom(triop->arg2)
4411                                     && isIRAtom(triop->arg3));
4412             case Iex_Binop:  return toBool(
4413                                     isIRAtom(e->Iex.Binop.arg1)
4414                                     && isIRAtom(e->Iex.Binop.arg2));
4415             case Iex_Unop:   return isIRAtom(e->Iex.Unop.arg);
4416             case Iex_Load:   return isIRAtom(e->Iex.Load.addr);
4417             case Iex_Const:  return True;
4418             case Iex_CCall:  for (i = 0; e->Iex.CCall.args[i]; i++)
4419                                 if (!isIRAtom(e->Iex.CCall.args[i]))
4420                                    return False;
4421                              return True;
4422             case Iex_ITE:    return toBool (
4423                                     isIRAtom(e->Iex.ITE.cond)
4424                                     && isIRAtom(e->Iex.ITE.iftrue)
4425                                     && isIRAtom(e->Iex.ITE.iffalse));
4426             default:         vpanic("isFlatIRStmt(e)");
4427          }
4428          /*notreached*/
4429          vassert(0);
4430       case Ist_Store:
4431          return toBool( isIRAtom(st->Ist.Store.addr)
4432                         && isIRAtom(st->Ist.Store.data) );
4433       case Ist_StoreG: {
4434          const IRStoreG* sg = st->Ist.StoreG.details;
4435          return toBool( isIRAtom(sg->addr)
4436                         && isIRAtom(sg->data) && isIRAtom(sg->guard) );
4437       }
4438       case Ist_LoadG: {
4439          const IRLoadG* lg = st->Ist.LoadG.details;
4440          return toBool( isIRAtom(lg->addr)
4441                         && isIRAtom(lg->alt) && isIRAtom(lg->guard) );
4442       }
4443       case Ist_CAS: {
4444         const IRCAS* cas = st->Ist.CAS.details;
4445          return toBool( isIRAtom(cas->addr)
4446                         && (cas->expdHi ? isIRAtom(cas->expdHi) : True)
4447                         && isIRAtom(cas->expdLo)
4448                         && (cas->dataHi ? isIRAtom(cas->dataHi) : True)
4449                         && isIRAtom(cas->dataLo) );
4450       }
4451       case Ist_LLSC:
4452          return toBool( isIRAtom(st->Ist.LLSC.addr)
4453                         && (st->Ist.LLSC.storedata
4454                                ? isIRAtom(st->Ist.LLSC.storedata) : True) );
4455       case Ist_Dirty: {
4456          const IRDirty* di = st->Ist.Dirty.details;
4457          if (!isIRAtom(di->guard))
4458             return False;
4459          for (i = 0; di->args[i]; i++)
4460             if (!isIRAtom_or_VECRET_or_GSPTR(di->args[i]))
4461                return False;
4462          if (di->mAddr && !isIRAtom(di->mAddr))
4463             return False;
4464          return True;
4465       }
4466       case Ist_NoOp:
4467       case Ist_IMark:
4468       case Ist_MBE:
4469          return True;
4470       case Ist_Exit:
4471          return isIRAtom(st->Ist.Exit.guard);
4472       default:
4473          vpanic("isFlatIRStmt(st)");
4474    }
4475 }
4476
4477 Bool isFlatIRSB ( const IRSB* sb )
4478 {
4479    for (Int i = 0; i < sb->stmts_used; i++) {
4480       if (!isFlatIRStmt(sb->stmts[i]))
4481           return False;
4482    }
4483
4484    if (!isIRAtom(sb->next)) {
4485       return False;
4486    }
4487
4488    return True;
4489 }
4490
4491
4492 /*---------------------------------------------------------------*/
4493 /*--- Sanity checking                                         ---*/
4494 /*---------------------------------------------------------------*/
4495
4496 /* Checks:
4497
4498    Everything is type-consistent.  No ill-typed anything.
4499    The target address at the end of the BB is a 32- or 64-
4500    bit expression, depending on the guest's word size.
4501
4502    Each temp is assigned only once, before its uses.
4503 */
4504
4505 static inline Int countArgs ( IRExpr** args )
4506 {
4507    Int i;
4508    for (i = 0; args[i]; i++)
4509       ;
4510    return i;
4511 }
4512
4513 static
4514 __attribute((noreturn))
4515 void sanityCheckFail ( const IRSB* bb, const IRStmt* stmt, const HChar* what )
4516 {
4517    vex_printf("\nIR SANITY CHECK FAILURE\n\n");
4518    ppIRSB(bb);
4519    if (stmt) {
4520       vex_printf("\nIN STATEMENT:\n\n");
4521       ppIRStmt(stmt);
4522    }
4523    vex_printf("\n\nERROR = %s\n\n", what );
4524    vpanic("sanityCheckFail: exiting due to bad IR");
4525 }
4526
4527 static Bool saneIRRegArray ( const IRRegArray* arr )
4528 {
4529    if (arr->base < 0 || arr->base > 10000 /* somewhat arbitrary */)
4530       return False;
4531    if (arr->elemTy == Ity_I1)
4532       return False;
4533    if (arr->nElems <= 0 || arr->nElems > 500 /* somewhat arbitrary */)
4534       return False;
4535    return True;
4536 }
4537
4538 static Bool saneIRCallee ( const IRCallee* cee )
4539 {
4540    if (cee->name == NULL)
4541       return False;
4542    if (cee->addr == 0)
4543       return False;
4544    if (cee->regparms < 0 || cee->regparms > 3)
4545       return False;
4546    return True;
4547 }
4548
4549 static Bool saneIRConst ( const IRConst* con )
4550 {
4551    switch (con->tag) {
4552       case Ico_U1:
4553          return toBool( con->Ico.U1 == True || con->Ico.U1 == False );
4554       default:
4555          /* Is there anything we can meaningfully check?  I don't
4556             think so. */
4557          return True;
4558    }
4559 }
4560
4561 /* Traverse a Stmt/Expr, inspecting IRTemp uses.  Report any out of
4562    range ones.  Report any which are read and for which the current
4563    def_count is zero. */
4564
4565 static
4566 void useBeforeDef_Temp ( const IRSB* bb, const IRStmt* stmt, IRTemp tmp,
4567                          Int* def_counts )
4568 {
4569    if (tmp >= bb->tyenv->types_used)
4570       sanityCheckFail(bb,stmt, "out of range Temp in IRExpr");
4571    if (def_counts[tmp] < 1)
4572       sanityCheckFail(bb,stmt, "IRTemp use before def in IRExpr");
4573 }
4574
4575 static
4576 void assignedOnce_Temp(const IRSB *bb, const IRStmt *stmt, IRTemp tmp,
4577                        Int *def_counts, UInt n_def_counts,
4578                        const HChar *err_msg_out_of_range,
4579                        const HChar *err_msg_assigned_more_than_once)
4580 {
4581    if (tmp >= n_def_counts) {
4582       sanityCheckFail(bb, stmt, err_msg_out_of_range);
4583    }
4584
4585    def_counts[tmp]++;
4586    if (def_counts[tmp] > 1) {
4587       sanityCheckFail(bb, stmt, err_msg_assigned_more_than_once);
4588    }
4589 }
4590
4591 static
4592 void useBeforeDef_Expr ( const IRSB* bb, const IRStmt* stmt,
4593                          const IRExpr* expr, Int* def_counts )
4594 {
4595    Int i;
4596    switch (expr->tag) {
4597       case Iex_Get:
4598          break;
4599       case Iex_GetI:
4600          useBeforeDef_Expr(bb,stmt,expr->Iex.GetI.ix,def_counts);
4601          break;
4602       case Iex_RdTmp:
4603          useBeforeDef_Temp(bb,stmt,expr->Iex.RdTmp.tmp,def_counts);
4604          break;
4605       case Iex_Qop: {
4606          const IRQop* qop = expr->Iex.Qop.details;
4607          useBeforeDef_Expr(bb,stmt,qop->arg1,def_counts);
4608          useBeforeDef_Expr(bb,stmt,qop->arg2,def_counts);
4609          useBeforeDef_Expr(bb,stmt,qop->arg3,def_counts);
4610          useBeforeDef_Expr(bb,stmt,qop->arg4,def_counts);
4611          break;
4612       }
4613       case Iex_Triop: {
4614          const IRTriop* triop = expr->Iex.Triop.details;
4615          useBeforeDef_Expr(bb,stmt,triop->arg1,def_counts);
4616          useBeforeDef_Expr(bb,stmt,triop->arg2,def_counts);
4617          useBeforeDef_Expr(bb,stmt,triop->arg3,def_counts);
4618          break;
4619       }
4620       case Iex_Binop:
4621          useBeforeDef_Expr(bb,stmt,expr->Iex.Binop.arg1,def_counts);
4622          useBeforeDef_Expr(bb,stmt,expr->Iex.Binop.arg2,def_counts);
4623          break;
4624       case Iex_Unop:
4625          useBeforeDef_Expr(bb,stmt,expr->Iex.Unop.arg,def_counts);
4626          break;
4627       case Iex_Load:
4628          useBeforeDef_Expr(bb,stmt,expr->Iex.Load.addr,def_counts);
4629          break;
4630       case Iex_Const:
4631          break;
4632       case Iex_CCall:
4633          for (i = 0; expr->Iex.CCall.args[i]; i++) {
4634             const IRExpr* arg = expr->Iex.CCall.args[i];
4635             if (UNLIKELY(is_IRExpr_VECRET_or_GSPTR(arg))) {
4636                /* These aren't allowed in CCall lists.  Let's detect
4637                   and throw them out here, though, rather than
4638                   segfaulting a bit later on. */
4639                sanityCheckFail(bb,stmt, "IRExprP__* value in CCall arg list");
4640             } else {
4641                useBeforeDef_Expr(bb,stmt,arg,def_counts);
4642             }
4643          }
4644          break;
4645       case Iex_ITE:
4646          useBeforeDef_Expr(bb,stmt,expr->Iex.ITE.cond,def_counts);
4647          useBeforeDef_Expr(bb,stmt,expr->Iex.ITE.iftrue,def_counts);
4648          useBeforeDef_Expr(bb,stmt,expr->Iex.ITE.iffalse,def_counts);
4649          break;
4650       default:
4651          vpanic("useBeforeDef_Expr");
4652    }
4653 }
4654
4655 static
4656 void useBeforeDef_Stmt ( const IRSB* bb, const IRStmt* stmt, Int* def_counts )
4657 {
4658    Int       i;
4659    const IRDirty*  d;
4660    const IRCAS*    cas;
4661    const IRPutI*   puti;
4662    const IRLoadG*  lg;
4663    const IRStoreG* sg;
4664    switch (stmt->tag) {
4665       case Ist_IMark:
4666          break;
4667       case Ist_AbiHint:
4668          useBeforeDef_Expr(bb,stmt,stmt->Ist.AbiHint.base,def_counts);
4669          useBeforeDef_Expr(bb,stmt,stmt->Ist.AbiHint.nia,def_counts);
4670          break;
4671       case Ist_Put:
4672          useBeforeDef_Expr(bb,stmt,stmt->Ist.Put.data,def_counts);
4673          break;
4674       case Ist_PutI:
4675          puti = stmt->Ist.PutI.details;
4676          useBeforeDef_Expr(bb,stmt,puti->ix,def_counts);
4677          useBeforeDef_Expr(bb,stmt,puti->data,def_counts);
4678          break;
4679       case Ist_WrTmp:
4680          useBeforeDef_Expr(bb,stmt,stmt->Ist.WrTmp.data,def_counts);
4681          break;
4682       case Ist_Store:
4683          useBeforeDef_Expr(bb,stmt,stmt->Ist.Store.addr,def_counts);
4684          useBeforeDef_Expr(bb,stmt,stmt->Ist.Store.data,def_counts);
4685          break;
4686       case Ist_StoreG:
4687          sg = stmt->Ist.StoreG.details;
4688          useBeforeDef_Expr(bb,stmt,sg->addr,def_counts);
4689          useBeforeDef_Expr(bb,stmt,sg->data,def_counts);
4690          useBeforeDef_Expr(bb,stmt,sg->guard,def_counts);
4691          break;
4692       case Ist_LoadG:
4693          lg = stmt->Ist.LoadG.details;
4694          useBeforeDef_Expr(bb,stmt,lg->addr,def_counts);
4695          useBeforeDef_Expr(bb,stmt,lg->alt,def_counts);
4696          useBeforeDef_Expr(bb,stmt,lg->guard,def_counts);
4697          break;
4698       case Ist_CAS:
4699          cas = stmt->Ist.CAS.details;
4700          useBeforeDef_Expr(bb,stmt,cas->addr,def_counts);
4701          if (cas->expdHi)
4702             useBeforeDef_Expr(bb,stmt,cas->expdHi,def_counts);
4703          useBeforeDef_Expr(bb,stmt,cas->expdLo,def_counts);
4704          if (cas->dataHi)
4705             useBeforeDef_Expr(bb,stmt,cas->dataHi,def_counts);
4706          useBeforeDef_Expr(bb,stmt,cas->dataLo,def_counts);
4707          break;
4708       case Ist_LLSC:
4709          useBeforeDef_Expr(bb,stmt,stmt->Ist.LLSC.addr,def_counts);
4710          if (stmt->Ist.LLSC.storedata != NULL)
4711             useBeforeDef_Expr(bb,stmt,stmt->Ist.LLSC.storedata,def_counts);
4712          break;
4713       case Ist_Dirty:
4714          d = stmt->Ist.Dirty.details;
4715          for (i = 0; d->args[i] != NULL; i++) {
4716             IRExpr* arg = d->args[i];
4717             if (UNLIKELY(is_IRExpr_VECRET_or_GSPTR(arg))) {
4718                /* This is ensured by isFlatIRStmt */
4719               ;
4720             } else {
4721                useBeforeDef_Expr(bb,stmt,arg,def_counts);
4722             }
4723          }
4724          if (d->mFx != Ifx_None)
4725             useBeforeDef_Expr(bb,stmt,d->mAddr,def_counts);
4726          break;
4727       case Ist_NoOp:
4728       case Ist_MBE:
4729          break;
4730       case Ist_Exit:
4731          useBeforeDef_Expr(bb,stmt,stmt->Ist.Exit.guard,def_counts);
4732          break;
4733       default:
4734          vpanic("useBeforeDef_Stmt");
4735    }
4736 }
4737
4738 static
4739 void assignedOnce_Stmt(const IRSB *bb, const IRStmt *stmt,
4740                        Int *def_counts, UInt n_def_counts)
4741 {
4742    switch (stmt->tag) {
4743    case Ist_WrTmp:
4744       assignedOnce_Temp(
4745          bb, stmt, stmt->Ist.WrTmp.tmp, def_counts, n_def_counts,
4746          "IRStmt.Tmp: destination tmp is out of range",
4747          "IRStmt.Tmp: destination tmp is assigned more than once");
4748       break;
4749    case Ist_LoadG:
4750       assignedOnce_Temp(
4751          bb, stmt, stmt->Ist.LoadG.details->dst, def_counts, n_def_counts,
4752          "IRStmt.LoadG: destination tmp is out of range",
4753          "IRStmt.LoadG: destination tmp is assigned more than once");
4754       break;
4755    case Ist_Dirty:
4756       if (stmt->Ist.Dirty.details->tmp != IRTemp_INVALID) {
4757          assignedOnce_Temp(
4758             bb, stmt, stmt->Ist.Dirty.details->tmp, def_counts, n_def_counts,
4759             "IRStmt.Dirty: destination tmp is out of range",
4760             "IRStmt.Dirty: destination tmp is assigned more than once");
4761       }
4762       break;
4763    case Ist_CAS:
4764       if (stmt->Ist.CAS.details->oldHi != IRTemp_INVALID) {
4765          assignedOnce_Temp(
4766             bb, stmt, stmt->Ist.CAS.details->oldHi, def_counts, n_def_counts,
4767             "IRStmt.CAS: destination tmpHi is out of range",
4768             "IRStmt.CAS: destination tmpHi is assigned more than once");
4769       }
4770       assignedOnce_Temp(
4771          bb, stmt, stmt->Ist.CAS.details->oldLo, def_counts, n_def_counts,
4772          "IRStmt.CAS: destination tmpLo is out of range",
4773          "IRStmt.CAS: destination tmpLo is assigned more than once");
4774       break;
4775    case Ist_LLSC:
4776       assignedOnce_Temp(
4777          bb, stmt, stmt->Ist.LLSC.result, def_counts, n_def_counts,
4778          "IRStmt.LLSC: destination tmp is out of range",
4779          "IRStmt.LLSC: destination tmp is assigned more than once");
4780       break;
4781    // Ignore all other cases
4782    case Ist_NoOp: case Ist_IMark: case Ist_AbiHint: case Ist_Put: case Ist_PutI:
4783    case Ist_Store: case Ist_StoreG: case Ist_MBE: case Ist_Exit:
4784       break;
4785    default:
4786       vassert(0);
4787    }
4788 }
4789
4790 static
4791 void tcExpr ( const IRSB* bb, const IRStmt* stmt, const IRExpr* expr,
4792               IRType gWordTy )
4793 {
4794    Int        i;
4795    IRType     t_dst, t_arg1, t_arg2, t_arg3, t_arg4;
4796    const IRTypeEnv* tyenv = bb->tyenv;
4797    switch (expr->tag) {
4798       case Iex_Get:
4799       case Iex_RdTmp:
4800          break;
4801       case Iex_GetI:
4802          tcExpr(bb,stmt, expr->Iex.GetI.ix, gWordTy );
4803          if (typeOfIRExpr(tyenv,expr->Iex.GetI.ix) != Ity_I32)
4804             sanityCheckFail(bb,stmt,"IRExpr.GetI.ix: not :: Ity_I32");
4805          if (!saneIRRegArray(expr->Iex.GetI.descr))
4806             sanityCheckFail(bb,stmt,"IRExpr.GetI.descr: invalid descr");
4807          break;
4808       case Iex_Qop: {
4809          IRType ttarg1, ttarg2, ttarg3, ttarg4;
4810          const IRQop* qop = expr->Iex.Qop.details;
4811          tcExpr(bb,stmt, qop->arg1, gWordTy );
4812          tcExpr(bb,stmt, qop->arg2, gWordTy );
4813          tcExpr(bb,stmt, qop->arg3, gWordTy );
4814          tcExpr(bb,stmt, qop->arg4, gWordTy );
4815          typeOfPrimop(qop->op,
4816                       &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4);
4817          if (t_arg1 == Ity_INVALID || t_arg2 == Ity_INVALID
4818              || t_arg3 == Ity_INVALID || t_arg4 == Ity_INVALID) {
4819             vex_printf(" op name: " );
4820             ppIROp(qop->op);
4821             vex_printf("\n");
4822             sanityCheckFail(bb,stmt,
4823                "Iex.Qop: wrong arity op\n"
4824                "... name of op precedes BB printout\n");
4825          }
4826          ttarg1 = typeOfIRExpr(tyenv, qop->arg1);
4827          ttarg2 = typeOfIRExpr(tyenv, qop->arg2);
4828          ttarg3 = typeOfIRExpr(tyenv, qop->arg3);
4829          ttarg4 = typeOfIRExpr(tyenv, qop->arg4);
4830          if (t_arg1 != ttarg1 || t_arg2 != ttarg2
4831              || t_arg3 != ttarg3 || t_arg4 != ttarg4) {
4832             vex_printf(" op name: ");
4833             ppIROp(qop->op);
4834             vex_printf("\n");
4835             vex_printf(" op type is (");
4836             ppIRType(t_arg1);
4837             vex_printf(",");
4838             ppIRType(t_arg2);
4839             vex_printf(",");
4840             ppIRType(t_arg3);
4841             vex_printf(",");
4842             ppIRType(t_arg4);
4843             vex_printf(") -> ");
4844             ppIRType (t_dst);
4845             vex_printf("\narg tys are (");
4846             ppIRType(ttarg1);
4847             vex_printf(",");
4848             ppIRType(ttarg2);
4849             vex_printf(",");
4850             ppIRType(ttarg3);
4851             vex_printf(",");
4852             ppIRType(ttarg4);
4853             vex_printf(")\n");
4854             sanityCheckFail(bb,stmt,
4855                "Iex.Qop: arg tys don't match op tys\n"
4856                "... additional details precede BB printout\n");
4857          }
4858          break;
4859       }
4860       case Iex_Triop: {
4861          IRType ttarg1, ttarg2, ttarg3;
4862          const IRTriop *triop = expr->Iex.Triop.details;
4863          tcExpr(bb,stmt, triop->arg1, gWordTy );
4864          tcExpr(bb,stmt, triop->arg2, gWordTy );
4865          tcExpr(bb,stmt, triop->arg3, gWordTy );
4866          typeOfPrimop(triop->op,
4867                       &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4);
4868          if (t_arg1 == Ity_INVALID || t_arg2 == Ity_INVALID
4869              || t_arg3 == Ity_INVALID || t_arg4 != Ity_INVALID) {
4870             vex_printf(" op name: " );
4871             ppIROp(triop->op);
4872             vex_printf("\n");
4873             sanityCheckFail(bb,stmt,
4874                "Iex.Triop: wrong arity op\n"
4875                "... name of op precedes BB printout\n");
4876          }
4877          ttarg1 = typeOfIRExpr(tyenv, triop->arg1);
4878          ttarg2 = typeOfIRExpr(tyenv, triop->arg2);
4879          ttarg3 = typeOfIRExpr(tyenv, triop->arg3);
4880          if (t_arg1 != ttarg1 || t_arg2 != ttarg2 || t_arg3 != ttarg3) {
4881             vex_printf(" op name: ");
4882             ppIROp(triop->op);
4883             vex_printf("\n");
4884             vex_printf(" op type is (");
4885             ppIRType(t_arg1);
4886             vex_printf(",");
4887             ppIRType(t_arg2);
4888             vex_printf(",");
4889             ppIRType(t_arg3);
4890             vex_printf(") -> ");
4891             ppIRType (t_dst);
4892             vex_printf("\narg tys are (");
4893             ppIRType(ttarg1);
4894             vex_printf(",");
4895             ppIRType(ttarg2);
4896             vex_printf(",");
4897             ppIRType(ttarg3);
4898             vex_printf(")\n");
4899             sanityCheckFail(bb,stmt,
4900                "Iex.Triop: arg tys don't match op tys\n"
4901                "... additional details precede BB printout\n");
4902          }
4903          break;
4904       }
4905       case Iex_Binop: {
4906          IRType ttarg1, ttarg2;
4907          tcExpr(bb,stmt, expr->Iex.Binop.arg1, gWordTy );
4908          tcExpr(bb,stmt, expr->Iex.Binop.arg2, gWordTy );
4909          typeOfPrimop(expr->Iex.Binop.op,
4910                       &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4);
4911          if (t_arg1 == Ity_INVALID || t_arg2 == Ity_INVALID
4912              || t_arg3 != Ity_INVALID || t_arg4 != Ity_INVALID) {
4913             vex_printf(" op name: " );
4914             ppIROp(expr->Iex.Binop.op);
4915             vex_printf("\n");
4916             sanityCheckFail(bb,stmt,
4917                "Iex.Binop: wrong arity op\n"
4918                "... name of op precedes BB printout\n");
4919          }
4920          ttarg1 = typeOfIRExpr(tyenv, expr->Iex.Binop.arg1);
4921          ttarg2 = typeOfIRExpr(tyenv, expr->Iex.Binop.arg2);
4922          if (t_arg1 != ttarg1 || t_arg2 != ttarg2) {
4923             vex_printf(" op name: ");
4924             ppIROp(expr->Iex.Binop.op);
4925             vex_printf("\n");
4926             vex_printf(" op type is (");
4927             ppIRType(t_arg1);
4928             vex_printf(",");
4929             ppIRType(t_arg2);
4930             vex_printf(") -> ");
4931             ppIRType (t_dst);
4932             vex_printf("\narg tys are (");
4933             ppIRType(ttarg1);
4934             vex_printf(",");
4935             ppIRType(ttarg2);
4936             vex_printf(")\n");
4937             sanityCheckFail(bb,stmt,
4938                "Iex.Binop: arg tys don't match op tys\n"
4939                "... additional details precede BB printout\n");
4940          }
4941          break;
4942       }
4943       case Iex_Unop:
4944          tcExpr(bb,stmt, expr->Iex.Unop.arg, gWordTy );
4945          typeOfPrimop(expr->Iex.Unop.op,
4946                       &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4);
4947          if (t_arg1 == Ity_INVALID || t_arg2 != Ity_INVALID
4948              || t_arg3 != Ity_INVALID || t_arg4 != Ity_INVALID)
4949             sanityCheckFail(bb,stmt,"Iex.Unop: wrong arity op");
4950          if (t_arg1 != typeOfIRExpr(tyenv, expr->Iex.Unop.arg))
4951             sanityCheckFail(bb,stmt,"Iex.Unop: arg ty doesn't match op ty");
4952          break;
4953       case Iex_Load:
4954          tcExpr(bb,stmt, expr->Iex.Load.addr, gWordTy);
4955          if (typeOfIRExpr(tyenv, expr->Iex.Load.addr) != gWordTy)
4956             sanityCheckFail(bb,stmt,"Iex.Load.addr: not :: guest word type");
4957          if (expr->Iex.Load.end != Iend_LE && expr->Iex.Load.end != Iend_BE)
4958             sanityCheckFail(bb,stmt,"Iex.Load.end: bogus endianness");
4959          break;
4960       case Iex_CCall:
4961          if (!saneIRCallee(expr->Iex.CCall.cee))
4962             sanityCheckFail(bb,stmt,"Iex.CCall.cee: bad IRCallee");
4963          if (expr->Iex.CCall.cee->regparms > countArgs(expr->Iex.CCall.args))
4964             sanityCheckFail(bb,stmt,"Iex.CCall.cee: #regparms > #args");
4965          for (i = 0; expr->Iex.CCall.args[i]; i++) {
4966             if (i >= 32)
4967                sanityCheckFail(bb,stmt,"Iex.CCall: > 32 args");
4968             IRExpr* arg = expr->Iex.CCall.args[i];
4969             if (UNLIKELY(is_IRExpr_VECRET_or_GSPTR(arg)))
4970                sanityCheckFail(bb,stmt,"Iex.CCall.args: is VECRET/GSPTR");
4971             tcExpr(bb,stmt, arg, gWordTy);
4972          }
4973          if (expr->Iex.CCall.retty == Ity_I1)
4974             sanityCheckFail(bb,stmt,"Iex.CCall.retty: cannot return :: Ity_I1");
4975          for (i = 0; expr->Iex.CCall.args[i]; i++)
4976             if (typeOfIRExpr(tyenv, expr->Iex.CCall.args[i]) == Ity_I1)
4977                sanityCheckFail(bb,stmt,"Iex.CCall.arg: arg :: Ity_I1");
4978          break;
4979       case Iex_Const:
4980          if (!saneIRConst(expr->Iex.Const.con))
4981             sanityCheckFail(bb,stmt,"Iex.Const.con: invalid const");
4982          break;
4983       case Iex_ITE:
4984          tcExpr(bb,stmt, expr->Iex.ITE.cond, gWordTy);
4985          tcExpr(bb,stmt, expr->Iex.ITE.iftrue, gWordTy);
4986          tcExpr(bb,stmt, expr->Iex.ITE.iffalse, gWordTy);
4987          if (typeOfIRExpr(tyenv, expr->Iex.ITE.cond) != Ity_I1)
4988             sanityCheckFail(bb,stmt,"Iex.ITE.cond: cond :: Ity_I1");
4989          if (typeOfIRExpr(tyenv, expr->Iex.ITE.iftrue)
4990              != typeOfIRExpr(tyenv, expr->Iex.ITE.iffalse))
4991             sanityCheckFail(bb,stmt,"Iex.ITE: iftrue/iffalse mismatch");
4992          break;
4993       default:
4994          vpanic("tcExpr");
4995    }
4996 }
4997
4998
4999 static
5000 void tcStmt ( const IRSB* bb, const IRStmt* stmt, IRType gWordTy )
5001 {
5002    Int        i;
5003    IRType     tyExpd, tyData;
5004    const IRTypeEnv* tyenv = bb->tyenv;
5005    switch (stmt->tag) {
5006       case Ist_IMark:
5007          /* Somewhat heuristic, but rule out totally implausible
5008             instruction sizes and deltas. */
5009          if (stmt->Ist.IMark.len > 24)
5010             sanityCheckFail(bb,stmt,"IRStmt.IMark.len: implausible");
5011          if (stmt->Ist.IMark.delta > 1)
5012             sanityCheckFail(bb,stmt,"IRStmt.IMark.delta: implausible");
5013          break;
5014       case Ist_AbiHint:
5015          if (typeOfIRExpr(tyenv, stmt->Ist.AbiHint.base) != gWordTy)
5016             sanityCheckFail(bb,stmt,"IRStmt.AbiHint.base: "
5017                                     "not :: guest word type");
5018          if (typeOfIRExpr(tyenv, stmt->Ist.AbiHint.nia) != gWordTy)
5019             sanityCheckFail(bb,stmt,"IRStmt.AbiHint.nia: "
5020                                     "not :: guest word type");
5021          break;
5022       case Ist_Put:
5023          tcExpr( bb, stmt, stmt->Ist.Put.data, gWordTy );
5024          if (typeOfIRExpr(tyenv,stmt->Ist.Put.data) == Ity_I1)
5025             sanityCheckFail(bb,stmt,"IRStmt.Put.data: cannot Put :: Ity_I1");
5026          break;
5027       case Ist_PutI:{
5028          const IRPutI* puti = stmt->Ist.PutI.details;
5029          tcExpr( bb, stmt, puti->data, gWordTy );
5030          tcExpr( bb, stmt, puti->ix, gWordTy );
5031          if (typeOfIRExpr(tyenv,puti->data) == Ity_I1)
5032             sanityCheckFail(bb,stmt,"IRStmt.PutI.data: cannot PutI :: Ity_I1");
5033          if (typeOfIRExpr(tyenv,puti->data)
5034              != puti->descr->elemTy)
5035             sanityCheckFail(bb,stmt,"IRStmt.PutI.data: data ty != elem ty");
5036          if (typeOfIRExpr(tyenv,puti->ix) != Ity_I32)
5037             sanityCheckFail(bb,stmt,"IRStmt.PutI.ix: not :: Ity_I32");
5038          if (!saneIRRegArray(puti->descr))
5039             sanityCheckFail(bb,stmt,"IRStmt.PutI.descr: invalid descr");
5040          break;
5041       }
5042       case Ist_WrTmp:
5043          tcExpr( bb, stmt, stmt->Ist.WrTmp.data, gWordTy );
5044          if (typeOfIRTemp(tyenv, stmt->Ist.WrTmp.tmp)
5045              != typeOfIRExpr(tyenv, stmt->Ist.WrTmp.data))
5046             sanityCheckFail(bb,stmt,
5047                             "IRStmt.Put.Tmp: tmp and expr do not match");
5048          break;
5049       case Ist_Store:
5050          tcExpr( bb, stmt, stmt->Ist.Store.addr, gWordTy );
5051          tcExpr( bb, stmt, stmt->Ist.Store.data, gWordTy );
5052          if (typeOfIRExpr(tyenv, stmt->Ist.Store.addr) != gWordTy)
5053             sanityCheckFail(bb,stmt,
5054                             "IRStmt.Store.addr: not :: guest word type");
5055          if (typeOfIRExpr(tyenv, stmt->Ist.Store.data) == Ity_I1)
5056             sanityCheckFail(bb,stmt,
5057                             "IRStmt.Store.data: cannot Store :: Ity_I1");
5058          if (stmt->Ist.Store.end != Iend_LE && stmt->Ist.Store.end != Iend_BE)
5059             sanityCheckFail(bb,stmt,"Ist.Store.end: bogus endianness");
5060          break;
5061       case Ist_StoreG: {
5062          const IRStoreG* sg = stmt->Ist.StoreG.details;
5063          tcExpr( bb, stmt, sg->addr, gWordTy );
5064          tcExpr( bb, stmt, sg->data, gWordTy );
5065          tcExpr( bb, stmt, sg->guard, gWordTy );
5066          if (typeOfIRExpr(tyenv, sg->addr) != gWordTy)
5067             sanityCheckFail(bb,stmt,"IRStmtG...addr: not :: guest word type");
5068          if (typeOfIRExpr(tyenv, sg->data) == Ity_I1)
5069             sanityCheckFail(bb,stmt,"IRStmtG...data: cannot Store :: Ity_I1");
5070          if (typeOfIRExpr(tyenv, sg->guard) != Ity_I1)
5071             sanityCheckFail(bb,stmt,"IRStmtG...guard: not :: Ity_I1");
5072          if (sg->end != Iend_LE && sg->end != Iend_BE)
5073             sanityCheckFail(bb,stmt,"IRStmtG...end: bogus endianness");
5074          break;
5075       }
5076       case Ist_LoadG: {
5077          const IRLoadG* lg = stmt->Ist.LoadG.details;
5078          tcExpr( bb, stmt, lg->addr, gWordTy );
5079          tcExpr( bb, stmt, lg->alt, gWordTy );
5080          tcExpr( bb, stmt, lg->guard, gWordTy );
5081          if (typeOfIRExpr(tyenv, lg->guard) != Ity_I1)
5082             sanityCheckFail(bb,stmt,"IRStmt.LoadG.guard: not :: Ity_I1");
5083          if (typeOfIRExpr(tyenv, lg->addr) != gWordTy)
5084               sanityCheckFail(bb,stmt,"IRStmt.LoadG.addr: not "
5085                                       ":: guest word type");
5086          if (typeOfIRExpr(tyenv, lg->alt) != typeOfIRTemp(tyenv, lg->dst))
5087              sanityCheckFail(bb,stmt,"IRStmt.LoadG: dst/alt type mismatch");
5088          IRType cvtRes = Ity_INVALID, cvtArg = Ity_INVALID;
5089          typeOfIRLoadGOp(lg->cvt, &cvtRes, &cvtArg);
5090          if (cvtRes != typeOfIRTemp(tyenv, lg->dst))
5091             sanityCheckFail(bb,stmt,"IRStmt.LoadG: dst/loaded type mismatch");
5092          break;
5093       }
5094       case Ist_CAS: {
5095          const IRCAS* cas = stmt->Ist.CAS.details;
5096          /* make sure it's definitely either a CAS or a DCAS */
5097          if (cas->oldHi == IRTemp_INVALID
5098              && cas->expdHi == NULL && cas->dataHi == NULL) {
5099             /* fine; it's a single cas */
5100          }
5101          else
5102          if (cas->oldHi != IRTemp_INVALID
5103              && cas->expdHi != NULL && cas->dataHi != NULL) {
5104             /* fine; it's a double cas */
5105          }
5106          else {
5107             /* it's some el-mutanto hybrid */
5108             goto bad_cas;
5109          }
5110          /* check the address type */
5111          tcExpr( bb, stmt, cas->addr, gWordTy );
5112          if (typeOfIRExpr(tyenv, cas->addr) != gWordTy) goto bad_cas;
5113          /* check types on the {old,expd,data}Lo components agree */
5114          tyExpd = typeOfIRExpr(tyenv, cas->expdLo);
5115          tyData = typeOfIRExpr(tyenv, cas->dataLo);
5116          if (tyExpd != tyData) goto bad_cas;
5117          if (tyExpd != typeOfIRTemp(tyenv, cas->oldLo))
5118             goto bad_cas;
5119          /* check the base element type is sane */
5120          if (tyExpd == Ity_I8 || tyExpd == Ity_I16 || tyExpd == Ity_I32
5121              || (gWordTy == Ity_I64 && tyExpd == Ity_I64)) {
5122             /* fine */
5123          } else {
5124             goto bad_cas;
5125          }
5126          /* If it's a DCAS, check types on the {old,expd,data}Hi
5127             components too */
5128          if (cas->oldHi != IRTemp_INVALID) {
5129             tyExpd = typeOfIRExpr(tyenv, cas->expdHi);
5130             tyData = typeOfIRExpr(tyenv, cas->dataHi);
5131             if (tyExpd != tyData) goto bad_cas;
5132             if (tyExpd != typeOfIRTemp(tyenv, cas->oldHi))
5133                goto bad_cas;
5134             /* and finally check that oldLo and oldHi have the same
5135                type.  This forces equivalence amongst all 6 types. */
5136             if (typeOfIRTemp(tyenv, cas->oldHi)
5137                 != typeOfIRTemp(tyenv, cas->oldLo))
5138                goto bad_cas;
5139          }
5140          break;
5141          bad_cas:
5142          sanityCheckFail(bb,stmt,"IRStmt.CAS: ill-formed");
5143          break;
5144       }
5145       case Ist_LLSC: {
5146          IRType tyRes;
5147          if (typeOfIRExpr(tyenv, stmt->Ist.LLSC.addr) != gWordTy)
5148             sanityCheckFail(bb,stmt,"IRStmt.LLSC.addr: not :: guest word type");
5149          if (stmt->Ist.LLSC.end != Iend_LE && stmt->Ist.LLSC.end != Iend_BE)
5150             sanityCheckFail(bb,stmt,"Ist.LLSC.end: bogus endianness");
5151          tyRes = typeOfIRTemp(tyenv, stmt->Ist.LLSC.result);
5152          if (stmt->Ist.LLSC.storedata == NULL) {
5153             /* it's a LL */
5154             if (tyRes != Ity_I128 && tyRes != Ity_I64 && tyRes != Ity_I32
5155                 && tyRes != Ity_I16 && tyRes != Ity_I8)
5156                sanityCheckFail(bb,stmt,"Ist.LLSC(LL).result :: bogus");
5157          } else {
5158             /* it's a SC */
5159             if (tyRes != Ity_I1)
5160                sanityCheckFail(bb,stmt,"Ist.LLSC(SC).result: not :: Ity_I1");
5161             tyData = typeOfIRExpr(tyenv, stmt->Ist.LLSC.storedata);
5162             if (tyData != Ity_I128 && tyData != Ity_I64 && tyData != Ity_I32
5163                 && tyData != Ity_I16 && tyData != Ity_I8)
5164                sanityCheckFail(bb,stmt,
5165                                "Ist.LLSC(SC).result :: storedata bogus");
5166          }
5167          break;
5168       }
5169       case Ist_Dirty: {
5170          /* Mostly check for various kinds of ill-formed dirty calls. */
5171          const IRDirty* d = stmt->Ist.Dirty.details;
5172          if (d->cee == NULL) goto bad_dirty;
5173          if (!saneIRCallee(d->cee)) goto bad_dirty;
5174          if (d->cee->regparms > countArgs(d->args)) goto bad_dirty;
5175          if (d->mFx == Ifx_None) {
5176             if (d->mAddr != NULL || d->mSize != 0)
5177                goto bad_dirty;
5178          } else {
5179             if (d->mAddr == NULL || d->mSize == 0)
5180                goto bad_dirty;
5181          }
5182          if (d->nFxState < 0 || d->nFxState > VEX_N_FXSTATE)
5183             goto bad_dirty;
5184          for (i = 0; i < d->nFxState; i++) {
5185             if (d->fxState[i].fx == Ifx_None) goto bad_dirty;
5186             if (d->fxState[i].size <= 0) goto bad_dirty;
5187             if (d->fxState[i].nRepeats == 0) {
5188                if (d->fxState[i].repeatLen != 0) goto bad_dirty;
5189             } else {
5190                if (d->fxState[i].repeatLen <= d->fxState[i].size)
5191                   goto bad_dirty;
5192                /* the % is safe because of the .size check above */
5193                if ((d->fxState[i].repeatLen % d->fxState[i].size) != 0)
5194                   goto bad_dirty;
5195             }
5196          }
5197          /* check guard */
5198          if (d->guard == NULL) goto bad_dirty;
5199          tcExpr( bb, stmt, d->guard, gWordTy );
5200          if (typeOfIRExpr(tyenv, d->guard) != Ity_I1)
5201             sanityCheckFail(bb,stmt,"IRStmt.Dirty.guard not :: Ity_I1");
5202          /* check types, minimally */
5203          IRType retTy = Ity_INVALID;
5204          if (d->tmp != IRTemp_INVALID) {
5205             retTy = typeOfIRTemp(tyenv, d->tmp);
5206             if (retTy == Ity_I1)
5207                sanityCheckFail(bb,stmt,"IRStmt.Dirty.dst :: Ity_I1");
5208          }
5209          UInt nVECRETs = 0, nGSPTRs = 0;
5210          for (i = 0; d->args[i] != NULL; i++) {
5211             if (i >= 32)
5212                sanityCheckFail(bb,stmt,"IRStmt.Dirty: > 32 args");
5213             const IRExpr* arg = d->args[i];
5214             if (UNLIKELY(arg->tag == Iex_VECRET)) {
5215                nVECRETs++;
5216             } else if (UNLIKELY(arg->tag == Iex_GSPTR)) {
5217                nGSPTRs++;
5218             } else {
5219                if (typeOfIRExpr(tyenv, arg) == Ity_I1)
5220                   sanityCheckFail(bb,stmt,"IRStmt.Dirty.arg[i] :: Ity_I1");
5221             }
5222             if (nGSPTRs > 1) {
5223                sanityCheckFail(bb,stmt,"IRStmt.Dirty.args: > 1 GSPTR arg");
5224             }
5225             if (nVECRETs == 1) {
5226                /* Fn must return V128 or V256. */
5227                if (retTy != Ity_V128 && retTy != Ity_V256)
5228                   sanityCheckFail(bb,stmt,
5229                                   "IRStmt.Dirty.args: VECRET present, "
5230                                   "but fn does not return V128 or V256");
5231             } else if (nVECRETs == 0) {
5232                /* Fn must not return V128 or V256 */
5233                if (retTy == Ity_V128 || retTy == Ity_V256)
5234                   sanityCheckFail(bb,stmt,
5235                                   "IRStmt.Dirty.args: VECRET not present, "
5236                                   "but fn returns V128 or V256");
5237             } else {
5238                sanityCheckFail(bb,stmt,
5239                                "IRStmt.Dirty.args: > 1 VECRET present");
5240             }
5241          }
5242          if (nGSPTRs > 1) {
5243             sanityCheckFail(bb,stmt,
5244                             "IRStmt.Dirty.args: > 1 GSPTR present");
5245          }
5246          /* If you ask for the baseblock pointer, you have to make
5247             some declaration about access to the guest state too. */
5248          if (d->nFxState == 0 && nGSPTRs != 0) {
5249             sanityCheckFail(bb,stmt,
5250                             "IRStmt.Dirty.args: GSPTR requested, "
5251                             "but no fxState declared");
5252          }
5253         break;
5254          bad_dirty:
5255          sanityCheckFail(bb,stmt,"IRStmt.Dirty: ill-formed");
5256          break;
5257       }
5258       case Ist_NoOp:
5259          break;
5260       case Ist_MBE:
5261          switch (stmt->Ist.MBE.event) {
5262             case Imbe_Fence: case Imbe_CancelReservation:
5263                break;
5264             default: sanityCheckFail(bb,stmt,"IRStmt.MBE.event: unknown");
5265                break;
5266          }
5267          break;
5268       case Ist_Exit:
5269          tcExpr( bb, stmt, stmt->Ist.Exit.guard, gWordTy );
5270          if (typeOfIRExpr(tyenv,stmt->Ist.Exit.guard) != Ity_I1)
5271             sanityCheckFail(bb,stmt,"IRStmt.Exit.guard: not :: Ity_I1");
5272          if (!saneIRConst(stmt->Ist.Exit.dst))
5273             sanityCheckFail(bb,stmt,"IRStmt.Exit.dst: bad dst");
5274          if (typeOfIRConst(stmt->Ist.Exit.dst) != gWordTy)
5275             sanityCheckFail(bb,stmt,"IRStmt.Exit.dst: not :: guest word type");
5276          /* because it would intersect with host_EvC_* */
5277          if (stmt->Ist.Exit.offsIP < 16)
5278             sanityCheckFail(bb,stmt,"IRStmt.Exit.offsIP: too low");
5279          break;
5280       default:
5281          vpanic("tcStmt");
5282    }
5283 }
5284
5285 void sanityCheckIRSB ( const IRSB* bb, const HChar* caller,
5286                        Bool require_flat, IRType guest_word_size )
5287 {
5288    Int     i;
5289    Int     n_temps    = bb->tyenv->types_used;
5290    Int*    def_counts = LibVEX_Alloc_inline(n_temps * sizeof(Int));
5291
5292    if (0)
5293       vex_printf("sanityCheck: %s\n", caller);
5294
5295    vassert(guest_word_size == Ity_I32
5296            || guest_word_size == Ity_I64);
5297
5298    if (bb->stmts_used < 0 || bb->stmts_size < 8
5299        || bb->stmts_used > bb->stmts_size)
5300       /* this BB is so strange we can't even print it */
5301       vpanic("sanityCheckIRSB: stmts array limits weird");
5302
5303    /* Ensure each temp has a plausible type. */
5304    for (i = 0; i < n_temps; i++) {
5305       IRType ty = typeOfIRTemp(bb->tyenv,(IRTemp)i);
5306       if (!isPlausibleIRType(ty)) {
5307          vex_printf("Temp t%d declared with implausible type 0x%x\n",
5308                     i, (UInt)ty);
5309          sanityCheckFail(bb,NULL,"Temp declared with implausible type");
5310       }
5311    }
5312
5313    const IRStmt* stmt;
5314
5315    /* Check for flatness, if required. */
5316    if (require_flat) {
5317       for (i = 0; i < bb->stmts_used; i++) {
5318          stmt = bb->stmts[i];
5319          if (!stmt)
5320             sanityCheckFail(bb, stmt, "IRStmt: is NULL");
5321          if (!isFlatIRStmt(stmt))
5322             sanityCheckFail(bb, stmt, "IRStmt: is not flat");
5323       }
5324       if (!isIRAtom(bb->next))
5325          sanityCheckFail(bb, NULL, "bb->next is not an atom");
5326    }
5327
5328    /* Count the defs of each temp.  Only one def is allowed.
5329       Also, check that each used temp has already been defd. */
5330
5331    for (i = 0; i < n_temps; i++)
5332       def_counts[i] = 0;
5333
5334    for (i = 0; i < bb->stmts_used; i++) {
5335       stmt = bb->stmts[i];
5336       /* Check any temps used by this statement. */
5337       useBeforeDef_Stmt(bb,stmt,def_counts);
5338
5339       /* Now make note of any temps defd by this statement. */
5340       assignedOnce_Stmt(bb, stmt, def_counts, n_temps);
5341    }
5342
5343    /* Typecheck everything. */
5344    for (i = 0; i < bb->stmts_used; i++)
5345       tcStmt(bb, bb->stmts[i], guest_word_size);
5346    if (typeOfIRExpr(bb->tyenv,bb->next) != guest_word_size)
5347       sanityCheckFail(bb, NULL, "bb->next field has wrong type");
5348    /* because it would intersect with host_EvC_* */
5349    if (bb->offsIP < 16)
5350       sanityCheckFail(bb, NULL, "bb->offsIP: too low");
5351 }
5352
5353 /*---------------------------------------------------------------*/
5354 /*--- Misc helper functions                                   ---*/
5355 /*---------------------------------------------------------------*/
5356
5357 Bool eqIRConst ( const IRConst* c1, const IRConst* c2 )
5358 {
5359    if (c1->tag != c2->tag)
5360       return False;
5361
5362    switch (c1->tag) {
5363       case Ico_U1:  return toBool( (1 & c1->Ico.U1) == (1 & c2->Ico.U1) );
5364       case Ico_U8:  return toBool( c1->Ico.U8  == c2->Ico.U8 );
5365       case Ico_U16: return toBool( c1->Ico.U16 == c2->Ico.U16 );
5366       case Ico_U32: return toBool( c1->Ico.U32 == c2->Ico.U32 );
5367       case Ico_U64: return toBool( c1->Ico.U64 == c2->Ico.U64 );
5368       case Ico_F32: return toBool( c1->Ico.F32 == c2->Ico.F32 );
5369       case Ico_F32i: return toBool( c1->Ico.F32i == c2->Ico.F32i );
5370       case Ico_F64: return toBool( c1->Ico.F64 == c2->Ico.F64 );
5371       case Ico_F64i: return toBool( c1->Ico.F64i == c2->Ico.F64i );
5372       case Ico_V128: return toBool( c1->Ico.V128 == c2->Ico.V128 );
5373       case Ico_V256: return toBool( c1->Ico.V256 == c2->Ico.V256 );
5374       default: vpanic("eqIRConst");
5375    }
5376 }
5377
5378 Bool eqIRRegArray ( const IRRegArray* descr1, const IRRegArray* descr2 )
5379 {
5380    return toBool( descr1->base == descr2->base
5381                   && descr1->elemTy == descr2->elemTy
5382                   && descr1->nElems == descr2->nElems );
5383 }
5384
5385 Int sizeofIRType ( IRType ty )
5386 {
5387    switch (ty) {
5388       case Ity_I8:   return 1;
5389       case Ity_I16:  return 2;
5390       case Ity_I32:  return 4;
5391       case Ity_I64:  return 8;
5392       case Ity_I128: return 16;
5393       case Ity_F16:  return 2;
5394       case Ity_F32:  return 4;
5395       case Ity_F64:  return 8;
5396       case Ity_F128: return 16;
5397       case Ity_D32:  return 4;
5398       case Ity_D64:  return 8;
5399       case Ity_D128: return 16;
5400       case Ity_V128: return 16;
5401       case Ity_V256: return 32;
5402       default: vex_printf("\n"); ppIRType(ty); vex_printf("\n");
5403                vpanic("sizeofIRType");
5404    }
5405 }
5406
5407 IRType integerIRTypeOfSize ( Int szB )
5408 {
5409    switch (szB) {
5410       case 16: return Ity_I128;
5411       case 8: return Ity_I64;
5412       case 4: return Ity_I32;
5413       case 2: return Ity_I16;
5414       case 1: return Ity_I8;
5415       default: vpanic("integerIRTypeOfSize");
5416    }
5417 }
5418
5419 IRExpr* mkIRExpr_HWord ( HWord hw )
5420 {
5421    vassert(sizeof(void*) == sizeof(HWord));
5422    if (sizeof(RegWord) == 4)
5423       return IRExpr_Const(IRConst_U32((UInt)hw));
5424    if (sizeof(RegWord) == 8)
5425       return IRExpr_Const(IRConst_U64((ULong)hw));
5426    vpanic("mkIRExpr_HWord");
5427 }
5428
5429 IRDirty* unsafeIRDirty_0_N ( Int regparms, const HChar* name, void* addr,
5430                              IRExpr** args )
5431 {
5432    IRDirty* d = emptyIRDirty();
5433    d->cee   = mkIRCallee ( regparms, name, addr );
5434    d->guard = IRExpr_Const(IRConst_U1(True));
5435    d->args  = args;
5436    return d;
5437 }
5438
5439 IRDirty* unsafeIRDirty_1_N ( IRTemp dst,
5440                              Int regparms, const HChar* name, void* addr,
5441                              IRExpr** args )
5442 {
5443    IRDirty* d = emptyIRDirty();
5444    d->cee   = mkIRCallee ( regparms, name, addr );
5445    d->guard = IRExpr_Const(IRConst_U1(True));
5446    d->args  = args;
5447    d->tmp   = dst;
5448    return d;
5449 }
5450
5451 IRExpr* mkIRExprCCall ( IRType retty,
5452                         Int regparms, const HChar* name, void* addr,
5453                         IRExpr** args )
5454 {
5455    return IRExpr_CCall ( mkIRCallee ( regparms, name, addr ),
5456                          retty, args );
5457 }
5458
5459 Bool eqIRAtom ( const IRExpr* a1, const IRExpr* a2 )
5460 {
5461    vassert(isIRAtom(a1));
5462    vassert(isIRAtom(a2));
5463    if (a1->tag == Iex_RdTmp && a2->tag == Iex_RdTmp)
5464       return toBool(a1->Iex.RdTmp.tmp == a2->Iex.RdTmp.tmp);
5465    if (a1->tag == Iex_Const && a2->tag == Iex_Const)
5466       return eqIRConst(a1->Iex.Const.con, a2->Iex.Const.con);
5467    return False;
5468 }
5469
5470 /*---------------------------------------------------------------*/
5471 /*--- end                                           ir_defs.c ---*/
5472 /*---------------------------------------------------------------*/