drd/tests/tsan_thread_wrappers_pthread.h: Fix MyThread::ThreadBody()
[valgrind.git] / VEX / priv / guest_mips_defs.h
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2 /*---------------------------------------------------------------*/
3 /*--- begin guest_mips_defs.h ---*/
4 /*---------------------------------------------------------------*/
6 /*
7 This file is part of Valgrind, a dynamic binary instrumentation
8 framework.
10 Copyright (C) 2010-2017 RT-RK
11 mips-valgrind@rt-rk.com
13 This program is free software; you can redistribute it and/or
14 modify it under the terms of the GNU General Public License as
15 published by the Free Software Foundation; either version 2 of the
16 License, or (at your option) any later version.
18 This program is distributed in the hope that it will be useful, but
19 WITHOUT ANY WARRANTY; without even the implied warranty of
20 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
21 General Public License for more details.
23 You should have received a copy of the GNU General Public License
24 along with this program; if not, write to the Free Software
25 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
26 02111-1307, USA.
28 The GNU General Public License is contained in the file COPYING.
31 /* Only to be used within the guest-mips directory. */
33 #ifndef __VEX_GUEST_MIPS_DEFS_H
34 #define __VEX_GUEST_MIPS_DEFS_H
36 #include "libvex_basictypes.h"
37 #include "guest_generic_bb_to_IR.h" /* DisResult */
39 /*---------------------------------------------------------*/
40 /*--- mips to IR conversion ---*/
41 /*---------------------------------------------------------*/
43 /* Convert one MIPS insn to IR. See the type DisOneInstrFn in
44 guest_generic_bb_to_IR.h. */
45 extern DisResult disInstr_MIPS ( IRSB* irbb,
46 Bool (*resteerOkFn) (void *, Addr),
47 Bool resteerCisOk,
48 void* callback_opaque,
49 const UChar* guest_code,
50 Long delta,
51 Addr guest_IP,
52 VexArch guest_arch,
53 const VexArchInfo* archinfo,
54 const VexAbiInfo* abiinfo,
55 VexEndness host_endness,
56 Bool sigill_diag );
58 /* Used by the optimiser to specialise calls to helpers. */
59 extern IRExpr *guest_mips32_spechelper ( const HChar * function_name,
60 IRExpr ** args,
61 IRStmt ** precedingStmts,
62 Int n_precedingStmts );
64 extern IRExpr *guest_mips64_spechelper ( const HChar * function_name,
65 IRExpr ** args,
66 IRStmt ** precedingStmts,
67 Int n_precedingStmts);
69 /* Describes to the optimser which part of the guest state require
70 precise memory exceptions. This is logically part of the guest
71 state description. */
72 extern
73 Bool guest_mips32_state_requires_precise_mem_exns ( Int, Int,
74 VexRegisterUpdates );
76 extern
77 Bool guest_mips64_state_requires_precise_mem_exns ( Int, Int,
78 VexRegisterUpdates );
80 extern VexGuestLayout mips32Guest_layout;
81 extern VexGuestLayout mips64Guest_layout;
83 /*---------------------------------------------------------*/
84 /*--- mips guest helpers ---*/
85 /*---------------------------------------------------------*/
86 typedef enum {
87 CEILWS=0, CEILWD, CEILLS, CEILLD,
88 FLOORWS, FLOORWD, FLOORLS, FLOORLD,
89 ROUNDWS, ROUNDWD, ROUNDLS, ROUNDLD,
90 TRUNCWS, TRUNCWD, TRUNCLS, TRUNCLD,
91 CVTDS, CVTDW, CVTSD, CVTSW,
92 CVTWS, CVTWD, CVTDL, CVTLS,
93 CVTLD, CVTSL, ADDS, ADDD,
94 SUBS, SUBD, DIVS,
95 RINTS, RINTD,
96 MAXS, MAXD, MINS, MIND,
97 MAXAS, MAXAD, MINAS, MINAD,
98 CMPAFS, CMPAFD, CMPSAFS, CMPSAFD,
99 } flt_op;
101 typedef enum {
102 FADDW=0, FADDD, FSUBW, FSUBD, FMULW, FMULD, FDIVW, FDIVD, FMADDW, FMADDD,
103 FCAFD, FCAFW, FSAFD, FSAFW, FCEQD, FCEQW, FSEQD, FSEQW, FCLTD, FCLTW, FSLTD,
104 FSLTW, FCLED, FCLEW, FSLED, FSLEW, FCNED, FCNEW, FSNED, FSNEW, FCUND, FCUNW,
105 FSUND, FSUNW, FCORD, FCORW, FSORD, FSORW, FCUEQD, FCUEQW, FSUEQD, FSUEQW,
106 FCUNED, FCUNEW, FSUNED, FSUNEW, FCULED, FCULEW, FSULED, FSULEW, FCULTD,
107 FCULTW, FSULTD, FSULTW, FEXP2W, FEXP2D, FMINW, FMIND, FMINAW, FMINAD, FMAXW,
108 FMAXD, FMAXAW, FMAXAD, FFINTSW, FFINTSD, FRCPW, FRCPD, FRSQRTW, FRSQRTD,
109 FSQRTW, FSQRTD, FRINTW, FRINTD, FTRUNCUW, FTRUNCUD, FTRUNCSW, FTRUNCSD,
110 FEXDOH, FEXDOW, FEXUPRD, FEXUPRW, FEXUPLD, FEXUPLW, FLOG2W, FLOG2D,
111 FTQH, FTQW, FFQRW, FFQRD,FFQLW, FFQLD, FTINT_SW, FTINT_SD,
112 FTINT_UW, FTINT_UD, FFINT_UW, FFINT_UD,
113 } msa_flt_op;
115 #if defined (_MIPSEL)
116 #define MIPS_IEND Iend_LE
117 #else
118 #define MIPS_IEND Iend_BE
119 #endif
121 extern HWord mips_dirtyhelper_rdhwr ( UInt rd );
123 /* Calculate FCSR in fp32 mode. */
124 extern UInt mips_dirtyhelper_calculate_FCSR_fp32 ( void* guest_state, UInt fs,
125 UInt ft, flt_op op );
126 /* Calculate FCSR in fp64 mode. */
127 extern UInt mips_dirtyhelper_calculate_FCSR_fp64 ( void* guest_state, UInt fs,
128 UInt ft, flt_op op );
130 extern UInt mips_dirtyhelper_calculate_MSACSR ( void* gs, UInt ws, UInt wt,
131 msa_flt_op inst );
132 extern UInt mips_dirtyhelper_get_MSAIR ( void );
135 /*---------------------------------------------------------*/
136 /*--- Condition code stuff ---*/
137 /*---------------------------------------------------------*/
139 typedef enum {
140 MIPSCondEQ = 0, /* equal : Z=1 */
141 MIPSCondNE = 1, /* not equal : Z=0 */
143 MIPSCondHS = 2, /* >=u (higher or same) : C=1 */
144 MIPSCondLO = 3, /* <u (lower) : C=0 */
146 MIPSCondMI = 4, /* minus (negative) : N=1 */
147 MIPSCondPL = 5, /* plus (zero or +ve) : N=0 */
149 MIPSCondVS = 6, /* overflow : V=1 */
150 MIPSCondVC = 7, /* no overflow : V=0 */
152 MIPSCondHI = 8, /* >u (higher) : C=1 && Z=0 */
153 MIPSCondLS = 9, /* <=u (lower or same) : C=0 || Z=1 */
155 MIPSCondGE = 10, /* >=s (signed greater or equal) : N=V */
156 MIPSCondLT = 11, /* <s (signed less than) : N!=V */
158 MIPSCondGT = 12, /* >s (signed greater) : Z=0 && N=V */
159 MIPSCondLE = 13, /* <=s (signed less or equal) : Z=1 || N!=V */
161 MIPSCondAL = 14, /* always (unconditional) : 1 */
162 MIPSCondNV = 15 /* never (unconditional): : 0 */
163 } MIPSCondcode;
165 #endif /* __VEX_GUEST_MIPS_DEFS_H */
167 /*---------------------------------------------------------------*/
168 /*--- end guest_mips_defs.h ---*/
169 /*---------------------------------------------------------------*/