2 <!-- Copyright (C) 2007, 2008, 2009, 2010 Free Software Foundation, Inc.
4 Copying and distribution of this file, with or without modification,
5 are permitted in any medium without royalty provided the copyright
6 notice and this notice are preserved. -->
8 <!DOCTYPE feature SYSTEM "gdb-target.dtd">
9 <feature name="org.gnu.gdb.power.core-valgrind-s1">
10 <reg name="r0s1" bitsize="64" type="uint64"/>
11 <reg name="r1s1" bitsize="64" type="uint64"/>
12 <reg name="r2s1" bitsize="64" type="uint64"/>
13 <reg name="r3s1" bitsize="64" type="uint64"/>
14 <reg name="r4s1" bitsize="64" type="uint64"/>
15 <reg name="r5s1" bitsize="64" type="uint64"/>
16 <reg name="r6s1" bitsize="64" type="uint64"/>
17 <reg name="r7s1" bitsize="64" type="uint64"/>
18 <reg name="r8s1" bitsize="64" type="uint64"/>
19 <reg name="r9s1" bitsize="64" type="uint64"/>
20 <reg name="r10s1" bitsize="64" type="uint64"/>
21 <reg name="r11s1" bitsize="64" type="uint64"/>
22 <reg name="r12s1" bitsize="64" type="uint64"/>
23 <reg name="r13s1" bitsize="64" type="uint64"/>
24 <reg name="r14s1" bitsize="64" type="uint64"/>
25 <reg name="r15s1" bitsize="64" type="uint64"/>
26 <reg name="r16s1" bitsize="64" type="uint64"/>
27 <reg name="r17s1" bitsize="64" type="uint64"/>
28 <reg name="r18s1" bitsize="64" type="uint64"/>
29 <reg name="r19s1" bitsize="64" type="uint64"/>
30 <reg name="r20s1" bitsize="64" type="uint64"/>
31 <reg name="r21s1" bitsize="64" type="uint64"/>
32 <reg name="r22s1" bitsize="64" type="uint64"/>
33 <reg name="r23s1" bitsize="64" type="uint64"/>
34 <reg name="r24s1" bitsize="64" type="uint64"/>
35 <reg name="r25s1" bitsize="64" type="uint64"/>
36 <reg name="r26s1" bitsize="64" type="uint64"/>
37 <reg name="r27s1" bitsize="64" type="uint64"/>
38 <reg name="r28s1" bitsize="64" type="uint64"/>
39 <reg name="r29s1" bitsize="64" type="uint64"/>
40 <reg name="r30s1" bitsize="64" type="uint64"/>
41 <reg name="r31s1" bitsize="64" type="uint64"/>
43 <!-- When printing the non-shadow register names/contents, GDB prints the
44 GPRs followed by the floating point registers then the pc, msr, ...
45 registers. If the shadow GPRs and shadow pc/msr/cr... register
46 definitions are all in this file, as is done with the non-shadow register
47 definitions, the shadow register name print order changes to GPRs,
48 followed by pc/msr/cr... then the floating point registers. Note, the
49 contents of the shadow registers still print in this same order as the
50 non-shadow registers values resulting in the shadow register names and
51 shadow register values not correctly aligning.
53 In order to get, the shadow register names to print in the same order
54 as the non-shadow register and correctly align with their contents,
55 the following register definitions were moved to the file
56 power64-core2-valgrind-s1.xml. The new file is included after the shadow
57 floating point XML definition file. By doing this, we get GDB to print
58 the shadow register names in the same order as the non-shadow register
59 names and thus correctly align with the order that the shadow register
60 contents are printed. -->
62 <!-- <reg name="pcs1" bitsize="64" type="code_ptr"/>
63 <reg name="msrs1" bitsize="64" type="uint64"/>
64 <reg name="crs1" bitsize="32" type="uint32"/>
65 <reg name="lrs1" bitsize="64" type="code_ptr"/>
66 <reg name="ctrs1" bitsize="64" type="uint64"/>
67 <reg name="xers1" bitsize="32" type="uint32"/> -->