drd: Add a consistency check
[valgrind.git] / coregrind / m_debuginfo / readdwarf.c
blob14096d4f67896b5e1419cece24a89ab7bea69ec8
1 /* -*- mode: C; c-basic-offset: 3; -*- */
3 /*--------------------------------------------------------------------*/
4 /*--- Read DWARF1/2/3/4 debug info. readdwarf.c ---*/
5 /*--------------------------------------------------------------------*/
7 /*
8 This file is part of Valgrind, a dynamic binary instrumentation
9 framework.
11 Copyright (C) 2000-2013 Julian Seward
12 jseward@acm.org
14 This program is free software; you can redistribute it and/or
15 modify it under the terms of the GNU General Public License as
16 published by the Free Software Foundation; either version 2 of the
17 License, or (at your option) any later version.
19 This program is distributed in the hope that it will be useful, but
20 WITHOUT ANY WARRANTY; without even the implied warranty of
21 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22 General Public License for more details.
24 You should have received a copy of the GNU General Public License
25 along with this program; if not, write to the Free Software
26 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
27 02111-1307, USA.
29 The GNU General Public License is contained in the file COPYING.
32 #if defined(VGO_linux) || defined(VGO_darwin)
34 #include "pub_core_basics.h"
35 #include "pub_core_debuginfo.h"
36 #include "pub_core_libcbase.h"
37 #include "pub_core_libcassert.h"
38 #include "pub_core_libcprint.h"
39 #include "pub_core_options.h"
40 #include "pub_core_xarray.h"
41 #include "pub_core_tooliface.h" /* VG_(needs) */
42 #include "priv_misc.h" /* dinfo_zalloc/free/strdup */
43 #include "priv_image.h"
44 #include "priv_d3basics.h"
45 #include "priv_tytypes.h"
46 #include "priv_storage.h"
47 #include "priv_readdwarf.h" /* self */
50 /*------------------------------------------------------------*/
51 /*--- ---*/
52 /*--- Read line number and CFI info from DWARF1, DWARF2 ---*/
53 /*--- and to some extent DWARF3 sections. ---*/
54 /*--- ---*/
55 /*------------------------------------------------------------*/
57 /* The below "safe_*ix" functions allow to resist to malformed dwarf info:
58 if dwarf info contains wrong file or dirname indexes, these are (silently!)
59 ignored. */
61 /* if xa_ix is a valid index in fndn_ix_xa,
62 return the element (i.e. the UInt indexing in fndnpool).
63 If xa_ix is invalid, return 0 (i.e. the "null" element in fndnpool). */
64 static UInt safe_fndn_ix (XArray* fndn_ix_xa, Int xa_ix)
66 if (xa_ix < 0) return 0;
67 if (xa_ix >= VG_(sizeXA) (fndn_ix_xa)) return 0;
68 return *(UInt*)VG_(indexXA) ( fndn_ix_xa, xa_ix );
71 /* if xa_ix is a valid index in dirname_xa,
72 return the element (i.e. the HChar*).
73 If xa_ix is invalid, return NULL. */
74 static const HChar* safe_dirname_ix (XArray* dirname_xa, Int xa_ix)
76 if (xa_ix < 0) return NULL;
77 if (xa_ix >= VG_(sizeXA) (dirname_xa)) return NULL;
78 return *(HChar**)VG_(indexXA) ( dirname_xa, xa_ix );
81 /*------------------------------------------------------------*/
82 /*--- Read DWARF2 format line number info. ---*/
83 /*------------------------------------------------------------*/
85 /* Structure holding info extracted from the a .debug_line
86 section. */
87 typedef struct
89 ULong li_length;
90 UShort li_version;
91 ULong li_header_length;
92 UChar li_min_insn_length;
93 UChar li_max_ops_per_insn;
94 UChar li_default_is_stmt;
95 Int li_line_base;
96 UChar li_line_range;
97 UChar li_opcode_base;
99 DebugLineInfo;
101 /* Structure holding additional infos found from a .debug_info
102 * compilation unit block */
103 typedef struct
105 /* Feel free to add more members here if you need ! */
106 DiCursor compdir; /* Compilation directory - points to .debug_info */
107 DiCursor name; /* Main file name - points to .debug_info */
108 ULong stmt_list; /* Offset in .debug_line */
109 Bool dw64; /* 64-bit Dwarf? */
111 UnitInfo;
113 /* Line number opcodes. */
114 enum dwarf_line_number_ops
116 DW_LNS_extended_op = 0,
117 DW_LNS_copy = 1,
118 DW_LNS_advance_pc = 2,
119 DW_LNS_advance_line = 3,
120 DW_LNS_set_file = 4,
121 DW_LNS_set_column = 5,
122 DW_LNS_negate_stmt = 6,
123 DW_LNS_set_basic_block = 7,
124 DW_LNS_const_add_pc = 8,
125 DW_LNS_fixed_advance_pc = 9,
126 /* DWARF 3. */
127 DW_LNS_set_prologue_end = 10,
128 DW_LNS_set_epilogue_begin = 11,
129 DW_LNS_set_isa = 12
132 /* Line number extended opcodes. */
133 enum dwarf_line_number_x_ops
135 DW_LNE_end_sequence = 1,
136 DW_LNE_set_address = 2,
137 DW_LNE_define_file = 3,
138 DW_LNE_set_discriminator = 4
141 typedef struct
143 /* Information for the last statement boundary.
144 * Needed to calculate statement lengths. */
145 Addr last_address;
146 UInt last_file;
147 UInt last_line;
149 Addr address;
150 UInt file;
151 UInt line;
152 UInt column;
153 Int is_stmt;
154 Int basic_block;
155 UChar end_sequence;
156 } LineSMR;
159 /* FIXME: duplicated in readdwarf3.c */
160 /* Read a 'leb128' and advance *data accordingly. */
161 static ULong step_leb128 ( DiCursor* data, Int sign )
163 ULong result = 0;
164 Int shift = 0;
165 UChar byte;
167 vg_assert(sign == 0 || sign == 1);
169 do {
170 byte = ML_(cur_step_UChar)(data);
171 result |= ((ULong)(byte & 0x7f)) << shift;
172 shift += 7;
174 while (byte & 0x80);
176 if (sign && (shift < 64) && (byte & 0x40))
177 result |= -(1ULL << shift);
179 return result;
182 /* FIXME: duplicated in readdwarf3.c */
183 static ULong step_leb128U( DiCursor* data ) {
184 return step_leb128( data, 0 );
187 /* FIXME: duplicated in readdwarf3.c */
188 static Long step_leb128S( DiCursor* data ) {
189 return step_leb128( data, 1 );
192 /* Read what the DWARF3 spec calls an "initial length field". This
193 uses up either 4 or 12 bytes of the input and produces a 32-bit or
194 64-bit number respectively.
196 Read 32-bit value from p. If it is 0xFFFFFFFF, instead read a
197 64-bit bit value from p+4. This is used in 64-bit dwarf to encode
198 some table lengths. Advance the cursor (p) accordingly.
200 XXX this is a hack: the endianness of the initial length field is
201 specified by the DWARF we're reading. This happens to work only
202 because we don't do cross-arch jitting, hence this code runs on a
203 platform of the same endianness as the DWARF it is reading. Same
204 applies for initial lengths for CIE/FDEs and probably in zillions
205 of other places -- to be precise, exactly the places where
206 binutils/dwarf.c calls byte_get().
208 static
209 ULong step_initial_length_field ( DiCursor* p_img, /*OUT*/Bool* is64 )
211 UInt w32 = ML_(cur_step_UInt)(p_img);
212 if (w32 == 0xFFFFFFFF) {
213 *is64 = True;
214 return ML_(cur_step_ULong)(p_img);
215 } else {
216 *is64 = False;
217 return (ULong)w32;
221 static
222 ULong read_initial_length_field ( DiCursor p_img, /*OUT*/Bool* is64 )
224 /* Something of a roundabout approach .. the modification to p_img
225 is abandoned. */
226 return step_initial_length_field( &p_img, is64 );
230 static LineSMR state_machine_regs;
232 static
233 void reset_state_machine ( Int is_stmt )
235 if (0) VG_(printf)("smr.a := %p (reset)\n", NULL );
236 state_machine_regs.last_address = 0;
237 state_machine_regs.last_file = 1;
238 state_machine_regs.last_line = 1;
239 state_machine_regs.address = 0;
240 state_machine_regs.file = 1;
241 state_machine_regs.line = 1;
242 state_machine_regs.column = 0;
243 state_machine_regs.is_stmt = is_stmt;
244 state_machine_regs.basic_block = 0;
245 state_machine_regs.end_sequence = 0;
248 ////////////////////////////////////////////////////////////////////
249 ////////////////////////////////////////////////////////////////////
251 /* Handled an extended line op starting at *data, and advance *data
252 accordingly. */
253 static
254 void process_extended_line_op( struct _DebugInfo* di,
255 XArray* fndn_ix_xa,
256 DiCursor* data, Int is_stmt)
258 UInt len = step_leb128U(data);
259 if (len == 0) {
260 VG_(message)(Vg_UserMsg,
261 "Warning: DWARF2 reader: "
262 "Badly formed extended line op encountered\n");
263 return;
266 UChar op_code = ML_(cur_step_UChar)(data);
267 if (0) VG_(printf)("dwarf2: ext OPC: %d\n", op_code);
269 switch (op_code) {
270 case DW_LNE_end_sequence:
271 if (0) VG_(printf)("1001: si->o %#lx, smr.a %#lx\n",
272 di->text_debug_bias, state_machine_regs.address );
273 /* JRS: added for compliance with spec; is pointless due to
274 reset_state_machine below */
275 state_machine_regs.end_sequence = 1;
277 if (state_machine_regs.is_stmt) {
278 if (state_machine_regs.last_address) {
279 ML_(addLineInfo) (
281 safe_fndn_ix (fndn_ix_xa,
282 state_machine_regs.last_file),
283 di->text_debug_bias + state_machine_regs.last_address,
284 di->text_debug_bias + state_machine_regs.address,
285 state_machine_regs.last_line, 0
289 reset_state_machine (is_stmt);
290 if (di->ddump_line)
291 VG_(printf)(" Extended opcode %d: End of Sequence\n\n",
292 (Int)op_code);
293 break;
295 case DW_LNE_set_address: {
296 Addr adr = ML_(cur_step_Addr)(data);
297 state_machine_regs.address = adr;
298 if (di->ddump_line)
299 VG_(printf)(" Extended opcode %d: set Address to 0x%lx\n",
300 (Int)op_code, (Addr)adr);
301 break;
304 case DW_LNE_define_file: {
305 HChar* name = ML_(cur_step_strdup)(data, "di.pelo.1");
306 UInt fndn_ix = ML_(addFnDn) (di, name, NULL);
307 VG_(addToXA) (fndn_ix_xa, &fndn_ix);
308 ML_(dinfo_free)(name);
309 (void)step_leb128U(data); // ignored: dir index
310 (void)step_leb128U(data); // ignored: mod time
311 (void)step_leb128U(data); // ignored: file size
312 if (di->ddump_line)
313 VG_(printf)(" DWARF2-line: set_address\n");
314 break;
317 case DW_LNE_set_discriminator:
318 (void)step_leb128U(data); // ignored: new 'discriminator' value
319 break;
321 default:
322 if (di->ddump_line)
323 VG_(printf)("process_extended_line_op:default\n");
324 break;
328 ////////////////////////////////////////////////////////////////////
329 ////////////////////////////////////////////////////////////////////
331 /* read a .debug_line section block for a compilation unit
333 * Input: - theBlock must point to the start of the block
334 * for the given compilation unit
335 * - ui contains additional info like the compilation dir
336 * for this unit
338 * Output: - si debug info structures get updated
340 static
341 void read_dwarf2_lineblock ( struct _DebugInfo* di,
342 const UnitInfo* ui,
343 DiCursor theBlock, /* IMAGE */
344 Int noLargerThan )
346 Int i;
347 DebugLineInfo info;
348 Bool is64;
349 XArray* fndn_ix_xa; /* xarray of UInt fndn_ix */
350 UInt fndn_ix;
351 XArray* dirname_xa; /* xarray of const HChar* dirname */
352 const HChar* dirname;
354 DiCursor external = theBlock;
355 DiCursor data = theBlock;
357 /* fndn_ix_xa is an xarray of fndn_ix (indexes in di->fndnpool) which
358 are build from file names harvested from the DWARF2
359 info. Entry [0] is the "null" pool index and is never referred to
360 by the state machine.
362 Similarly, dirname_xa is an xarray of directory names. Entry [0]
363 is also NULL and denotes "we don't know what the path is", since
364 that is different from "the path is the empty string". Unlike
365 the fndn_ix_xa table, the state machine does refer to entry [0],
366 which basically means "." ("the current directory of the
367 compilation", whatever that means, according to the DWARF3
368 spec.)
371 /* Fails due to gcc padding ...
372 vg_assert(sizeof(DWARF2_External_LineInfo)
373 == sizeof(DWARF2_Internal_LineInfo));
376 dirname_xa = VG_(newXA) (ML_(dinfo_zalloc), "di.rd2l.1", ML_(dinfo_free),
377 sizeof(HChar*) );
378 fndn_ix_xa = VG_(newXA) (ML_(dinfo_zalloc), "di.rd2l.2", ML_(dinfo_free),
379 sizeof(UInt) );
381 /* DWARF2 starts numbering filename entries at 1, so we need to
382 add a dummy zeroth entry to the table. */
383 fndn_ix = 0; // 0 is the "null" index in a fixed pool.
384 VG_(addToXA) (fndn_ix_xa, &fndn_ix);
386 if (ML_(cur_is_valid)(ui->compdir))
387 dirname = ML_(addStrFromCursor)(di, ui->compdir);
388 else
389 dirname = ML_(addStr)(di, ".", -1);
390 VG_(addToXA) (dirname_xa, &dirname);
392 info.li_length = step_initial_length_field( &external, &is64 );
393 if (di->ddump_line)
394 VG_(printf)(" Length: %llu\n",
395 info.li_length);
397 /* Check the length of the block. */
398 if (info.li_length > noLargerThan) {
399 ML_(symerr)(di, True,
400 "DWARF line info appears to be corrupt "
401 "- the section is too small");
402 goto out;
405 /* Check its version number. */
406 info.li_version = ML_(cur_step_UShort)(&external);
407 if (di->ddump_line)
408 VG_(printf)(" DWARF Version: %d\n",
409 (Int)info.li_version);
411 if (info.li_version != 2 && info.li_version != 3 && info.li_version != 4) {
412 ML_(symerr)(di, True,
413 "Only DWARF version 2, 3 and 4 line info "
414 "is currently supported.");
415 goto out;
418 info.li_header_length = is64 ? ML_(cur_step_ULong)(&external)
419 : (ULong)(ML_(cur_step_UInt)(&external));
420 if (di->ddump_line)
421 VG_(printf)(" Prologue Length: %llu\n",
422 info.li_header_length);
424 info.li_min_insn_length = ML_(cur_step_UChar)(&external);
425 if (di->ddump_line)
426 VG_(printf)(" Minimum Instruction Length: %d\n",
427 (Int)info.li_min_insn_length);
429 /* We only support machines with one opcode per instruction
430 for now. If we ever want to support VLIW machines there is
431 code to handle multiple opcodes per instruction in the
432 patch attached to BZ#233595.
434 if (info.li_version >= 4) {
435 info.li_max_ops_per_insn = ML_(cur_step_UChar)(&external);
436 if (info.li_max_ops_per_insn != 1) {
437 ML_(symerr)(di, True,
438 "Invalid Maximum Ops Per Insn in line info.");
439 goto out;
441 if (di->ddump_line)
442 VG_(printf)(" Maximum Ops Per Insn: %d\n",
443 (Int)info.li_max_ops_per_insn);
444 } else {
445 info.li_max_ops_per_insn = 1;
448 info.li_default_is_stmt = ML_(cur_step_UChar)(&external);
449 if (di->ddump_line)
450 VG_(printf)(" Initial value of 'is_stmt': %d\n",
451 (Int)info.li_default_is_stmt);
453 /* Josef Weidendorfer (20021021) writes:
455 It seems to me that the Intel Fortran compiler generates bad
456 DWARF2 line info code: It sets "is_stmt" of the state machine in
457 the the line info reader to be always false. Thus, there is
458 never a statement boundary generated and therefore never a
459 instruction range/line number mapping generated for valgrind.
461 Please have a look at the DWARF2 specification, Ch. 6.2
462 (x86.ddj.com/ftp/manuals/tools/dwarf.pdf). Perhaps I understand
463 this wrong, but I don't think so.
465 I just had a look at the GDB DWARF2 reader... They completely
466 ignore "is_stmt" when recording line info ;-) That's the reason
467 "objdump -S" works on files from the the intel fortran compiler.
469 Therefore: */
470 info.li_default_is_stmt = True;
472 /* JRS: changed (UInt*) to (UChar*) */
473 info.li_line_base = ML_(cur_step_UChar)(&external);
474 info.li_line_base = (Int)(Char)info.li_line_base;
475 if (di->ddump_line)
476 VG_(printf)(" Line Base: %d\n",
477 info.li_line_base);
479 info.li_line_range = ML_(cur_step_UChar)(&external);
480 if (di->ddump_line)
481 VG_(printf)(" Line Range: %d\n",
482 (Int)info.li_line_range);
484 info.li_opcode_base = ML_(cur_step_UChar)(&external);
485 if (di->ddump_line)
486 VG_(printf)(" Opcode Base: %d\n\n",
487 info.li_opcode_base);
489 if (0) VG_(printf)("dwarf2: line base: %d, range %d, opc base: %d\n",
490 (Int)info.li_line_base,
491 (Int)info.li_line_range,
492 (Int)info.li_opcode_base);
494 DiCursor end_of_sequence
495 = ML_(cur_plus)(data, info.li_length + (is64 ? 12 : 4));
497 reset_state_machine (info.li_default_is_stmt);
499 /* Read the contents of the Opcodes table. */
500 DiCursor standard_opcodes = external;
501 if (di->ddump_line) {
502 VG_(printf)(" Opcodes:\n");
503 for (i = 1; i < (Int)info.li_opcode_base; i++) {
504 VG_(printf)(" Opcode %d has %d args\n",
505 i, (Int)ML_(cur_read_UChar)(
506 ML_(cur_plus)(standard_opcodes,
507 (i-1) * sizeof(UChar)) ));
509 VG_(printf)("\n");
511 /* skip over "standard_opcode_lengths" */
512 data = ML_(cur_plus)(standard_opcodes, info.li_opcode_base - 1);
514 /* Read the contents of the Directory table. */
515 if (di->ddump_line)
516 VG_(printf)(" The Directory Table%s\n",
517 ML_(cur_read_UChar)(data) == 0 ? " is empty." : ":" );
519 while (ML_(cur_read_UChar)(data) != 0) {
521 # define NBUF 4096
522 static HChar buf[NBUF];
524 HChar* data_str = ML_(cur_read_strdup)(data, "di.rd2l.1");
525 if (di->ddump_line)
526 VG_(printf)(" %s\n", data_str);
528 /* If data[0] is '/', then 'data' is an absolute path and we
529 don't mess with it. Otherwise, if we can, construct the
530 path 'ui->compdir' ++ "/" ++ 'data'. */
532 if (data_str[0] != '/'
533 /* not an absolute path */
534 && ML_(cur_is_valid)(ui->compdir)
535 /* actually got something sensible for compdir */
536 && ML_(cur_strlen)(ui->compdir)
537 + VG_(strlen)(data_str) + 5/*paranoia*/ < NBUF
538 /* it's short enough to concatenate */)
540 buf[0] = 0;
541 HChar* compdir_str = ML_(cur_read_strdup)(ui->compdir, "di.rd2l.1b");
542 VG_(strcat)(buf, compdir_str);
543 VG_(strcat)(buf, "/");
544 VG_(strcat)(buf, data_str);
545 vg_assert(VG_(strlen)(buf) < NBUF);
546 dirname = ML_(addStr)(di,buf,-1);
547 VG_(addToXA) (dirname_xa, &dirname);
548 if (0) VG_(printf)("rel path %s\n", buf);
549 ML_(dinfo_free)(compdir_str);
550 } else {
551 /* just use 'data'. */
552 dirname = ML_(addStr)(di,data_str,-1);
553 VG_(addToXA) (dirname_xa, &dirname);
554 if (0) VG_(printf)("abs path %s\n", data_str);
557 data = ML_(cur_plus)(data, VG_(strlen)(data_str) + 1);
558 ML_(dinfo_free)(data_str);
560 # undef NBUF
563 if (di->ddump_line)
564 VG_(printf)("\n");
566 if (ML_(cur_read_UChar)(data) != 0) {
567 ML_(symerr)(di, True,
568 "can't find NUL at end of DWARF2 directory table");
569 goto out;
571 data = ML_(cur_plus)(data, 1);
573 /* Read the contents of the File Name table. This produces a bunch
574 of fndn_ix in fndn_ix_xa. */
575 if (di->ddump_line) {
576 VG_(printf)(" The File Name Table:\n");
577 VG_(printf)(" Entry Dir Time Size Name\n");
580 i = 1;
581 while (ML_(cur_read_UChar)(data) != 0) {
582 HChar* name = ML_(cur_step_strdup)(&data, "di.rd2l.2");
583 Int diridx = step_leb128U(&data);
584 Int uu_time = step_leb128U(&data); /* unused */
585 Int uu_size = step_leb128U(&data); /* unused */
587 dirname = safe_dirname_ix( dirname_xa, diridx );
588 fndn_ix = ML_(addFnDn) (di, name, dirname);
589 VG_(addToXA) (fndn_ix_xa, &fndn_ix);
590 if (0) VG_(printf)("file %s diridx %d\n", name, diridx );
591 if (di->ddump_line)
592 VG_(printf)(" %d\t%d\t%d\t%d\t%s\n",
593 i, diridx, uu_time, uu_size, name);
594 i++;
595 ML_(dinfo_free)(name);
598 if (di->ddump_line)
599 VG_(printf)("\n");
601 if (ML_(cur_read_UChar)(data) != 0) {
602 ML_(symerr)(di, True,
603 "can't find NUL at end of DWARF2 file name table");
604 goto out;
606 data = ML_(cur_plus)(data, 1);
608 if (di->ddump_line)
609 VG_(printf)(" Line Number Statements:\n");
611 /* Now display the statements. */
613 while (ML_(cur_cmpLT)(data, end_of_sequence)) {
614 UChar op_code = ML_(cur_step_UChar)(&data);
616 if (0) VG_(printf)("dwarf2: OPC: %d\n", op_code);
618 if (op_code >= info.li_opcode_base) {
619 op_code -= info.li_opcode_base;
620 Word adv = (op_code / info.li_line_range)
621 * info.li_min_insn_length;
622 Int advAddr = adv;
623 state_machine_regs.address += adv;
625 if (0) VG_(printf)("smr.a += %#lx\n", adv );
626 adv = (op_code % info.li_line_range) + info.li_line_base;
627 if (0) VG_(printf)("1002: di->o %#lx, smr.a %#lx\n",
628 di->text_debug_bias, state_machine_regs.address );
629 state_machine_regs.line += adv;
631 if (di->ddump_line)
632 VG_(printf)(" Special opcode %d: advance Address by %d "
633 "to 0x%lx and Line by %d to %d\n",
634 (Int)op_code, advAddr, state_machine_regs.address,
635 (Int)adv, (Int)state_machine_regs.line );
637 if (state_machine_regs.is_stmt) {
638 /* only add a statement if there was a previous boundary */
639 if (state_machine_regs.last_address) {
640 ML_(addLineInfo)(
642 safe_fndn_ix (fndn_ix_xa,
643 state_machine_regs.last_file),
644 di->text_debug_bias + state_machine_regs.last_address,
645 di->text_debug_bias + state_machine_regs.address,
646 state_machine_regs.last_line,
650 state_machine_regs.last_address = state_machine_regs.address;
651 state_machine_regs.last_file = state_machine_regs.file;
652 state_machine_regs.last_line = state_machine_regs.line;
656 else { /* ! (op_code >= info.li_opcode_base) */
658 switch (op_code) {
659 case DW_LNS_extended_op:
660 process_extended_line_op (
661 di, fndn_ix_xa,
662 &data, info.li_default_is_stmt);
663 break;
665 case DW_LNS_copy:
666 if (0) VG_(printf)("1002: di->o %#lx, smr.a %#lx\n",
667 di->text_debug_bias, state_machine_regs.address );
668 if (state_machine_regs.is_stmt) {
669 /* only add a statement if there was a previous boundary */
670 if (state_machine_regs.last_address) {
671 ML_(addLineInfo)(
673 safe_fndn_ix (fndn_ix_xa,
674 state_machine_regs.last_file),
675 di->text_debug_bias + state_machine_regs.last_address,
676 di->text_debug_bias + state_machine_regs.address,
677 state_machine_regs.last_line,
681 state_machine_regs.last_address = state_machine_regs.address;
682 state_machine_regs.last_file = state_machine_regs.file;
683 state_machine_regs.last_line = state_machine_regs.line;
685 state_machine_regs.basic_block = 0; /* JRS added */
686 if (di->ddump_line)
687 VG_(printf)(" Copy\n");
688 break;
690 case DW_LNS_advance_pc: {
691 Word adv = info.li_min_insn_length * step_leb128U(&data);
692 state_machine_regs.address += adv;
693 if (0) VG_(printf)("smr.a += %#lx\n", adv );
694 if (di->ddump_line)
695 VG_(printf)(" Advance PC by %ld to 0x%lx\n",
696 adv, state_machine_regs.address);
697 break;
699 case DW_LNS_advance_line: {
700 Word adv = step_leb128S(&data);
701 state_machine_regs.line += adv;
702 if (di->ddump_line)
703 VG_(printf)(" Advance Line by %ld to %d\n",
704 adv, (Int)state_machine_regs.line);
705 break;
707 case DW_LNS_set_file: {
708 Word adv = step_leb128U(&data);
709 state_machine_regs.file = adv;
710 if (di->ddump_line)
711 VG_(printf)(" Set File Name to entry %ld in the "
712 "File Name Table\n", adv);
713 break;
715 case DW_LNS_set_column: {
716 Word adv = step_leb128U(&data);
717 state_machine_regs.column = adv;
718 if (di->ddump_line)
719 VG_(printf)(" Set column to %ld\n", adv);
720 break;
722 case DW_LNS_negate_stmt: {
723 Int adv = state_machine_regs.is_stmt;
724 adv = ! adv;
725 state_machine_regs.is_stmt = adv;
726 if (di->ddump_line)
727 VG_(printf)(" DWARF2-line: negate_stmt\n");
728 break;
730 case DW_LNS_set_basic_block: {
731 state_machine_regs.basic_block = 1;
732 if (di->ddump_line)
733 VG_(printf)(" DWARF2-line: set_basic_block\n");
734 break;
736 case DW_LNS_const_add_pc: {
737 Word adv = (((255 - info.li_opcode_base) / info.li_line_range)
738 * info.li_min_insn_length);
739 state_machine_regs.address += adv;
740 if (0) VG_(printf)("smr.a += %#lx\n", adv );
741 if (di->ddump_line)
742 VG_(printf)(" Advance PC by constant %ld to 0x%lx\n",
743 adv, (Addr)state_machine_regs.address);
744 break;
746 case DW_LNS_fixed_advance_pc: {
747 /* XXX: Need something to get 2 bytes */
748 Word adv = ML_(cur_step_UShort)(&data);
749 state_machine_regs.address += adv;
750 if (0) VG_(printf)("smr.a += %#lx\n", adv );
751 if (di->ddump_line)
752 VG_(printf)(" DWARF2-line: fixed_advance_pc\n");
753 break;
755 case DW_LNS_set_prologue_end:
756 if (di->ddump_line)
757 VG_(printf)(" DWARF2-line: set_prologue_end\n");
758 break;
760 case DW_LNS_set_epilogue_begin:
761 if (di->ddump_line)
762 VG_(printf)(" DWARF2-line: set_epilogue_begin\n");
763 break;
765 case DW_LNS_set_isa:
766 (void)step_leb128U(&data);
767 if (di->ddump_line)
768 VG_(printf)(" DWARF2-line: set_isa\n");
769 break;
771 default: {
772 Int j;
773 for (j = (Int)ML_(cur_read_UChar)(
774 ML_(cur_plus)(standard_opcodes,
775 (op_code-1) * sizeof(UChar)));
776 j > 0 ; --j) {
777 step_leb128U(&data);
779 if (di->ddump_line)
780 VG_(printf)(" Unknown opcode %d\n", (Int)op_code);
781 break;
783 } /* switch (op_code) */
785 } /* if (op_code >= info.li_opcode_base) */
787 } /* while (data < end_of_sequence) */
789 if (di->ddump_line)
790 VG_(printf)("\n");
792 out:
793 VG_(deleteXA)(dirname_xa);
794 VG_(deleteXA)(fndn_ix_xa);
797 ////////////////////////////////////////////////////////////////////
798 ////////////////////////////////////////////////////////////////////
800 /* Return abbrev for given code
801 * Returned cursor points to the tag
802 * */
803 static DiCursor lookup_abbrev( DiCursor p, ULong acode )
805 while (1) {
806 ULong code = step_leb128U(&p);
807 if (code == acode)
808 return p;
809 (void)step_leb128U(&p); /* skip tag */
810 p = ML_(cur_plus)(p,1); /* skip has_children flag */
811 ULong name;
812 do {
813 name = step_leb128U(&p); /* name */
814 (void)step_leb128U(&p); /* form */
816 while (name != 0); /* until name == form == 0 */
820 /* Read general information for a particular compile unit block in
821 * the .debug_info section. In particular read the name, compdir and
822 * stmt_list needed to parse the line number information.
824 * Input: - unitblock is the start of a compilation
825 * unit block in .debuginfo section
826 * - debugabbrev is start of .debug_abbrev section
827 * - debugstr is start of .debug_str section
828 * - debugstr_alt_img is start of .debug_str section in alt debug file
830 * Output: Fill members of ui pertaining to the compilation unit:
831 * - ui->name is the name of the compilation unit
832 * - ui->compdir is the compilation unit directory
833 * - ui->stmt_list is the offset in .debug_line section
834 * for the dbginfos of this compilation unit
836 * Note : the output strings are not allocated and point
837 * directly to the memory-mapped section.
839 static
840 void read_unitinfo_dwarf2( /*OUT*/UnitInfo* ui,
841 DiCursor unitblock_img,
842 DiCursor debugabbrev_img,
843 DiCursor debugstr_img,
844 DiCursor debugstr_alt_img )
846 UInt acode, abcode;
847 ULong atoffs, blklen;
848 UShort ver;
850 UChar addr_size;
851 DiCursor p = unitblock_img;
852 DiCursor end_img;
853 DiCursor abbrev_img;
855 VG_(memset)( ui, 0, sizeof( UnitInfo ) );
856 ui->stmt_list = -1LL;
858 /* Read the compilation unit header in .debug_info section - See p 70 */
860 /* This block length */
861 blklen = step_initial_length_field( &p, &ui->dw64 );
863 /* version should be 2, 3 or 4 */
864 ver = ML_(cur_step_UShort)(&p);
866 /* get offset in abbrev */
867 atoffs = ui->dw64 ? ML_(cur_step_ULong)(&p)
868 : (ULong)(ML_(cur_step_UInt)(&p));
870 /* Address size */
871 addr_size = ML_(cur_step_UChar)(&p);
873 /* End of this block */
874 end_img = ML_(cur_plus)(unitblock_img, blklen + (ui->dw64 ? 12 : 4));
876 /* Abbreviation data for this block */
877 abbrev_img = ML_(cur_plus)(debugabbrev_img, atoffs);
879 /* Read the compilation unit entry - this is always the first DIE.
880 * See DWARF4 para 7.5. */
881 if (ML_(cur_cmpLT)(p, end_img)) {
882 UInt tag;
884 acode = step_leb128U( &p ); /* abbreviation code */
886 /* Read abbreviation header */
887 abcode = step_leb128U( &abbrev_img ); /* abbreviation code */
888 if ( acode != abcode ) {
889 /* This isn't illegal, but somewhat unlikely. Normally the
890 * first abbrev describes the first DIE, the compile_unit.
891 * But maybe this abbrevation data is shared with another
892 * or it is a NULL entry used for padding. See para 7.5.3. */
893 abbrev_img = lookup_abbrev( ML_(cur_plus)(debugabbrev_img, atoffs),
894 acode );
897 tag = step_leb128U( &abbrev_img );
899 if ( tag != 0x0011 /*TAG_compile_unit*/ )
900 return; /* Not a compile unit (might be partial) or broken DWARF. */
902 /* DW_CHILDREN_yes or DW_CHILDREN_no */
903 abbrev_img = ML_(cur_plus)(abbrev_img, 1);
905 /* And loop on entries */
906 for ( ; ; ) {
907 /* Read entry definition */
908 ULong cval = -1LL; /* Constant value read */
909 DiCursor sval = DiCursor_INVALID; /* String value read */
910 UInt name = step_leb128U( &abbrev_img );
911 UInt form = step_leb128U( &abbrev_img );
912 if (name == 0)
913 break;
915 /* Read data */
916 /* Attributes encoding explained p 71 */
917 if ( form == 0x16 /* FORM_indirect */ )
918 form = step_leb128U( &p );
919 /* Decode form. For most kinds, Just skip the amount of data since
920 we don't use it for now */
921 /* JRS 9 Feb 06: This now handles 64-bit DWARF too. In
922 64-bit DWARF, lineptr (and loclistptr,macptr,rangelistptr
923 classes) use FORM_data8, not FORM_data4. Also,
924 FORM_ref_addr and FORM_strp are 64-bit values, not 32-bit
925 values. */
926 /* TJH 27 Apr 10: in DWARF 4 lineptr (and loclistptr,macptr,
927 rangelistptr classes) use FORM_sec_offset which is 64 bits
928 in 64 bit DWARF and 32 bits in 32 bit DWARF. */
929 /* JRS 20 Apr 11: LLVM-2.9 encodes DW_AT_stmt_list using
930 FORM_addr rather than the FORM_data4 that GCC uses. Hence
931 handle FORM_addr too. */
932 switch( form ) {
933 /* Those cases extract the data properly */
934 case 0x05: /* FORM_data2 */
935 cval = ML_(cur_step_UShort)(&p);
936 break;
937 case 0x06: /* FORM_data4 */
938 cval = ML_(cur_step_UInt)(&p);
939 break;
940 case 0x0e: /* FORM_strp */ /* pointer in .debug_str */
941 /* 2006-01-01: only generate a value if a debug_str
942 section was found) */
943 if (ML_(cur_is_valid)(debugstr_img) && !ui->dw64)
944 sval = ML_(cur_plus)(debugstr_img, ML_(cur_read_UInt)(p));
945 if (ML_(cur_is_valid)(debugstr_img) && ui->dw64)
946 sval = ML_(cur_plus)(debugstr_img, ML_(cur_read_ULong)(p));
947 p = ML_(cur_plus)(p, ui->dw64 ? 8 : 4);
948 break;
949 case 0x08: /* FORM_string */
950 sval = p;
951 p = ML_(cur_plus)(p, ML_(cur_strlen)(p) + 1);
952 break;
953 case 0x0b: /* FORM_data1 */
954 cval = ML_(cur_step_UChar)(&p);
955 break;
956 case 0x17: /* FORM_sec_offset */
957 if (ui->dw64) {
958 cval = ML_(cur_step_ULong)(&p);
959 } else {
960 cval = ML_(cur_step_UInt)(&p);
962 break;
963 case 0x07: /* FORM_data8 */
964 if (ui->dw64) cval = ML_(cur_read_ULong)(p);
965 p = ML_(cur_plus)(p, 8);
966 /* perhaps should assign unconditionally to cval? */
967 break;
968 /* TODO : Following ones just skip data - implement if you need */
969 case 0x01: /* FORM_addr */
970 p = ML_(cur_plus)(p, addr_size);
971 break;
972 case 0x03: /* FORM_block2 */
973 p = ML_(cur_plus)(p, ML_(cur_read_UShort)(p) + 2);
974 break;
975 case 0x04: /* FORM_block4 */
976 p = ML_(cur_plus)(p, ML_(cur_read_UInt)(p) + 4);
977 break;
978 case 0x09: /* FORM_block */ /* fallthrough */
979 case 0x18: { /* FORM_exprloc */
980 ULong block_len = step_leb128U(&p);
981 p = ML_(cur_plus)(p, block_len);
982 break;
984 case 0x0a: /* FORM_block1 */
985 p = ML_(cur_plus)(p, ML_(cur_read_UChar)(p) + 1);
986 break;
987 case 0x0c: /* FORM_flag */
988 p = ML_(cur_plus)(p, 1);
989 break;
990 case 0x0d: /* FORM_sdata */
991 (void)step_leb128S(&p);
992 break;
993 case 0x0f: /* FORM_udata */
994 (void)step_leb128U(&p);
995 break;
996 case 0x10: /* FORM_ref_addr */
997 p = ML_(cur_plus)(p, (ver == 2) ? addr_size
998 : (ui->dw64 ? 8 : 4));
999 break;
1000 case 0x11: /* FORM_ref1 */
1001 p = ML_(cur_plus)(p, 1);
1002 break;
1003 case 0x12: /* FORM_ref2 */
1004 p = ML_(cur_plus)(p, 2);
1005 break;
1006 case 0x13: /* FORM_ref4 */
1007 p = ML_(cur_plus)(p, 4);
1008 break;
1009 case 0x14: /* FORM_ref8 */
1010 p = ML_(cur_plus)(p, 8);
1011 break;
1012 case 0x15: /* FORM_ref_udata */
1013 (void)step_leb128U(&p);
1014 break;
1015 case 0x19: /* FORM_flag_present */
1016 break;
1017 case 0x20: /* FORM_ref_sig8 */
1018 p = ML_(cur_plus)(p, 8);
1019 break;
1020 case 0x1f20: /* FORM_GNU_ref_alt */
1021 p = ML_(cur_plus)(p, ui->dw64 ? 8 : 4);
1022 break;
1023 case 0x1f21: /* FORM_GNU_strp_alt */
1024 if (ML_(cur_is_valid)(debugstr_alt_img) && !ui->dw64)
1025 sval = ML_(cur_plus)(debugstr_alt_img,
1026 ML_(cur_read_UInt)(p));
1027 if (ML_(cur_is_valid)(debugstr_alt_img) && ui->dw64)
1028 sval = ML_(cur_plus)(debugstr_alt_img,
1029 ML_(cur_read_ULong)(p));
1030 p = ML_(cur_plus)(p, ui->dw64 ? 8 : 4);
1031 break;
1033 default:
1034 VG_(printf)( "### unhandled dwarf2 abbrev form code 0x%x\n",
1035 form );
1036 break;
1039 /* Now store the members we need in the UnitInfo structure */
1040 if ( tag == 0x0011 /*TAG_compile_unit*/ ) {
1041 if ( name == 0x03 ) ui->name = sval; /* DW_AT_name */
1042 else if ( name == 0x1b ) ui->compdir = sval; /* DW_AT_compdir */
1043 else if ( name == 0x10 ) ui->stmt_list = cval; /* DW_AT_stmt_list */
1046 } /* Just read the first DIE, if that wasn't the compile_unit then
1047 * this might have been a partial unit or broken DWARF info.
1048 * That's enough info for us, and we are not gdb ! */
1052 ////////////////////////////////////////////////////////////////////
1053 ////////////////////////////////////////////////////////////////////
1055 /* Collect the debug info from DWARF3 debugging sections
1056 * of a given module.
1058 * Inputs: given .debug_xxx sections
1059 * Output: update di to contain all the DWARF3 debug infos
1061 void ML_(read_debuginfo_dwarf3)
1062 ( struct _DebugInfo* di,
1063 DiSlice escn_debug_info, /* .debug_info */
1064 DiSlice escn_debug_types, /* .debug_types */
1065 DiSlice escn_debug_abbv, /* .debug_abbrev */
1066 DiSlice escn_debug_line, /* .debug_line */
1067 DiSlice escn_debug_str, /* .debug_str */
1068 DiSlice escn_debug_str_alt ) /* .debug_str */
1070 UnitInfo ui;
1071 UShort ver;
1072 ULong blklen;
1073 Bool blklen_is_64;
1075 /* Make sure we at least have a header for the first block */
1076 if (escn_debug_info.szB < 4) {
1077 ML_(symerr)( di, True,
1078 "Last block truncated in .debug_info; ignoring" );
1079 return;
1082 DiCursor block_img = DiCursor_INVALID;
1083 DiCursor end1_img = ML_(cur_plus)( ML_(cur_from_sli)(escn_debug_info),
1084 escn_debug_info.szB );
1085 Int blklen_len = 0;
1087 /* Iterate on all the blocks we find in .debug_info */
1088 for ( block_img = ML_(cur_from_sli)(escn_debug_info);
1089 ML_(cur_cmpLT)(block_img, ML_(cur_plus)(end1_img, -(DiOffT)4));
1090 block_img = ML_(cur_plus)(block_img, blklen + blklen_len) ) {
1092 /* Read the compilation unit header in .debug_info section - See
1093 p 70 */
1094 /* This block length */
1095 blklen = read_initial_length_field( block_img, &blklen_is_64 );
1096 blklen_len = blklen_is_64 ? 12 : 4;
1098 if (ML_(cur_cmpGT)( ML_(cur_plus)(block_img, blklen + blklen_len),
1099 end1_img )) {
1100 ML_(symerr)( di, True,
1101 "Last block truncated in .debug_info; ignoring" );
1102 return;
1105 /* version should be 2 */
1106 ver = ML_(cur_read_UShort)( ML_(cur_plus)(block_img, blklen_len) );
1107 if ( ver != 2 && ver != 3 && ver != 4 ) {
1108 ML_(symerr)( di, True,
1109 "Ignoring non-Dwarf2/3/4 block in .debug_info" );
1110 continue;
1113 /* Fill ui with offset in .debug_line and compdir */
1114 if (0)
1115 VG_(printf)(
1116 "Reading UnitInfo at 0x%llx.....\n",
1117 (ULong)ML_(cur_minus)( block_img,
1118 ML_(cur_from_sli)(escn_debug_info)) );
1119 read_unitinfo_dwarf2( &ui, block_img,
1120 ML_(cur_from_sli)(escn_debug_abbv),
1121 ML_(cur_from_sli)(escn_debug_str),
1122 ML_(cur_from_sli)(escn_debug_str_alt) );
1123 if (0) {
1124 HChar* str_name = ML_(cur_read_strdup)(ui.name, "di.rdd3.1");
1125 HChar* str_compdir = ML_(cur_read_strdup)(ui.compdir, "di.rdd3.2");
1126 VG_(printf)( " => LINES=0x%llx NAME=%s DIR=%s\n",
1127 ui.stmt_list, str_name, str_compdir );
1128 ML_(dinfo_free)(str_name);
1129 ML_(dinfo_free)(str_compdir);
1132 /* Ignore blocks with no .debug_line associated block */
1133 if ( ui.stmt_list == -1LL )
1134 continue;
1136 if (0) {
1137 HChar* str_name = ML_(cur_read_strdup)(ui.name, "di.rdd3.3");
1138 VG_(printf)("debug_line_sz %lld, ui.stmt_list %lld %s\n",
1139 escn_debug_line.szB, ui.stmt_list, str_name );
1140 ML_(dinfo_free)(str_name);
1143 /* Read the .debug_line block for this compile unit */
1144 read_dwarf2_lineblock(
1145 di, &ui,
1146 ML_(cur_plus)(ML_(cur_from_sli)(escn_debug_line), ui.stmt_list),
1147 escn_debug_line.szB - ui.stmt_list
1153 ////////////////////////////////////////////////////////////////////
1154 ////////////////////////////////////////////////////////////////////
1156 /*------------------------------------------------------------*/
1157 /*--- Read DWARF1 format line number info. ---*/
1158 /*------------------------------------------------------------*/
1160 /* DWARF1 appears to be redundant, but nevertheless the Lahey Fortran
1161 compiler generates it.
1164 /* The following three enums (dwarf_tag, dwarf_form, dwarf_attribute)
1165 are taken from the file include/elf/dwarf.h in the GNU gdb-6.0
1166 sources, which are Copyright 1992, 1993, 1995, 1999 Free Software
1167 Foundation, Inc and naturally licensed under the GNU General Public
1168 License version 2 or later.
1171 /* Tag names and codes. */
1173 enum dwarf_tag {
1174 TAG_padding = 0x0000,
1175 TAG_array_type = 0x0001,
1176 TAG_class_type = 0x0002,
1177 TAG_entry_point = 0x0003,
1178 TAG_enumeration_type = 0x0004,
1179 TAG_formal_parameter = 0x0005,
1180 TAG_global_subroutine = 0x0006,
1181 TAG_global_variable = 0x0007,
1182 /* 0x0008 -- reserved */
1183 /* 0x0009 -- reserved */
1184 TAG_label = 0x000a,
1185 TAG_lexical_block = 0x000b,
1186 TAG_local_variable = 0x000c,
1187 TAG_member = 0x000d,
1188 /* 0x000e -- reserved */
1189 TAG_pointer_type = 0x000f,
1190 TAG_reference_type = 0x0010,
1191 TAG_compile_unit = 0x0011,
1192 TAG_string_type = 0x0012,
1193 TAG_structure_type = 0x0013,
1194 TAG_subroutine = 0x0014,
1195 TAG_subroutine_type = 0x0015,
1196 TAG_typedef = 0x0016,
1197 TAG_union_type = 0x0017,
1198 TAG_unspecified_parameters = 0x0018,
1199 TAG_variant = 0x0019,
1200 TAG_common_block = 0x001a,
1201 TAG_common_inclusion = 0x001b,
1202 TAG_inheritance = 0x001c,
1203 TAG_inlined_subroutine = 0x001d,
1204 TAG_module = 0x001e,
1205 TAG_ptr_to_member_type = 0x001f,
1206 TAG_set_type = 0x0020,
1207 TAG_subrange_type = 0x0021,
1208 TAG_with_stmt = 0x0022,
1210 /* GNU extensions */
1212 TAG_format_label = 0x8000, /* for FORTRAN 77 and Fortran 90 */
1213 TAG_namelist = 0x8001, /* For Fortran 90 */
1214 TAG_function_template = 0x8002, /* for C++ */
1215 TAG_class_template = 0x8003 /* for C++ */
1218 /* Form names and codes. */
1220 enum dwarf_form {
1221 FORM_ADDR = 0x1,
1222 FORM_REF = 0x2,
1223 FORM_BLOCK2 = 0x3,
1224 FORM_BLOCK4 = 0x4,
1225 FORM_DATA2 = 0x5,
1226 FORM_DATA4 = 0x6,
1227 FORM_DATA8 = 0x7,
1228 FORM_STRING = 0x8
1231 /* Attribute names and codes. */
1233 enum dwarf_attribute {
1234 AT_sibling = (0x0010|FORM_REF),
1235 AT_location = (0x0020|FORM_BLOCK2),
1236 AT_name = (0x0030|FORM_STRING),
1237 AT_fund_type = (0x0050|FORM_DATA2),
1238 AT_mod_fund_type = (0x0060|FORM_BLOCK2),
1239 AT_user_def_type = (0x0070|FORM_REF),
1240 AT_mod_u_d_type = (0x0080|FORM_BLOCK2),
1241 AT_ordering = (0x0090|FORM_DATA2),
1242 AT_subscr_data = (0x00a0|FORM_BLOCK2),
1243 AT_byte_size = (0x00b0|FORM_DATA4),
1244 AT_bit_offset = (0x00c0|FORM_DATA2),
1245 AT_bit_size = (0x00d0|FORM_DATA4),
1246 /* (0x00e0|FORM_xxxx) -- reserved */
1247 AT_element_list = (0x00f0|FORM_BLOCK4),
1248 AT_stmt_list = (0x0100|FORM_DATA4),
1249 AT_low_pc = (0x0110|FORM_ADDR),
1250 AT_high_pc = (0x0120|FORM_ADDR),
1251 AT_language = (0x0130|FORM_DATA4),
1252 AT_member = (0x0140|FORM_REF),
1253 AT_discr = (0x0150|FORM_REF),
1254 AT_discr_value = (0x0160|FORM_BLOCK2),
1255 /* (0x0170|FORM_xxxx) -- reserved */
1256 /* (0x0180|FORM_xxxx) -- reserved */
1257 AT_string_length = (0x0190|FORM_BLOCK2),
1258 AT_common_reference = (0x01a0|FORM_REF),
1259 AT_comp_dir = (0x01b0|FORM_STRING),
1260 AT_const_value_string = (0x01c0|FORM_STRING),
1261 AT_const_value_data2 = (0x01c0|FORM_DATA2),
1262 AT_const_value_data4 = (0x01c0|FORM_DATA4),
1263 AT_const_value_data8 = (0x01c0|FORM_DATA8),
1264 AT_const_value_block2 = (0x01c0|FORM_BLOCK2),
1265 AT_const_value_block4 = (0x01c0|FORM_BLOCK4),
1266 AT_containing_type = (0x01d0|FORM_REF),
1267 AT_default_value_addr = (0x01e0|FORM_ADDR),
1268 AT_default_value_data2 = (0x01e0|FORM_DATA2),
1269 AT_default_value_data4 = (0x01e0|FORM_DATA4),
1270 AT_default_value_data8 = (0x01e0|FORM_DATA8),
1271 AT_default_value_string = (0x01e0|FORM_STRING),
1272 AT_friends = (0x01f0|FORM_BLOCK2),
1273 AT_inline = (0x0200|FORM_STRING),
1274 AT_is_optional = (0x0210|FORM_STRING),
1275 AT_lower_bound_ref = (0x0220|FORM_REF),
1276 AT_lower_bound_data2 = (0x0220|FORM_DATA2),
1277 AT_lower_bound_data4 = (0x0220|FORM_DATA4),
1278 AT_lower_bound_data8 = (0x0220|FORM_DATA8),
1279 AT_private = (0x0240|FORM_STRING),
1280 AT_producer = (0x0250|FORM_STRING),
1281 AT_program = (0x0230|FORM_STRING),
1282 AT_protected = (0x0260|FORM_STRING),
1283 AT_prototyped = (0x0270|FORM_STRING),
1284 AT_public = (0x0280|FORM_STRING),
1285 AT_pure_virtual = (0x0290|FORM_STRING),
1286 AT_return_addr = (0x02a0|FORM_BLOCK2),
1287 AT_abstract_origin = (0x02b0|FORM_REF),
1288 AT_start_scope = (0x02c0|FORM_DATA4),
1289 AT_stride_size = (0x02e0|FORM_DATA4),
1290 AT_upper_bound_ref = (0x02f0|FORM_REF),
1291 AT_upper_bound_data2 = (0x02f0|FORM_DATA2),
1292 AT_upper_bound_data4 = (0x02f0|FORM_DATA4),
1293 AT_upper_bound_data8 = (0x02f0|FORM_DATA8),
1294 AT_virtual = (0x0300|FORM_STRING),
1296 /* GNU extensions. */
1298 AT_sf_names = (0x8000|FORM_DATA4),
1299 AT_src_info = (0x8010|FORM_DATA4),
1300 AT_mac_info = (0x8020|FORM_DATA4),
1301 AT_src_coords = (0x8030|FORM_DATA4),
1302 AT_body_begin = (0x8040|FORM_ADDR),
1303 AT_body_end = (0x8050|FORM_ADDR)
1306 /* end of enums taken from gdb-6.0 sources */
1307 #if 0
1308 void ML_(read_debuginfo_dwarf1) (
1309 struct _DebugInfo* di,
1310 UChar* dwarf1d, Int dwarf1d_sz,
1311 UChar* dwarf1l, Int dwarf1l_sz )
1313 UInt stmt_list;
1314 Bool stmt_list_found;
1315 Int die_offset, die_szb, at_offset;
1316 UShort die_kind, at_kind;
1317 UChar* at_base;
1318 HChar* src_filename;
1320 if (0)
1321 VG_(printf)("read_debuginfo_dwarf1 ( %p, %d, %p, %d )\n",
1322 dwarf1d, dwarf1d_sz, dwarf1l, dwarf1l_sz );
1324 /* This loop scans the DIEs. */
1325 die_offset = 0;
1326 while (True) {
1327 if (die_offset >= dwarf1d_sz) break;
1329 die_szb = ML_(read_Int)(dwarf1d + die_offset);
1330 die_kind = ML_(read_UShort)(dwarf1d + die_offset + 4);
1332 /* We're only interested in compile_unit DIEs; ignore others. */
1333 if (die_kind != TAG_compile_unit) {
1334 die_offset += die_szb;
1335 continue;
1338 if (0)
1339 VG_(printf)("compile-unit DIE: offset %d, tag 0x%x, size %d\n",
1340 die_offset, (Int)die_kind, die_szb );
1342 /* We've got a compile_unit DIE starting at (dwarf1d +
1343 die_offset+6). Try and find the AT_name and AT_stmt_list
1344 attributes. Then, finally, we can read the line number info
1345 for this source file. */
1347 /* The next 3 are set as we find the relevant attrs. */
1348 src_filename = NULL;
1349 stmt_list_found = False;
1350 stmt_list = 0;
1352 /* This loop scans the Attrs inside compile_unit DIEs. */
1353 at_base = dwarf1d + die_offset + 6;
1354 at_offset = 0;
1355 while (True) {
1356 if (at_offset >= die_szb-6) break;
1358 at_kind = ML_(read_UShort)(at_base + at_offset);
1359 if (0) VG_(printf)("atoffset %d, attag 0x%x\n",
1360 at_offset, (Int)at_kind );
1361 at_offset += 2; /* step over the attribute itself */
1362 /* We have to examine the attribute to figure out its
1363 length. */
1364 switch (at_kind) {
1365 case AT_stmt_list:
1366 case AT_language:
1367 case AT_sibling:
1368 if (at_kind == AT_stmt_list) {
1369 stmt_list_found = True;
1370 stmt_list = ML_(read_Int)(at_base+at_offset);
1372 at_offset += 4; break;
1373 case AT_high_pc:
1374 case AT_low_pc:
1375 at_offset += sizeof(void*); break;
1376 case AT_name:
1377 case AT_producer:
1378 case AT_comp_dir:
1379 /* Zero terminated string, step over it. */
1380 if (at_kind == AT_name)
1381 src_filename = (HChar *)(at_base + at_offset);
1382 while (at_offset < die_szb-6 && at_base[at_offset] != 0)
1383 at_offset++;
1384 at_offset++;
1385 break;
1386 default:
1387 VG_(printf)("Unhandled DWARF-1 attribute 0x%x\n",
1388 (Int)at_kind );
1389 VG_(core_panic)("Unhandled DWARF-1 attribute");
1390 } /* switch (at_kind) */
1391 } /* looping over attributes */
1393 /* So, did we find the required stuff for a line number table in
1394 this DIE? If yes, read it. */
1395 if (stmt_list_found /* there is a line number table */
1396 && src_filename != NULL /* we know the source filename */
1398 /* Table starts:
1399 Length:
1400 4 bytes, includes the entire table
1401 Base address:
1402 unclear (4? 8?), assuming native pointer size here.
1403 Then a sequence of triples
1404 (source line number -- 32 bits
1405 source line column -- 16 bits
1406 address delta -- 32 bits)
1408 Addr base;
1409 Int len;
1410 HChar* curr_filenm;
1411 UChar* ptr;
1412 UInt prev_line, prev_delta;
1414 curr_filenm = ML_(addStr) ( di, src_filename, -1 );
1415 prev_line = prev_delta = 0;
1417 ptr = dwarf1l + stmt_list;
1418 len = ML_(read_Int)(ptr); ptr += sizeof(Int);
1419 base = ML_(read_Addr)(ptr); ptr += sizeof(void*);
1420 len -= (sizeof(Int) + sizeof(void*));
1421 while (len > 0) {
1422 UInt line;
1423 UShort col;
1424 UInt delta;
1425 line = ML_(read_UInt)(ptr); ptr += sizeof(UInt);
1426 col = ML_(read_UShort)(ptr); ptr += sizeof(UShort);
1427 delta = ML_(read_UInt)(ptr); ptr += sizeof(UInt);
1428 if (0) VG_(printf)("line %d, col %d, delta %d\n",
1429 line, (Int)col, delta );
1430 len -= (sizeof(UInt) + sizeof(UShort) + sizeof(UInt));
1432 if (delta > 0 && prev_line > 0) {
1433 if (0) VG_(printf) (" %d %d-%d\n",
1434 prev_line, prev_delta, delta-1);
1435 ML_(addLineInfo) ( di, curr_filenm, NULL,
1436 base + prev_delta, base + delta,
1437 prev_line, 0 );
1439 prev_line = line;
1440 prev_delta = delta;
1444 /* Move on the the next DIE. */
1445 die_offset += die_szb;
1447 } /* Looping over DIEs */
1450 #endif
1452 /*------------------------------------------------------------*/
1453 /*--- Read call-frame info from an .eh_frame section ---*/
1454 /*------------------------------------------------------------*/
1456 /* Sources of info:
1458 The DWARF3 spec, available from http://www.dwarfstd.org/Download.php
1460 This describes how to read CFA data from .debug_frame sections.
1461 So as to maximise everybody's annoyance and confusion, .eh_frame
1462 sections are almost the same as .debug_frame sections, but differ
1463 in a few subtle and ill documented but important aspects.
1465 Generic ELF Specification, sections 7.5 (DWARF Extensions) and 7.6
1466 (Exception Frames), available from
1468 http://www.linux-foundation.org/spec/book/ELF-generic/ELF-generic.html
1470 This really does describe .eh_frame, at least the aspects that
1471 differ from standard DWARF3. It's better than guessing, and
1472 (marginally) more fun than reading the gdb source code.
1475 /* Useful info ..
1477 In general:
1478 gdb-6.3/gdb/dwarf2-frame.c
1480 gdb-6.3/gdb/i386-tdep.c:
1482 DWARF2/GCC uses the stack address *before* the function call as a
1483 frame's CFA. [jrs: I presume this means %esp before the call as
1484 the CFA].
1486 JRS: on amd64, the dwarf register numbering is, as per
1487 gdb-6.3/gdb/amd64-tdep.c and also amd64-abi-0.98.pdf:
1489 0 1 2 3 4 5 6 7
1490 RAX RDX RCX RBX RSI RDI RBP RSP
1492 8 ... 15
1493 R8 ... R15
1495 16 is the return address (RIP)
1496 "The table defines Return Address to have a register number,
1497 even though the address is stored in 0(%rsp) and not in a
1498 physical register."
1500 17 ... 24
1501 XMM0 ... XMM7
1503 25 ... 32
1504 XMM8 ... XMM15
1506 33 ... 40
1507 ST0 ... ST7
1509 41 ... 48
1510 MM0 ... MM7
1512 49 RFLAGS
1513 50,51,52,53,54,55 ES,CS,SS,DS,FS,GS
1514 58 FS.BASE (what's that?)
1515 59 GS.BASE (what's that?)
1516 62 TR (task register)
1517 63 LDTR (LDT register)
1518 64 MXCSR
1519 65 FCW (x87 control word)
1520 66 FSW (x86 status word)
1522 On x86 I cannot find any documentation. It _appears_ to be the
1523 actual instruction encoding, viz:
1525 0 1 2 3 4 5 6 7
1526 EAX ECX EDX EBX ESP EBP ESI EDI
1528 8 is the return address (EIP) */
1531 /* Comments re DW_CFA_set_loc, 16 Nov 06.
1533 JRS:
1534 Someone recently sent me a libcrypto.so.0.9.8 as distributed with
1535 Ubuntu of some flavour, compiled with gcc 4.1.2 on amd64. It
1536 causes V's CF reader to complain a lot:
1538 >> --19976-- DWARF2 CFI reader: unhandled CFI instruction 0:24
1539 >> --19976-- DWARF2 CFI reader: unhandled CFI instruction 0:24
1540 >> --19976-- DWARF2 CFI reader: unhandled CFI instruction 0:24
1541 >> --19976-- DWARF2 CFI reader: unhandled CFI instruction 0:24
1542 >> --19976-- DWARF2 CFI reader: unhandled CFI instruction 0:48
1543 >> --19976-- DWARF2 CFI reader: unhandled CFI instruction 0:24
1545 After chasing this around a bit it seems that the CF bytecode
1546 parser lost sync at a DW_CFA_set_loc, which has a single argument
1547 denoting an address.
1549 As it stands that address is extracted by read_Addr(). On amd64
1550 that just fetches 8 bytes regardless of anything else.
1552 read_encoded_Addr() is more sophisticated. This appears to take
1553 into account some kind of encoding flag. When I replace the uses
1554 of read_Addr by read_encoded_Addr for DW_CFA_set_loc, the
1555 complaints go away, there is no loss of sync, and the parsed CF
1556 instructions are the same as shown by readelf --debug-dump=frames.
1558 So it seems a plausible fix. The problem is I looked in the DWARF3
1559 spec and completely failed to figure out whether or not the arg to
1560 DW_CFA_set_loc is supposed to be encoded in a way suitable for
1561 read_encoded_Addr, nor for that matter any description of what it
1562 is that read_encoded_Addr is really decoding.
1564 TomH:
1565 The problem is that the encoding is not standard - the eh_frame
1566 section uses the same encoding as the dwarf_frame section except
1567 for a few small changes, and this is one of them. So this is not
1568 something the DWARF standard covers.
1570 There is an augmentation string to indicate what is going on though
1571 so that programs can recognise it.
1573 What we are doing seems to match what gdb 6.5 and libdwarf 20060614
1574 do though. I'm not sure about readelf though.
1576 (later): Well dwarfdump barfs on it:
1578 dwarfdump ERROR: dwarf_get_fde_info_for_reg:
1579 DW_DLE_DF_FRAME_DECODING_ERROR(193) (193)
1581 I've looked at binutils as well now, and the code in readelf agrees
1582 with your patch - ie it treats set_loc as having an encoded address
1583 if there is a zR augmentation indicating an encoding.
1585 Quite why gdb and libdwarf don't understand this is an interesting
1586 question...
1588 Final outcome: all uses of read_Addr were replaced by
1589 read_encoded_Addr. A new type AddressDecodingInfo was added to
1590 make it relatively clean to plumb through the extra info needed by
1591 read_encoded_Addr.
1594 /* More badness re address encoding, 12 Jan 07.
1596 Most gcc provided CIEs have a "zR" augmentation, which means they
1597 supply their own address encoding, and that works fine. However,
1598 some icc9 supplied CIEs have no augmentation, which means they use
1599 the default_Addr_encoding(). That says to use a machine-word sized
1600 value, literally unmodified.
1602 Since .so's are, in general, relocated when loaded, having absolute
1603 addresses in the CFI data makes no sense when read_encoded_Addr is
1604 used to find the initial location for a FDE. The resulting saga:
1606 TomH:
1607 > I'm chasing a stack backtrace failure for an amd64 .so which was
1608 > created I believe by icc 9.1. After a while I wound up looking at
1609 > this: (readdwarf.c)
1611 > 5083 tom static UChar default_Addr_encoding ( void )
1612 > 3584 tom {
1613 > 3584 tom switch (sizeof(Addr)) {
1614 > 3584 tom case 4: return DW_EH_PE_udata4;
1615 > 3584 tom case 8: return DW_EH_PE_udata8;
1616 > 3584 tom default: vg_assert(0);
1617 > 3584 tom }
1618 > 3584 tom }
1620 > If a CIE does not have an "augmentation string" (typically "zR") then
1621 > addresses are decoded as described by default_Addr_encoding. If there
1622 > is an 'R' in the augmentation string then the encoding to use
1623 > is specified by the CIE itself, which works fine with GCC compiled code
1624 > since that always appears to specify zR.
1626 Correct.
1628 > Problem is this .so has no augmentation string and so uses the
1629 > default encoding, viz DW_EH_PE_udata8. That appears to mean
1630 > "read a 64 bit number" and use that as-is (for the starting value
1631 > of the program counter when running the CFA program).
1633 Strictly speaking the default is DW_EH_PE_absptr, but that amounts
1634 to either udata4 or udata8 depending on the platform's pointer size
1635 which is a shortcut I used.
1637 > For this .so that gives nonsense (very small) PCs which are later
1638 > rejected by the sanity check which ensures PC ranges fall inside
1639 > the mapped text segment. It seems like the .so expects to have the
1640 > start VMA of the text segment added on. This would correspond to
1642 > static UChar default_Addr_encoding ( void )
1644 > switch (sizeof(Addr)) {
1645 > case 4: return DW_EH_PE_textrel + DW_EH_PE_udata4;
1646 > case 8: return DW_EH_PE_textrel + DW_EH_PE_udata8;
1647 > default: vg_assert(0);
1651 The problem you're seeing is that you have absolute pointers inside
1652 a shared library, which obviously makes little sense on the face of
1653 things as how would the linker know where the library will be
1654 loaded?
1656 The answer of course is that it doesn't, so if it points absolute
1657 pointers in the frame unwind data is has to include relocations for
1658 them, and I'm betting that if you look at the relocations in the
1659 library you will there are some for that data.
1661 That is fine of course when ld.so maps the library - it will
1662 relocate the eh_frame data as it maps it (or prelinking will
1663 already have done so) and when the g++ exception code kicks in and
1664 unwinds the stack it will see relocated data.
1666 We of course are mapping the section from the ELF file ourselves
1667 and are not applying the relocations, hence the problem you are
1668 seeing.
1670 Strictly speaking we should apply the relocations but the cheap
1671 solution is essentially to do what you've done - strictly speaking
1672 you should adjust by the difference between the address the library
1673 was linked for and the address it has been loaded at, but a shared
1674 library will normally be linked for address zero I believe. It's
1675 possible that prelinking might change that though?
1677 JRS:
1678 That all syncs with what I am seeing.
1680 So what I am inclined to do is:
1682 - Leave default_Addr_encoding as it is
1684 - Change read_encoded_Addr's handling of "case DW_EH_PE_absptr" so
1685 it sets base to, as you say, the difference between the address
1686 the library was linked for and the address it has been loaded at
1687 (== the SegInfo's text_bias)
1689 Does that sound sane? I think it should even handle the prelinked
1690 case.
1692 (JRS, later)
1694 Hmm. Plausible as it sounds, it doesn't work. It now produces
1695 bogus backtraces for locations inside the (statically linked)
1696 memcheck executable.
1698 Besides, there are a couple of other places where read_encoded_Addr
1699 is used -- one of which is used to establish the length of the
1700 address range covered by the current FDE:
1702 fde_arange = read_encoded_Addr(&nbytes, &adi, data);
1704 and it doesn't seem to make any sense for read_encoded_Addr to add
1705 on the text segment bias in that context. The DWARF3 spec says
1706 that both the initial_location and address_range (length) fields
1707 are encoded the same way ("target address"), so it is unclear at
1708 what stage in the process it would be appropriate to relocate the
1709 former but not the latter.
1711 One unprincipled kludge that does work is the following: just
1712 before handing one of the address range fragments off to
1713 ML_(addDiCfSI) for permanent storage, check its start address. If
1714 that is very low (less than 2 M), and is far below the mapped text
1715 segment, and adding the text bias would move the fragment entirely
1716 inside the mapped text segment, then do so. A kind of kludged
1717 last-minute relocation, if you like.
1719 12 Jan 07: committing said kludge (see kludge_then_addDiCfSI). If
1720 the situation clarifies, it can easily enough be backed out and
1721 replaced by a better fix.
1724 /* --------------- Decls --------------- */
1726 #if defined(VGP_x86_linux)
1727 # define FP_REG 5
1728 # define SP_REG 4
1729 # define RA_REG_DEFAULT 8
1730 #elif defined(VGP_amd64_linux)
1731 # define FP_REG 6
1732 # define SP_REG 7
1733 # define RA_REG_DEFAULT 16
1734 #elif defined(VGP_ppc32_linux)
1735 # define FP_REG 1
1736 # define SP_REG 1
1737 # define RA_REG_DEFAULT 65
1738 #elif defined(VGP_ppc64be_linux) || defined(VGP_ppc64le_linux)
1739 # define FP_REG 1
1740 # define SP_REG 1
1741 # define RA_REG_DEFAULT 65
1742 #elif defined(VGP_arm_linux)
1743 # define FP_REG 12
1744 # define SP_REG 13
1745 # define RA_REG_DEFAULT 14
1746 #elif defined(VGP_arm64_linux)
1747 # define FP_REG 29
1748 # define SP_REG 31
1749 # define RA_REG_DEFAULT 30
1750 #elif defined(VGP_x86_darwin)
1751 # define FP_REG 5
1752 # define SP_REG 4
1753 # define RA_REG_DEFAULT 8
1754 #elif defined(VGP_amd64_darwin)
1755 # define FP_REG 6
1756 # define SP_REG 7
1757 # define RA_REG_DEFAULT 16
1758 #elif defined(VGP_s390x_linux)
1759 # define FP_REG 11 // sometimes s390 has a frame pointer in r11
1760 # define SP_REG 15 // stack is always r15
1761 # define RA_REG_DEFAULT 14 // the return address is in r14
1762 #elif defined(VGP_mips32_linux)
1763 # define FP_REG 30
1764 # define SP_REG 29
1765 # define RA_REG_DEFAULT 31
1766 #elif defined(VGP_mips64_linux)
1767 # define FP_REG 30
1768 # define SP_REG 29
1769 # define RA_REG_DEFAULT 31
1770 #else
1771 # error "Unknown platform"
1772 #endif
1774 /* The number of regs we are prepared to unwind. The number for
1775 arm-linux (320) seems ludicrously high, but the ARM IHI 0040A page
1776 7 (DWARF for the ARM Architecture) specifies that values up to 320
1777 might exist, for Neon/VFP-v3. */
1778 #if defined(VGP_ppc32_linux) || defined(VGP_ppc64be_linux) \
1779 || defined(VGP_ppc64le_linux) || defined(VGP_mips32_linux) \
1780 || defined(VGP_mips64_linux)
1781 # define N_CFI_REGS 72
1782 #elif defined(VGP_arm_linux)
1783 # define N_CFI_REGS 320
1784 #elif defined(VGP_arm64_linux)
1785 # define N_CFI_REGS 128
1786 #else
1787 # define N_CFI_REGS 20
1788 #endif
1790 /* Instructions for the automaton */
1791 enum dwarf_cfa_primary_ops
1793 DW_CFA_use_secondary = 0,
1794 DW_CFA_advance_loc = 1,
1795 DW_CFA_offset = 2,
1796 DW_CFA_restore = 3
1799 enum dwarf_cfa_secondary_ops
1801 DW_CFA_nop = 0x00,
1802 DW_CFA_set_loc = 0x01,
1803 DW_CFA_advance_loc1 = 0x02,
1804 DW_CFA_advance_loc2 = 0x03,
1805 DW_CFA_advance_loc4 = 0x04,
1806 DW_CFA_offset_extended = 0x05,
1807 DW_CFA_restore_extended = 0x06,
1808 DW_CFA_undefined = 0x07,
1809 DW_CFA_same_value = 0x08,
1810 DW_CFA_register = 0x09,
1811 DW_CFA_remember_state = 0x0a,
1812 DW_CFA_restore_state = 0x0b,
1813 DW_CFA_def_cfa = 0x0c,
1814 DW_CFA_def_cfa_register = 0x0d,
1815 DW_CFA_def_cfa_offset = 0x0e,
1816 DW_CFA_def_cfa_expression = 0x0f, /* DWARF3 only */
1817 DW_CFA_expression = 0x10, /* DWARF3 only */
1818 DW_CFA_offset_extended_sf = 0x11, /* DWARF3 only */
1819 DW_CFA_def_cfa_sf = 0x12, /* DWARF3 only */
1820 DW_CFA_def_cfa_offset_sf = 0x13, /* DWARF3 only */
1821 DW_CFA_val_offset = 0x14, /* DWARF3 only */
1822 DW_CFA_val_offset_sf = 0x15, /* DWARF3 only */
1823 DW_CFA_val_expression = 0x16, /* DWARF3 only */
1824 DW_CFA_lo_user = 0x1c,
1825 DW_CFA_GNU_window_save = 0x2d, /* GNU extension */
1826 DW_CFA_GNU_args_size = 0x2e, /* GNU extension */
1827 DW_CFA_GNU_negative_offset_extended = 0x2f, /* GNU extension */
1828 DW_CFA_hi_user = 0x3f
1831 #define DW_EH_PE_absptr 0x00
1832 #define DW_EH_PE_omit 0xff
1834 #define DW_EH_PE_uleb128 0x01
1835 #define DW_EH_PE_udata2 0x02
1836 #define DW_EH_PE_udata4 0x03
1837 #define DW_EH_PE_udata8 0x04
1838 #define DW_EH_PE_sleb128 0x09
1839 #define DW_EH_PE_sdata2 0x0A
1840 #define DW_EH_PE_sdata4 0x0B
1841 #define DW_EH_PE_sdata8 0x0C
1842 #define DW_EH_PE_signed 0x08
1844 #define DW_EH_PE_pcrel 0x10
1845 #define DW_EH_PE_textrel 0x20
1846 #define DW_EH_PE_datarel 0x30
1847 #define DW_EH_PE_funcrel 0x40
1848 #define DW_EH_PE_aligned 0x50
1850 #define DW_EH_PE_indirect 0x80
1853 /* RegRule and UnwindContext are used temporarily to do the unwinding.
1854 The result is then summarised into a sequence of CfiSIs, if
1855 possible. UnwindContext effectively holds the state of the
1856 abstract machine whilst it is running.
1858 The CFA can either be a signed offset from a register,
1859 or an expression:
1861 CFA = cfa_reg + cfa_off when UnwindContext.cfa_is_regoff==True
1862 | [[ cfa_expr_id ]]
1864 When .cfa_is_regoff == True, cfa_expr_id must be zero
1865 When .cfa_is_regoff == False, cfa_reg must be zero
1866 and cfa_off must be zero
1868 RegRule describes, for each register, how to get its
1869 value in the previous frame, where 'cfa' denotes the cfa
1870 for the frame as a whole:
1872 RegRule = RR_Undef -- undefined
1873 | RR_Same -- same as in previous frame
1874 | RR_CFAOff arg -- is at * ( cfa + arg )
1875 | RR_CFAValOff arg -- is ( cfa + arg )
1876 | RR_Reg arg -- is in register 'arg'
1877 | RR_Expr arg -- is at * [[ arg ]]
1878 | RR_ValExpr arg -- is [[ arg ]]
1879 | RR_Arch -- dunno
1881 Note that RR_Expr is redundant since the same can be represented
1882 using RR_ValExpr with an explicit dereference (CfiExpr_Deref) at
1883 the outermost level.
1885 All expressions are stored in exprs in the containing
1886 UnwindContext. Since the UnwindContext gets reinitialised for each
1887 new FDE, summarise_context needs to copy out any expressions it
1888 wants to keep into the cfsi_exprs field of the containing SegInfo.
1890 typedef
1891 struct {
1892 enum { RR_Undef, RR_Same, RR_CFAOff, RR_CFAValOff,
1893 RR_Reg, /*RR_Expr,*/ RR_ValExpr, RR_Arch } tag;
1894 /* meaning: int offset for CFAoff/CFAValOff
1895 reg # for Reg
1896 expr index for Expr/ValExpr */
1897 Int arg;
1899 RegRule;
1901 static void ppRegRule ( const XArray* exprs, const RegRule* rrule )
1903 vg_assert(exprs);
1904 switch (rrule->tag) {
1905 case RR_Undef: VG_(printf)("u "); break;
1906 case RR_Same: VG_(printf)("s "); break;
1907 case RR_CFAOff: VG_(printf)("c%d ", rrule->arg); break;
1908 case RR_CFAValOff: VG_(printf)("v%d ", rrule->arg); break;
1909 case RR_Reg: VG_(printf)("r%d ", rrule->arg); break;
1910 case RR_ValExpr: VG_(printf)("ve{");
1911 ML_(ppCfiExpr)( exprs, rrule->arg );
1912 VG_(printf)("} ");
1913 break;
1914 case RR_Arch: VG_(printf)("a "); break;
1915 default: VG_(core_panic)("ppRegRule");
1920 /* Size of the stack of register unwind rules. This is only
1921 exceedingly rarely used, so a stack of size 1 should actually work
1922 with almost all compiler-generated CFA. */
1923 #define N_RR_STACK 4
1925 typedef
1926 struct {
1927 /* Read-only fields (set by the CIE) */
1928 Int code_a_f;
1929 Int data_a_f;
1930 Addr initloc;
1931 Int ra_reg;
1932 /* The rest of these fields can be modifed by
1933 run_CF_instruction. */
1934 /* The LOC entry */
1935 Addr loc;
1936 /* We need a stack of these in order to handle
1937 DW_CFA_{remember,restore}_state. */
1938 struct UnwindContextState {
1939 /* The CFA entry. This can be either reg+/-offset or an expr. */
1940 Bool cfa_is_regoff; /* True=>is reg+offset; False=>is expr */
1941 Int cfa_reg;
1942 Int cfa_off; /* in bytes */
1943 Int cfa_expr_ix; /* index into cfa_exprs */
1944 /* Register unwind rules. */
1945 RegRule reg[N_CFI_REGS];
1947 state[N_RR_STACK];
1948 Int state_sp; /* 0 <= state_sp < N_RR_STACK; points at the
1949 currently-in-use rule set. */
1950 /* array of CfiExpr, shared by reg[] and cfa_expr_ix */
1951 XArray* exprs;
1953 UnwindContext;
1955 static void ppUnwindContext ( const UnwindContext* ctx )
1957 Int j, i;
1958 VG_(printf)("0x%llx: ", (ULong)ctx->loc);
1959 for (j = 0; j <= ctx->state_sp; j++) {
1960 const struct UnwindContextState* ctxs = &ctx->state[j];
1961 VG_(printf)("%s[%d]={ ", j > 0 ? " " : "", j);
1962 if (ctxs->cfa_is_regoff) {
1963 VG_(printf)("%d(r%d) ", ctxs->cfa_off, ctxs->cfa_reg);
1964 } else {
1965 vg_assert(ctx->exprs);
1966 VG_(printf)("{");
1967 ML_(ppCfiExpr)( ctx->exprs, ctxs->cfa_expr_ix );
1968 VG_(printf)("} ");
1970 VG_(printf)("{ ");
1971 for (i = 0; i < N_CFI_REGS; i++)
1972 ppRegRule(ctx->exprs, &ctxs->reg[i]);
1973 VG_(printf)("}");
1975 VG_(printf)("\n");
1978 static void initUnwindContext ( /*OUT*/UnwindContext* ctx )
1980 Int j, i;
1981 VG_(memset)(ctx, 0, sizeof(*ctx));
1982 /* ctx->code_a_f = 0;
1983 ctx->data_a_f = 0;
1984 ctx->initloc = 0; */
1985 ctx->ra_reg = RA_REG_DEFAULT;
1986 /* ctx->loc = 0;
1987 ctx->exprs = NULL;
1988 ctx->state_sp = 0; */
1989 for (j = 0; j < N_RR_STACK; j++) {
1990 ctx->state[j].cfa_is_regoff = True;
1991 /* ctx->state[j].cfa_reg = 0;
1992 ctx->state[j].cfa_off = 0;
1993 ctx->state[j].cfa_expr_ix = 0; */
1994 for (i = 0; i < N_CFI_REGS; i++) {
1995 if (RR_Undef != 0)
1996 ctx->state[j].reg[i].tag = RR_Undef;
1997 /* ctx->state[j].reg[i].arg = 0; */
1999 # if defined(VGA_arm)
2000 /* All callee-saved registers (or at least the ones we are
2001 summarising for) should start out as RR_Same, on ARM. */
2002 ctx->state[j].reg[11].tag = RR_Same;
2003 /* ctx->state[j].reg[13].tag = RR_Same; */
2004 ctx->state[j].reg[14].tag = RR_Same;
2005 ctx->state[j].reg[12].tag = RR_Same;
2006 ctx->state[j].reg[7].tag = RR_Same;
2007 /* this can't be right though: R12 (IP) isn't callee saved. */
2008 # elif defined(VGA_arm64)
2009 /* Callee-saved registers (that we are interested in) should
2010 start out as RR_Same. */
2011 ctx->state[j].reg[29/*FP*/].tag = RR_Same;
2012 ctx->state[j].reg[30/*LR*/].tag = RR_Same;
2013 # endif
2018 /* A structure which holds information needed by read_encoded_Addr().
2020 typedef
2021 struct {
2022 UChar encoding;
2023 DiCursor ehframe_image;
2024 Addr ehframe_avma;
2025 Addr text_bias;
2027 AddressDecodingInfo;
2030 /* ------------ Deal with summary-info records ------------ */
2032 /* --------------- Summarisation --------------- */
2034 /* Forward */
2035 static
2036 Int copy_convert_CfiExpr_tree ( XArray* dst, const UnwindContext* srcuc,
2037 Int nd );
2039 /* Summarise ctx into si, if possible. Returns True if successful.
2040 This is taken to be just after ctx's loc advances; hence the
2041 summary is up to but not including the current loc. This works
2042 on both x86 and amd64.
2044 static Bool summarise_context(/*OUT*/Addr* base,
2045 /*OUT*/UInt* len,
2046 /*OUT*/DiCfSI_m* si_m,
2047 Addr loc_start,
2048 const UnwindContext* ctx,
2049 DebugInfo* debuginfo )
2051 Int why = 0;
2052 const struct UnwindContextState* ctxs;
2054 *base = 0;
2055 *len = 0;
2056 VG_(bzero_inline)(si_m, sizeof(*si_m));
2059 /* Guard against obviously stupid settings of the reg-rule stack
2060 pointer. */
2061 if (ctx->state_sp < 0) { why = 8; goto failed; }
2062 if (ctx->state_sp >= N_RR_STACK) { why = 9; goto failed; }
2063 ctxs = &ctx->state[ctx->state_sp];
2065 /* First, summarise the method for generating the CFA */
2066 if (!ctxs->cfa_is_regoff) {
2067 /* it was set by DW_CFA_def_cfa_expression; try to convert */
2068 XArray *src, *dst;
2069 Int conv;
2070 src = ctx->exprs;
2071 dst = debuginfo->cfsi_exprs;
2072 if (src && (VG_(sizeXA)(src) > 0) && (!dst)) {
2073 dst = VG_(newXA)( ML_(dinfo_zalloc), "di.ccCt.1", ML_(dinfo_free),
2074 sizeof(CfiExpr) );
2075 debuginfo->cfsi_exprs = dst;
2077 conv = copy_convert_CfiExpr_tree
2078 ( dst, ctx, ctxs->cfa_expr_ix );
2079 vg_assert(conv >= -1);
2080 if (conv == -1) { why = 6; goto failed; }
2081 si_m->cfa_how = CFIC_EXPR;
2082 si_m->cfa_off = conv;
2083 if (0 && debuginfo->ddump_frames)
2084 ML_(ppCfiExpr)(dst, conv);
2086 else
2087 if (ctxs->cfa_is_regoff && ctxs->cfa_reg == SP_REG) {
2088 si_m->cfa_off = ctxs->cfa_off;
2089 # if defined(VGA_x86) || defined(VGA_amd64) || defined(VGA_s390x) \
2090 || defined(VGA_mips32) || defined(VGA_mips64)
2091 si_m->cfa_how = CFIC_IA_SPREL;
2092 # elif defined(VGA_arm)
2093 si_m->cfa_how = CFIC_ARM_R13REL;
2094 # elif defined(VGA_arm64)
2095 si_m->cfa_how = CFIC_ARM64_SPREL;
2096 # else
2097 si_m->cfa_how = 0; /* invalid */
2098 # endif
2100 else
2101 if (ctxs->cfa_is_regoff && ctxs->cfa_reg == FP_REG) {
2102 si_m->cfa_off = ctxs->cfa_off;
2103 # if defined(VGA_x86) || defined(VGA_amd64) || defined(VGA_s390x) \
2104 || defined(VGA_mips32) || defined(VGA_mips64)
2105 si_m->cfa_how = CFIC_IA_BPREL;
2106 # elif defined(VGA_arm)
2107 si_m->cfa_how = CFIC_ARM_R12REL;
2108 # elif defined(VGA_arm64)
2109 si_m->cfa_how = CFIC_ARM64_X29REL;
2110 # else
2111 si_m->cfa_how = 0; /* invalid */
2112 # endif
2114 # if defined(VGA_arm)
2115 else
2116 if (ctxs->cfa_is_regoff && ctxs->cfa_reg == 11/*??_REG*/) {
2117 si_m->cfa_how = CFIC_ARM_R11REL;
2118 si_m->cfa_off = ctxs->cfa_off;
2120 else
2121 if (ctxs->cfa_is_regoff && ctxs->cfa_reg == 7/*??_REG*/) {
2122 si_m->cfa_how = CFIC_ARM_R7REL;
2123 si_m->cfa_off = ctxs->cfa_off;
2125 # elif defined(VGA_arm64)
2126 // do we need any arm64 specifics here?
2127 # endif
2128 else {
2129 why = 1;
2130 goto failed;
2133 # define SUMMARISE_HOW(_how, _off, _ctxreg) \
2134 switch (_ctxreg.tag) { \
2135 case RR_Undef: \
2136 _how = CFIR_UNKNOWN; _off = 0; break; \
2137 case RR_Same: \
2138 _how = CFIR_SAME; _off = 0; break; \
2139 case RR_CFAOff: \
2140 _how = CFIR_MEMCFAREL; _off = _ctxreg.arg; break; \
2141 case RR_CFAValOff: \
2142 _how = CFIR_CFAREL; _off = _ctxreg.arg; break; \
2143 case RR_ValExpr: { \
2144 XArray *src, *dst; \
2145 Int conv; \
2146 src = ctx->exprs; \
2147 dst = debuginfo->cfsi_exprs; \
2148 if (src && (VG_(sizeXA)(src) > 0) && (!dst)) { \
2149 dst = VG_(newXA)( ML_(dinfo_zalloc), \
2150 "di.ccCt.2", \
2151 ML_(dinfo_free), \
2152 sizeof(CfiExpr) ); \
2153 debuginfo->cfsi_exprs = dst; \
2155 conv = copy_convert_CfiExpr_tree \
2156 ( dst, ctx, _ctxreg.arg ); \
2157 vg_assert(conv >= -1); \
2158 if (conv == -1) { why = 7; goto failed; } \
2159 _how = CFIR_EXPR; \
2160 _off = conv; \
2161 if (0 && debuginfo->ddump_frames) \
2162 ML_(ppCfiExpr)(dst, conv); \
2163 break; \
2165 default: \
2166 why = 2; goto failed; /* otherwise give up */ \
2170 # if defined(VGA_x86) || defined(VGA_amd64)
2172 /* --- entire tail of this fn specialised for x86/amd64 --- */
2174 SUMMARISE_HOW(si_m->ra_how, si_m->ra_off,
2175 ctxs->reg[ctx->ra_reg] );
2176 SUMMARISE_HOW(si_m->bp_how, si_m->bp_off,
2177 ctxs->reg[FP_REG] );
2179 /* on x86/amd64, it seems the old %{e,r}sp value before the call is
2180 always the same as the CFA. Therefore ... */
2181 si_m->sp_how = CFIR_CFAREL;
2182 si_m->sp_off = 0;
2184 /* also, gcc says "Undef" for %{e,r}bp when it is unchanged. So
2185 .. */
2186 if (ctxs->reg[FP_REG].tag == RR_Undef)
2187 si_m->bp_how = CFIR_SAME;
2189 /* knock out some obviously stupid cases */
2190 if (si_m->ra_how == CFIR_SAME)
2191 { why = 3; goto failed; }
2193 /* bogus looking range? Note, we require that the difference is
2194 representable in 32 bits. */
2195 if (loc_start >= ctx->loc)
2196 { why = 4; goto failed; }
2197 if (ctx->loc - loc_start > 10000000 /* let's say */)
2198 { why = 5; goto failed; }
2200 *base = loc_start + ctx->initloc;
2201 *len = (UInt)(ctx->loc - loc_start);
2203 return True;
2205 # elif defined(VGA_arm)
2207 /* ---- entire tail of this fn specialised for arm ---- */
2209 SUMMARISE_HOW(si_m->r14_how, si_m->r14_off,
2210 ctxs->reg[14] );
2212 //SUMMARISE_HOW(si_m->r13_how, si_m->r13_off,
2213 // ctxs->reg[13] );
2215 SUMMARISE_HOW(si_m->r12_how, si_m->r12_off,
2216 ctxs->reg[FP_REG] );
2218 SUMMARISE_HOW(si_m->r11_how, si_m->r11_off,
2219 ctxs->reg[11/*FP_REG*/] );
2221 SUMMARISE_HOW(si_m->r7_how, si_m->r7_off,
2222 ctxs->reg[7] );
2224 if (ctxs->reg[14/*LR*/].tag == RR_Same
2225 && ctx->ra_reg == 14/*as we expect it always to be*/) {
2226 /* Generate a trivial CfiExpr, which merely says "r14". First
2227 ensure this DebugInfo has a cfsi_expr array in which to park
2228 it. */
2229 if (!debuginfo->cfsi_exprs)
2230 debuginfo->cfsi_exprs = VG_(newXA)( ML_(dinfo_zalloc),
2231 "di.ccCt.2a",
2232 ML_(dinfo_free),
2233 sizeof(CfiExpr) );
2234 si_m->ra_off = ML_(CfiExpr_CfiReg)( debuginfo->cfsi_exprs,
2235 Creg_ARM_R14);
2236 si_m->ra_how = CFIR_EXPR;
2237 } else {
2238 /* Just summarise it in the normal way */
2239 SUMMARISE_HOW(si_m->ra_how, si_m->ra_off,
2240 ctxs->reg[ctx->ra_reg] );
2243 /* on arm, it seems the old r13 (SP) value before the call is
2244 always the same as the CFA. Therefore ... */
2245 si_m->r13_how = CFIR_CFAREL;
2246 si_m->r13_off = 0;
2248 /* bogus looking range? Note, we require that the difference is
2249 representable in 32 bits. */
2250 if (loc_start >= ctx->loc)
2251 { why = 4; goto failed; }
2252 if (ctx->loc - loc_start > 10000000 /* let's say */)
2253 { why = 5; goto failed; }
2255 *base = loc_start + ctx->initloc;
2256 *len = (UInt)(ctx->loc - loc_start);
2258 return True;
2260 # elif defined(VGA_arm64)
2262 /* --- entire tail of this fn specialised for arm64 --- */
2264 SUMMARISE_HOW(si_m->x30_how, si_m->x30_off, ctxs->reg[30/*LR*/]);
2265 SUMMARISE_HOW(si_m->x29_how, si_m->x29_off, ctxs->reg[29/*FP*/]);
2267 if (ctxs->reg[30/*LR*/].tag == RR_Same
2268 && ctx->ra_reg == 30/*as we expect it always to be*/) {
2269 /* Generate a trivial CfiExpr, which merely says "x30". First
2270 ensure this DebugInfo has a cfsi_expr array in which to park
2271 it. */
2272 if (!debuginfo->cfsi_exprs)
2273 debuginfo->cfsi_exprs = VG_(newXA)( ML_(dinfo_zalloc),
2274 "di.ccCt.2a-arm64",
2275 ML_(dinfo_free),
2276 sizeof(CfiExpr) );
2277 si_m->ra_off = ML_(CfiExpr_CfiReg)( debuginfo->cfsi_exprs,
2278 Creg_ARM64_X30);
2279 si_m->ra_how = CFIR_EXPR;
2280 } else {
2281 /* Just summarise it in the normal way */
2282 SUMMARISE_HOW(si_m->ra_how, si_m->ra_off, ctxs->reg[ctx->ra_reg]);
2285 /* on arm64, it seems the old SP value before the call is always
2286 the same as the CFA. Therefore ... */
2287 si_m->sp_how = CFIR_CFAREL;
2288 si_m->sp_off = 0;
2290 /* bogus looking range? Note, we require that the difference is
2291 representable in 32 bits. */
2292 if (loc_start >= ctx->loc)
2293 { why = 4; goto failed; }
2294 if (ctx->loc - loc_start > 10000000 /* let's say */)
2295 { why = 5; goto failed; }
2297 *base = loc_start + ctx->initloc;
2298 *len = (UInt)(ctx->loc - loc_start);
2300 return True;
2302 # elif defined(VGA_s390x)
2304 /* --- entire tail of this fn specialised for s390 --- */
2306 SUMMARISE_HOW(si_m->ra_how, si_m->ra_off,
2307 ctxs->reg[ctx->ra_reg] );
2308 SUMMARISE_HOW(si_m->fp_how, si_m->fp_off,
2309 ctxs->reg[FP_REG] );
2310 SUMMARISE_HOW(si_m->sp_how, si_m->sp_off,
2311 ctxs->reg[SP_REG] );
2313 /* change some defaults to consumable values */
2314 if (si_m->sp_how == CFIR_UNKNOWN)
2315 si_m->sp_how = CFIR_SAME;
2317 if (si_m->fp_how == CFIR_UNKNOWN)
2318 si_m->fp_how = CFIR_SAME;
2320 if (si_m->cfa_how == CFIR_UNKNOWN) {
2321 si_m->cfa_how = CFIC_IA_SPREL;
2322 si_m->cfa_off = 160;
2324 if (si_m->ra_how == CFIR_UNKNOWN) {
2325 if (!debuginfo->cfsi_exprs)
2326 debuginfo->cfsi_exprs = VG_(newXA)( ML_(dinfo_zalloc),
2327 "di.ccCt.2a",
2328 ML_(dinfo_free),
2329 sizeof(CfiExpr) );
2330 si_m->ra_how = CFIR_EXPR;
2331 si_m->ra_off = ML_(CfiExpr_CfiReg)( debuginfo->cfsi_exprs,
2332 Creg_S390_R14);
2335 /* knock out some obviously stupid cases */
2336 if (si_m->ra_how == CFIR_SAME)
2337 { why = 3; goto failed; }
2339 /* bogus looking range? Note, we require that the difference is
2340 representable in 32 bits. */
2341 if (loc_start >= ctx->loc)
2342 { why = 4; goto failed; }
2343 if (ctx->loc - loc_start > 10000000 /* let's say */)
2344 { why = 5; goto failed; }
2346 *base = loc_start + ctx->initloc;
2347 *len = (UInt)(ctx->loc - loc_start);
2349 return True;
2351 # elif defined(VGA_mips32) || defined(VGA_mips64)
2353 /* --- entire tail of this fn specialised for mips --- */
2355 SUMMARISE_HOW(si_m->ra_how, si_m->ra_off,
2356 ctxs->reg[ctx->ra_reg] );
2357 SUMMARISE_HOW(si_m->fp_how, si_m->fp_off,
2358 ctxs->reg[FP_REG] );
2359 SUMMARISE_HOW(si_m->sp_how, si_m->sp_off,
2360 ctxs->reg[SP_REG] );
2361 si_m->sp_how = CFIR_CFAREL;
2362 si_m->sp_off = 0;
2364 if (si_m->fp_how == CFIR_UNKNOWN)
2365 si_m->fp_how = CFIR_SAME;
2366 if (si_m->cfa_how == CFIR_UNKNOWN) {
2367 si_m->cfa_how = CFIC_IA_SPREL;
2368 si_m->cfa_off = 160;
2370 if (si_m->ra_how == CFIR_UNKNOWN) {
2371 if (!debuginfo->cfsi_exprs)
2372 debuginfo->cfsi_exprs = VG_(newXA)( ML_(dinfo_zalloc),
2373 "di.ccCt.2a",
2374 ML_(dinfo_free),
2375 sizeof(CfiExpr) );
2376 si_m->ra_how = CFIR_EXPR;
2377 si_m->ra_off = ML_(CfiExpr_CfiReg)( debuginfo->cfsi_exprs,
2378 Creg_MIPS_RA);
2381 if (si_m->ra_how == CFIR_SAME)
2382 { why = 3; goto failed; }
2384 if (loc_start >= ctx->loc)
2385 { why = 4; goto failed; }
2386 if (ctx->loc - loc_start > 10000000 /* let's say */)
2387 { why = 5; goto failed; }
2389 *base = loc_start + ctx->initloc;
2390 *len = (UInt)(ctx->loc - loc_start);
2392 return True;
2394 # elif defined(VGA_ppc32) || defined(VGA_ppc64be) || defined(VGA_ppc64le)
2395 /* These don't use CFI based unwinding (is that really true?) */
2397 # else
2398 # error "Unknown arch"
2399 # endif
2401 /* --- non-specialised code after this point --- */
2403 # undef SUMMARISE_HOW
2405 failed:
2406 if (VG_(clo_verbosity) > 2 || debuginfo->trace_cfi) {
2407 VG_(message)(Vg_DebugMsg,
2408 "summarise_context(loc_start = %#lx)"
2409 ": cannot summarise(why=%d): \n", loc_start, why);
2410 ppUnwindContext(ctx);
2412 return False;
2415 /* Copy the tree rooted at srcuc->exprs node srcix to dstxa, on the
2416 way converting any DwReg regs (regs numbered using the Dwarf scheme
2417 defined by each architecture's ABI) into CfiRegs, which are
2418 platform independent. If the conversion isn't possible because
2419 there is no equivalent register, return -1. This has the
2420 undesirable side effect of de-dagifying the input; oh well. */
2421 static Int copy_convert_CfiExpr_tree ( XArray* dstxa,
2422 const UnwindContext* srcuc,
2423 Int srcix )
2425 CfiExpr* src;
2426 Int cpL, cpR, cpA;
2427 XArray* srcxa = srcuc->exprs;
2428 vg_assert(srcxa);
2429 vg_assert(dstxa);
2430 vg_assert(srcix >= 0 && srcix < VG_(sizeXA)(srcxa));
2432 src = VG_(indexXA)( srcxa, srcix );
2433 switch (src->tag) {
2434 case Cex_Undef:
2435 return ML_(CfiExpr_Undef)( dstxa );
2436 case Cex_Deref:
2437 cpA = copy_convert_CfiExpr_tree( dstxa, srcuc, src->Cex.Deref.ixAddr );
2438 if (cpA == -1)
2439 return -1; /* propagate failure */
2440 return ML_(CfiExpr_Deref)( dstxa, cpA );
2441 case Cex_Const:
2442 return ML_(CfiExpr_Const)( dstxa, src->Cex.Const.con );
2443 case Cex_Binop:
2444 cpL = copy_convert_CfiExpr_tree( dstxa, srcuc, src->Cex.Binop.ixL );
2445 cpR = copy_convert_CfiExpr_tree( dstxa, srcuc, src->Cex.Binop.ixR );
2446 vg_assert(cpL >= -1 && cpR >= -1);
2447 if (cpL == -1 || cpR == -1)
2448 return -1; /* propagate failure */
2449 return ML_(CfiExpr_Binop)( dstxa, src->Cex.Binop.op, cpL, cpR );
2450 case Cex_CfiReg:
2451 /* should not see these in input (are created only by this
2452 conversion step!) */
2453 VG_(core_panic)("copy_convert_CfiExpr_tree: CfiReg in input");
2454 case Cex_DwReg: {
2455 /* This is the only place where the conversion can fail. */
2456 Int dwreg __attribute__((unused));
2457 dwreg = src->Cex.DwReg.reg;
2458 # if defined(VGA_x86) || defined(VGA_amd64)
2459 if (dwreg == SP_REG)
2460 return ML_(CfiExpr_CfiReg)( dstxa, Creg_IA_SP );
2461 if (dwreg == FP_REG)
2462 return ML_(CfiExpr_CfiReg)( dstxa, Creg_IA_BP );
2463 if (dwreg == srcuc->ra_reg)
2464 return ML_(CfiExpr_CfiReg)( dstxa, Creg_IA_IP ); /* correct? */
2465 # elif defined(VGA_arm)
2466 if (dwreg == SP_REG)
2467 return ML_(CfiExpr_CfiReg)( dstxa, Creg_ARM_R13 );
2468 if (dwreg == FP_REG)
2469 return ML_(CfiExpr_CfiReg)( dstxa, Creg_ARM_R12 );
2470 if (dwreg == srcuc->ra_reg)
2471 return ML_(CfiExpr_CfiReg)( dstxa, Creg_ARM_R15 ); /* correct? */
2472 # elif defined(VGA_s390x)
2473 if (dwreg == SP_REG)
2474 return ML_(CfiExpr_CfiReg)( dstxa, Creg_IA_SP );
2475 if (dwreg == FP_REG)
2476 return ML_(CfiExpr_CfiReg)( dstxa, Creg_IA_BP );
2477 if (dwreg == srcuc->ra_reg)
2478 return ML_(CfiExpr_CfiReg)( dstxa, Creg_IA_IP ); /* correct? */
2479 # elif defined(VGA_mips32) || defined(VGA_mips64)
2480 if (dwreg == SP_REG)
2481 return ML_(CfiExpr_CfiReg)( dstxa, Creg_IA_SP );
2482 if (dwreg == FP_REG)
2483 return ML_(CfiExpr_CfiReg)( dstxa, Creg_IA_BP );
2484 if (dwreg == srcuc->ra_reg)
2485 return ML_(CfiExpr_CfiReg)( dstxa, Creg_IA_IP );
2486 # elif defined(VGA_arm64)
2487 I_die_here;
2488 # elif defined(VGA_ppc32) || defined(VGA_ppc64be) \
2489 || defined(VGA_ppc64le)
2490 # else
2491 # error "Unknown arch"
2492 # endif
2493 /* else we must fail - can't represent the reg */
2494 return -1;
2496 default:
2497 VG_(core_panic)("copy_convert_CfiExpr_tree: default");
2502 static void ppUnwindContext_summary ( const UnwindContext* ctx )
2504 const struct UnwindContextState* ctxs = &ctx->state[ctx->state_sp];
2506 VG_(printf)("0x%llx-1: ", (ULong)ctx->loc);
2508 if (ctxs->cfa_reg == SP_REG) {
2509 VG_(printf)("SP/CFA=%d+SP ", ctxs->cfa_off);
2510 } else
2511 if (ctxs->cfa_reg == FP_REG) {
2512 VG_(printf)("SP/CFA=%d+FP ", ctxs->cfa_off);
2513 } else {
2514 VG_(printf)("SP/CFA=unknown ");
2517 VG_(printf)("RA=");
2518 ppRegRule( ctx->exprs, &ctxs->reg[ctx->ra_reg] );
2520 VG_(printf)("FP=");
2521 ppRegRule( ctx->exprs, &ctxs->reg[FP_REG] );
2522 VG_(printf)("\n");
2526 /* ------------ Pick apart DWARF2 byte streams ------------ */
2528 static ULong step_le_u_encoded_literal ( DiCursor* data, UInt size )
2530 switch (size) {
2531 case 8: return (ULong)ML_(cur_step_ULong)( data );
2532 case 4: return (ULong)ML_(cur_step_UInt)( data );
2533 case 2: return (ULong)ML_(cur_step_UShort)( data );
2534 case 1: return (ULong)ML_(cur_step_UChar)( data );
2535 default: vg_assert(0); /*NOTREACHED*/ return 0;
2539 static Long step_le_s_encoded_literal ( DiCursor* data, UInt size )
2541 Long s64 = step_le_u_encoded_literal( data, size );
2542 switch (size) {
2543 case 8: break;
2544 case 4: s64 <<= 32; s64 >>= 32; break;
2545 case 2: s64 <<= 48; s64 >>= 48; break;
2546 case 1: s64 <<= 56; s64 >>= 56; break;
2547 default: vg_assert(0); /*NOTREACHED*/ return 0;
2549 return s64;
2552 static UChar default_Addr_encoding ( void )
2554 switch (sizeof(Addr)) {
2555 case 4: return DW_EH_PE_udata4;
2556 case 8: return DW_EH_PE_udata8;
2557 default: vg_assert(0);
2561 static UInt size_of_encoded_Addr ( UChar encoding )
2563 if (encoding == DW_EH_PE_omit)
2564 return 0;
2566 switch (encoding & 0x07) {
2567 case DW_EH_PE_absptr: return sizeof(Addr);
2568 case DW_EH_PE_udata2: return sizeof(UShort);
2569 case DW_EH_PE_udata4: return sizeof(UInt);
2570 case DW_EH_PE_udata8: return sizeof(ULong);
2571 default: vg_assert(0);
2575 static Addr step_encoded_Addr ( const AddressDecodingInfo* adi,
2576 /*MOD*/DiCursor* data )
2578 /* Regarding the handling of DW_EH_PE_absptr. DWARF3 says this
2579 denotes an absolute address, hence you would think 'base' is
2580 zero. However, that is nonsensical (unless relocations are to
2581 be applied to the unwind data before reading it, which sounds
2582 unlikely). My interpretation is that DW_EH_PE_absptr indicates
2583 an address relative to where the object was loaded (technically,
2584 relative to its stated load VMA, hence the use of text_bias
2585 rather than text_avma). Hmm, should we use text_bias or
2586 text_avma here? Not sure.
2588 This view appears to be supported by DWARF3 spec sec 7.3
2589 "Executable Objects and Shared Objects":
2591 This requirement makes the debugging information for shared
2592 objects position independent. Virtual addresses in a shared
2593 object may be calculated by adding the offset to the base
2594 address at which the object was attached. This offset is
2595 available in the run-time linker's data structures.
2597 Addr base;
2598 Word offset;
2599 UChar encoding = adi->encoding;
2600 DiCursor ehframe_image = adi->ehframe_image;
2601 Addr ehframe_avma = adi->ehframe_avma;
2603 vg_assert((encoding & DW_EH_PE_indirect) == 0);
2605 switch (encoding & 0x70) {
2606 case DW_EH_PE_absptr:
2607 base = adi->text_bias;
2608 break;
2609 case DW_EH_PE_pcrel:
2610 base = ehframe_avma + ML_(cur_minus)(*data, ehframe_image);
2611 break;
2612 case DW_EH_PE_datarel:
2613 vg_assert(0);
2614 base = /* data base address */ 0;
2615 break;
2616 case DW_EH_PE_textrel:
2617 vg_assert(0);
2618 base = /* text base address */ 0;
2619 break;
2620 case DW_EH_PE_funcrel:
2621 base = 0;
2622 break;
2623 case DW_EH_PE_aligned:
2624 base = 0;
2625 offset = ML_(cur_minus)(*data, ehframe_image);
2626 if ((offset % sizeof(Addr)) != 0) {
2627 Word nbytes = sizeof(Addr) - (offset % sizeof(Addr));
2628 *data = ML_(cur_plus)(*data, nbytes);
2630 break;
2631 default:
2632 vg_assert(0);
2635 if ((encoding & 0x07) == 0x00)
2636 encoding |= default_Addr_encoding();
2638 switch (encoding & 0x0f) {
2639 case DW_EH_PE_udata2:
2640 return base + ML_(cur_step_UShort)(data);
2641 case DW_EH_PE_udata4:
2642 return base + ML_(cur_step_UInt)(data);
2643 case DW_EH_PE_udata8:
2644 return base + ML_(cur_step_ULong)(data);
2645 case DW_EH_PE_sdata2:
2646 return base + ML_(cur_step_Short)(data);
2647 case DW_EH_PE_sdata4:
2648 return base + ML_(cur_step_Int)(data);
2649 case DW_EH_PE_sdata8:
2650 return base + ML_(cur_step_Long)(data);
2651 default:
2652 vg_assert2(0, "read encoded address %d\n", encoding & 0x0f);
2657 /* ------------ Run/show DWARF3 expressions ---------- */
2659 /* Convert the DWARF3 expression in expr[0 .. exprlen-1] into a dag
2660 (of CfiExprs) stored in ctx->exprs, and return the index in
2661 ctx->exprs of the root node. Or fail in which case return -1. */
2662 /* IMPORTANT: when adding expression forms here, also remember to
2663 add suitable evaluation code in evalCfiExpr in debuginfo.c. */
2664 static Int dwarfexpr_to_dag ( const UnwindContext* ctx,
2665 DiCursor expr, Int exprlen,
2666 Bool push_cfa_at_start,
2667 Bool ddump_frames )
2669 # define N_EXPR_STACK 20
2671 # define PUSH(_arg) \
2672 do { \
2673 vg_assert(sp >= -1 && sp < N_EXPR_STACK); \
2674 if (sp == N_EXPR_STACK-1) \
2675 return -1; \
2676 sp++; \
2677 stack[sp] = (_arg); \
2678 } while (0)
2680 # define POP(_lval) \
2681 do { \
2682 vg_assert(sp >= -1 && sp < N_EXPR_STACK); \
2683 if (sp == -1) \
2684 return -1; \
2685 _lval = stack[sp]; \
2686 sp--; \
2687 } while (0)
2689 Int ix, ix2, reg;
2690 UChar opcode;
2691 Word sw;
2692 UWord uw;
2693 CfiUnop uop;
2694 CfiBinop bop;
2695 const HChar* opname;
2697 Int sp; /* # of top element: valid is -1 .. N_EXPR_STACK-1 */
2698 Int stack[N_EXPR_STACK]; /* indices into ctx->exprs */
2699 const struct UnwindContextState* ctxs = &ctx->state[ctx->state_sp];
2701 XArray* dst = ctx->exprs;
2702 DiCursor limit = ML_(cur_plus)(expr, exprlen);
2704 vg_assert(dst);
2705 vg_assert(exprlen >= 0);
2707 sp = -1; /* empty */
2709 /* Synthesise the CFA as a CfiExpr */
2710 if (push_cfa_at_start) {
2711 if (ctxs->cfa_is_regoff) {
2712 /* cfa is reg +/- offset */
2713 ix = ML_(CfiExpr_Binop)( dst,
2714 Cbinop_Add,
2715 ML_(CfiExpr_DwReg)( dst, ctxs->cfa_reg ),
2716 ML_(CfiExpr_Const)( dst, (UWord)(Word)ctxs->cfa_off )
2718 PUSH(ix);
2719 } else {
2720 /* CFA is already an expr; use its root node */
2721 PUSH(ctxs->cfa_expr_ix);
2725 while (True) {
2727 vg_assert(sp >= -1 && sp < N_EXPR_STACK);
2729 if (ML_(cur_cmpGT)(expr, limit)) /* "expr > limit" */
2730 return -1; /* overrun - something's wrong */
2732 if (ML_(cur_cmpEQ)(expr, limit)) { /* "expr == limit" */
2733 /* end of expr - return expr on the top of stack. */
2734 if (sp == -1)
2735 return -1; /* stack empty. Bad. */
2736 else
2737 break;
2740 uop = 0; bop = 0; opname = NULL; /* excessively conservative */
2742 opcode = ML_(cur_step_UChar)(&expr);
2743 switch (opcode) {
2745 case DW_OP_lit0 ... DW_OP_lit31:
2746 /* push: literal 0 .. 31 */
2747 sw = (Word)opcode - (Word)DW_OP_lit0;
2748 vg_assert(sw >= 0 && sw <= 31);
2749 PUSH( ML_(CfiExpr_Const)( dst, (UWord)sw ) );
2750 if (ddump_frames)
2751 VG_(printf)("DW_OP_lit%ld", sw);
2752 break;
2754 case DW_OP_breg0 ... DW_OP_breg31:
2755 /* push: reg + sleb128 */
2756 reg = (Int)opcode - (Int)DW_OP_breg0;
2757 vg_assert(reg >= 0 && reg <= 31);
2758 sw = step_leb128S( &expr );
2759 ix = ML_(CfiExpr_Binop)( dst,
2760 Cbinop_Add,
2761 ML_(CfiExpr_DwReg)( dst, reg ),
2762 ML_(CfiExpr_Const)( dst, (UWord)sw )
2764 PUSH(ix);
2765 if (ddump_frames)
2766 VG_(printf)("DW_OP_breg%d: %ld", reg, sw);
2767 break;
2769 case DW_OP_reg0 ... DW_OP_reg31:
2770 /* push: reg */
2771 reg = (Int)opcode - (Int)DW_OP_reg0;
2772 vg_assert(reg >= 0 && reg <= 31);
2773 ix = ML_(CfiExpr_DwReg)( dst, reg );
2774 PUSH(ix);
2775 if (ddump_frames)
2776 VG_(printf)("DW_OP_reg%d", reg);
2777 break;
2779 case DW_OP_plus_uconst:
2780 uw = step_leb128U( &expr );
2781 PUSH( ML_(CfiExpr_Const)( dst, uw ) );
2782 POP( ix );
2783 POP( ix2 );
2784 PUSH( ML_(CfiExpr_Binop)( dst, Cbinop_Add, ix2, ix ) );
2785 if (ddump_frames)
2786 VG_(printf)("DW_OP_plus_uconst: %lu", uw);
2787 break;
2789 case DW_OP_const4s:
2790 /* push: 32-bit signed immediate */
2791 sw = step_le_s_encoded_literal( &expr, 4 );
2792 PUSH( ML_(CfiExpr_Const)( dst, (UWord)sw ) );
2793 if (ddump_frames)
2794 VG_(printf)("DW_OP_const4s: %ld", sw);
2795 break;
2797 case DW_OP_const2s:
2798 /* push: 16-bit signed immediate */
2799 sw = step_le_s_encoded_literal( &expr, 2 );
2800 PUSH( ML_(CfiExpr_Const)( dst, (UWord)sw ) );
2801 if (ddump_frames)
2802 VG_(printf)("DW_OP_const2s: %ld", sw);
2803 break;
2805 case DW_OP_const1s:
2806 /* push: 8-bit signed immediate */
2807 sw = step_le_s_encoded_literal( &expr, 1 );
2808 PUSH( ML_(CfiExpr_Const)( dst, (UWord)sw ) );
2809 if (ddump_frames)
2810 VG_(printf)("DW_OP_const1s: %ld", sw);
2811 break;
2813 case DW_OP_const1u:
2814 /* push: 8-bit unsigned immediate */
2815 uw = step_le_u_encoded_literal( &expr, 1 );
2816 PUSH( ML_(CfiExpr_Const)( dst, uw ) );
2817 if (ddump_frames)
2818 VG_(printf)("DW_OP_const1: %lu", uw);
2819 break;
2821 case DW_OP_const2u:
2822 /* push: 16-bit unsigned immediate */
2823 uw = step_le_u_encoded_literal( &expr, 2 );
2824 PUSH( ML_(CfiExpr_Const)( dst, uw ) );
2825 if (ddump_frames)
2826 VG_(printf)("DW_OP_const2: %lu", uw);
2827 break;
2829 case DW_OP_const4u:
2830 /* push: 32-bit unsigned immediate */
2831 uw = step_le_u_encoded_literal( &expr, 4 );
2832 PUSH( ML_(CfiExpr_Const)( dst, uw ) );
2833 if (ddump_frames)
2834 VG_(printf)("DW_OP_const4: %lu", uw);
2835 break;
2837 case DW_OP_abs:
2838 uop = Cunop_Abs; opname = "abs"; goto unop;
2839 case DW_OP_neg:
2840 uop = Cunop_Neg; opname = "neg"; goto unop;
2841 case DW_OP_not:
2842 uop = Cunop_Not; opname = "not"; goto unop;
2843 unop:
2844 POP( ix );
2845 PUSH( ML_(CfiExpr_Unop)( dst, uop, ix ) );
2846 if (ddump_frames)
2847 VG_(printf)("DW_OP_%s", opname);
2848 break;
2850 case DW_OP_minus:
2851 bop = Cbinop_Sub; opname = "minus"; goto binop;
2852 case DW_OP_plus:
2853 bop = Cbinop_Add; opname = "plus"; goto binop;
2854 case DW_OP_and:
2855 bop = Cbinop_And; opname = "and"; goto binop;
2856 case DW_OP_mul:
2857 bop = Cbinop_Mul; opname = "mul"; goto binop;
2858 case DW_OP_shl:
2859 bop = Cbinop_Shl; opname = "shl"; goto binop;
2860 case DW_OP_shr:
2861 bop = Cbinop_Shr; opname = "shr"; goto binop;
2862 case DW_OP_eq:
2863 bop = Cbinop_Eq; opname = "eq"; goto binop;
2864 case DW_OP_ge:
2865 bop = Cbinop_Ge; opname = "ge"; goto binop;
2866 case DW_OP_gt:
2867 bop = Cbinop_Gt; opname = "gt"; goto binop;
2868 case DW_OP_le:
2869 bop = Cbinop_Le; opname = "le"; goto binop;
2870 case DW_OP_lt:
2871 bop = Cbinop_Lt; opname = "lt"; goto binop;
2872 case DW_OP_ne:
2873 bop = Cbinop_Ne; opname = "ne"; goto binop;
2874 binop:
2875 POP( ix );
2876 POP( ix2 );
2877 PUSH( ML_(CfiExpr_Binop)( dst, bop, ix2, ix ) );
2878 if (ddump_frames)
2879 VG_(printf)("DW_OP_%s", opname);
2880 break;
2882 case DW_OP_deref:
2883 POP( ix );
2884 PUSH( ML_(CfiExpr_Deref)( dst, ix ) );
2885 if (ddump_frames)
2886 VG_(printf)("DW_OP_deref");
2887 break;
2889 default:
2890 if (!VG_(clo_xml))
2891 VG_(message)(Vg_DebugMsg,
2892 "Warning: DWARF2 CFI reader: unhandled DW_OP_ "
2893 "opcode 0x%x\n", (Int)opcode);
2894 return -1;
2897 if (ML_(cur_cmpLT)(expr, limit) && ddump_frames)
2898 VG_(printf)("; ");
2902 vg_assert(sp >= -1 && sp < N_EXPR_STACK);
2903 if (sp == -1)
2904 return -1;
2906 if (0 && ddump_frames)
2907 ML_(ppCfiExpr)( dst, stack[sp] );
2908 return stack[sp];
2910 # undef POP
2911 # undef PUSH
2912 # undef N_EXPR_STACK
2916 /* ------------ Run/show CFI instructions ------------ */
2918 /* Run a CFI instruction, and also return its length.
2919 Returns 0 if the instruction could not be executed.
2921 static Int run_CF_instruction ( /*MOD*/UnwindContext* ctx,
2922 DiCursor instrIN,
2923 const UnwindContext* restore_ctx,
2924 const AddressDecodingInfo* adi,
2925 const DebugInfo* di )
2927 Int off, reg, reg2, len, j;
2928 UInt delta;
2929 Addr printing_bias = ((Addr)ctx->initloc) - ((Addr)di->text_bias);
2930 struct UnwindContextState* ctxs;
2932 DiCursor instr = instrIN;
2933 UChar instr_0 = ML_(cur_step_UChar)(&instr);
2934 UChar hi2 = (instr_0 >> 6) & 3;
2935 UChar lo6 = instr_0 & 0x3F;
2937 if (ctx->state_sp < 0 || ctx->state_sp >= N_RR_STACK)
2938 return 0; /* bogus reg-rule stack pointer */
2940 ctxs = &ctx->state[ctx->state_sp];
2941 if (hi2 == DW_CFA_advance_loc) {
2942 delta = (UInt)lo6;
2943 delta *= ctx->code_a_f;
2944 ctx->loc += delta;
2945 if (di->ddump_frames)
2946 VG_(printf)(" DW_CFA_advance_loc: %d to %08lx\n",
2947 (Int)delta, (Addr)ctx->loc + printing_bias);
2948 return ML_(cur_minus)(instr, instrIN);
2951 if (hi2 == DW_CFA_offset) {
2952 /* Set rule for reg 'lo6' to CFAOff(off * data_af) */
2953 off = step_leb128( &instr, 0 );
2954 reg = (Int)lo6;
2955 if (reg < 0 || reg >= N_CFI_REGS)
2956 return 0; /* fail */
2957 ctxs->reg[reg].tag = RR_CFAOff;
2958 ctxs->reg[reg].arg = off * ctx->data_a_f;
2959 if (di->ddump_frames)
2960 VG_(printf)(" DW_CFA_offset: r%d at cfa%s%d\n",
2961 (Int)reg,
2962 ctxs->reg[reg].arg < 0 ? "" : "+",
2963 (Int)ctxs->reg[reg].arg );
2964 return ML_(cur_minus)(instr, instrIN);
2967 if (hi2 == DW_CFA_restore) {
2968 reg = (Int)lo6;
2969 if (reg < 0 || reg >= N_CFI_REGS)
2970 return 0; /* fail */
2971 if (restore_ctx == NULL)
2972 return 0; /* fail */
2973 ctxs->reg[reg] = restore_ctx->state[restore_ctx->state_sp].reg[reg];
2974 if (di->ddump_frames)
2975 VG_(printf)(" DW_CFA_restore: r%d\n", (Int)reg);
2976 return ML_(cur_minus)(instr, instrIN);
2979 vg_assert(hi2 == DW_CFA_use_secondary);
2981 switch (lo6) {
2982 case DW_CFA_nop:
2983 if (di->ddump_frames)
2984 VG_(printf)(" DW_CFA_nop\n");
2985 break;
2986 case DW_CFA_set_loc:
2987 /* WAS:
2988 ctx->loc = read_Addr(&instr[i]) - ctx->initloc; i+= sizeof(Addr);
2989 Was this ever right? */
2990 /* 2007 Feb 23: No. binutils/dwarf.c treats it as an encoded
2991 address and that appears to be in accordance with the
2992 DWARF3 spec. */
2993 ctx->loc = step_encoded_Addr(adi, &instr);
2994 if (di->ddump_frames)
2995 VG_(printf)(" rci:DW_CFA_set_loc\n");
2996 break;
2997 case DW_CFA_advance_loc1:
2998 delta = (UInt)ML_(cur_step_UChar)(&instr);
2999 delta *= ctx->code_a_f;
3000 ctx->loc += delta;
3001 if (di->ddump_frames)
3002 VG_(printf)(" DW_CFA_advance_loc1: %d to %08lx\n",
3003 (Int)delta, (Addr)ctx->loc + printing_bias);
3004 break;
3005 case DW_CFA_advance_loc2:
3006 delta = (UInt)ML_(cur_step_UShort)(&instr);
3007 delta *= ctx->code_a_f;
3008 ctx->loc += delta;
3009 if (di->ddump_frames)
3010 VG_(printf)(" DW_CFA_advance_loc2: %d to %08lx\n",
3011 (Int)delta, (Addr)ctx->loc + printing_bias);
3012 break;
3013 case DW_CFA_advance_loc4:
3014 delta = (UInt)ML_(cur_step_UInt)(&instr);
3015 delta *= ctx->code_a_f;
3016 ctx->loc += delta;
3017 if (di->ddump_frames)
3018 VG_(printf)(" DW_CFA_advance_loc4: %d to %08lx\n",
3019 (Int)delta, (Addr)ctx->loc + printing_bias);
3020 break;
3022 case DW_CFA_def_cfa:
3023 reg = step_leb128( &instr, 0 );
3024 off = step_leb128( &instr, 0 );
3025 if (reg < 0 || reg >= N_CFI_REGS)
3026 return 0; /* fail */
3027 ctxs->cfa_is_regoff = True;
3028 ctxs->cfa_expr_ix = 0;
3029 ctxs->cfa_reg = reg;
3030 ctxs->cfa_off = off;
3031 if (di->ddump_frames)
3032 VG_(printf)(" DW_CFA_def_cfa: r%d ofs %d\n", (Int)reg, (Int)off);
3033 break;
3035 case DW_CFA_def_cfa_sf:
3036 reg = step_leb128( &instr, 0 );
3037 off = step_leb128( &instr, 1 );
3038 if (reg < 0 || reg >= N_CFI_REGS)
3039 return 0; /* fail */
3040 ctxs->cfa_is_regoff = True;
3041 ctxs->cfa_expr_ix = 0;
3042 ctxs->cfa_reg = reg;
3043 ctxs->cfa_off = off * ctx->data_a_f;
3044 if (di->ddump_frames)
3045 VG_(printf)(" rci:DW_CFA_def_cfa_sf\n");
3046 break;
3048 case DW_CFA_register:
3049 reg = step_leb128( &instr, 0 );
3050 reg2 = step_leb128( &instr, 0 );
3051 if (reg < 0 || reg >= N_CFI_REGS)
3052 return 0; /* fail */
3053 if (reg2 < 0 || reg2 >= N_CFI_REGS)
3054 return 0; /* fail */
3055 ctxs->reg[reg].tag = RR_Reg;
3056 ctxs->reg[reg].arg = reg2;
3057 if (di->ddump_frames)
3058 VG_(printf)(" DW_CFA_register: r%d in r%d\n",
3059 (Int)reg, (Int)reg2);
3060 break;
3062 case DW_CFA_offset_extended:
3063 reg = step_leb128( &instr, 0 );
3064 off = step_leb128( &instr, 0 );
3065 if (reg < 0 || reg >= N_CFI_REGS)
3066 return 0; /* fail */
3067 ctxs->reg[reg].tag = RR_CFAOff;
3068 ctxs->reg[reg].arg = off * ctx->data_a_f;
3069 if (di->ddump_frames)
3070 VG_(printf)(" rci:DW_CFA_offset_extended\n");
3071 break;
3073 case DW_CFA_offset_extended_sf:
3074 reg = step_leb128( &instr, 0 );
3075 off = step_leb128( &instr, 1 );
3076 if (reg < 0 || reg >= N_CFI_REGS)
3077 return 0; /* fail */
3078 ctxs->reg[reg].tag = RR_CFAOff;
3079 ctxs->reg[reg].arg = off * ctx->data_a_f;
3080 if (di->ddump_frames)
3081 VG_(printf)(" DW_CFA_offset_extended_sf: r%d at cfa%s%d\n",
3082 reg,
3083 ctxs->reg[reg].arg < 0 ? "" : "+",
3084 (Int)ctxs->reg[reg].arg);
3085 break;
3087 case DW_CFA_GNU_negative_offset_extended:
3088 reg = step_leb128( &instr, 0 );
3089 off = step_leb128( &instr, 0 );
3090 if (reg < 0 || reg >= N_CFI_REGS)
3091 return 0; /* fail */
3092 ctxs->reg[reg].tag = RR_CFAOff;
3093 ctxs->reg[reg].arg = (-off) * ctx->data_a_f;
3094 if (di->ddump_frames)
3095 VG_(printf)(" rci:DW_CFA_GNU_negative_offset_extended\n");
3096 break;
3098 case DW_CFA_restore_extended:
3099 reg = step_leb128( &instr, 0 );
3100 if (reg < 0 || reg >= N_CFI_REGS)
3101 return 0; /* fail */
3102 if (restore_ctx == NULL)
3103 return 0; /* fail */
3104 ctxs->reg[reg] = restore_ctx->state[restore_ctx->state_sp].reg[reg];
3105 if (di->ddump_frames)
3106 VG_(printf)(" rci:DW_CFA_restore_extended\n");
3107 break;
3109 case DW_CFA_val_offset:
3110 reg = step_leb128( &instr, 0 );
3111 off = step_leb128( &instr, 0 );
3112 if (reg < 0 || reg >= N_CFI_REGS)
3113 return 0; /* fail */
3114 ctxs->reg[reg].tag = RR_CFAValOff;
3115 ctxs->reg[reg].arg = off * ctx->data_a_f;
3116 if (di->ddump_frames)
3117 VG_(printf)(" rci:DW_CFA_val_offset\n");
3118 break;
3120 case DW_CFA_val_offset_sf:
3121 reg = step_leb128( &instr, 0 );
3122 off = step_leb128( &instr, 1 );
3123 if (reg < 0 || reg >= N_CFI_REGS)
3124 return 0; /* fail */
3125 ctxs->reg[reg].tag = RR_CFAValOff;
3126 ctxs->reg[reg].arg = off * ctx->data_a_f;
3127 if (di->ddump_frames)
3128 VG_(printf)(" rci:DW_CFA_val_offset_sf\n");
3129 break;
3131 case DW_CFA_def_cfa_register:
3132 reg = step_leb128( &instr, 0);
3133 if (reg < 0 || reg >= N_CFI_REGS)
3134 return 0; /* fail */
3135 ctxs->cfa_is_regoff = True;
3136 ctxs->cfa_expr_ix = 0;
3137 ctxs->cfa_reg = reg;
3138 /* ->cfa_off unchanged */
3139 if (di->ddump_frames)
3140 VG_(printf)(" DW_CFA_def_cfa_register: r%d\n", (Int)reg );
3141 break;
3143 case DW_CFA_def_cfa_offset:
3144 off = step_leb128( &instr, 0);
3145 ctxs->cfa_is_regoff = True;
3146 ctxs->cfa_expr_ix = 0;
3147 /* ->reg is unchanged */
3148 ctxs->cfa_off = off;
3149 if (di->ddump_frames)
3150 VG_(printf)(" DW_CFA_def_cfa_offset: %d\n", (Int)off);
3151 break;
3153 case DW_CFA_def_cfa_offset_sf:
3154 off = step_leb128( &instr, 1);
3155 ctxs->cfa_is_regoff = True;
3156 ctxs->cfa_expr_ix = 0;
3157 /* ->reg is unchanged */
3158 ctxs->cfa_off = off * ctx->data_a_f;
3159 if (di->ddump_frames)
3160 VG_(printf)(" DW_CFA_def_cfa_offset_sf: %d\n", ctxs->cfa_off);
3161 break;
3163 case DW_CFA_undefined:
3164 reg = step_leb128( &instr, 0);
3165 if (reg < 0 || reg >= N_CFI_REGS)
3166 return 0; /* fail */
3167 ctxs->reg[reg].tag = RR_Undef;
3168 ctxs->reg[reg].arg = 0;
3169 if (di->ddump_frames)
3170 VG_(printf)(" rci:DW_CFA_undefined\n");
3171 break;
3173 case DW_CFA_same_value:
3174 reg = step_leb128( &instr, 0);
3175 if (reg < 0 || reg >= N_CFI_REGS)
3176 return 0; /* fail */
3177 ctxs->reg[reg].tag = RR_Same;
3178 ctxs->reg[reg].arg = 0;
3179 if (di->ddump_frames)
3180 VG_(printf)(" rci:DW_CFA_same_value\n");
3181 break;
3183 case DW_CFA_GNU_args_size:
3184 /* No idea what is supposed to happen. gdb-6.3 simply
3185 ignores these. */
3186 /*off = */ (void)step_leb128( &instr, 0 );
3187 if (di->ddump_frames)
3188 VG_(printf)(" rci:DW_CFA_GNU_args_size (ignored)\n");
3189 break;
3191 case DW_CFA_expression: {
3192 /* Identical to DW_CFA_val_expression except that the value
3193 computed is an address and so needs one final
3194 dereference. */
3195 DiCursor expr;
3196 reg = step_leb128( &instr, 0 );
3197 len = step_leb128( &instr, 0 );
3198 expr = instr;
3199 instr = ML_(cur_plus)(instr, len);
3200 if (reg < 0 || reg >= N_CFI_REGS)
3201 return 0; /* fail */
3202 if (di->ddump_frames)
3203 VG_(printf)(" DW_CFA_expression: r%d (",
3204 (Int)reg);
3205 /* Convert the expression into a dag rooted at ctx->exprs index j,
3206 or fail. */
3207 j = dwarfexpr_to_dag ( ctx, expr, len, True/*push CFA at start*/,
3208 di->ddump_frames);
3209 if (di->ddump_frames)
3210 VG_(printf)(")\n");
3211 vg_assert(j >= -1);
3212 if (j >= 0) {
3213 vg_assert(ctx->exprs);
3214 vg_assert( j < VG_(sizeXA)(ctx->exprs) );
3216 if (j == -1)
3217 return 0; /* fail */
3218 /* Add an extra dereference */
3219 j = ML_(CfiExpr_Deref)( ctx->exprs, j );
3220 ctxs->reg[reg].tag = RR_ValExpr;
3221 ctxs->reg[reg].arg = j;
3222 break;
3225 case DW_CFA_val_expression: {
3226 DiCursor expr;
3227 reg = step_leb128( &instr, 0 );
3228 len = step_leb128( &instr, 0 );
3229 expr = instr;
3230 instr = ML_(cur_plus)(instr, len);
3231 if (reg < 0 || reg >= N_CFI_REGS)
3232 return 0; /* fail */
3233 if (di->ddump_frames)
3234 VG_(printf)(" DW_CFA_val_expression: r%d (",
3235 (Int)reg);
3236 /* Convert the expression into a dag rooted at ctx->exprs index j,
3237 or fail. */
3238 j = dwarfexpr_to_dag ( ctx, expr, len, True/*push CFA at start*/,
3239 di->ddump_frames);
3240 if (di->ddump_frames)
3241 VG_(printf)(")\n");
3242 vg_assert(j >= -1);
3243 if (j >= 0) {
3244 vg_assert(ctx->exprs);
3245 vg_assert( j < VG_(sizeXA)(ctx->exprs) );
3247 if (j == -1)
3248 return 0; /* fail */
3249 ctxs->reg[reg].tag = RR_ValExpr;
3250 ctxs->reg[reg].arg = j;
3251 break;
3254 case DW_CFA_def_cfa_expression: {
3255 DiCursor expr;
3256 len = step_leb128( &instr, 0 );
3257 expr = instr;
3258 instr = ML_(cur_plus)(instr, len);
3259 if (di->ddump_frames)
3260 VG_(printf)(" DW_CFA_def_cfa_expression (");
3261 /* Convert the expression into a dag rooted at ctx->exprs index j,
3262 or fail. */
3263 j = dwarfexpr_to_dag ( ctx, expr, len, True/*push CFA at start*/,
3264 di->ddump_frames);
3265 if (di->ddump_frames)
3266 VG_(printf)(")\n");
3267 ctxs->cfa_is_regoff = False;
3268 ctxs->cfa_reg = 0;
3269 ctxs->cfa_off = 0;
3270 ctxs->cfa_expr_ix = j;
3271 break;
3274 case DW_CFA_GNU_window_save:
3275 /* Ignored. This appears to be sparc-specific; quite why it
3276 turns up in SuSE-supplied x86 .so's beats me. */
3277 if (di->ddump_frames)
3278 VG_(printf)(" DW_CFA_GNU_window_save\n");
3279 break;
3281 case DW_CFA_remember_state:
3282 if (di->ddump_frames)
3283 VG_(printf)(" DW_CFA_remember_state\n");
3284 /* we just checked this at entry, so: */
3285 vg_assert(ctx->state_sp >= 0 && ctx->state_sp < N_RR_STACK);
3286 ctx->state_sp++;
3287 if (ctx->state_sp == N_RR_STACK) {
3288 /* stack overflow. We're hosed. */
3289 VG_(message)(Vg_DebugMsg, "DWARF2 CFI reader: N_RR_STACK is "
3290 "too low; increase and recompile.");
3291 return 0; /* indicate failure */
3292 } else {
3293 VG_(memcpy)(/*dst*/&ctx->state[ctx->state_sp],
3294 /*src*/&ctx->state[ctx->state_sp - 1],
3295 sizeof(ctx->state[ctx->state_sp]) );
3297 break;
3299 case DW_CFA_restore_state:
3300 if (di->ddump_frames)
3301 VG_(printf)(" DW_CFA_restore_state\n");
3302 /* we just checked this at entry, so: */
3303 vg_assert(ctx->state_sp >= 0 && ctx->state_sp < N_RR_STACK);
3304 if (ctx->state_sp == 0) {
3305 /* stack undefflow. Give up. */
3306 return 0; /* indicate failure */
3307 } else {
3308 /* simply fall back to previous entry */
3309 ctx->state_sp--;
3311 break;
3313 default:
3314 VG_(message)(Vg_DebugMsg, "DWARF2 CFI reader: unhandled CFI "
3315 "instruction 0:%d\n", (Int)lo6);
3316 if (di->ddump_frames)
3317 VG_(printf)(" rci:run_CF_instruction:default\n");
3318 return 0; /* failure */
3319 /*NOTREACHED*/
3322 return ML_(cur_minus)(instr, instrIN);
3326 /* Show a CFI instruction, and also return its length. Show it as
3327 close as possible (preferably identical) to how GNU binutils
3328 readelf --debug-dump=frames would. */
3330 static Int show_CF_instruction ( DiCursor instrIN,
3331 const AddressDecodingInfo* adi,
3332 Int code_a_f, Int data_a_f )
3334 Int off, coff, reg, reg2, len;
3335 UInt delta;
3336 Addr loc;
3337 DiCursor instr = instrIN;
3338 UChar instr_0 = ML_(cur_step_UChar)(&instr);
3339 UChar hi2 = (instr_0 >> 6) & 3;
3340 UChar lo6 = instr_0 & 0x3F;
3342 if (0) {
3343 DiCursor tmpi = instrIN;
3344 UInt i_0 = ML_(cur_step_UChar)(&tmpi);
3345 UInt i_1 = ML_(cur_step_UChar)(&tmpi);
3346 UInt i_2 = ML_(cur_step_UChar)(&tmpi);
3347 UInt i_3 = ML_(cur_step_UChar)(&tmpi);
3348 UInt i_4 = ML_(cur_step_UChar)(&tmpi);
3349 UInt i_5 = ML_(cur_step_UChar)(&tmpi);
3350 UInt i_6 = ML_(cur_step_UChar)(&tmpi);
3351 UInt i_7 = ML_(cur_step_UChar)(&tmpi);
3352 VG_(printf)("raw:%x/%x:%x:%x:%x:%x:%x:%x:%x:%x\n",
3353 hi2, lo6, i_0, i_1, i_2, i_3, i_4, i_5, i_6, i_7);
3356 if (hi2 == DW_CFA_advance_loc) {
3357 VG_(printf)(" sci:DW_CFA_advance_loc(%d)\n", (Int)lo6);
3358 return ML_(cur_minus)(instr, instrIN);
3361 if (hi2 == DW_CFA_offset) {
3362 off = step_leb128( &instr, 0 );
3363 coff = off * data_a_f;
3364 VG_(printf)(" DW_CFA_offset: r%d at cfa%s%d\n",
3365 (Int)lo6, coff < 0 ? "" : "+", (Int)coff );
3366 return ML_(cur_minus)(instr, instrIN);
3369 if (hi2 == DW_CFA_restore) {
3370 VG_(printf)(" sci:DW_CFA_restore(r%d)\n", (Int)lo6);
3371 return ML_(cur_minus)(instr, instrIN);
3374 vg_assert(hi2 == DW_CFA_use_secondary);
3376 switch (lo6) {
3378 case DW_CFA_nop:
3379 VG_(printf)(" DW_CFA_nop\n");
3380 break;
3382 case DW_CFA_set_loc:
3383 /* WAS: loc = read_Addr(&instr[i]); i+= sizeof(Addr);
3384 (now known to be incorrect -- the address is encoded) */
3385 loc = step_encoded_Addr(adi, &instr);
3386 VG_(printf)(" sci:DW_CFA_set_loc(%#lx)\n", loc);
3387 break;
3389 case DW_CFA_advance_loc1:
3390 delta = (UInt)ML_(cur_step_UChar)(&instr);
3391 VG_(printf)(" sci:DW_CFA_advance_loc1(%d)\n", delta);
3392 break;
3394 case DW_CFA_advance_loc2:
3395 delta = (UInt)ML_(cur_step_UShort)(&instr);
3396 VG_(printf)(" sci:DW_CFA_advance_loc2(%d)\n", delta);
3397 break;
3399 case DW_CFA_advance_loc4:
3400 delta = (UInt)ML_(cur_step_UInt)(&instr);
3401 VG_(printf)(" DW_CFA_advance_loc4(%d)\n", delta);
3402 break;
3404 case DW_CFA_def_cfa:
3405 reg = step_leb128( &instr, 0 );
3406 off = step_leb128( &instr, 0 );
3407 VG_(printf)(" DW_CFA_def_cfa: r%d ofs %d\n", (Int)reg, (Int)off);
3408 break;
3410 case DW_CFA_def_cfa_sf:
3411 reg = step_leb128( &instr, 0 );
3412 off = step_leb128( &instr, 1 );
3413 VG_(printf)(" DW_CFA_def_cfa_sf: r%d ofs %d\n",
3414 (Int)reg, (Int)(off * data_a_f));
3415 break;
3417 case DW_CFA_register:
3418 reg = step_leb128( &instr, 0);
3419 reg2 = step_leb128( &instr, 0);
3420 VG_(printf)(" sci:DW_CFA_register(r%d, r%d)\n", reg, reg2);
3421 break;
3423 case DW_CFA_def_cfa_register:
3424 reg = step_leb128( &instr, 0);
3425 VG_(printf)(" sci:DW_CFA_def_cfa_register(r%d)\n", reg);
3426 break;
3428 case DW_CFA_def_cfa_offset:
3429 off = step_leb128( &instr, 0);
3430 VG_(printf)(" sci:DW_CFA_def_cfa_offset(%d)\n", off);
3431 break;
3433 case DW_CFA_def_cfa_offset_sf:
3434 off = step_leb128( &instr, 1);
3435 VG_(printf)(" sci:DW_CFA_def_cfa_offset_sf(%d)\n", off);
3436 break;
3438 case DW_CFA_restore_extended:
3439 reg = step_leb128( &instr, 0);
3440 VG_(printf)(" sci:DW_CFA_restore_extended(r%d)\n", reg);
3441 break;
3443 case DW_CFA_undefined:
3444 reg = step_leb128( &instr, 0);
3445 VG_(printf)(" sci:DW_CFA_undefined(r%d)\n", reg);
3446 break;
3448 case DW_CFA_same_value:
3449 reg = step_leb128( &instr, 0);
3450 VG_(printf)(" sci:DW_CFA_same_value(r%d)\n", reg);
3451 break;
3453 case DW_CFA_remember_state:
3454 VG_(printf)(" sci:DW_CFA_remember_state\n");
3455 break;
3457 case DW_CFA_restore_state:
3458 VG_(printf)(" sci:DW_CFA_restore_state\n");
3459 break;
3461 case DW_CFA_GNU_args_size:
3462 off = step_leb128( &instr, 0 );
3463 VG_(printf)(" sci:DW_CFA_GNU_args_size(%d)\n", off );
3464 break;
3466 case DW_CFA_def_cfa_expression:
3467 len = step_leb128( &instr, 0 );
3468 instr = ML_(cur_plus)(instr, len);
3469 VG_(printf)(" sci:DW_CFA_def_cfa_expression(length %d)\n", len);
3470 break;
3472 case DW_CFA_expression:
3473 reg = step_leb128( &instr, 0 );
3474 len = step_leb128( &instr, 0 );
3475 instr = ML_(cur_plus)(instr, len);
3476 VG_(printf)(" sci:DW_CFA_expression(r%d, length %d)\n", reg, len);
3477 break;
3479 case DW_CFA_val_expression:
3480 reg = step_leb128( &instr, 0 );
3481 len = step_leb128( &instr, 0 );
3482 instr = ML_(cur_plus)(instr, len);
3483 VG_(printf)(" sci:DW_CFA_val_expression(r%d, length %d)\n", reg, len);
3484 break;
3486 case DW_CFA_offset_extended:
3487 reg = step_leb128( &instr, 0 );
3488 off = step_leb128( &instr, 0 );
3489 VG_(printf)(" sci:DW_CFA_offset_extended(r%d, "
3490 "off %d x data_af)\n", reg, off);
3491 break;
3493 case DW_CFA_offset_extended_sf:
3494 reg = step_leb128( &instr, 0 );
3495 off = step_leb128( &instr, 1 );
3496 coff = (Int)(off * data_a_f);
3497 VG_(printf)(" DW_CFA_offset_extended_sf: r%d at cfa%s%d\n",
3498 reg, coff < 0 ? "" : "+", coff);
3499 break;
3501 case DW_CFA_GNU_negative_offset_extended:
3502 reg = step_leb128( &instr, 0 );
3503 off = step_leb128( &instr, 0 );
3504 VG_(printf)(" sci:DW_CFA_GNU_negative_offset_extended"
3505 "(r%d, off %d x data_af)\n", reg, -off);
3506 break;
3508 case DW_CFA_val_offset:
3509 reg = step_leb128( &instr, 0 );
3510 off = step_leb128( &instr, 0 );
3511 VG_(printf)(" sci:DW_CFA_val_offset(r%d, off %d x data_af)\n",
3512 reg, off);
3513 break;
3515 case DW_CFA_val_offset_sf:
3516 reg = step_leb128( &instr, 0 );
3517 off = step_leb128( &instr, 1 );
3518 VG_(printf)(" sci:DW_CFA_val_offset_sf(r%d, off %d x data_af)\n",
3519 reg, off);
3520 break;
3522 case DW_CFA_GNU_window_save:
3523 VG_(printf)(" sci:DW_CFA_GNU_window_save\n");
3524 break;
3526 default:
3527 VG_(printf)(" sci:0:%d\n", (Int)lo6);
3528 break;
3531 return ML_(cur_minus)(instr, instrIN);
3535 /* Show the instructions in instrs[0 .. ilen-1]. */
3536 static void show_CF_instructions ( DiCursor instrs, Int ilen,
3537 const AddressDecodingInfo* adi,
3538 Int code_a_f, Int data_a_f )
3540 Int i = 0;
3541 while (True) {
3542 if (i >= ilen) break;
3543 i += show_CF_instruction( ML_(cur_plus)(instrs, i),
3544 adi, code_a_f, data_a_f );
3549 /* Run the CF instructions in instrs[0 .. ilen-1], until the end is
3550 reached, or until there is a failure. Return True iff success.
3552 static
3553 Bool run_CF_instructions ( DebugInfo* di,
3554 Bool record,
3555 UnwindContext* ctx, DiCursor instrs, Int ilen,
3556 UWord fde_arange,
3557 const UnwindContext* restore_ctx,
3558 const AddressDecodingInfo* adi )
3560 Addr base;
3561 UInt len;
3562 DiCfSI_m cfsi_m;
3563 Bool summ_ok;
3564 Int j, i = 0;
3565 Addr loc_prev;
3566 if (0) ppUnwindContext(ctx);
3567 if (0) ppUnwindContext_summary(ctx);
3568 while (True) {
3569 loc_prev = ctx->loc;
3570 if (i >= ilen) break;
3571 if (0) (void)show_CF_instruction( ML_(cur_plus)(instrs,i), adi,
3572 ctx->code_a_f, ctx->data_a_f );
3573 j = run_CF_instruction( ctx, ML_(cur_plus)(instrs,i),
3574 restore_ctx, adi, di );
3575 if (j == 0)
3576 return False; /* execution failed */
3577 i += j;
3578 if (0) ppUnwindContext(ctx);
3579 if (record && loc_prev != ctx->loc) {
3580 summ_ok = summarise_context ( &base, &len, &cfsi_m,
3581 loc_prev, ctx, di );
3582 if (summ_ok) {
3583 ML_(addDiCfSI)(di, base, len, &cfsi_m);
3584 if (di->trace_cfi)
3585 ML_(ppDiCfSI)(di->cfsi_exprs, base, len, &cfsi_m);
3589 if (ctx->loc < fde_arange) {
3590 loc_prev = ctx->loc;
3591 ctx->loc = fde_arange;
3592 if (record) {
3593 summ_ok = summarise_context ( &base, &len, &cfsi_m,
3594 loc_prev, ctx, di );
3595 if (summ_ok) {
3596 ML_(addDiCfSI)(di, base, len, &cfsi_m);
3597 if (di->trace_cfi)
3598 ML_(ppDiCfSI)(di->cfsi_exprs, base, len, &cfsi_m);
3602 return True;
3606 /* ------------ Main entry point for CFI reading ------------ */
3608 typedef
3609 struct {
3610 /* This gives the CIE an identity to which FDEs will refer. */
3611 ULong offset;
3612 /* Code, data factors. */
3613 Int code_a_f;
3614 Int data_a_f;
3615 /* Return-address pseudo-register. */
3616 Int ra_reg;
3617 UChar address_encoding;
3618 /* Where are the instrs? */
3619 DiCursor instrs;
3620 Int ilen;
3621 /* God knows .. don't ask */
3622 Bool saw_z_augmentation;
3624 CIE;
3626 static void init_CIE ( CIE* cie )
3628 cie->offset = 0;
3629 cie->code_a_f = 0;
3630 cie->data_a_f = 0;
3631 cie->ra_reg = 0;
3632 cie->address_encoding = 0;
3633 cie->instrs = DiCursor_INVALID;
3634 cie->ilen = 0;
3635 cie->saw_z_augmentation = False;
3638 #define N_CIEs 8000
3639 static CIE the_CIEs[N_CIEs];
3642 /* Read, summarise and store CFA unwind info from .eh_frame and
3643 .debug_frame sections. is_ehframe tells us which kind we are
3644 dealing with -- they are slightly different. */
3645 void ML_(read_callframe_info_dwarf3)
3646 ( /*OUT*/struct _DebugInfo* di,
3647 DiSlice escn_frame, Addr frame_avma, Bool is_ehframe )
3649 const HChar* how = NULL;
3650 Int n_CIEs = 0;
3651 DiCursor frame_image = ML_(cur_from_sli)(escn_frame); /* fixed */
3652 DiOffT frame_size = escn_frame.szB;
3653 DiCursor data = frame_image;
3654 UWord cfsi_used_orig;
3656 /* If we're dealing with a .debug_frame, assume zero frame_avma. */
3657 if (!is_ehframe)
3658 vg_assert(frame_avma == 0);
3660 # if defined(VGP_ppc32_linux) || defined(VGP_ppc64be_linux) \
3661 || defined(VGP_ppc64le_linux)
3662 /* These targets don't use CFI-based stack unwinding. */
3663 return;
3664 # endif
3666 /* If we read more than one .debug_frame or .eh_frame for this
3667 DebugInfo*, the second and subsequent reads should only add FDEs
3668 for address ranges not already covered by the FDEs already
3669 present. To be able to quickly check which address ranges are
3670 already present, any existing records (DiCFSIs) must be sorted,
3671 so we can binary-search them in the code below. We also record
3672 di->cfsi_used so that we know where the boundary is between
3673 existing and new records. */
3674 if (di->cfsi_used > 0) {
3675 ML_(canonicaliseCFI) ( di );
3677 cfsi_used_orig = di->cfsi_used;
3679 if (di->trace_cfi) {
3680 VG_(printf)("\n-----------------------------------------------\n");
3681 VG_(printf)("CFI info: szB %lld, _avma %#lx\n",
3682 escn_frame.szB, frame_avma );
3683 VG_(printf)("CFI info: name %s\n", di->fsm.filename );
3686 /* Loop over CIEs/FDEs */
3688 /* Conceptually, the frame info is a sequence of FDEs, one for each
3689 function. Inside an FDE is a miniature program for a special
3690 state machine, which, when run, produces the stack-unwinding
3691 info for that function.
3693 Because the FDEs typically have much in common, and because the
3694 DWARF designers appear to have been fanatical about space
3695 saving, the common parts are factored out into so-called CIEs.
3696 That means that what we traverse is a sequence of structs, each
3697 of which is either a FDE (usually) or a CIE (occasionally).
3698 Each FDE has a field indicating which CIE is the one pertaining
3699 to it.
3701 The following loop traverses the sequence. FDEs are dealt with
3702 immediately; once we harvest the useful info in an FDE, it is
3703 then forgotten about. By contrast, CIEs are validated and
3704 dumped into an array, because later FDEs may refer to any
3705 previously-seen CIE.
3707 while (True) {
3708 DiCursor ciefde_start;
3709 ULong ciefde_len;
3710 ULong cie_pointer;
3711 Bool dw64;
3713 /* Are we done? */
3714 if (ML_(cur_cmpEQ)(data, ML_(cur_plus)(frame_image, frame_size)))
3715 return;
3717 /* Overshot the end? Means something is wrong */
3718 if (ML_(cur_cmpGT)(data, ML_(cur_plus)(frame_image, frame_size))) {
3719 how = "overran the end of .eh_frame";
3720 goto bad;
3723 /* Ok, we must be looking at the start of a new CIE or FDE.
3724 Figure out which it is. */
3726 ciefde_start = data;
3727 if (di->trace_cfi)
3728 VG_(printf)("\ncie/fde.start = (frame_image + 0x%llx)\n",
3729 ML_(cur_minus)(ciefde_start, frame_image));
3731 ciefde_len = (ULong)ML_(cur_step_UInt)(&data);
3732 if (di->trace_cfi)
3733 VG_(printf)("cie/fde.length = %lld\n", ciefde_len);
3735 /* Apparently, if the .length field is zero, we are at the end
3736 of the sequence. This is stated in the Generic Elf
3737 Specification (see comments far above here) and is one of the
3738 places where .eh_frame and .debug_frame data differ. */
3739 if (ciefde_len == 0) {
3740 if (di->ddump_frames)
3741 VG_(printf)("%08llx ZERO terminator\n\n",
3742 ML_(cur_minus)(ciefde_start, frame_image));
3743 return;
3746 /* If the .length field is 0xFFFFFFFF then we're dealing with
3747 64-bit DWARF, and the real length is stored as a 64-bit
3748 number immediately following it. */
3749 dw64 = False;
3750 if (ciefde_len == 0xFFFFFFFFUL) {
3751 dw64 = True;
3752 ciefde_len = ML_(cur_step_ULong)(&data);
3755 /* Now get the CIE ID, whose size depends on the DWARF 32 vs
3756 64-ness. */
3757 if (dw64) {
3758 /* see XXX below */
3759 cie_pointer = ML_(cur_step_ULong)(&data);
3760 } else {
3761 /* see XXX below */
3762 cie_pointer = (ULong)ML_(cur_step_UInt)(&data);
3765 if (di->trace_cfi)
3766 VG_(printf)("cie.pointer = %lld\n", cie_pointer);
3768 /* If cie_pointer is zero for .eh_frame or all ones for .debug_frame,
3769 we've got a CIE; else it's an FDE. */
3770 if (cie_pointer == (is_ehframe ? 0ULL
3771 : dw64 ? 0xFFFFFFFFFFFFFFFFULL : 0xFFFFFFFFULL)) {
3773 Int this_CIE;
3774 UChar cie_version;
3775 DiCursor cie_augmentation;
3777 /* --------- CIE --------- */
3778 if (di->trace_cfi)
3779 VG_(printf)("------ new CIE (#%d of 0 .. %d) ------\n",
3780 n_CIEs, N_CIEs - 1);
3782 /* Allocate a new CIE record. */
3783 vg_assert(n_CIEs >= 0 && n_CIEs <= N_CIEs);
3784 if (n_CIEs == N_CIEs) {
3785 how = "N_CIEs is too low. Increase and recompile.";
3786 goto bad;
3789 this_CIE = n_CIEs;
3790 n_CIEs++;
3791 init_CIE( &the_CIEs[this_CIE] );
3793 /* Record its offset. This is how we will find it again
3794 later when looking at an FDE. */
3795 the_CIEs[this_CIE].offset
3796 = (ULong)ML_(cur_minus)(ciefde_start, frame_image);
3798 if (di->ddump_frames)
3799 VG_(printf)("%08lx %08lx %08lx CIE\n",
3800 (Addr)ML_(cur_minus)(ciefde_start, frame_image),
3801 (Addr)ciefde_len,
3802 (Addr)(UWord)cie_pointer );
3804 cie_version = ML_(cur_step_UChar)(&data);
3805 if (di->trace_cfi)
3806 VG_(printf)("cie.version = %d\n", (Int)cie_version);
3807 if (di->ddump_frames)
3808 VG_(printf)(" Version: %d\n", (Int)cie_version);
3809 if (cie_version != 1 && cie_version != 3 && cie_version != 4) {
3810 how = "unexpected CIE version (not 1 nor 3 nor 4)";
3811 goto bad;
3814 cie_augmentation = data;
3815 data = ML_(cur_plus)(data, 1 + ML_(cur_strlen)(cie_augmentation));
3817 if (di->trace_cfi || di->ddump_frames) {
3818 HChar* str = ML_(cur_read_strdup)(cie_augmentation, "di.rcid3.1");
3819 if (di->trace_cfi)
3820 VG_(printf)("cie.augment = \"%s\"\n", str);
3821 if (di->ddump_frames)
3822 VG_(printf)(" Augmentation: \"%s\"\n", str);
3823 ML_(dinfo_free)(str);
3826 if (ML_(cur_read_UChar)(cie_augmentation) == 'e'
3827 && ML_(cur_read_UChar)
3828 (ML_(cur_plus)(cie_augmentation, 1)) == 'h') {
3829 data = ML_(cur_plus)(data, sizeof(Addr));
3830 cie_augmentation = ML_(cur_plus)(cie_augmentation, 2);
3833 if (cie_version >= 4) {
3834 if (ML_(cur_step_UChar)(&data) != sizeof(Addr)) {
3835 how = "unexpected address size";
3836 goto bad;
3838 if (ML_(cur_step_UChar)(&data) != 0) {
3839 how = "unexpected non-zero segment size";
3840 goto bad;
3844 the_CIEs[this_CIE].code_a_f = step_leb128( &data, 0);
3845 if (di->trace_cfi)
3846 VG_(printf)("cie.code_af = %d\n",
3847 the_CIEs[this_CIE].code_a_f);
3848 if (di->ddump_frames)
3849 VG_(printf)(" Code alignment factor: %d\n",
3850 (Int)the_CIEs[this_CIE].code_a_f);
3852 the_CIEs[this_CIE].data_a_f = step_leb128( &data, 1);
3853 if (di->trace_cfi)
3854 VG_(printf)("cie.data_af = %d\n",
3855 the_CIEs[this_CIE].data_a_f);
3856 if (di->ddump_frames)
3857 VG_(printf)(" Data alignment factor: %d\n",
3858 (Int)the_CIEs[this_CIE].data_a_f);
3860 if (cie_version == 1) {
3861 the_CIEs[this_CIE].ra_reg = (Int)ML_(cur_step_UChar)(&data);
3862 } else {
3863 the_CIEs[this_CIE].ra_reg = step_leb128( &data, 0);
3865 if (di->trace_cfi)
3866 VG_(printf)("cie.ra_reg = %d\n",
3867 the_CIEs[this_CIE].ra_reg);
3868 if (di->ddump_frames)
3869 VG_(printf)(" Return address column: %d\n",
3870 (Int)the_CIEs[this_CIE].ra_reg);
3872 if (the_CIEs[this_CIE].ra_reg < 0
3873 || the_CIEs[this_CIE].ra_reg >= N_CFI_REGS) {
3874 how = "cie.ra_reg has implausible value";
3875 goto bad;
3878 the_CIEs[this_CIE].saw_z_augmentation
3879 = ML_(cur_read_UChar)(cie_augmentation) == 'z';
3880 if (the_CIEs[this_CIE].saw_z_augmentation) {
3881 UInt length = step_leb128( &data, 0);
3882 the_CIEs[this_CIE].instrs = ML_(cur_plus)(data, length);
3883 cie_augmentation = ML_(cur_plus)(cie_augmentation, 1);
3884 if (di->ddump_frames) {
3885 UInt i;
3886 VG_(printf)(" Augmentation data: ");
3887 for (i = 0; i < length; i++)
3888 VG_(printf)(" %02x", (UInt)ML_(cur_read_UChar)
3889 (ML_(cur_plus)(data, i)));
3890 VG_(printf)("\n");
3892 } else {
3893 the_CIEs[this_CIE].instrs = DiCursor_INVALID;
3896 the_CIEs[this_CIE].address_encoding = default_Addr_encoding();
3898 while (ML_(cur_read_UChar)(cie_augmentation)) {
3899 switch (ML_(cur_read_UChar)(cie_augmentation)) {
3900 case 'L':
3901 data = ML_(cur_plus)(data, 1);
3902 cie_augmentation = ML_(cur_plus)(cie_augmentation, 1);
3903 break;
3904 case 'R':
3905 the_CIEs[this_CIE].address_encoding
3906 = ML_(cur_step_UChar)(&data);
3907 cie_augmentation = ML_(cur_plus)(cie_augmentation, 1);
3908 break;
3909 case 'P':
3910 data = ML_(cur_plus)(data, size_of_encoded_Addr(
3911 ML_(cur_read_UChar)(data) ));
3912 data = ML_(cur_plus)(data, 1);
3913 cie_augmentation = ML_(cur_plus)(cie_augmentation, 1);
3914 break;
3915 case 'S':
3916 cie_augmentation = ML_(cur_plus)(cie_augmentation, 1);
3917 break;
3918 default:
3919 if (!ML_(cur_is_valid)(the_CIEs[this_CIE].instrs)) {
3920 how = "unhandled cie.augmentation";
3921 goto bad;
3923 data = the_CIEs[this_CIE].instrs;
3924 goto done_augmentation;
3928 done_augmentation:
3930 if (di->trace_cfi)
3931 VG_(printf)("cie.encoding = 0x%x\n",
3932 the_CIEs[this_CIE].address_encoding);
3934 the_CIEs[this_CIE].instrs = data;
3935 the_CIEs[this_CIE].ilen = ML_(cur_minus)(ciefde_start, data)
3936 + (Long)ciefde_len + (Long)sizeof(UInt);
3937 if (di->trace_cfi) {
3938 //VG_(printf)("cie.instrs = %p\n", the_CIEs[this_CIE].instrs);
3939 VG_(printf)("cie.ilen = %d\n", the_CIEs[this_CIE].ilen);
3942 if (the_CIEs[this_CIE].ilen < 0
3943 || the_CIEs[this_CIE].ilen > frame_size) {
3944 how = "implausible # cie initial insns";
3945 goto bad;
3948 data = ML_(cur_plus)(data, the_CIEs[this_CIE].ilen);
3950 /* Show the CIE's instructions (the preamble for each FDE
3951 that uses this CIE). */
3952 if (di->ddump_frames)
3953 VG_(printf)("\n");
3955 if (di->trace_cfi || di->ddump_frames) {
3956 AddressDecodingInfo adi;
3957 adi.encoding = the_CIEs[this_CIE].address_encoding;
3958 adi.ehframe_image = frame_image;
3959 adi.ehframe_avma = frame_avma;
3960 adi.text_bias = di->text_debug_bias;
3961 show_CF_instructions( the_CIEs[this_CIE].instrs,
3962 the_CIEs[this_CIE].ilen, &adi,
3963 the_CIEs[this_CIE].code_a_f,
3964 the_CIEs[this_CIE].data_a_f );
3967 if (di->ddump_frames)
3968 VG_(printf)("\n");
3970 } else {
3972 AddressDecodingInfo adi;
3973 UnwindContext ctx, restore_ctx;
3974 Int cie;
3975 ULong look_for;
3976 Bool ok;
3977 Addr fde_initloc;
3978 UWord fde_arange;
3979 DiCursor fde_instrs;
3980 Int fde_ilen;
3982 /* --------- FDE --------- */
3984 /* Find the relevant CIE. The CIE we want is located
3985 cie_pointer bytes back from here. */
3987 /* re sizeof(UInt) / sizeof(ULong), matches XXX above. */
3988 if (is_ehframe)
3989 look_for = ML_(cur_minus)(data, frame_image)
3990 - (dw64 ? sizeof(ULong) : sizeof(UInt))
3991 - cie_pointer;
3992 else
3993 look_for = cie_pointer;
3995 for (cie = 0; cie < n_CIEs; cie++) {
3996 if (0) VG_(printf)("look for %lld %lld\n",
3997 look_for, the_CIEs[cie].offset );
3998 if (the_CIEs[cie].offset == look_for)
3999 break;
4001 vg_assert(cie >= 0 && cie <= n_CIEs);
4002 if (cie == n_CIEs) {
4003 how = "FDE refers to not-findable CIE";
4004 goto bad;
4007 adi.encoding = the_CIEs[cie].address_encoding;
4008 adi.ehframe_image = frame_image;
4009 adi.ehframe_avma = frame_avma;
4010 adi.text_bias = di->text_debug_bias;
4011 fde_initloc = step_encoded_Addr(&adi, &data);
4012 if (di->trace_cfi)
4013 VG_(printf)("fde.initloc = %#lx\n", fde_initloc);
4015 adi.encoding = the_CIEs[cie].address_encoding & 0xf;
4016 adi.ehframe_image = frame_image;
4017 adi.ehframe_avma = frame_avma;
4018 adi.text_bias = di->text_debug_bias;
4020 /* WAS (incorrectly):
4021 fde_arange = read_encoded_Addr(&nbytes, &adi, data);
4022 data += nbytes;
4023 The following corresponds to what binutils/dwarf.c does:
4025 { UInt ptr_size = size_of_encoded_Addr( adi.encoding );
4026 switch (ptr_size) {
4027 case 8: case 4: case 2: case 1:
4028 fde_arange
4029 = (UWord)step_le_u_encoded_literal(&data, ptr_size);
4030 break;
4031 default:
4032 how = "unknown arange field encoding in FDE";
4033 goto bad;
4037 if (di->trace_cfi)
4038 VG_(printf)("fde.arangec = %#lx\n", fde_arange);
4040 if (di->ddump_frames)
4041 VG_(printf)("%08lx %08lx %08lx FDE cie=%08lx pc=%08lx..%08lx\n",
4042 (Addr)ML_(cur_minus)(ciefde_start, frame_image),
4043 (Addr)ciefde_len,
4044 (Addr)(UWord)cie_pointer,
4045 (Addr)look_for,
4046 ((Addr)fde_initloc) - di->text_debug_bias,
4047 ((Addr)fde_initloc) - di->text_debug_bias + fde_arange);
4049 if (the_CIEs[cie].saw_z_augmentation) {
4050 UInt length = step_leb128( &data, 0);
4051 if (di->ddump_frames && (length > 0)) {
4052 UInt i;
4053 VG_(printf)(" Augmentation data: ");
4054 for (i = 0; i < length; i++)
4055 VG_(printf)(" %02x", (UInt)ML_(cur_read_UChar)
4056 (ML_(cur_plus)(data, i)));
4057 VG_(printf)("\n\n");
4059 data = ML_(cur_plus)(data, length);
4062 fde_instrs = data;
4063 fde_ilen = ML_(cur_minus)(ciefde_start, data)
4064 + (Long)ciefde_len + (Long)sizeof(UInt);
4065 if (di->trace_cfi) {
4066 //VG_(printf)("fde.instrs = %p\n", fde_instrs);
4067 VG_(printf)("fde.ilen = %d\n", (Int)fde_ilen);
4070 if (fde_ilen < 0 || fde_ilen > frame_size) {
4071 how = "implausible # fde insns";
4072 goto bad;
4075 data = ML_(cur_plus)(data, fde_ilen);
4077 /* If this object's DebugInfo* had some DiCFSIs from a
4078 previous .eh_frame or .debug_frame read, we must check
4079 that we're not adding a duplicate. */
4080 if (cfsi_used_orig > 0) {
4081 Addr a_mid_lo, a_mid_hi;
4082 Word mid, size,
4083 lo = 0,
4084 hi = cfsi_used_orig-1;
4085 while (True) {
4086 /* current unsearched space is from lo to hi, inclusive. */
4087 if (lo > hi) break; /* not found */
4088 mid = (lo + hi) / 2;
4089 a_mid_lo = di->cfsi_rd[mid].base;
4090 size = di->cfsi_rd[mid].len;
4091 a_mid_hi = a_mid_lo + size - 1;
4092 vg_assert(a_mid_hi >= a_mid_lo);
4093 if (fde_initloc + fde_arange <= a_mid_lo) {
4094 hi = mid-1; continue;
4096 if (fde_initloc > a_mid_hi) { lo = mid+1; continue; }
4097 break;
4100 /* The range this .debug_frame FDE covers has been already
4101 covered in .eh_frame section. Don't add it from .debug_frame
4102 section again. */
4103 if (lo <= hi)
4104 continue;
4107 adi.encoding = the_CIEs[cie].address_encoding;
4108 adi.ehframe_image = frame_image;
4109 adi.ehframe_avma = frame_avma;
4110 adi.text_bias = di->text_debug_bias;
4112 if (di->trace_cfi)
4113 show_CF_instructions( fde_instrs, fde_ilen, &adi,
4114 the_CIEs[cie].code_a_f,
4115 the_CIEs[cie].data_a_f );
4117 initUnwindContext(&ctx);
4118 ctx.code_a_f = the_CIEs[cie].code_a_f;
4119 ctx.data_a_f = the_CIEs[cie].data_a_f;
4120 ctx.initloc = fde_initloc;
4121 ctx.ra_reg = the_CIEs[cie].ra_reg;
4122 ctx.exprs = VG_(newXA)( ML_(dinfo_zalloc), "di.rcid.1",
4123 ML_(dinfo_free),
4124 sizeof(CfiExpr) );
4126 /* Run the CIE's instructions. Ugly hack: if
4127 --debug-dump=frames is in effect, suppress output for
4128 these instructions since they will already have been shown
4129 at the time the CIE was first encountered. Note, not
4130 thread safe - if this reader is ever made threaded, should
4131 fix properly. */
4132 { Bool hack = di->ddump_frames;
4133 di->ddump_frames = False;
4134 initUnwindContext(&restore_ctx);
4135 ok = run_CF_instructions(
4136 di, False, &ctx, the_CIEs[cie].instrs,
4137 the_CIEs[cie].ilen, 0, NULL, &adi
4139 di->ddump_frames = hack;
4141 /* And now run the instructions for the FDE, starting from
4142 the state created by running the CIE preamble
4143 instructions. */
4144 if (ok) {
4145 restore_ctx = ctx;
4146 ok = run_CF_instructions(
4147 di, True, &ctx, fde_instrs, fde_ilen, fde_arange,
4148 &restore_ctx, &adi
4150 if (di->ddump_frames)
4151 VG_(printf)("\n");
4154 VG_(deleteXA)( ctx.exprs );
4158 return;
4160 bad:
4161 if (!VG_(clo_xml) && VG_(clo_verbosity) > 1)
4162 VG_(message)(Vg_UserMsg,
4163 "Warning: %s in DWARF2 CFI reading\n", how);
4164 return;
4167 #endif // defined(VGO_linux) || defined(VGO_darwin)
4169 /*--------------------------------------------------------------------*/
4170 /*--- end ---*/
4171 /*--------------------------------------------------------------------*/