Add DRD suppression patterns for races triggered by std::ostream
[valgrind.git] / coregrind / m_gdbserver / power-vsx-valgrind-s2.xml
blob8854e8ff93dcdc164fe040b2dd2f3b81e09b1817
1 <?xml version="1.0"?>
2 <!-- Copyright (C) 2008-2016 Free Software Foundation, Inc.
4      Copying and distribution of this file, with or without modification,
5      are permitted in any medium without royalty provided the copyright
6      notice and this notice are preserved.  -->
8 <!-- POWER7 VSX registers that do not overlap existing FP and VMX
9      registers.  -->
10 <!DOCTYPE feature SYSTEM "gdb-target.dtd">
11 <feature name="org.gnu.gdb.power.vsx">
12   <reg name="vs0hs2" bitsize="64" type="uint64"/>
13   <reg name="vs1hs2" bitsize="64" type="uint64"/>
14   <reg name="vs2hs2" bitsize="64" type="uint64"/>
15   <reg name="vs3hs2" bitsize="64" type="uint64"/>
16   <reg name="vs4hs2" bitsize="64" type="uint64"/>
17   <reg name="vs5hs2" bitsize="64" type="uint64"/>
18   <reg name="vs6hs2" bitsize="64" type="uint64"/>
19   <reg name="vs7hs2" bitsize="64" type="uint64"/>
20   <reg name="vs8hs2" bitsize="64" type="uint64"/>
21   <reg name="vs9hs2" bitsize="64" type="uint64"/>
22   <reg name="vs10hs2" bitsize="64" type="uint64"/>
23   <reg name="vs11hs2" bitsize="64" type="uint64"/>
24   <reg name="vs12hs2" bitsize="64" type="uint64"/>
25   <reg name="vs13hs2" bitsize="64" type="uint64"/>
26   <reg name="vs14hs2" bitsize="64" type="uint64"/>
27   <reg name="vs15hs2" bitsize="64" type="uint64"/>
28   <reg name="vs16hs2" bitsize="64" type="uint64"/>
29   <reg name="vs17hs2" bitsize="64" type="uint64"/>
30   <reg name="vs18hs2" bitsize="64" type="uint64"/>
31   <reg name="vs19hs2" bitsize="64" type="uint64"/>
32   <reg name="vs20hs2" bitsize="64" type="uint64"/>
33   <reg name="vs21hs2" bitsize="64" type="uint64"/>
34   <reg name="vs22hs2" bitsize="64" type="uint64"/>
35   <reg name="vs23hs2" bitsize="64" type="uint64"/>
36   <reg name="vs24hs2" bitsize="64" type="uint64"/>
37   <reg name="vs25hs2" bitsize="64" type="uint64"/>
38   <reg name="vs26hs2" bitsize="64" type="uint64"/>
39   <reg name="vs27hs2" bitsize="64" type="uint64"/>
40   <reg name="vs28hs2" bitsize="64" type="uint64"/>
41   <reg name="vs29hs2" bitsize="64" type="uint64"/>
42   <reg name="vs30hs2" bitsize="64" type="uint64"/>
43   <reg name="vs31hs2" bitsize="64" type="uint64"/>
44 </feature>