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regtest: broaden none/tests/linux/bug498317 suppression for PPC
[valgrind.git] / VEX / priv / host_s390_defs.c
blob583f116c3c82139b11da0573fb7abcdcc3dbc49f
1 /* -*- mode: C; c-basic-offset: 3; -*- */
2
3 /*---------------------------------------------------------------*/
4 /*--- begin host_s390_defs.c ---*/
5 /*---------------------------------------------------------------*/
6
7 /*
8 This file is part of Valgrind, a dynamic binary instrumentation
9 framework.
10
11 Copyright IBM Corp. 2010-2020
12 Copyright (C) 2012-2017 Florian Krohm (britzel@acm.org)
13
14 This program is free software; you can redistribute it and/or
15 modify it under the terms of the GNU General Public License as
16 published by the Free Software Foundation; either version 2 of the
17 License, or (at your option) any later version.
18
19 This program is distributed in the hope that it will be useful, but
20 WITHOUT ANY WARRANTY; without even the implied warranty of
21 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22 General Public License for more details.
23
24 You should have received a copy of the GNU General Public License
25 along with this program; if not, see <http://www.gnu.org/licenses/>.
26
27 The GNU General Public License is contained in the file COPYING.
28 */
29
30 /* Contributed by Florian Krohm */
31
32 #include "libvex_basictypes.h"
33 #include "libvex.h"
34 #include "libvex_trc_values.h"
35 #include "libvex_s390x_common.h"
36
37 #include "main_util.h"
38 #include "main_globals.h"
39 #include "host_generic_regs.h"
40 #include "host_s390_defs.h"
41 #include "s390_disasm.h"
42 #include "guest_s390_defs.h" /* S390X_GUEST_OFFSET */
43 #include <stdarg.h>
44
45 /*------------------------------------------------------------*/
46 /*--- Forward declarations ---*/
47 /*------------------------------------------------------------*/
48
49 static void s390_insn_map_regs(HRegRemap *, s390_insn *);
50 static void s390_insn_get_reg_usage(HRegUsage *u, const s390_insn *);
51 static UInt s390_tchain_load64_len(void);
52
53
54 /*------------------------------------------------------------*/
55 /*--- Registers ---*/
56 /*------------------------------------------------------------*/
57
58 /* A mapping from register number to register index */
59 static Int gpr_index[16]; // GPR regno -> register index
60 static Int vr_index[32]; // VR regno -> register index
61
62 HReg
63 s390_hreg_gpr(UInt regno)
64 {
65 Int ix = gpr_index[regno];
66 vassert(ix >= 0);
67 return mkHReg(/*virtual*/False, HRcInt64, regno, ix);
68 }
69
70 HReg
71 s390_hreg_fpr(UInt regno)
72 {
73 Int ix = vr_index[regno];
74 vassert(ix >= 0);
75 return mkHReg(/*virtual*/False, HRcFlt64, regno, ix);
76 }
77
78 HReg
79 s390_hreg_vr(UInt regno)
80 {
81 Int ix = vr_index[regno];
82 vassert(ix >= 0);
83 return mkHReg(/*virtual*/False, HRcVec128, regno, ix);
84 }
85
86 static __inline__ UInt
87 hregNumber(HReg reg)
88 {
89 return hregEncoding(reg);
90 }
91
92 /* Decompile the given register into a static buffer and return it */
93 const HChar *
94 s390_hreg_as_string(HReg reg)
95 {
96 static HChar buf[10];
97
98 static const HChar ireg_names[16][5] = {
99 "%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7",
100 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
101 };
102
103 static const HChar freg_names[16][5] = {
104 "%f0", "%f1", "%f2", "%f3", "%f4", "%f5", "%f6", "%f7",
105 "%f8", "%f9", "%f10", "%f11", "%f12", "%f13", "%f14", "%f15"
106 };
107
108 static const HChar vreg_names[32][5] = {
109 "%v0", "%v1", "%v2", "%v3", "%v4", "%v5", "%v6", "%v7",
110 "%v8", "%v9", "%v10", "%v11", "%v12", "%v13", "%v14", "%v15",
111 "%v16", "%v17", "%v18", "%v19", "%v20", "%v21", "%v22", "%v23",
112 "%v24", "%v25", "%v26", "%v27", "%v28", "%v29", "%v30", "%v31"
113 };
114
115 /* Be generic for all virtual regs. */
116 if (hregIsVirtual(reg)) {
117 UInt r = hregIndex(reg);
118 buf[0] = '\0';
119 switch (hregClass(reg)) {
120 case HRcInt64: vex_sprintf(buf, "%%vR%u", r); break;
121 case HRcFlt64: vex_sprintf(buf, "%%vF%u", r); break;
122 case HRcVec128: vex_sprintf(buf, "%%vV%u", r); break;
123 default: goto fail;
124 }
125 return buf;
126 }
127
128 /* But specific for real regs. */
129 UInt r = hregNumber(reg);
130 switch (hregClass(reg)) {
131 case HRcInt64: vassert(r < 16); return ireg_names[r];
132 case HRcFlt64: vassert(r < 16); return freg_names[r];
133 case HRcVec128: vassert(r < 32); return vreg_names[r];
134 default: goto fail;
135 }
136
137 fail: vpanic("s390_hreg_as_string");
138 }
139
140
141 /* Return the real register that holds the guest state pointer */
142 HReg
143 s390_hreg_guest_state_pointer(void)
144 {
145 return s390_hreg_gpr(S390_REGNO_GUEST_STATE_POINTER);
146 }
147
148 /* Return the real register that holds the stack pointer */
149 HReg
150 s390_hreg_stack_pointer(void)
151 {
152 return s390_hreg_gpr(S390_REGNO_STACK_POINTER);
153 }
154
155
156 /* Is VALUE within the domain of a 20-bit signed integer. */
157 static __inline__ Bool
158 fits_signed_20bit(Int value)
159 {
160 UInt uval = value;
161 return ((Int)(uval << 12) >> 12) == value;
162 }
163
164
165 /* Is VALUE within the domain of a 12-bit unsigned integer. */
166 static __inline__ Bool
167 fits_unsigned_12bit(Int value)
168 {
169 return (value & 0xFFF) == value;
170 }
171
172 /*------------------------------------------------------------*/
173 /*--- Addressing modes (amodes) ---*/
174 /*------------------------------------------------------------*/
175
176 /* Construct a b12 amode. */
177 s390_amode *
178 s390_amode_b12(Int d, HReg b)
179 {
180 s390_amode *am = LibVEX_Alloc_inline(sizeof(s390_amode));
181
182 vassert(fits_unsigned_12bit(d));
183
184 am->tag = S390_AMODE_B12;
185 am->d = d;
186 am->b = b;
187 am->x = s390_hreg_gpr(0); /* hregNumber(am->x) == 0 */
188
189 return am;
190 }
191
192
193 /* Construct a b20 amode. */
194 s390_amode *
195 s390_amode_b20(Int d, HReg b)
196 {
197 s390_amode *am = LibVEX_Alloc_inline(sizeof(s390_amode));
198
199 vassert(fits_signed_20bit(d));
200
201 am->tag = S390_AMODE_B20;
202 am->d = d;
203 am->b = b;
204 am->x = s390_hreg_gpr(0); /* hregNumber(am->x) == 0 */
205
206 return am;
207 }
208
209
210 /* Construct a bx12 amode. */
211 s390_amode *
212 s390_amode_bx12(Int d, HReg b, HReg x)
213 {
214 s390_amode *am = LibVEX_Alloc_inline(sizeof(s390_amode));
215
216 vassert(fits_unsigned_12bit(d));
217 vassert(hregNumber(b) != 0);
218 vassert(hregNumber(x) != 0);
219
220 am->tag = S390_AMODE_BX12;
221 am->d = d;
222 am->b = b;
223 am->x = x;
224
225 return am;
226 }
227
228
229 /* Construct a bx20 amode. */
230 s390_amode *
231 s390_amode_bx20(Int d, HReg b, HReg x)
232 {
233 s390_amode *am = LibVEX_Alloc_inline(sizeof(s390_amode));
234
235 vassert(fits_signed_20bit(d));
236 vassert(hregNumber(b) != 0);
237 vassert(hregNumber(x) != 0);
238
239 am->tag = S390_AMODE_BX20;
240 am->d = d;
241 am->b = b;
242 am->x = x;
243
244 return am;
245 }
246
247
248 /* Construct an AMODE for accessing the guest state at OFFSET.
249 OFFSET can be at most 3 * sizeof(VexGuestS390XState) + LibVEX_N_SPILL_BYTES
250 which may be too large for a B12 addressing mode.
251 Use a B20 amode as a fallback which will be safe for any offset.
252 */
253 s390_amode *
254 s390_amode_for_guest_state(Int offset)
255 {
256 if (fits_unsigned_12bit(offset))
257 return s390_amode_b12(offset, s390_hreg_guest_state_pointer());
258
259 if (fits_signed_20bit(offset))
260 return s390_amode_b20(offset, s390_hreg_guest_state_pointer());
261
262 vpanic("invalid guest state offset");
263 }
264
265
266 /* Construct an AMODE for accessing stack pointer at OFFSET.
267 OFFSET can be at most 3 * sizeof(VexGuestS390XState) + LibVEX_N_SPILL_BYTES
268 which may be too large for a B12 addressing mode.
269 Use a B20 amode as a fallback which will be safe for any offset.
270 */
271 s390_amode *
272 s390_amode_for_stack_pointer(Int offset)
273 {
274 if (fits_unsigned_12bit(offset))
275 return s390_amode_b12(offset, s390_hreg_stack_pointer());
276
277 if (fits_signed_20bit(offset))
278 return s390_amode_b20(offset, s390_hreg_stack_pointer());
279
280 vpanic("invalid stack pointer offset");
281 }
282
283
284 /* Decompile the given amode into a static buffer and return it. */
285 const HChar *
286 s390_amode_as_string(const s390_amode *am)
287 {
288 static HChar buf[30];
289 HChar *p;
290
291 buf[0] = '\0';
292 p = buf;
293
294 switch (am->tag) {
295 case S390_AMODE_B12:
296 case S390_AMODE_B20:
297 vex_sprintf(p, "%d(%s)", am->d, s390_hreg_as_string(am->b));
298 break;
299
300 case S390_AMODE_BX12:
301 case S390_AMODE_BX20:
302 /* s390_hreg_as_string returns pointer to local buffer. Need to
303 split this into two printfs */
304 p += vex_sprintf(p, "%d(%s,", am->d, s390_hreg_as_string(am->x));
305 vex_sprintf(p, "%s)", s390_hreg_as_string(am->b));
306 break;
307
308 default:
309 vpanic("s390_amode_as_string");
310 }
311
312 return buf;
313 }
314
315
316 /* Helper function for s390_amode_is_sane */
317 static __inline__ Bool
318 is_virtual_gpr(HReg reg)
319 {
320 return hregIsVirtual(reg) && hregClass(reg) == HRcInt64;
321 }
322
323 /* Helper function for all vector operations */
324 static UChar
325 s390_getM_from_size(const UChar size) {
326 switch(size) {
327 case 1:
328 return 0;
329 case 2:
330 return 1;
331 case 4:
332 return 2;
333 case 8:
334 return 3;
335 case 16:
336 return 4;
337 default:
338 vex_printf("size=%d\n", size);
339 vpanic("s390_getM_from_size: unknown size");
340 }
341 }
342
343 /* Helper for generating RXB field in vector instructions */
344 static UChar
345 s390_update_rxb(const UChar rxb, const UChar index, UChar* vr) {
346 vassert((index >= 1) && (index <= 4));
347 UChar result = rxb;
348 if(vr != NULL) {
349 if(*vr >= 16) {
350 result |= 1 << (4 - index);
351 *vr -= 16;
352 }
353 }
354 return result;
355 }
356
357 /* Sanity check for an amode */
358 Bool
359 s390_amode_is_sane(const s390_amode *am)
360 {
361 switch (am->tag) {
362 case S390_AMODE_B12:
363 return (is_virtual_gpr(am->b) || sameHReg(am->b, s390_hreg_gpr(0))) &&
364 fits_unsigned_12bit(am->d);
365
366 case S390_AMODE_B20:
367 return is_virtual_gpr(am->b) && fits_signed_20bit(am->d);
368
369 case S390_AMODE_BX12:
370 return is_virtual_gpr(am->b) && is_virtual_gpr(am->x) &&
371 fits_unsigned_12bit(am->d);
372
373 case S390_AMODE_BX20:
374 return is_virtual_gpr(am->b) && is_virtual_gpr(am->x) &&
375 fits_signed_20bit(am->d);
376
377 default:
378 vpanic("s390_amode_is_sane");
379 }
380 }
381
382 static Bool
383 s390_amode_is_constant(const s390_amode *am)
384 {
385 return am->tag == S390_AMODE_B12 && sameHReg(am->b, s390_hreg_gpr(0));
386 }
387
388
389 /* Record the register use of an amode */
390 static void
391 s390_amode_get_reg_usage(HRegUsage *u, const s390_amode *am)
392 {
393 if (!sameHReg(am->b, s390_hreg_gpr(0)))
394 addHRegUse(u, HRmRead, am->b);
395 if (!sameHReg(am->x, s390_hreg_gpr(0)))
396 addHRegUse(u, HRmRead, am->x);
397 }
398
399
400 static void
401 s390_amode_map_regs(HRegRemap *m, s390_amode *am)
402 {
403 if (!sameHReg(am->b, s390_hreg_gpr(0)))
404 am->b = lookupHRegRemap(m, am->b);
405 if (!sameHReg(am->x, s390_hreg_gpr(0)))
406 am->x = lookupHRegRemap(m, am->x);
407 }
408
409
410 void
411 ppS390AMode(const s390_amode *am)
412 {
413 vex_printf("%s", s390_amode_as_string(am));
414 }
415
416 void
417 ppS390Instr(const s390_insn *insn, Bool mode64)
418 {
419 vex_printf("%s", s390_insn_as_string(insn));
420 }
421
422 UInt
423 ppHRegS390(HReg reg)
424 {
425 return vex_printf("%s", s390_hreg_as_string(reg));
426 }
427
428 /*------------------------------------------------------------*/
429 /*--- Helpers for register allocation ---*/
430 /*------------------------------------------------------------*/
431
432 /* Initialise and return the "register universe", i.e. a list of
433 all hardware registers. Called once. */
434 const RRegUniverse *
435 getRRegUniverse_S390(void)
436 {
437 static RRegUniverse all_regs;
438 static Bool initialised = False;
439 RRegUniverse *ru = &all_regs;
440
441 if (LIKELY(initialised))
442 return ru;
443
444 RRegUniverse__init(ru);
445
446 /* Assign invalid values to the gpr/vr_index */
447 for (UInt i = 0; i < sizeof gpr_index / sizeof gpr_index[0]; ++i)
448 gpr_index[i] = -1;
449 for (UInt i = 0; i < sizeof vr_index / sizeof vr_index[0]; ++i)
450 vr_index[i] = -1;
451
452
453 /* Add the registers that are available to the register allocator.
454 GPRs: registers 6..11 are callee saved, list them first
455 registers 1..5 are caller saved, list them after
456 FPRs: registers 8..15 are callee saved, list them first
457 registers 0..7 are caller saved, list them after
458 FPR12 - FPR15 are also used as register pairs for 128-bit
459 floating point operations
460 VRs: registers 0..31 are available
461 */
462 ru->allocable_start[HRcInt64] = ru->size;
463 for (UInt regno = 6; regno <= 11; ++regno) {
464 gpr_index[regno] = ru->size;
465 ru->regs[ru->size++] = s390_hreg_gpr(regno);
466 }
467 for (UInt regno = 1; regno <= 5; ++regno) {
468 gpr_index[regno] = ru->size;
469 ru->regs[ru->size++] = s390_hreg_gpr(regno);
470 }
471 ru->allocable_end[HRcInt64] = ru->size - 1;
472
473 ru->allocable_start[HRcFlt64] = ru->size;
474 for (UInt regno = 8; regno <= 15; ++regno) {
475 vr_index[regno] = ru->size;
476 ru->regs[ru->size++] = s390_hreg_fpr(regno);
477 }
478 for (UInt regno = 0; regno <= 7; ++regno) {
479 vr_index[regno] = ru->size;
480 ru->regs[ru->size++] = s390_hreg_fpr(regno);
481 }
482 ru->allocable_end[HRcFlt64] = ru->size - 1;
483
484 ru->allocable_start[HRcVec128] = ru->size;
485 for (UInt regno = 16; regno <= 31; ++regno) {
486 vr_index[regno] = ru->size;
487 ru->regs[ru->size++] = s390_hreg_vr(regno);
488 }
489 ru->allocable_end[HRcVec128] = ru->size - 1;
490 ru->allocable = ru->size;
491
492 /* Add the registers that are not available for allocation.
493 r0 -- cannot be used as a base or index register
494 r12 -- scratch register for translation chaining support
495 r13 -- guest state pointer
496 r14 -- link register
497 r15 -- stack pointer
498 */
499 UInt other[] = { 0, 12, 13, 14, 15 };
500 for (UInt i = 0; i < sizeof other / sizeof other[0]; ++i) {
501 gpr_index[other[i]] = ru->size;
502 ru->regs[ru->size++] = s390_hreg_gpr(other[i]);
503 }
504
505 /* Sanity checking */
506 for (UInt i = 0; i < sizeof gpr_index / sizeof gpr_index[0]; ++i)
507 vassert(gpr_index[i] >= 0);
508 for (UInt i = 0; i < sizeof vr_index / sizeof vr_index[0]; ++i)
509 vassert(vr_index[i] >= 0);
510
511 initialised = True;
512
513 RRegUniverse__check_is_sane(ru);
514 return ru;
515 }
516
517 /* Tell the register allocator how the given instruction uses the registers
518 it refers to. */
519 void
520 getRegUsage_S390Instr(HRegUsage *u, const s390_insn *insn, Bool mode64)
521 {
522 s390_insn_get_reg_usage(u, insn);
523 }
524
525
526 /* Map the registers of the given instruction */
527 void
528 mapRegs_S390Instr(HRegRemap *m, s390_insn *insn, Bool mode64)
529 {
530 s390_insn_map_regs(m, insn);
531 }
532
533
534 /* Generate s390 spill/reload instructions under the direction of the
535 register allocator. Note it's critical these don't write the
536 condition codes. This is like an Ist_Put */
537 void
538 genSpill_S390(HInstr **i1, HInstr **i2, HReg rreg, Int offsetB, Bool mode64)
539 {
540 s390_amode *am;
541
542 vassert(offsetB >= 0);
543 vassert(!hregIsVirtual(rreg));
544
545 *i1 = *i2 = NULL;
546
547 am = s390_amode_for_guest_state(offsetB);
548
549 switch (hregClass(rreg)) {
550 case HRcInt64:
551 case HRcFlt64:
552 *i1 = s390_insn_store(8, am, rreg);
553 return;
554 case HRcVec128:
555 *i1 = s390_insn_store(16, am, rreg);
556 return;
557 default:
558 ppHRegClass(hregClass(rreg));
559 vpanic("genSpill_S390: unimplemented regclass");
560 }
561 }
562
563
564 /* This is like an Iex_Get */
565 void
566 genReload_S390(HInstr **i1, HInstr **i2, HReg rreg, Int offsetB, Bool mode64)
567 {
568 s390_amode *am;
569
570 vassert(offsetB >= 0);
571 vassert(!hregIsVirtual(rreg));
572
573 *i1 = *i2 = NULL;
574
575 am = s390_amode_for_guest_state(offsetB);
576
577 switch (hregClass(rreg)) {
578 case HRcInt64:
579 case HRcFlt64:
580 *i1 = s390_insn_load(8, rreg, am);
581 return;
582 case HRcVec128:
583 *i1 = s390_insn_load(16, rreg, am);
584 return;
585 default:
586 ppHRegClass(hregClass(rreg));
587 vpanic("genReload_S390: unimplemented regclass");
588 }
589 }
590
591 /* Direct reload function. For the given vreg (currently located at the given
592 spill offset) and a given instruction that reads vreg exactly once, return a
593 variant of the instruction that references the spill slot directly. Return
594 NULL if no such instruction is found. */
595 HInstr *
596 directReload_S390(HInstr* i, HReg vreg, Short spill_off)
597 {
598 s390_insn* insn = (s390_insn *) i;
599
600 /* For simplicity, reject spill offsets that may cause trouble with 12-bit
601 addressing. They probably shouldn't occur anyway. */
602 if (!fits_unsigned_12bit(spill_off + 15))
603 return NULL;
604
605 /* In case of a spilled GPR, adjust the offset to be right-aligned within the
606 spill slot. */
607 Int delta = hregClass(vreg) == HRcInt64 ? 8 - insn->size : 0;
608 s390_amode* vreg_am = s390_amode_for_guest_state(spill_off + delta);
609 s390_opnd_RMI vreg_opnd;
610 vreg_opnd.tag = S390_OPND_AMODE;
611 vreg_opnd.variant.am = vreg_am;
612
613 /* v-move <reg>,<vreg> */
614 if (insn->tag == S390_INSN_MOVE
615 && sameHReg(insn->variant.move.src, vreg)) {
616 return s390_insn_load(insn->size, insn->variant.move.dst, vreg_am);
617 }
618
619 /* v-store <vreg>,<addr> */
620 if (insn->tag == S390_INSN_STORE
621 && sameHReg(insn->variant.store.src, vreg)
622 && insn->variant.store.dst->tag == S390_AMODE_B12) {
623 return s390_insn_memcpy(insn->size, insn->variant.store.dst, vreg_am);
624 }
625
626 /* v-test <vreg> */
627 if (insn->tag == S390_INSN_TEST
628 && insn->variant.test.src.tag == S390_OPND_REG
629 && sameHReg(insn->variant.test.src.variant.reg, vreg)) {
630 return s390_insn_test(insn->size, vreg_opnd);
631 }
632
633 /* v-<alu> <reg>,<vreg> */
634 if (insn->tag == S390_INSN_ALU
635 && insn->variant.alu.op2.tag == S390_OPND_REG
636 && sameHReg(insn->variant.alu.op2.variant.reg, vreg)) {
637 return s390_insn_alu(insn->size, insn->variant.alu.tag,
638 insn->variant.alu.dst, vreg_opnd);
639 }
640
641 /* v-vgetelem <reg>,<vreg> */
642 if (insn->tag == S390_INSN_VEC_AMODEOP
643 && insn->variant.vec_amodeop.tag == S390_VEC_GET_ELEM
644 && insn->size == 8
645 && sameHReg(insn->variant.vec_amodeop.op1, vreg)
646 && s390_amode_is_constant(insn->variant.vec_amodeop.op2)) {
647 vreg_am->d += 8 * insn->variant.vec_amodeop.op2->d;
648 return s390_insn_load(insn->size, insn->variant.vec_amodeop.dst, vreg_am);
649 }
650
651 /* v-<unop> <reg>,<vreg> */
652 if (insn->tag == S390_INSN_UNOP
653 && insn->variant.unop.src.tag == S390_OPND_REG
654 && sameHReg(insn->variant.unop.src.variant.reg, vreg)
655 && hregClass(vreg) == HRcInt64) {
656 /* Some operations define the input size to be different from the insn's
657 `size' field. Adjust the address accordingly. */
658 switch (insn->variant.unop.tag) {
659 case S390_ZERO_EXTEND_8:
660 case S390_SIGN_EXTEND_8: vreg_am->d = spill_off + 7; break;
661 case S390_ZERO_EXTEND_16:
662 case S390_SIGN_EXTEND_16: vreg_am->d = spill_off + 6; break;
663 case S390_ZERO_EXTEND_32:
664 case S390_SIGN_EXTEND_32: vreg_am->d = spill_off + 4; break;
665 case S390_NEGATE: /* Nothing to adjust. */ break;
666 default:
667 goto no_match;
668 }
669 return s390_insn_unop(insn->size, insn->variant.unop.tag,
670 insn->variant.unop.dst, vreg_opnd);
671 }
672
673 /* v-vrep <reg>,<vreg>,<idx> */
674 if (insn->tag == S390_INSN_VEC_REPLICATE
675 && sameHReg(insn->variant.vec_replicate.op1, vreg)) {
676 vreg_am->d += insn->size * insn->variant.vec_replicate.idx;
677 return s390_insn_unop(insn->size, S390_VEC_DUPLICATE,
678 insn->variant.vec_replicate.dst, vreg_opnd);
679 }
680
681 no_match:
682 return NULL;
683 }
684
685 s390_insn* genMove_S390(HReg from, HReg to, Bool mode64)
686 {
687 switch (hregClass(from)) {
688 case HRcInt64:
689 return s390_insn_move(sizeofIRType(Ity_I64), to, from);
690 case HRcFlt64:
691 return s390_insn_move(sizeofIRType(Ity_F64), to, from);
692 case HRcVec128:
693 return s390_insn_move(sizeofIRType(Ity_V128), to, from);
694 default:
695 ppHRegClass(hregClass(from));
696 vpanic("genMove_S390: unimplemented regclass");
697 }
698 }
699
700 /* Helper function for s390_insn_get_reg_usage */
701 static void
702 s390_opnd_RMI_get_reg_usage(HRegUsage *u, s390_opnd_RMI op)
703 {
704 switch (op.tag) {
705 case S390_OPND_REG:
706 addHRegUse(u, HRmRead, op.variant.reg);
707 break;
708
709 case S390_OPND_AMODE:
710 s390_amode_get_reg_usage(u, op.variant.am);
711 break;
712
713 case S390_OPND_IMMEDIATE:
714 break;
715
716 default:
717 vpanic("s390_opnd_RMI_get_reg_usage");
718 }
719 }
720
721
722 /* Tell the register allocator how the given insn uses the registers */
723 static void
724 s390_insn_get_reg_usage(HRegUsage *u, const s390_insn *insn)
725 {
726 initHRegUsage(u);
727
728 switch (insn->tag) {
729 case S390_INSN_LOAD:
730 addHRegUse(u, HRmWrite, insn->variant.load.dst);
731 s390_amode_get_reg_usage(u, insn->variant.load.src);
732 break;
733
734 case S390_INSN_LOAD_IMMEDIATE:
735 addHRegUse(u, HRmWrite, insn->variant.load_immediate.dst);
736 break;
737
738 case S390_INSN_STORE:
739 addHRegUse(u, HRmRead, insn->variant.store.src);
740 s390_amode_get_reg_usage(u, insn->variant.store.dst);
741 break;
742
743 case S390_INSN_MOVE:
744 addHRegUse(u, HRmRead, insn->variant.move.src);
745 addHRegUse(u, HRmWrite, insn->variant.move.dst);
746
747 if (hregClass(insn->variant.move.src) == hregClass(insn->variant.move.dst)) {
748 u->isRegRegMove = True;
749 u->regMoveSrc = insn->variant.move.src;
750 u->regMoveDst = insn->variant.move.dst;
751 }
752 break;
753
754 case S390_INSN_MEMCPY:
755 s390_amode_get_reg_usage(u, insn->variant.memcpy.src);
756 s390_amode_get_reg_usage(u, insn->variant.memcpy.dst);
757 break;
758
759 case S390_INSN_COND_MOVE:
760 switch (insn->variant.cond_move.cond) {
761 case S390_CC_NEVER:
762 break;
763 case S390_CC_ALWAYS:
764 s390_opnd_RMI_get_reg_usage(u, insn->variant.cond_move.src);
765 addHRegUse(u, HRmWrite, insn->variant.cond_move.dst);
766 break;
767 default:
768 s390_opnd_RMI_get_reg_usage(u, insn->variant.cond_move.src);
769 addHRegUse(u, HRmModify, insn->variant.cond_move.dst);
770 break;
771 }
772 break;
773
774 case S390_INSN_ALU:
775 addHRegUse(u, HRmModify, insn->variant.alu.dst); /* op1 */
776 s390_opnd_RMI_get_reg_usage(u, insn->variant.alu.op2);
777 break;
778
779 case S390_INSN_SMUL:
780 case S390_INSN_UMUL:
781 addHRegUse(u, HRmModify, insn->variant.mul.dst_lo); /* op1 */
782 addHRegUse(u, HRmWrite, insn->variant.mul.dst_hi);
783 s390_opnd_RMI_get_reg_usage(u, insn->variant.mul.op2);
784 break;
785
786 case S390_INSN_SDIV:
787 case S390_INSN_UDIV:
788 addHRegUse(u, HRmModify, insn->variant.div.op1_lo);
789 addHRegUse(u, HRmModify, insn->variant.div.op1_hi);
790 s390_opnd_RMI_get_reg_usage(u, insn->variant.div.op2);
791 break;
792
793 case S390_INSN_DIVS:
794 addHRegUse(u, HRmModify, insn->variant.divs.op1); /* quotient */
795 addHRegUse(u, HRmWrite, insn->variant.divs.rem); /* remainder */
796 s390_opnd_RMI_get_reg_usage(u, insn->variant.divs.op2);
797 break;
798
799 case S390_INSN_CLZ:
800 addHRegUse(u, HRmWrite, insn->variant.clz.num_bits);
801 addHRegUse(u, HRmWrite, insn->variant.clz.clobber);
802 s390_opnd_RMI_get_reg_usage(u, insn->variant.clz.src);
803 break;
804
805 case S390_INSN_UNOP:
806 addHRegUse(u, HRmWrite, insn->variant.unop.dst);
807 s390_opnd_RMI_get_reg_usage(u, insn->variant.unop.src);
808 break;
809
810 case S390_INSN_TEST:
811 s390_opnd_RMI_get_reg_usage(u, insn->variant.test.src);
812 break;
813
814 case S390_INSN_CC2BOOL:
815 addHRegUse(u, HRmWrite, insn->variant.cc2bool.dst);
816 break;
817
818 case S390_INSN_CAS:
819 addHRegUse(u, HRmRead, insn->variant.cas.op1);
820 s390_amode_get_reg_usage(u, insn->variant.cas.op2);
821 addHRegUse(u, HRmRead, insn->variant.cas.op3);
822 addHRegUse(u, HRmWrite, insn->variant.cas.old_mem);
823 break;
824
825 case S390_INSN_CDAS: {
826 s390_cdas *cdas = insn->variant.cdas.details;
827
828 addHRegUse(u, HRmRead, cdas->op1_high);
829 addHRegUse(u, HRmRead, cdas->op1_low);
830 s390_amode_get_reg_usage(u, cdas->op2);
831 addHRegUse(u, HRmRead, cdas->op3_high);
832 addHRegUse(u, HRmRead, cdas->op3_low);
833 addHRegUse(u, HRmWrite, cdas->old_mem_high);
834 addHRegUse(u, HRmWrite, cdas->old_mem_low);
835 addHRegUse(u, HRmWrite, cdas->scratch);
836 break;
837 }
838
839 case S390_INSN_COMPARE:
840 addHRegUse(u, HRmRead, insn->variant.compare.src1);
841 s390_opnd_RMI_get_reg_usage(u, insn->variant.compare.src2);
842 break;
843
844 case S390_INSN_HELPER_CALL: {
845 UInt i;
846
847 /* Assume that all volatile registers are clobbered. ABI says,
848 volatile registers are: r0 - r5. Valgrind's register allocator
849 does not know about r0, so we can leave that out */
850 for (i = 1; i <= 5; ++i) {
851 addHRegUse(u, HRmWrite, s390_hreg_gpr(i));
852 }
853
854 /* Ditto for floating point registers. f0 - f7 are volatile */
855 for (i = 0; i <= 7; ++i) {
856 addHRegUse(u, HRmWrite, s390_hreg_fpr(i));
857 }
858
859 /* Ditto for all allocatable vector registers. */
860 for (i = 16; i <= 31; ++i) {
861 addHRegUse(u, HRmWrite, s390_hreg_vr(i));
862 }
863
864 /* The registers that are used for passing arguments will be read.
865 Not all of them may, but in general we need to assume that. */
866 for (i = 0; i < insn->variant.helper_call.details->num_args; ++i) {
867 addHRegUse(u, HRmRead, s390_hreg_gpr(s390_gprno_from_arg_index(i)));
868 }
869
870 /* s390_insn_helper_call_emit also reads / writes the link register
871 and stack pointer. But those registers are not visible to the
872 register allocator. So we don't need to do anything for them. */
873 break;
874 }
875
876 case S390_INSN_BFP_TRIOP:
877 addHRegUse(u, HRmModify, insn->variant.bfp_triop.dst); /* first */
878 addHRegUse(u, HRmRead, insn->variant.bfp_triop.op2); /* second */
879 addHRegUse(u, HRmRead, insn->variant.bfp_triop.op3); /* third */
880 break;
881
882 case S390_INSN_BFP_BINOP:
883 addHRegUse(u, HRmModify, insn->variant.bfp_binop.dst_hi); /* left */
884 addHRegUse(u, HRmRead, insn->variant.bfp_binop.op2_hi); /* right */
885 if (insn->size == 16) {
886 addHRegUse(u, HRmModify, insn->variant.bfp_binop.dst_lo); /* left */
887 addHRegUse(u, HRmRead, insn->variant.bfp_binop.op2_lo); /* right */
888 }
889 break;
890
891 case S390_INSN_BFP_UNOP:
892 addHRegUse(u, HRmWrite, insn->variant.bfp_unop.dst_hi);
893 addHRegUse(u, HRmRead, insn->variant.bfp_unop.op_hi); /* operand */
894 if (insn->size == 16) {
895 addHRegUse(u, HRmWrite, insn->variant.bfp_unop.dst_lo);
896 addHRegUse(u, HRmRead, insn->variant.bfp_unop.op_lo); /* operand */
897 }
898 break;
899
900 case S390_INSN_BFP_COMPARE:
901 addHRegUse(u, HRmWrite, insn->variant.bfp_compare.dst);
902 addHRegUse(u, HRmRead, insn->variant.bfp_compare.op1_hi); /* left */
903 addHRegUse(u, HRmRead, insn->variant.bfp_compare.op2_hi); /* right */
904 if (insn->size == 16) {
905 addHRegUse(u, HRmRead, insn->variant.bfp_compare.op1_lo); /* left */
906 addHRegUse(u, HRmRead, insn->variant.bfp_compare.op2_lo); /* right */
907 }
908 break;
909
910 case S390_INSN_BFP_CONVERT:
911 addHRegUse(u, HRmWrite, insn->variant.bfp_convert.dst_hi);
912 if (! hregIsInvalid(insn->variant.bfp_convert.dst_lo))
913 addHRegUse(u, HRmWrite, insn->variant.bfp_convert.dst_lo);
914 addHRegUse(u, HRmRead, insn->variant.bfp_convert.op_hi);
915 if (! hregIsInvalid(insn->variant.bfp_convert.op_lo))
916 addHRegUse(u, HRmRead, insn->variant.bfp_convert.op_lo);
917 break;
918
919 case S390_INSN_DFP_BINOP: {
920 s390_dfp_binop *dfp_binop = insn->variant.dfp_binop.details;
921
922 addHRegUse(u, HRmWrite, dfp_binop->dst_hi);
923 addHRegUse(u, HRmRead, dfp_binop->op2_hi); /* left */
924 addHRegUse(u, HRmRead, dfp_binop->op3_hi); /* right */
925 if (insn->size == 16) {
926 addHRegUse(u, HRmWrite, dfp_binop->dst_lo);
927 addHRegUse(u, HRmRead, dfp_binop->op2_lo); /* left */
928 addHRegUse(u, HRmRead, dfp_binop->op3_lo); /* right */
929 }
930 break;
931 }
932
933 case S390_INSN_DFP_UNOP:
934 addHRegUse(u, HRmWrite, insn->variant.dfp_unop.dst_hi);
935 addHRegUse(u, HRmRead, insn->variant.dfp_unop.op_hi); /* operand */
936 if (insn->size == 16) {
937 addHRegUse(u, HRmWrite, insn->variant.dfp_unop.dst_lo);
938 addHRegUse(u, HRmRead, insn->variant.dfp_unop.op_lo); /* operand */
939 }
940 break;
941
942 case S390_INSN_DFP_INTOP:
943 addHRegUse(u, HRmWrite, insn->variant.dfp_intop.dst_hi);
944 addHRegUse(u, HRmRead, insn->variant.dfp_intop.op2);
945 addHRegUse(u, HRmRead, insn->variant.dfp_intop.op3_hi);
946 if (insn->size == 16) {
947 addHRegUse(u, HRmWrite, insn->variant.dfp_intop.dst_lo);
948 addHRegUse(u, HRmRead, insn->variant.dfp_intop.op3_lo);
949 }
950 break;
951
952 case S390_INSN_DFP_COMPARE:
953 addHRegUse(u, HRmWrite, insn->variant.dfp_compare.dst);
954 addHRegUse(u, HRmRead, insn->variant.dfp_compare.op1_hi); /* left */
955 addHRegUse(u, HRmRead, insn->variant.dfp_compare.op2_hi); /* right */
956 if (insn->size == 16) {
957 addHRegUse(u, HRmRead, insn->variant.dfp_compare.op1_lo); /* left */
958 addHRegUse(u, HRmRead, insn->variant.dfp_compare.op2_lo); /* right */
959 }
960 break;
961
962 case S390_INSN_DFP_CONVERT:
963 addHRegUse(u, HRmWrite, insn->variant.dfp_convert.dst_hi);
964 if (! hregIsInvalid(insn->variant.dfp_convert.dst_lo))
965 addHRegUse(u, HRmWrite, insn->variant.dfp_convert.dst_lo);
966 addHRegUse(u, HRmRead, insn->variant.dfp_convert.op_hi); /* operand */
967 if (! hregIsInvalid(insn->variant.dfp_convert.op_lo))
968 addHRegUse(u, HRmRead, insn->variant.dfp_convert.op_lo); /* operand */
969 break;
970
971 case S390_INSN_DFP_REROUND:
972 addHRegUse(u, HRmWrite, insn->variant.dfp_reround.dst_hi);
973 addHRegUse(u, HRmRead, insn->variant.dfp_reround.op2); /* left */
974 addHRegUse(u, HRmRead, insn->variant.dfp_reround.op3_hi); /* right */
975 if (insn->size == 16) {
976 addHRegUse(u, HRmWrite, insn->variant.dfp_reround.dst_lo);
977 addHRegUse(u, HRmRead, insn->variant.dfp_reround.op3_lo); /* right */
978 }
979 break;
980
981 case S390_INSN_FP_CONVERT: {
982 s390_fp_convert *fp_convert = insn->variant.fp_convert.details;
983
984 addHRegUse(u, HRmWrite, fp_convert->dst_hi);
985 if (! hregIsInvalid(fp_convert->dst_lo))
986 addHRegUse(u, HRmWrite, fp_convert->dst_lo);
987 addHRegUse(u, HRmRead, fp_convert->op_hi);
988 if (! hregIsInvalid(fp_convert->op_lo))
989 addHRegUse(u, HRmRead, fp_convert->op_lo);
990 addHRegUse(u, HRmWrite, fp_convert->r1);
991 break;
992 }
993
994 case S390_INSN_MIMM:
995 s390_amode_get_reg_usage(u, insn->variant.mimm.dst);
996 break;
997
998 case S390_INSN_MADD:
999 s390_amode_get_reg_usage(u, insn->variant.madd.dst);
1000 break;
1001
1002 case S390_INSN_MFENCE:
1003 break;
1004
1005 case S390_INSN_SET_FPC_BFPRM:
1006 addHRegUse(u, HRmRead, insn->variant.set_fpc_bfprm.mode);
1007 break;
1008
1009 case S390_INSN_SET_FPC_DFPRM:
1010 addHRegUse(u, HRmRead, insn->variant.set_fpc_dfprm.mode);
1011 break;
1012
1013 case S390_INSN_EVCHECK:
1014 s390_amode_get_reg_usage(u, insn->variant.evcheck.counter);
1015 s390_amode_get_reg_usage(u, insn->variant.evcheck.fail_addr);
1016 break;
1017
1018 case S390_INSN_PROFINC:
1019 /* Does not use any register visible to the register allocator */
1020 break;
1021
1022 case S390_INSN_XDIRECT:
1023 s390_amode_get_reg_usage(u, insn->variant.xdirect.guest_IA);
1024 break;
1025
1026 case S390_INSN_XINDIR:
1027 addHRegUse(u, HRmRead, insn->variant.xindir.dst);
1028 s390_amode_get_reg_usage(u, insn->variant.xindir.guest_IA);
1029 break;
1030
1031 case S390_INSN_XASSISTED:
1032 addHRegUse(u, HRmRead, insn->variant.xassisted.dst);
1033 s390_amode_get_reg_usage(u, insn->variant.xassisted.guest_IA);
1034 break;
1035
1036 case S390_INSN_VEC_AMODEOP:
1037 addHRegUse(u, HRmWrite, insn->variant.vec_amodeop.dst);
1038 addHRegUse(u, HRmRead, insn->variant.vec_amodeop.op1);
1039 s390_amode_get_reg_usage(u, insn->variant.vec_amodeop.op2);
1040 break;
1041
1042 case S390_INSN_VEC_AMODEINTOP:
1043 addHRegUse(u, HRmModify, insn->variant.vec_amodeintop.dst);
1044 s390_amode_get_reg_usage(u, insn->variant.vec_amodeintop.op2);
1045 addHRegUse(u, HRmRead, insn->variant.vec_amodeintop.op3);
1046 break;
1047
1048 case S390_INSN_VEC_BINOP:
1049 addHRegUse(u, HRmWrite, insn->variant.vec_binop.dst);
1050 addHRegUse(u, HRmRead, insn->variant.vec_binop.op1);
1051 addHRegUse(u, HRmRead, insn->variant.vec_binop.op2);
1052 break;
1053
1054 case S390_INSN_VEC_TRIOP:
1055 addHRegUse(u, HRmWrite, insn->variant.vec_triop.dst);
1056 addHRegUse(u, HRmRead, insn->variant.vec_triop.op1);
1057 addHRegUse(u, HRmRead, insn->variant.vec_triop.op2);
1058 addHRegUse(u, HRmRead, insn->variant.vec_triop.op3);
1059 break;
1060
1061 case S390_INSN_VEC_REPLICATE:
1062 addHRegUse(u, HRmWrite, insn->variant.vec_replicate.dst);
1063 addHRegUse(u, HRmRead, insn->variant.vec_replicate.op1);
1064 break;
1065
1066 default:
1067 vpanic("s390_insn_get_reg_usage");
1068 }
1069 }
1070
1071
1072 /* Helper function for s390_insn_map_regs */
1073 static void
1074 s390_opnd_RMI_map_regs(HRegRemap *m, s390_opnd_RMI *op)
1075 {
1076 switch (op->tag) {
1077 case S390_OPND_REG:
1078 op->variant.reg = lookupHRegRemap(m, op->variant.reg);
1079 break;
1080
1081 case S390_OPND_IMMEDIATE:
1082 break;
1083
1084 case S390_OPND_AMODE:
1085 s390_amode_map_regs(m, op->variant.am);
1086 break;
1087
1088 default:
1089 vpanic("s390_opnd_RMI_map_regs");
1090 }
1091 }
1092
1093
1094 static void
1095 s390_insn_map_regs(HRegRemap *m, s390_insn *insn)
1096 {
1097 switch (insn->tag) {
1098 case S390_INSN_LOAD:
1099 insn->variant.load.dst = lookupHRegRemap(m, insn->variant.load.dst);
1100 s390_amode_map_regs(m, insn->variant.load.src);
1101 break;
1102
1103 case S390_INSN_STORE:
1104 s390_amode_map_regs(m, insn->variant.store.dst);
1105 insn->variant.store.src = lookupHRegRemap(m, insn->variant.store.src);
1106 break;
1107
1108 case S390_INSN_MOVE:
1109 insn->variant.move.dst = lookupHRegRemap(m, insn->variant.move.dst);
1110 insn->variant.move.src = lookupHRegRemap(m, insn->variant.move.src);
1111 break;
1112
1113 case S390_INSN_MEMCPY:
1114 s390_amode_map_regs(m, insn->variant.memcpy.dst);
1115 s390_amode_map_regs(m, insn->variant.memcpy.src);
1116 break;
1117
1118 case S390_INSN_COND_MOVE:
1119 insn->variant.cond_move.dst = lookupHRegRemap(m, insn->variant.cond_move.dst);
1120 s390_opnd_RMI_map_regs(m, &insn->variant.cond_move.src);
1121 break;
1122
1123 case S390_INSN_LOAD_IMMEDIATE:
1124 insn->variant.load_immediate.dst =
1125 lookupHRegRemap(m, insn->variant.load_immediate.dst);
1126 break;
1127
1128 case S390_INSN_ALU:
1129 insn->variant.alu.dst = lookupHRegRemap(m, insn->variant.alu.dst);
1130 s390_opnd_RMI_map_regs(m, &insn->variant.alu.op2);
1131 break;
1132
1133 case S390_INSN_SMUL:
1134 case S390_INSN_UMUL:
1135 insn->variant.mul.dst_hi = lookupHRegRemap(m, insn->variant.mul.dst_hi);
1136 insn->variant.mul.dst_lo = lookupHRegRemap(m, insn->variant.mul.dst_lo);
1137 s390_opnd_RMI_map_regs(m, &insn->variant.mul.op2);
1138 break;
1139
1140 case S390_INSN_SDIV:
1141 case S390_INSN_UDIV:
1142 insn->variant.div.op1_hi = lookupHRegRemap(m, insn->variant.div.op1_hi);
1143 insn->variant.div.op1_lo = lookupHRegRemap(m, insn->variant.div.op1_lo);
1144 s390_opnd_RMI_map_regs(m, &insn->variant.div.op2);
1145 break;
1146
1147 case S390_INSN_DIVS:
1148 insn->variant.divs.op1 = lookupHRegRemap(m, insn->variant.divs.op1);
1149 insn->variant.divs.rem = lookupHRegRemap(m, insn->variant.divs.rem);
1150 s390_opnd_RMI_map_regs(m, &insn->variant.divs.op2);
1151 break;
1152
1153 case S390_INSN_CLZ:
1154 insn->variant.clz.num_bits = lookupHRegRemap(m, insn->variant.clz.num_bits);
1155 insn->variant.clz.clobber = lookupHRegRemap(m, insn->variant.clz.clobber);
1156 s390_opnd_RMI_map_regs(m, &insn->variant.clz.src);
1157 break;
1158
1159 case S390_INSN_UNOP:
1160 insn->variant.unop.dst = lookupHRegRemap(m, insn->variant.unop.dst);
1161 s390_opnd_RMI_map_regs(m, &insn->variant.unop.src);
1162 break;
1163
1164 case S390_INSN_TEST:
1165 s390_opnd_RMI_map_regs(m, &insn->variant.test.src);
1166 break;
1167
1168 case S390_INSN_CC2BOOL:
1169 insn->variant.cc2bool.dst = lookupHRegRemap(m, insn->variant.cc2bool.dst);
1170 break;
1171
1172 case S390_INSN_CAS:
1173 insn->variant.cas.op1 = lookupHRegRemap(m, insn->variant.cas.op1);
1174 s390_amode_map_regs(m, insn->variant.cas.op2);
1175 insn->variant.cas.op3 = lookupHRegRemap(m, insn->variant.cas.op3);
1176 insn->variant.cas.old_mem = lookupHRegRemap(m, insn->variant.cas.old_mem);
1177 break;
1178
1179 case S390_INSN_CDAS: {
1180 s390_cdas *cdas = insn->variant.cdas.details;
1181
1182 cdas->op1_high = lookupHRegRemap(m, cdas->op1_high);
1183 cdas->op1_low = lookupHRegRemap(m, cdas->op1_low);
1184 s390_amode_map_regs(m, cdas->op2);
1185 cdas->op3_high = lookupHRegRemap(m, cdas->op3_high);
1186 cdas->op3_low = lookupHRegRemap(m, cdas->op3_low);
1187 cdas->old_mem_high = lookupHRegRemap(m, cdas->old_mem_high);
1188 cdas->old_mem_low = lookupHRegRemap(m, cdas->old_mem_low);
1189 cdas->scratch = lookupHRegRemap(m, cdas->scratch);
1190 break;
1191 }
1192
1193 case S390_INSN_COMPARE:
1194 insn->variant.compare.src1 = lookupHRegRemap(m, insn->variant.compare.src1);
1195 s390_opnd_RMI_map_regs(m, &insn->variant.compare.src2);
1196 break;
1197
1198 case S390_INSN_HELPER_CALL:
1199 /* s390_insn_helper_call_emit also reads / writes the link register
1200 and stack pointer. But those registers are not visible to the
1201 register allocator. So we don't need to do anything for them.
1202 As for the arguments of the helper call -- they will be loaded into
1203 non-virtual registers. Again, we don't need to do anything for those
1204 here. */
1205 break;
1206
1207 case S390_INSN_BFP_TRIOP:
1208 insn->variant.bfp_triop.dst =
1209 lookupHRegRemap(m, insn->variant.bfp_triop.dst);
1210 insn->variant.bfp_triop.op2 =
1211 lookupHRegRemap(m, insn->variant.bfp_triop.op2);
1212 insn->variant.bfp_triop.op3 =
1213 lookupHRegRemap(m, insn->variant.bfp_triop.op3);
1214 break;
1215
1216 case S390_INSN_BFP_BINOP:
1217 insn->variant.bfp_binop.dst_hi =
1218 lookupHRegRemap(m, insn->variant.bfp_binop.dst_hi);
1219 insn->variant.bfp_binop.op2_hi =
1220 lookupHRegRemap(m, insn->variant.bfp_binop.op2_hi);
1221 if (insn->size == 16) {
1222 insn->variant.bfp_binop.dst_lo =
1223 lookupHRegRemap(m, insn->variant.bfp_binop.dst_lo);
1224 insn->variant.bfp_binop.op2_lo =
1225 lookupHRegRemap(m, insn->variant.bfp_binop.op2_lo);
1226 }
1227 break;
1228
1229 case S390_INSN_BFP_UNOP:
1230 insn->variant.bfp_unop.dst_hi =
1231 lookupHRegRemap(m, insn->variant.bfp_unop.dst_hi);
1232 insn->variant.bfp_unop.op_hi =
1233 lookupHRegRemap(m, insn->variant.bfp_unop.op_hi);
1234 if (insn->size == 16) {
1235 insn->variant.bfp_unop.dst_lo =
1236 lookupHRegRemap(m, insn->variant.bfp_unop.dst_lo);
1237 insn->variant.bfp_unop.op_lo =
1238 lookupHRegRemap(m, insn->variant.bfp_unop.op_lo);
1239 }
1240 break;
1241
1242 case S390_INSN_BFP_COMPARE:
1243 insn->variant.bfp_compare.dst =
1244 lookupHRegRemap(m, insn->variant.bfp_compare.dst);
1245 insn->variant.bfp_compare.op1_hi =
1246 lookupHRegRemap(m, insn->variant.bfp_compare.op1_hi);
1247 insn->variant.bfp_compare.op2_hi =
1248 lookupHRegRemap(m, insn->variant.bfp_compare.op2_hi);
1249 if (insn->size == 16) {
1250 insn->variant.bfp_compare.op1_lo =
1251 lookupHRegRemap(m, insn->variant.bfp_compare.op1_lo);
1252 insn->variant.bfp_compare.op2_lo =
1253 lookupHRegRemap(m, insn->variant.bfp_compare.op2_lo);
1254 }
1255 break;
1256
1257 case S390_INSN_BFP_CONVERT:
1258 insn->variant.bfp_convert.dst_hi =
1259 lookupHRegRemap(m, insn->variant.bfp_convert.dst_hi);
1260 if (! hregIsInvalid(insn->variant.bfp_convert.dst_lo))
1261 insn->variant.bfp_convert.dst_lo =
1262 lookupHRegRemap(m, insn->variant.bfp_convert.dst_lo);
1263 insn->variant.bfp_convert.op_hi =
1264 lookupHRegRemap(m, insn->variant.bfp_convert.op_hi);
1265 if (! hregIsInvalid(insn->variant.bfp_convert.op_lo))
1266 insn->variant.bfp_convert.op_lo =
1267 lookupHRegRemap(m, insn->variant.bfp_convert.op_lo);
1268 break;
1269
1270 case S390_INSN_DFP_BINOP: {
1271 s390_dfp_binop *dfp_binop = insn->variant.dfp_binop.details;
1272
1273 dfp_binop->dst_hi = lookupHRegRemap(m, dfp_binop->dst_hi);
1274 dfp_binop->op2_hi = lookupHRegRemap(m, dfp_binop->op2_hi);
1275 dfp_binop->op3_hi = lookupHRegRemap(m, dfp_binop->op3_hi);
1276 if (insn->size == 16) {
1277 dfp_binop->dst_lo = lookupHRegRemap(m, dfp_binop->dst_lo);
1278 dfp_binop->op2_lo = lookupHRegRemap(m, dfp_binop->op2_lo);
1279 dfp_binop->op3_lo = lookupHRegRemap(m, dfp_binop->op3_lo);
1280 }
1281 break;
1282 }
1283
1284 case S390_INSN_DFP_UNOP:
1285 insn->variant.dfp_unop.dst_hi =
1286 lookupHRegRemap(m, insn->variant.dfp_unop.dst_hi);
1287 insn->variant.dfp_unop.op_hi =
1288 lookupHRegRemap(m, insn->variant.dfp_unop.op_hi);
1289 if (insn->size == 16) {
1290 insn->variant.dfp_unop.dst_lo =
1291 lookupHRegRemap(m, insn->variant.dfp_unop.dst_lo);
1292 insn->variant.dfp_unop.op_lo =
1293 lookupHRegRemap(m, insn->variant.dfp_unop.op_lo);
1294 }
1295 break;
1296
1297 case S390_INSN_DFP_INTOP:
1298 insn->variant.dfp_intop.dst_hi =
1299 lookupHRegRemap(m, insn->variant.dfp_intop.dst_hi);
1300 insn->variant.dfp_intop.op2 =
1301 lookupHRegRemap(m, insn->variant.dfp_intop.op2);
1302 insn->variant.dfp_intop.op3_hi =
1303 lookupHRegRemap(m, insn->variant.dfp_intop.op3_hi);
1304 if (insn->size == 16) {
1305 insn->variant.dfp_intop.dst_lo =
1306 lookupHRegRemap(m, insn->variant.dfp_intop.dst_lo);
1307 insn->variant.dfp_intop.op3_lo =
1308 lookupHRegRemap(m, insn->variant.dfp_intop.op3_lo);
1309 }
1310 break;
1311
1312 case S390_INSN_DFP_COMPARE:
1313 insn->variant.dfp_compare.dst =
1314 lookupHRegRemap(m, insn->variant.dfp_compare.dst);
1315 insn->variant.dfp_compare.op1_hi =
1316 lookupHRegRemap(m, insn->variant.dfp_compare.op1_hi);
1317 insn->variant.dfp_compare.op2_hi =
1318 lookupHRegRemap(m, insn->variant.dfp_compare.op2_hi);
1319 if (insn->size == 16) {
1320 insn->variant.dfp_compare.op1_lo =
1321 lookupHRegRemap(m, insn->variant.dfp_compare.op1_lo);
1322 insn->variant.dfp_compare.op2_lo =
1323 lookupHRegRemap(m, insn->variant.dfp_compare.op2_lo);
1324 }
1325 break;
1326
1327 case S390_INSN_DFP_CONVERT:
1328 insn->variant.dfp_convert.dst_hi =
1329 lookupHRegRemap(m, insn->variant.dfp_convert.dst_hi);
1330 if (! hregIsInvalid(insn->variant.dfp_convert.dst_lo))
1331 insn->variant.dfp_convert.dst_lo =
1332 lookupHRegRemap(m, insn->variant.dfp_convert.dst_lo);
1333 insn->variant.dfp_convert.op_hi =
1334 lookupHRegRemap(m, insn->variant.dfp_convert.op_hi);
1335 if (! hregIsInvalid(insn->variant.dfp_convert.op_lo))
1336 insn->variant.dfp_convert.op_lo =
1337 lookupHRegRemap(m, insn->variant.dfp_convert.op_lo);
1338 break;
1339
1340 case S390_INSN_DFP_REROUND:
1341 insn->variant.dfp_reround.dst_hi =
1342 lookupHRegRemap(m, insn->variant.dfp_reround.dst_hi);
1343 insn->variant.dfp_reround.op2 =
1344 lookupHRegRemap(m, insn->variant.dfp_reround.op2);
1345 insn->variant.dfp_reround.op3_hi =
1346 lookupHRegRemap(m, insn->variant.dfp_reround.op3_hi);
1347 if (insn->size == 16) {
1348 insn->variant.dfp_reround.dst_lo =
1349 lookupHRegRemap(m, insn->variant.dfp_reround.dst_lo);
1350 insn->variant.dfp_reround.op3_lo =
1351 lookupHRegRemap(m, insn->variant.dfp_reround.op3_lo);
1352 }
1353 break;
1354
1355 case S390_INSN_FP_CONVERT: {
1356 s390_fp_convert *fp_convert = insn->variant.fp_convert.details;
1357
1358 fp_convert->dst_hi = lookupHRegRemap(m, fp_convert->dst_hi);
1359 if (! hregIsInvalid(fp_convert->dst_lo))
1360 fp_convert->dst_lo = lookupHRegRemap(m, fp_convert->dst_lo);
1361 fp_convert->op_hi = lookupHRegRemap(m, fp_convert->op_hi);
1362 if (! hregIsInvalid(fp_convert->op_lo))
1363 fp_convert->op_lo = lookupHRegRemap(m, fp_convert->op_lo);
1364 fp_convert->r1 = lookupHRegRemap(m, fp_convert->r1);
1365 break;
1366 }
1367
1368 case S390_INSN_MIMM:
1369 s390_amode_map_regs(m, insn->variant.mimm.dst);
1370 break;
1371
1372 case S390_INSN_MADD:
1373 s390_amode_map_regs(m, insn->variant.madd.dst);
1374 break;
1375
1376 case S390_INSN_MFENCE:
1377 break;
1378
1379 case S390_INSN_SET_FPC_BFPRM:
1380 insn->variant.set_fpc_bfprm.mode =
1381 lookupHRegRemap(m, insn->variant.set_fpc_bfprm.mode);
1382 break;
1383
1384 case S390_INSN_SET_FPC_DFPRM:
1385 insn->variant.set_fpc_dfprm.mode =
1386 lookupHRegRemap(m, insn->variant.set_fpc_dfprm.mode);
1387 break;
1388
1389 case S390_INSN_EVCHECK:
1390 s390_amode_map_regs(m, insn->variant.evcheck.counter);
1391 s390_amode_map_regs(m, insn->variant.evcheck.fail_addr);
1392 break;
1393
1394 case S390_INSN_PROFINC:
1395 /* Does not use any register visible to the register allocator */
1396 break;
1397
1398 case S390_INSN_XDIRECT:
1399 s390_amode_map_regs(m, insn->variant.xdirect.guest_IA);
1400 break;
1401
1402 case S390_INSN_XINDIR:
1403 s390_amode_map_regs(m, insn->variant.xindir.guest_IA);
1404 insn->variant.xindir.dst =
1405 lookupHRegRemap(m, insn->variant.xindir.dst);
1406 break;
1407
1408 case S390_INSN_XASSISTED:
1409 s390_amode_map_regs(m, insn->variant.xassisted.guest_IA);
1410 insn->variant.xassisted.dst =
1411 lookupHRegRemap(m, insn->variant.xassisted.dst);
1412 break;
1413
1414 case S390_INSN_VEC_AMODEOP:
1415 insn->variant.vec_amodeop.dst =
1416 lookupHRegRemap(m, insn->variant.vec_amodeop.dst);
1417 insn->variant.vec_amodeop.op1 =
1418 lookupHRegRemap(m, insn->variant.vec_amodeop.op1);
1419 s390_amode_map_regs(m, insn->variant.vec_amodeop.op2);
1420 break;
1421
1422 case S390_INSN_VEC_AMODEINTOP:
1423 insn->variant.vec_amodeintop.dst =
1424 lookupHRegRemap(m, insn->variant.vec_amodeintop.dst);
1425 s390_amode_map_regs(m, insn->variant.vec_amodeintop.op2);
1426 insn->variant.vec_amodeintop.op3 =
1427 lookupHRegRemap(m, insn->variant.vec_amodeintop.op3);
1428 break;
1429
1430 case S390_INSN_VEC_BINOP:
1431 insn->variant.vec_binop.dst =
1432 lookupHRegRemap(m, insn->variant.vec_binop.dst);
1433 insn->variant.vec_binop.op1 =
1434 lookupHRegRemap(m, insn->variant.vec_binop.op1);
1435 insn->variant.vec_binop.op2 =
1436 lookupHRegRemap(m, insn->variant.vec_binop.op2);
1437 break;
1438
1439 case S390_INSN_VEC_TRIOP:
1440 insn->variant.vec_triop.dst =
1441 lookupHRegRemap(m, insn->variant.vec_triop.dst);
1442 insn->variant.vec_triop.op1 =
1443 lookupHRegRemap(m, insn->variant.vec_triop.op1);
1444 insn->variant.vec_triop.op2 =
1445 lookupHRegRemap(m, insn->variant.vec_triop.op2);
1446 insn->variant.vec_triop.op3 =
1447 lookupHRegRemap(m, insn->variant.vec_triop.op3);
1448 break;
1449
1450 case S390_INSN_VEC_REPLICATE:
1451 insn->variant.vec_replicate.dst =
1452 lookupHRegRemap(m, insn->variant.vec_replicate.dst);
1453 insn->variant.vec_replicate.op1 =
1454 lookupHRegRemap(m, insn->variant.vec_replicate.op1);
1455 break;
1456
1457 default:
1458 vpanic("s390_insn_map_regs");
1459 }
1460 }
1461
1462
1463 /*------------------------------------------------------------*/
1464 /*--- Functions to emit a sequence of bytes ---*/
1465 /*------------------------------------------------------------*/
1466
1467 static __inline__ UChar *
1468 emit_2bytes(UChar *p, ULong val)
1469 {
1470 return (UChar *)__builtin_memcpy(p, ((UChar *)&val) + 6, 2) + 2;
1471 }
1472
1473
1474 static __inline__ UChar *
1475 emit_4bytes(UChar *p, ULong val)
1476 {
1477 return (UChar *)__builtin_memcpy(p, ((UChar *)&val) + 4, 4) + 4;
1478 }
1479
1480
1481 static __inline__ UChar *
1482 emit_6bytes(UChar *p, ULong val)
1483 {
1484 return (UChar *)__builtin_memcpy(p, ((UChar *)&val) + 2, 6) + 6;
1485 }
1486
1487
1488 /*------------------------------------------------------------*/
1489 /*--- Functions to emit various instruction formats ---*/
1490 /*------------------------------------------------------------*/
1491
1492 static UChar *
1493 emit_RI(UChar *p, UInt op, UChar r1, UShort i2)
1494 {
1495 ULong the_insn = op;
1496
1497 the_insn |= ((ULong)r1) << 20;
1498 the_insn |= ((ULong)i2) << 0;
1499
1500 return emit_4bytes(p, the_insn);
1501 }
1502
1503
1504 static UChar *
1505 emit_RIL(UChar *p, ULong op, UChar r1, UInt i2)
1506 {
1507 ULong the_insn = op;
1508
1509 the_insn |= ((ULong)r1) << 36;
1510 the_insn |= ((ULong)i2) << 0;
1511
1512 return emit_6bytes(p, the_insn);
1513 }
1514
1515
1516 static UChar *
1517 emit_RIE(UChar *p, ULong op, UChar r1, UShort i2, UChar m3)
1518 {
1519 ULong the_insn = op;
1520
1521 the_insn |= ((ULong)r1) << 36;
1522 the_insn |= ((ULong)m3) << 32;
1523 the_insn |= ((ULong)i2) << 16;
1524
1525 return emit_6bytes(p, the_insn);
1526 }
1527
1528
1529 static UChar *
1530 emit_RIEf(UChar *p, ULong op, UChar r1, UChar r2,
1531 UChar i3, Char i4, UChar i5)
1532 {
1533 ULong the_insn = op;
1534
1535 the_insn |= ((ULong)r1) << 36;
1536 the_insn |= ((ULong)r2) << 32;
1537 the_insn |= ((ULong)i3) << 24;
1538 the_insn |= ((ULong)i4) << 16;
1539 the_insn |= ((ULong)i5) << 8;
1540
1541 return emit_6bytes(p, the_insn);
1542 }
1543
1544
1545 static UChar *
1546 emit_RR(UChar *p, UInt op, UChar r1, UChar r2)
1547 {
1548 ULong the_insn = op;
1549
1550 the_insn |= ((ULong)r1) << 4;
1551 the_insn |= ((ULong)r2) << 0;
1552
1553 return emit_2bytes(p, the_insn);
1554 }
1555
1556
1557 static UChar *
1558 emit_RRE(UChar *p, UInt op, UChar r1, UChar r2)
1559 {
1560 ULong the_insn = op;
1561
1562 the_insn |= ((ULong)r1) << 4;
1563 the_insn |= ((ULong)r2) << 0;
1564
1565 return emit_4bytes(p, the_insn);
1566 }
1567
1568
1569 static UChar *
1570 emit_RRF(UChar *p, UInt op, UChar r1, UChar r3, UChar r2)
1571 {
1572 ULong the_insn = op;
1573
1574 the_insn |= ((ULong)r1) << 12;
1575 the_insn |= ((ULong)r3) << 4;
1576 the_insn |= ((ULong)r2) << 0;
1577
1578 return emit_4bytes(p, the_insn);
1579 }
1580
1581
1582 static UChar *
1583 emit_RRF2(UChar *p, UInt op, UChar m3, UChar m4, UChar r1, UChar r2)
1584 {
1585 ULong the_insn = op;
1586
1587 the_insn |= ((ULong)m3) << 12;
1588 the_insn |= ((ULong)m4) << 8;
1589 the_insn |= ((ULong)r1) << 4;
1590 the_insn |= ((ULong)r2) << 0;
1591
1592 return emit_4bytes(p, the_insn);
1593 }
1594
1595
1596 static UChar *
1597 emit_RRF3(UChar *p, UInt op, UChar r3, UChar r1, UChar r2)
1598 {
1599 ULong the_insn = op;
1600
1601 the_insn |= ((ULong)r3) << 12;
1602 the_insn |= ((ULong)r1) << 4;
1603 the_insn |= ((ULong)r2) << 0;
1604
1605 return emit_4bytes(p, the_insn);
1606 }
1607
1608
1609 static UChar *
1610 emit_RRF4(UChar *p, UInt op, UChar r3, UChar m4, UChar r1, UChar r2)
1611 {
1612 ULong the_insn = op;
1613
1614 the_insn |= ((ULong)r3) << 12;
1615 the_insn |= ((ULong)m4) << 8;
1616 the_insn |= ((ULong)r1) << 4;
1617 the_insn |= ((ULong)r2) << 0;
1618
1619 return emit_4bytes(p, the_insn);
1620 }
1621
1622
1623 static UChar *
1624 emit_RRF5(UChar *p, UInt op, UChar m4, UChar r1, UChar r2)
1625 {
1626 ULong the_insn = op;
1627
1628 the_insn |= ((ULong)m4) << 8;
1629 the_insn |= ((ULong)r1) << 4;
1630 the_insn |= ((ULong)r2) << 0;
1631
1632 return emit_4bytes(p, the_insn);
1633 }
1634
1635
1636 static UChar *
1637 emit_RS(UChar *p, UInt op, UChar r1, UChar r3, UChar b2, UShort d2)
1638 {
1639 ULong the_insn = op;
1640
1641 the_insn |= ((ULong)r1) << 20;
1642 the_insn |= ((ULong)r3) << 16;
1643 the_insn |= ((ULong)b2) << 12;
1644 the_insn |= ((ULong)d2) << 0;
1645
1646 return emit_4bytes(p, the_insn);
1647 }
1648
1649
1650 static UChar *
1651 emit_RSY(UChar *p, ULong op, UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
1652 {
1653 ULong the_insn = op;
1654
1655 the_insn |= ((ULong)r1) << 36;
1656 the_insn |= ((ULong)r3) << 32;
1657 the_insn |= ((ULong)b2) << 28;
1658 the_insn |= ((ULong)dl2) << 16;
1659 the_insn |= ((ULong)dh2) << 8;
1660
1661 return emit_6bytes(p, the_insn);
1662 }
1663
1664
1665 static UChar *
1666 emit_RX(UChar *p, UInt op, UChar r1, UChar x2, UChar b2, UShort d2)
1667 {
1668 ULong the_insn = op;
1669
1670 the_insn |= ((ULong)r1) << 20;
1671 the_insn |= ((ULong)x2) << 16;
1672 the_insn |= ((ULong)b2) << 12;
1673 the_insn |= ((ULong)d2) << 0;
1674
1675 return emit_4bytes(p, the_insn);
1676 }
1677
1678
1679 static UChar *
1680 emit_RXF(UChar *p, ULong op, UChar r3, UChar x2, UChar b2, UShort d2, UChar r1)
1681 {
1682 ULong the_insn = op;
1683
1684 the_insn |= ((ULong)r3) << 36;
1685 the_insn |= ((ULong)x2) << 32;
1686 the_insn |= ((ULong)b2) << 28;
1687 the_insn |= ((ULong)d2) << 16;
1688 the_insn |= ((ULong)r1) << 12;
1689
1690 return emit_6bytes(p, the_insn);
1691 }
1692
1693
1694 static UChar *
1695 emit_RXY(UChar *p, ULong op, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
1696 {
1697 ULong the_insn = op;
1698
1699 the_insn |= ((ULong)r1) << 36;
1700 the_insn |= ((ULong)x2) << 32;
1701 the_insn |= ((ULong)b2) << 28;
1702 the_insn |= ((ULong)dl2) << 16;
1703 the_insn |= ((ULong)dh2) << 8;
1704
1705 return emit_6bytes(p, the_insn);
1706 }
1707
1708
1709 static UChar *
1710 emit_SI(UChar *p, UInt op, UChar i2, UChar b1, UShort d1)
1711 {
1712 ULong the_insn = op;
1713
1714 the_insn |= ((ULong)i2) << 16;
1715 the_insn |= ((ULong)b1) << 12;
1716 the_insn |= ((ULong)d1) << 0;
1717
1718 return emit_4bytes(p, the_insn);
1719 }
1720
1721
1722 static UChar *
1723 emit_SIL(UChar *p, ULong op, UChar b1, UShort d1, UShort i2)
1724 {
1725 ULong the_insn = op;
1726
1727 the_insn |= ((ULong)b1) << 28;
1728 the_insn |= ((ULong)d1) << 16;
1729 the_insn |= ((ULong)i2) << 0;
1730
1731 return emit_6bytes(p, the_insn);
1732 }
1733
1734
1735 static UChar *
1736 emit_SIY(UChar *p, ULong op, UChar i2, UChar b1, UShort dl1, UChar dh1)
1737 {
1738 ULong the_insn = op;
1739
1740 the_insn |= ((ULong)i2) << 32;
1741 the_insn |= ((ULong)b1) << 28;
1742 the_insn |= ((ULong)dl1) << 16;
1743 the_insn |= ((ULong)dh1) << 8;
1744
1745 return emit_6bytes(p, the_insn);
1746 }
1747
1748
1749 static UChar *
1750 emit_SSa(UChar *p, ULong op, UChar l, UChar b1, UShort d1, UChar b2, UShort d2)
1751 {
1752 ULong the_insn = op;
1753
1754 the_insn |= ((ULong)l) << 32;
1755 the_insn |= ((ULong)b1) << 28;
1756 the_insn |= ((ULong)d1) << 16;
1757 the_insn |= ((ULong)b2) << 12;
1758 the_insn |= ((ULong)d2) << 0;
1759
1760 return emit_6bytes(p, the_insn);
1761 }
1762
1763
1764 static UChar *
1765 emit_VRI_VI(UChar *p, ULong op, UChar v1, UShort i2)
1766 {
1767 ULong the_insn = op;
1768 ULong rxb = s390_update_rxb(0, 1, &v1);
1769
1770 the_insn |= ((ULong)v1) << 36;
1771 the_insn |= ((ULong)i2) << 16;
1772 the_insn |= ((ULong)rxb)<< 8;
1773
1774 return emit_6bytes(p, the_insn);
1775 }
1776
1777
1778 static UChar *
1779 emit_VRI_VIM(UChar *p, ULong op, UChar v1, UShort i2, UChar m3)
1780 {
1781 ULong the_insn = op;
1782 ULong rxb = s390_update_rxb(0, 1, &v1);
1783
1784 the_insn |= ((ULong)v1) << 36;
1785 the_insn |= ((ULong)i2) << 16;
1786 the_insn |= ((ULong)m3) << 12;
1787 the_insn |= ((ULong)rxb)<< 8;
1788
1789 return emit_6bytes(p, the_insn);
1790 }
1791
1792
1793 static UChar *
1794 emit_VRI_VVMM(UChar *p, ULong op, UChar v1, UChar v3, UShort i2, UChar m4)
1795 {
1796 ULong the_insn = op;
1797 ULong rxb = s390_update_rxb(0, 1, &v1);
1798 rxb = s390_update_rxb(rxb, 2, &v3);
1799
1800 the_insn |= ((ULong)v1) << 36;
1801 the_insn |= ((ULong)v3) << 32;
1802 the_insn |= ((ULong)i2) << 16;
1803 the_insn |= ((ULong)m4) << 12;
1804 the_insn |= ((ULong)rxb) << 8;
1805
1806 return emit_6bytes(p, the_insn);
1807 }
1808
1809
1810 static UChar *
1811 emit_VRX(UChar *p, ULong op, UChar v1, UChar x2, UChar b2, UShort d2, UChar m3)
1812 {
1813 ULong the_insn = op;
1814 ULong rxb = s390_update_rxb(0, 1, &v1);
1815
1816 the_insn |= ((ULong)v1) << 36;
1817 the_insn |= ((ULong)x2) << 32;
1818 the_insn |= ((ULong)b2) << 28;
1819 the_insn |= ((ULong)d2) << 16;
1820 the_insn |= ((ULong)m3) << 12;
1821 the_insn |= ((ULong)rxb)<< 8;
1822
1823 return emit_6bytes(p, the_insn);
1824 }
1825
1826
1827 static UChar *
1828 emit_VRS(UChar *p, ULong op, UChar reg1, UChar b2, UShort d2, UChar reg3, UChar m4)
1829 {
1830 ULong the_insn = op;
1831 ULong rxb = s390_update_rxb(0, 1, &reg1);
1832 rxb = s390_update_rxb(rxb, 2, &reg3);
1833
1834 the_insn |= ((ULong)reg1) << 36;
1835 the_insn |= ((ULong)reg3) << 32;
1836 the_insn |= ((ULong)b2) << 28;
1837 the_insn |= ((ULong)d2) << 16;
1838 the_insn |= ((ULong)m4) << 12;
1839 the_insn |= ((ULong)rxb) << 8;
1840
1841 return emit_6bytes(p, the_insn);
1842 }
1843
1844
1845 static UChar *
1846 emit_VRR_VVM(UChar *p, ULong op, UChar v1, UChar v2, UChar m4)
1847 {
1848 ULong the_insn = op;
1849 ULong rxb = s390_update_rxb(0, 1, &v1);
1850 rxb = s390_update_rxb(rxb, 2, &v2);
1851
1852 the_insn |= ((ULong)v1) << 36;
1853 the_insn |= ((ULong)v2) << 32;
1854 the_insn |= ((ULong)m4) << 12;
1855 the_insn |= ((ULong)rxb)<< 8;
1856
1857 return emit_6bytes(p, the_insn);
1858 }
1859
1860 static UChar *
1861 emit_VRR_VVMMM(UChar *p, ULong op, UChar v1, UChar v2, UChar m3, UChar m4,
1862 UChar m5)
1863 {
1864 ULong the_insn = op;
1865 ULong rxb = s390_update_rxb(0, 1, &v1);
1866 rxb = s390_update_rxb(rxb, 2, &v2);
1867
1868 the_insn |= ((ULong)v1) << 36;
1869 the_insn |= ((ULong)v2) << 32;
1870 the_insn |= ((ULong)m5) << 20;
1871 the_insn |= ((ULong)m4) << 16;
1872 the_insn |= ((ULong)m3) << 12;
1873 the_insn |= ((ULong)rxb) << 8;
1874
1875 return emit_6bytes(p, the_insn);
1876 }
1877
1878 static UChar *
1879 emit_VRR_VVVM(UChar *p, ULong op, UChar v1, UChar v2, UChar v3, UChar m4)
1880 {
1881 ULong the_insn = op;
1882 ULong rxb = s390_update_rxb(0, 1, &v1);
1883 rxb = s390_update_rxb(rxb, 2, &v2);
1884 rxb = s390_update_rxb(rxb, 3, &v3);
1885
1886 the_insn |= ((ULong)v1) << 36;
1887 the_insn |= ((ULong)v2) << 32;
1888 the_insn |= ((ULong)v3) << 28;
1889 the_insn |= ((ULong)m4) << 12;
1890 the_insn |= ((ULong)rxb)<< 8;
1891
1892 return emit_6bytes(p, the_insn);
1893 }
1894
1895
1896 static UChar *
1897 emit_VRR_VVV(UChar *p, ULong op, UChar v1, UChar v2, UChar v3)
1898 {
1899 return emit_VRR_VVVM(p, op, v1, v2, v3, 0);
1900 }
1901
1902
1903 static UChar *
1904 emit_VRR_VV(UChar *p, ULong op, UChar v1, UChar v2)
1905 {
1906 return emit_VRR_VVM(p, op, v1, v2, 0);
1907 }
1908
1909
1910 static UChar *
1911 emit_VRR_VVVV(UChar *p, ULong op, UChar v1, UChar v2, UChar v3, UChar v4)
1912 {
1913 ULong the_insn = op;
1914 ULong rxb = s390_update_rxb(0, 1, &v1);
1915 rxb = s390_update_rxb(rxb, 2, &v2);
1916 rxb = s390_update_rxb(rxb, 3, &v3);
1917 rxb = s390_update_rxb(rxb, 4, &v4);
1918
1919 the_insn |= ((ULong)v1) << 36;
1920 the_insn |= ((ULong)v2) << 32;
1921 the_insn |= ((ULong)v3) << 28;
1922 the_insn |= ((ULong)v4) << 12;
1923 the_insn |= ((ULong)rxb)<< 8;
1924
1925 return emit_6bytes(p, the_insn);
1926 }
1927
1928 static UChar *
1929 emit_VRRe_VVVVMM(UChar *p, ULong op, UChar v1, UChar v2, UChar v3, UChar v4,
1930 UChar m5, UChar m6)
1931 {
1932 ULong the_insn = op;
1933 ULong rxb = s390_update_rxb(0, 1, &v1);
1934 rxb = s390_update_rxb(rxb, 2, &v2);
1935 rxb = s390_update_rxb(rxb, 3, &v3);
1936 rxb = s390_update_rxb(rxb, 4, &v4);
1937
1938 the_insn |= ((ULong)v1) << 36;
1939 the_insn |= ((ULong)v2) << 32;
1940 the_insn |= ((ULong)v3) << 28;
1941 the_insn |= ((ULong)m6) << 24;
1942 the_insn |= ((ULong)m5) << 16;
1943 the_insn |= ((ULong)v4) << 12;
1944 the_insn |= ((ULong)rxb) << 8;
1945
1946 return emit_6bytes(p, the_insn);
1947 }
1948
1949 static UChar *
1950 emit_VRR_VRR(UChar *p, ULong op, UChar v1, UChar r2, UChar r3)
1951 {
1952 ULong the_insn = op;
1953 ULong rxb = s390_update_rxb(0, 1, &v1);
1954
1955 the_insn |= ((ULong)v1) << 36;
1956 the_insn |= ((ULong)r2) << 32;
1957 the_insn |= ((ULong)r3) << 28;
1958 the_insn |= ((ULong)rxb)<< 8;
1959
1960 return emit_6bytes(p, the_insn);
1961 }
1962
1963 static UChar *
1964 emit_VRR_VVVMMM(UChar *p, ULong op, UChar v1, UChar v2, UChar v3, UChar m4,
1965 UChar m5, UChar m6)
1966 {
1967 ULong the_insn = op;
1968 ULong rxb = s390_update_rxb(0, 1, &v1);
1969 rxb = s390_update_rxb(rxb, 2, &v2);
1970 rxb = s390_update_rxb(rxb, 3, &v3);
1971
1972 the_insn |= ((ULong)v1) << 36;
1973 the_insn |= ((ULong)v2) << 32;
1974 the_insn |= ((ULong)v3) << 28;
1975 the_insn |= ((ULong)m6) << 20;
1976 the_insn |= ((ULong)m5) << 16;
1977 the_insn |= ((ULong)m4) << 12;
1978 the_insn |= ((ULong)rxb) << 8;
1979
1980 return emit_6bytes(p, the_insn);
1981 }
1982
1983 static UChar*
1984 emit_VRR_VVVMM(UChar *p, ULong op, UChar v1, UChar v2, UChar v3, UChar m4,
1985 UChar m5)
1986 {
1987 return emit_VRR_VVVMMM(p, op, v1, v2, v3, m4, m5, 0);
1988 }
1989
1990 /*------------------------------------------------------------*/
1991 /*--- Functions to emit particular instructions ---*/
1992 /*------------------------------------------------------------*/
1993
1994 static UChar *
1995 s390_emit_AR(UChar *p, UChar r1, UChar r2)
1996 {
1997 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
1998 s390_disasm(ENC3(MNM, GPR, GPR), "ar", r1, r2);
1999
2000 return emit_RR(p, 0x1a00, r1, r2);
2001 }
2002
2003
2004 static UChar *
2005 s390_emit_AGR(UChar *p, UChar r1, UChar r2)
2006 {
2007 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2008 s390_disasm(ENC3(MNM, GPR, GPR), "agr", r1, r2);
2009
2010 return emit_RRE(p, 0xb9080000, r1, r2);
2011 }
2012
2013
2014 static UChar *
2015 s390_emit_A(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
2016 {
2017 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2018 s390_disasm(ENC3(MNM, GPR, UDXB), "a", r1, d2, x2, b2);
2019
2020 return emit_RX(p, 0x5a000000, r1, x2, b2, d2);
2021 }
2022
2023
2024 static UChar *
2025 s390_emit_AY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
2026 {
2027 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2028 s390_disasm(ENC3(MNM, GPR, SDXB), "ay", r1, dh2, dl2, x2, b2);
2029
2030 return emit_RXY(p, 0xe3000000005aULL, r1, x2, b2, dl2, dh2);
2031 }
2032
2033
2034 static UChar *
2035 s390_emit_AG(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
2036 {
2037 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2038 s390_disasm(ENC3(MNM, GPR, SDXB), "ag", r1, dh2, dl2, x2, b2);
2039
2040 return emit_RXY(p, 0xe30000000008ULL, r1, x2, b2, dl2, dh2);
2041 }
2042
2043
2044 static UChar *
2045 s390_emit_AFI(UChar *p, UChar r1, UInt i2)
2046 {
2047 vassert(s390_host_has_eimm);
2048
2049 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2050 s390_disasm(ENC3(MNM, GPR, INT), "afi", r1, i2);
2051
2052 return emit_RIL(p, 0xc20900000000ULL, r1, i2);
2053 }
2054
2055
2056 static UChar *
2057 s390_emit_AGFI(UChar *p, UChar r1, UInt i2)
2058 {
2059 vassert(s390_host_has_eimm);
2060
2061 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2062 s390_disasm(ENC3(MNM, GPR, INT), "agfi", r1, i2);
2063
2064 return emit_RIL(p, 0xc20800000000ULL, r1, i2);
2065 }
2066
2067
2068 static UChar *
2069 s390_emit_AH(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
2070 {
2071 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2072 s390_disasm(ENC3(MNM, GPR, UDXB), "ah", r1, d2, x2, b2);
2073
2074 return emit_RX(p, 0x4a000000, r1, x2, b2, d2);
2075 }
2076
2077
2078 static UChar *
2079 s390_emit_AHY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
2080 {
2081 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2082 s390_disasm(ENC3(MNM, GPR, SDXB), "ahy", r1, dh2, dl2, x2, b2);
2083
2084 return emit_RXY(p, 0xe3000000007aULL, r1, x2, b2, dl2, dh2);
2085 }
2086
2087
2088 static UChar *
2089 s390_emit_AHI(UChar *p, UChar r1, UShort i2)
2090 {
2091 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2092 s390_disasm(ENC3(MNM, GPR, INT), "ahi", r1, (Int)(Short)i2);
2093
2094 return emit_RI(p, 0xa70a0000, r1, i2);
2095 }
2096
2097
2098 static UChar *
2099 s390_emit_AGHI(UChar *p, UChar r1, UShort i2)
2100 {
2101 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2102 s390_disasm(ENC3(MNM, GPR, INT), "aghi", r1, (Int)(Short)i2);
2103
2104 return emit_RI(p, 0xa70b0000, r1, i2);
2105 }
2106
2107
2108 static UChar *
2109 s390_emit_AGSI(UChar *p, UChar i2, UChar b1, UShort dl1, UChar dh1)
2110 {
2111 vassert(s390_host_has_gie);
2112
2113 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2114 s390_disasm(ENC3(MNM, SDXB, INT), "agsi", dh1, dl1, 0, b1, (Int)(Char)i2);
2115
2116 return emit_SIY(p, 0xeb000000007aULL, i2, b1, dl1, dh1);
2117 }
2118
2119
2120 static UChar *
2121 s390_emit_ASI(UChar *p, UChar i2, UChar b1, UShort dl1, UChar dh1)
2122 {
2123 vassert(s390_host_has_gie);
2124
2125 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2126 s390_disasm(ENC3(MNM, SDXB, INT), "asi", dh1, dl1, 0, b1, (Int)(Char)i2);
2127
2128 return emit_SIY(p, 0xeb000000006aULL, i2, b1, dl1, dh1);
2129 }
2130
2131
2132 static UChar *
2133 s390_emit_NR(UChar *p, UChar r1, UChar r2)
2134 {
2135 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2136 s390_disasm(ENC3(MNM, GPR, GPR), "nr", r1, r2);
2137
2138 return emit_RR(p, 0x1400, r1, r2);
2139 }
2140
2141
2142 static UChar *
2143 s390_emit_NGR(UChar *p, UChar r1, UChar r2)
2144 {
2145 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2146 s390_disasm(ENC3(MNM, GPR, GPR), "ngr", r1, r2);
2147
2148 return emit_RRE(p, 0xb9800000, r1, r2);
2149 }
2150
2151
2152 static UChar *
2153 s390_emit_N(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
2154 {
2155 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2156 s390_disasm(ENC3(MNM, GPR, UDXB), "n", r1, d2, x2, b2);
2157
2158 return emit_RX(p, 0x54000000, r1, x2, b2, d2);
2159 }
2160
2161
2162 static UChar *
2163 s390_emit_NY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
2164 {
2165 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2166 s390_disasm(ENC3(MNM, GPR, SDXB), "ny", r1, dh2, dl2, x2, b2);
2167
2168 return emit_RXY(p, 0xe30000000054ULL, r1, x2, b2, dl2, dh2);
2169 }
2170
2171
2172 static UChar *
2173 s390_emit_NG(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
2174 {
2175 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2176 s390_disasm(ENC3(MNM, GPR, SDXB), "ng", r1, dh2, dl2, x2, b2);
2177
2178 return emit_RXY(p, 0xe30000000080ULL, r1, x2, b2, dl2, dh2);
2179 }
2180
2181
2182 static UChar *
2183 s390_emit_NIHF(UChar *p, UChar r1, UInt i2)
2184 {
2185 vassert(s390_host_has_eimm);
2186
2187 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2188 s390_disasm(ENC3(MNM, GPR, UINT), "nihf", r1, i2);
2189
2190 return emit_RIL(p, 0xc00a00000000ULL, r1, i2);
2191 }
2192
2193
2194 static UChar *
2195 s390_emit_NILF(UChar *p, UChar r1, UInt i2)
2196 {
2197 vassert(s390_host_has_eimm);
2198
2199 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2200 s390_disasm(ENC3(MNM, GPR, UINT), "nilf", r1, i2);
2201
2202 return emit_RIL(p, 0xc00b00000000ULL, r1, i2);
2203 }
2204
2205
2206 static UChar *
2207 s390_emit_NILL(UChar *p, UChar r1, UShort i2)
2208 {
2209 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2210 s390_disasm(ENC3(MNM, GPR, UINT), "nill", r1, i2);
2211
2212 return emit_RI(p, 0xa5070000, r1, i2);
2213 }
2214
2215
2216 static UChar *
2217 s390_emit_TM(UChar *p, UChar i2, UChar b1, UShort d1)
2218 {
2219 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2220 s390_disasm(ENC3(MNM, UDXB, INT), "tm", d1, 0, b1, i2);
2221
2222 return emit_SI(p, 0x91000000, i2, b1, d1);
2223 }
2224
2225
2226 static UChar *
2227 s390_emit_TMY(UChar *p, UChar i2, UChar b1, UShort dl1, UChar dh1)
2228 {
2229 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2230 s390_disasm(ENC3(MNM, SDXB, INT), "tmy", dh1, dl1, 0, b1, (Int)(Char)i2);
2231
2232 return emit_SIY(p, 0xeb0000000051ULL, i2, b1, dl1, dh1);
2233 }
2234
2235
2236 static UChar *
2237 s390_emit_TMLL(UChar *p, UChar r1, UShort i2)
2238 {
2239 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2240 s390_disasm(ENC3(MNM, GPR, UINT), "tmll", r1, i2);
2241
2242 return emit_RI(p, 0xa7010000, r1, i2);
2243 }
2244
2245
2246 static UChar *
2247 s390_emit_BASR(UChar *p, UChar r1, UChar r2)
2248 {
2249 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2250 s390_disasm(ENC3(MNM, GPR, GPR), "basr", r1, r2);
2251
2252 return emit_RR(p, 0x0d00, r1, r2);
2253 }
2254
2255
2256 static UChar *
2257 s390_emit_BCR(UChar *p, UChar r1, UChar r2)
2258 {
2259 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2260 s390_disasm(ENC2(XMNM, GPR), S390_XMNM_BCR, r1, r2);
2261
2262 return emit_RR(p, 0x0700, r1, r2);
2263 }
2264
2265
2266 static UChar *
2267 s390_emit_BRC(UChar *p, UChar r1, UShort i2)
2268 {
2269 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2270 s390_disasm(ENC2(XMNM, PCREL), S390_XMNM_BRC, r1, (Int)(Short)i2);
2271
2272 return emit_RI(p, 0xa7040000, r1, i2);
2273 }
2274
2275
2276 static UChar *
2277 s390_emit_BRCL(UChar *p, UChar r1, ULong i2)
2278 {
2279 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2280 s390_disasm(ENC2(XMNM, PCREL), S390_XMNM_BRCL, r1, i2);
2281
2282 return emit_RIL(p, 0xc00400000000ULL, r1, i2);
2283 }
2284
2285
2286 static UChar *
2287 s390_emit_CR(UChar *p, UChar r1, UChar r2)
2288 {
2289 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2290 s390_disasm(ENC3(MNM, GPR, GPR), "cr", r1, r2);
2291
2292 return emit_RR(p, 0x1900, r1, r2);
2293 }
2294
2295
2296 static UChar *
2297 s390_emit_CGR(UChar *p, UChar r1, UChar r2)
2298 {
2299 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2300 s390_disasm(ENC3(MNM, GPR, GPR), "cgr", r1, r2);
2301
2302 return emit_RRE(p, 0xb9200000, r1, r2);
2303 }
2304
2305
2306 static UChar *
2307 s390_emit_C(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
2308 {
2309 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2310 s390_disasm(ENC3(MNM, GPR, UDXB), "c", r1, d2, x2, b2);
2311
2312 return emit_RX(p, 0x59000000, r1, x2, b2, d2);
2313 }
2314
2315
2316 static UChar *
2317 s390_emit_CY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
2318 {
2319 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2320 s390_disasm(ENC3(MNM, GPR, SDXB), "cy", r1, dh2, dl2, x2, b2);
2321
2322 return emit_RXY(p, 0xe30000000059ULL, r1, x2, b2, dl2, dh2);
2323 }
2324
2325
2326 static UChar *
2327 s390_emit_CG(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
2328 {
2329 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2330 s390_disasm(ENC3(MNM, GPR, SDXB), "cg", r1, dh2, dl2, x2, b2);
2331
2332 return emit_RXY(p, 0xe30000000020ULL, r1, x2, b2, dl2, dh2);
2333 }
2334
2335
2336 static UChar *
2337 s390_emit_CFI(UChar *p, UChar r1, UInt i2)
2338 {
2339 vassert(s390_host_has_eimm);
2340
2341 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2342 s390_disasm(ENC3(MNM, GPR, INT), "cfi", r1, i2);
2343
2344 return emit_RIL(p, 0xc20d00000000ULL, r1, i2);
2345 }
2346
2347
2348 static UChar *
2349 s390_emit_CGFI(UChar *p, UChar r1, UInt i2)
2350 {
2351 vassert(s390_host_has_eimm);
2352
2353 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2354 s390_disasm(ENC3(MNM, GPR, INT), "cgfi", r1, i2);
2355
2356 return emit_RIL(p, 0xc20c00000000ULL, r1, i2);
2357 }
2358
2359
2360 static UChar *
2361 s390_emit_CS(UChar *p, UChar r1, UChar r3, UChar b2, UShort d2)
2362 {
2363 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2364 s390_disasm(ENC4(MNM, GPR, GPR, UDXB), "cs", r1, r3, d2, 0, b2);
2365
2366 return emit_RS(p, 0xba000000, r1, r3, b2, d2);
2367 }
2368
2369
2370 static UChar *
2371 s390_emit_CSY(UChar *p, UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
2372 {
2373 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2374 s390_disasm(ENC4(MNM, GPR, GPR, SDXB), "csy", r1, r3, dh2, dl2, 0, b2);
2375
2376 return emit_RSY(p, 0xeb0000000014ULL, r1, r3, b2, dl2, dh2);
2377 }
2378
2379
2380 static UChar *
2381 s390_emit_CSG(UChar *p, UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
2382 {
2383 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2384 s390_disasm(ENC4(MNM, GPR, GPR, SDXB), "csg", r1, r3, dh2, dl2, 0, b2);
2385
2386 return emit_RSY(p, 0xeb0000000030ULL, r1, r3, b2, dl2, dh2);
2387 }
2388
2389
2390 static UChar *
2391 s390_emit_CDS(UChar *p, UChar r1, UChar r3, UChar b2, UShort d2)
2392 {
2393 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2394 s390_disasm(ENC4(MNM, GPR, GPR, UDXB), "cds", r1, r3, d2, 0, b2);
2395
2396 return emit_RS(p, 0xbb000000, r1, r3, b2, d2);
2397 }
2398
2399
2400 static UChar *
2401 s390_emit_CDSY(UChar *p, UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
2402 {
2403 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2404 s390_disasm(ENC4(MNM, GPR, GPR, SDXB), "cdsy", r1, r3, dh2, dl2, 0, b2);
2405
2406 return emit_RSY(p, 0xeb0000000031ULL, r1, r3, b2, dl2, dh2);
2407 }
2408
2409
2410 static UChar *
2411 s390_emit_CDSG(UChar *p, UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
2412 {
2413 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2414 s390_disasm(ENC4(MNM, GPR, GPR, SDXB), "cdsg", r1, r3, dh2, dl2, 0, b2);
2415
2416 return emit_RSY(p, 0xeb000000003eULL, r1, r3, b2, dl2, dh2);
2417 }
2418
2419
2420 static UChar *
2421 s390_emit_CLR(UChar *p, UChar r1, UChar r2)
2422 {
2423 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2424 s390_disasm(ENC3(MNM, GPR, GPR), "clr", r1, r2);
2425
2426 return emit_RR(p, 0x1500, r1, r2);
2427 }
2428
2429
2430 static UChar *
2431 s390_emit_CLGR(UChar *p, UChar r1, UChar r2)
2432 {
2433 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2434 s390_disasm(ENC3(MNM, GPR, GPR), "clgr", r1, r2);
2435
2436 return emit_RRE(p, 0xb9210000, r1, r2);
2437 }
2438
2439
2440 static UChar *
2441 s390_emit_CL(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
2442 {
2443 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2444 s390_disasm(ENC3(MNM, GPR, UDXB), "cl", r1, d2, x2, b2);
2445
2446 return emit_RX(p, 0x55000000, r1, x2, b2, d2);
2447 }
2448
2449
2450 static UChar *
2451 s390_emit_CLY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
2452 {
2453 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2454 s390_disasm(ENC3(MNM, GPR, SDXB), "cly", r1, dh2, dl2, x2, b2);
2455
2456 return emit_RXY(p, 0xe30000000055ULL, r1, x2, b2, dl2, dh2);
2457 }
2458
2459
2460 static UChar *
2461 s390_emit_CLG(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
2462 {
2463 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2464 s390_disasm(ENC3(MNM, GPR, SDXB), "clg", r1, dh2, dl2, x2, b2);
2465
2466 return emit_RXY(p, 0xe30000000021ULL, r1, x2, b2, dl2, dh2);
2467 }
2468
2469
2470 static UChar *
2471 s390_emit_CLFI(UChar *p, UChar r1, UInt i2)
2472 {
2473 vassert(s390_host_has_eimm);
2474
2475 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2476 s390_disasm(ENC3(MNM, GPR, UINT), "clfi", r1, i2);
2477
2478 return emit_RIL(p, 0xc20f00000000ULL, r1, i2);
2479 }
2480
2481
2482 static UChar *
2483 s390_emit_CLGFI(UChar *p, UChar r1, UInt i2)
2484 {
2485 vassert(s390_host_has_eimm);
2486
2487 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2488 s390_disasm(ENC3(MNM, GPR, UINT), "clgfi", r1, i2);
2489
2490 return emit_RIL(p, 0xc20e00000000ULL, r1, i2);
2491 }
2492
2493
2494 static UChar *
2495 s390_emit_DR(UChar *p, UChar r1, UChar r2)
2496 {
2497 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2498 s390_disasm(ENC3(MNM, GPR, GPR), "dr", r1, r2);
2499
2500 return emit_RR(p, 0x1d00, r1, r2);
2501 }
2502
2503
2504 static UChar *
2505 s390_emit_D(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
2506 {
2507 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2508 s390_disasm(ENC3(MNM, GPR, UDXB), "d", r1, d2, x2, b2);
2509
2510 return emit_RX(p, 0x5d000000, r1, x2, b2, d2);
2511 }
2512
2513
2514 static UChar *
2515 s390_emit_DLR(UChar *p, UChar r1, UChar r2)
2516 {
2517 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2518 s390_disasm(ENC3(MNM, GPR, GPR), "dlr", r1, r2);
2519
2520 return emit_RRE(p, 0xb9970000, r1, r2);
2521 }
2522
2523
2524 static UChar *
2525 s390_emit_DLGR(UChar *p, UChar r1, UChar r2)
2526 {
2527 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2528 s390_disasm(ENC3(MNM, GPR, GPR), "dlgr", r1, r2);
2529
2530 return emit_RRE(p, 0xb9870000, r1, r2);
2531 }
2532
2533
2534 static UChar *
2535 s390_emit_DL(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
2536 {
2537 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2538 s390_disasm(ENC3(MNM, GPR, SDXB), "dl", r1, dh2, dl2, x2, b2);
2539
2540 return emit_RXY(p, 0xe30000000097ULL, r1, x2, b2, dl2, dh2);
2541 }
2542
2543
2544 static UChar *
2545 s390_emit_DLG(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
2546 {
2547 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2548 s390_disasm(ENC3(MNM, GPR, SDXB), "dlg", r1, dh2, dl2, x2, b2);
2549
2550 return emit_RXY(p, 0xe30000000087ULL, r1, x2, b2, dl2, dh2);
2551 }
2552
2553
2554 static UChar *
2555 s390_emit_DSGR(UChar *p, UChar r1, UChar r2)
2556 {
2557 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2558 s390_disasm(ENC3(MNM, GPR, GPR), "dsgr", r1, r2);
2559
2560 return emit_RRE(p, 0xb90d0000, r1, r2);
2561 }
2562
2563
2564 static UChar *
2565 s390_emit_DSG(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
2566 {
2567 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2568 s390_disasm(ENC3(MNM, GPR, SDXB), "dsg", r1, dh2, dl2, x2, b2);
2569
2570 return emit_RXY(p, 0xe3000000000dULL, r1, x2, b2, dl2, dh2);
2571 }
2572
2573
2574 static UChar *
2575 s390_emit_XR(UChar *p, UChar r1, UChar r2)
2576 {
2577 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2578 s390_disasm(ENC3(MNM, GPR, GPR), "xr", r1, r2);
2579
2580 return emit_RR(p, 0x1700, r1, r2);
2581 }
2582
2583
2584 static UChar *
2585 s390_emit_XGR(UChar *p, UChar r1, UChar r2)
2586 {
2587 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2588 s390_disasm(ENC3(MNM, GPR, GPR), "xgr", r1, r2);
2589
2590 return emit_RRE(p, 0xb9820000, r1, r2);
2591 }
2592
2593
2594 static UChar *
2595 s390_emit_X(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
2596 {
2597 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2598 s390_disasm(ENC3(MNM, GPR, UDXB), "x", r1, d2, x2, b2);
2599
2600 return emit_RX(p, 0x57000000, r1, x2, b2, d2);
2601 }
2602
2603
2604 static UChar *
2605 s390_emit_XY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
2606 {
2607 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2608 s390_disasm(ENC3(MNM, GPR, SDXB), "xy", r1, dh2, dl2, x2, b2);
2609
2610 return emit_RXY(p, 0xe30000000057ULL, r1, x2, b2, dl2, dh2);
2611 }
2612
2613
2614 static UChar *
2615 s390_emit_XG(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
2616 {
2617 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2618 s390_disasm(ENC3(MNM, GPR, SDXB), "xg", r1, dh2, dl2, x2, b2);
2619
2620 return emit_RXY(p, 0xe30000000082ULL, r1, x2, b2, dl2, dh2);
2621 }
2622
2623
2624 static UChar *
2625 s390_emit_XIHF(UChar *p, UChar r1, UInt i2)
2626 {
2627 vassert(s390_host_has_eimm);
2628
2629 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2630 s390_disasm(ENC3(MNM, GPR, UINT), "xihf", r1, i2);
2631
2632 return emit_RIL(p, 0xc00600000000ULL, r1, i2);
2633 }
2634
2635
2636 static UChar *
2637 s390_emit_XILF(UChar *p, UChar r1, UInt i2)
2638 {
2639 vassert(s390_host_has_eimm);
2640
2641 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2642 s390_disasm(ENC3(MNM, GPR, UINT), "xilf", r1, i2);
2643
2644 return emit_RIL(p, 0xc00700000000ULL, r1, i2);
2645 }
2646
2647
2648 static UChar *
2649 s390_emit_XC(UChar *p, UInt l, UChar b1, UShort d1, UChar b2, UShort d2)
2650 {
2651 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2652 s390_disasm(ENC3(MNM, UDLB, UDXB), "xc", d1, l, b1, d2, 0, b2);
2653
2654 return emit_SSa(p, 0xd70000000000ULL, l, b1, d1, b2, d2);
2655 }
2656
2657
2658 static UChar *
2659 s390_emit_FLOGR(UChar *p, UChar r1, UChar r2)
2660 {
2661 vassert(s390_host_has_eimm);
2662
2663 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2664 s390_disasm(ENC3(MNM, GPR, GPR), "flogr", r1, r2);
2665
2666 return emit_RRE(p, 0xb9830000, r1, r2);
2667 }
2668
2669
2670 static UChar *
2671 s390_emit_IC(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
2672 {
2673 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2674 s390_disasm(ENC3(MNM, GPR, UDXB), "ic", r1, d2, x2, b2);
2675
2676 return emit_RX(p, 0x43000000, r1, x2, b2, d2);
2677 }
2678
2679
2680 static UChar *
2681 s390_emit_ICY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
2682 {
2683 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2684 s390_disasm(ENC3(MNM, GPR, SDXB), "icy", r1, dh2, dl2, x2, b2);
2685
2686 return emit_RXY(p, 0xe30000000073ULL, r1, x2, b2, dl2, dh2);
2687 }
2688
2689
2690 static UChar *
2691 s390_emit_IIHF(UChar *p, UChar r1, UInt i2)
2692 {
2693 vassert(s390_host_has_eimm);
2694
2695 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2696 s390_disasm(ENC3(MNM, GPR, UINT), "iihf", r1, i2);
2697
2698 return emit_RIL(p, 0xc00800000000ULL, r1, i2);
2699 }
2700
2701
2702 static UChar *
2703 s390_emit_IIHH(UChar *p, UChar r1, UShort i2)
2704 {
2705 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2706 s390_disasm(ENC3(MNM, GPR, UINT), "iihh", r1, i2);
2707
2708 return emit_RI(p, 0xa5000000, r1, i2);
2709 }
2710
2711
2712 static UChar *
2713 s390_emit_IIHL(UChar *p, UChar r1, UShort i2)
2714 {
2715 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2716 s390_disasm(ENC3(MNM, GPR, UINT), "iihl", r1, i2);
2717
2718 return emit_RI(p, 0xa5010000, r1, i2);
2719 }
2720
2721
2722 static UChar *
2723 s390_emit_IILF(UChar *p, UChar r1, UInt i2)
2724 {
2725 vassert(s390_host_has_eimm);
2726
2727 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2728 s390_disasm(ENC3(MNM, GPR, UINT), "iilf", r1, i2);
2729
2730 return emit_RIL(p, 0xc00900000000ULL, r1, i2);
2731 }
2732
2733
2734 static UChar *
2735 s390_emit_IILH(UChar *p, UChar r1, UShort i2)
2736 {
2737 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2738 s390_disasm(ENC3(MNM, GPR, UINT), "iilh", r1, i2);
2739
2740 return emit_RI(p, 0xa5020000, r1, i2);
2741 }
2742
2743
2744 static UChar *
2745 s390_emit_IILL(UChar *p, UChar r1, UShort i2)
2746 {
2747 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2748 s390_disasm(ENC3(MNM, GPR, UINT), "iill", r1, i2);
2749
2750 return emit_RI(p, 0xa5030000, r1, i2);
2751 }
2752
2753
2754 static UChar *
2755 s390_emit_IPM(UChar *p, UChar r1, UChar r2)
2756 {
2757 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2758 s390_disasm(ENC2(MNM, GPR), "ipm", r1);
2759
2760 return emit_RRE(p, 0xb2220000, r1, r2);
2761 }
2762
2763
2764 static UChar *
2765 s390_emit_LR(UChar *p, UChar r1, UChar r2)
2766 {
2767 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2768 s390_disasm(ENC3(MNM, GPR, GPR), "lr", r1, r2);
2769
2770 return emit_RR(p, 0x1800, r1, r2);
2771 }
2772
2773
2774 static UChar *
2775 s390_emit_LGR(UChar *p, UChar r1, UChar r2)
2776 {
2777 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2778 s390_disasm(ENC3(MNM, GPR, GPR), "lgr", r1, r2);
2779
2780 return emit_RRE(p, 0xb9040000, r1, r2);
2781 }
2782
2783
2784 static UChar *
2785 s390_emit_LGFR(UChar *p, UChar r1, UChar r2)
2786 {
2787 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2788 s390_disasm(ENC3(MNM, GPR, GPR), "lgfr", r1, r2);
2789
2790 return emit_RRE(p, 0xb9140000, r1, r2);
2791 }
2792
2793
2794 static UChar *
2795 s390_emit_L(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
2796 {
2797 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2798 s390_disasm(ENC3(MNM, GPR, UDXB), "l", r1, d2, x2, b2);
2799
2800 return emit_RX(p, 0x58000000, r1, x2, b2, d2);
2801 }
2802
2803
2804 static UChar *
2805 s390_emit_LY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
2806 {
2807 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2808 s390_disasm(ENC3(MNM, GPR, SDXB), "ly", r1, dh2, dl2, x2, b2);
2809
2810 return emit_RXY(p, 0xe30000000058ULL, r1, x2, b2, dl2, dh2);
2811 }
2812
2813
2814 static UChar *
2815 s390_emit_LG(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
2816 {
2817 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2818 s390_disasm(ENC3(MNM, GPR, SDXB), "lg", r1, dh2, dl2, x2, b2);
2819
2820 return emit_RXY(p, 0xe30000000004ULL, r1, x2, b2, dl2, dh2);
2821 }
2822
2823
2824 static UChar *
2825 s390_emit_LGF(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
2826 {
2827 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2828 s390_disasm(ENC3(MNM, GPR, SDXB), "lgf", r1, dh2, dl2, x2, b2);
2829
2830 return emit_RXY(p, 0xe30000000014ULL, r1, x2, b2, dl2, dh2);
2831 }
2832
2833
2834 static UChar *
2835 s390_emit_LGFI(UChar *p, UChar r1, UInt i2)
2836 {
2837 vassert(s390_host_has_eimm);
2838
2839 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2840 s390_disasm(ENC3(MNM, GPR, INT), "lgfi", r1, i2);
2841
2842 return emit_RIL(p, 0xc00100000000ULL, r1, i2);
2843 }
2844
2845
2846 static UChar *
2847 s390_emit_LTR(UChar *p, UChar r1, UChar r2)
2848 {
2849 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2850 s390_disasm(ENC3(MNM, GPR, GPR), "ltr", r1, r2);
2851
2852 return emit_RR(p, 0x1200, r1, r2);
2853 }
2854
2855
2856 static UChar *
2857 s390_emit_LTGR(UChar *p, UChar r1, UChar r2)
2858 {
2859 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2860 s390_disasm(ENC3(MNM, GPR, GPR), "ltgr", r1, r2);
2861
2862 return emit_RRE(p, 0xb9020000, r1, r2);
2863 }
2864
2865
2866 static UChar *
2867 s390_emit_LT(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
2868 {
2869 vassert(s390_host_has_eimm);
2870
2871 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2872 s390_disasm(ENC3(MNM, GPR, SDXB), "lt", r1, dh2, dl2, x2, b2);
2873
2874 return emit_RXY(p, 0xe30000000012ULL, r1, x2, b2, dl2, dh2);
2875 }
2876
2877
2878 static UChar *
2879 s390_emit_LTG(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
2880 {
2881 vassert(s390_host_has_eimm);
2882
2883 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2884 s390_disasm(ENC3(MNM, GPR, SDXB), "ltg", r1, dh2, dl2, x2, b2);
2885
2886 return emit_RXY(p, 0xe30000000002ULL, r1, x2, b2, dl2, dh2);
2887 }
2888
2889
2890 static UChar *
2891 s390_emit_LBR(UChar *p, UChar r1, UChar r2)
2892 {
2893 vassert(s390_host_has_eimm);
2894
2895 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2896 s390_disasm(ENC3(MNM, GPR, GPR), "lbr", r1, r2);
2897
2898 return emit_RRE(p, 0xb9260000, r1, r2);
2899 }
2900
2901
2902 static UChar *
2903 s390_emit_LGBR(UChar *p, UChar r1, UChar r2)
2904 {
2905 vassert(s390_host_has_eimm);
2906
2907 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2908 s390_disasm(ENC3(MNM, GPR, GPR), "lgbr", r1, r2);
2909
2910 return emit_RRE(p, 0xb9060000, r1, r2);
2911 }
2912
2913
2914 static UChar *
2915 s390_emit_LB(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
2916 {
2917 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2918 s390_disasm(ENC3(MNM, GPR, SDXB), "lb", r1, dh2, dl2, x2, b2);
2919
2920 return emit_RXY(p, 0xe30000000076ULL, r1, x2, b2, dl2, dh2);
2921 }
2922
2923
2924 static UChar *
2925 s390_emit_LGB(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
2926 {
2927 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2928 s390_disasm(ENC3(MNM, GPR, SDXB), "lgb", r1, dh2, dl2, x2, b2);
2929
2930 return emit_RXY(p, 0xe30000000077ULL, r1, x2, b2, dl2, dh2);
2931 }
2932
2933
2934 static UChar *
2935 s390_emit_LCR(UChar *p, UChar r1, UChar r2)
2936 {
2937 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2938 s390_disasm(ENC3(MNM, GPR, GPR), "lcr", r1, r2);
2939
2940 return emit_RR(p, 0x1300, r1, r2);
2941 }
2942
2943
2944 static UChar *
2945 s390_emit_LCGR(UChar *p, UChar r1, UChar r2)
2946 {
2947 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2948 s390_disasm(ENC3(MNM, GPR, GPR), "lcgr", r1, r2);
2949
2950 return emit_RRE(p, 0xb9030000, r1, r2);
2951 }
2952
2953
2954 static UChar *
2955 s390_emit_LHR(UChar *p, UChar r1, UChar r2)
2956 {
2957 vassert(s390_host_has_eimm);
2958
2959 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2960 s390_disasm(ENC3(MNM, GPR, GPR), "lhr", r1, r2);
2961
2962 return emit_RRE(p, 0xb9270000, r1, r2);
2963 }
2964
2965
2966 static UChar *
2967 s390_emit_LGHR(UChar *p, UChar r1, UChar r2)
2968 {
2969 vassert(s390_host_has_eimm);
2970
2971 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2972 s390_disasm(ENC3(MNM, GPR, GPR), "lghr", r1, r2);
2973
2974 return emit_RRE(p, 0xb9070000, r1, r2);
2975 }
2976
2977
2978 static UChar *
2979 s390_emit_LH(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
2980 {
2981 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2982 s390_disasm(ENC3(MNM, GPR, UDXB), "lh", r1, d2, x2, b2);
2983
2984 return emit_RX(p, 0x48000000, r1, x2, b2, d2);
2985 }
2986
2987
2988 static UChar *
2989 s390_emit_LHY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
2990 {
2991 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
2992 s390_disasm(ENC3(MNM, GPR, SDXB), "lhy", r1, dh2, dl2, x2, b2);
2993
2994 return emit_RXY(p, 0xe30000000078ULL, r1, x2, b2, dl2, dh2);
2995 }
2996
2997
2998 static UChar *
2999 s390_emit_LGH(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
3000 {
3001 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3002 s390_disasm(ENC3(MNM, GPR, SDXB), "lgh", r1, dh2, dl2, x2, b2);
3003
3004 return emit_RXY(p, 0xe30000000015ULL, r1, x2, b2, dl2, dh2);
3005 }
3006
3007
3008 static UChar *
3009 s390_emit_LHI(UChar *p, UChar r1, UShort i2)
3010 {
3011 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3012 s390_disasm(ENC3(MNM, GPR, INT), "lhi", r1, (Int)(Short)i2);
3013
3014 return emit_RI(p, 0xa7080000, r1, i2);
3015 }
3016
3017
3018 static UChar *
3019 s390_emit_LGHI(UChar *p, UChar r1, UShort i2)
3020 {
3021 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3022 s390_disasm(ENC3(MNM, GPR, INT), "lghi", r1, (Int)(Short)i2);
3023
3024 return emit_RI(p, 0xa7090000, r1, i2);
3025 }
3026
3027
3028 static UChar *
3029 s390_emit_LLGFR(UChar *p, UChar r1, UChar r2)
3030 {
3031 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3032 s390_disasm(ENC3(MNM, GPR, GPR), "llgfr", r1, r2);
3033
3034 return emit_RRE(p, 0xb9160000, r1, r2);
3035 }
3036
3037
3038 static UChar *
3039 s390_emit_LLGF(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
3040 {
3041 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3042 s390_disasm(ENC3(MNM, GPR, SDXB), "llgf", r1, dh2, dl2, x2, b2);
3043
3044 return emit_RXY(p, 0xe30000000016ULL, r1, x2, b2, dl2, dh2);
3045 }
3046
3047
3048 static UChar *
3049 s390_emit_LLCR(UChar *p, UChar r1, UChar r2)
3050 {
3051 vassert(s390_host_has_eimm);
3052
3053 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3054 s390_disasm(ENC3(MNM, GPR, GPR), "llcr", r1, r2);
3055
3056 return emit_RRE(p, 0xb9940000, r1, r2);
3057 }
3058
3059
3060 static UChar *
3061 s390_emit_LLGCR(UChar *p, UChar r1, UChar r2)
3062 {
3063 vassert(s390_host_has_eimm);
3064
3065 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3066 s390_disasm(ENC3(MNM, GPR, GPR), "llgcr", r1, r2);
3067
3068 return emit_RRE(p, 0xb9840000, r1, r2);
3069 }
3070
3071
3072 static UChar *
3073 s390_emit_LLC(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
3074 {
3075 vassert(s390_host_has_eimm);
3076
3077 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3078 s390_disasm(ENC3(MNM, GPR, SDXB), "llc", r1, dh2, dl2, x2, b2);
3079
3080 return emit_RXY(p, 0xe30000000094ULL, r1, x2, b2, dl2, dh2);
3081 }
3082
3083
3084 static UChar *
3085 s390_emit_LLGC(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
3086 {
3087 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3088 s390_disasm(ENC3(MNM, GPR, SDXB), "llgc", r1, dh2, dl2, x2, b2);
3089
3090 return emit_RXY(p, 0xe30000000090ULL, r1, x2, b2, dl2, dh2);
3091 }
3092
3093
3094 static UChar *
3095 s390_emit_LLHR(UChar *p, UChar r1, UChar r2)
3096 {
3097 vassert(s390_host_has_eimm);
3098
3099 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3100 s390_disasm(ENC3(MNM, GPR, GPR), "llhr", r1, r2);
3101
3102 return emit_RRE(p, 0xb9950000, r1, r2);
3103 }
3104
3105
3106 static UChar *
3107 s390_emit_LLGHR(UChar *p, UChar r1, UChar r2)
3108 {
3109 vassert(s390_host_has_eimm);
3110
3111 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3112 s390_disasm(ENC3(MNM, GPR, GPR), "llghr", r1, r2);
3113
3114 return emit_RRE(p, 0xb9850000, r1, r2);
3115 }
3116
3117
3118 static UChar *
3119 s390_emit_LLH(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
3120 {
3121 vassert(s390_host_has_eimm);
3122
3123 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3124 s390_disasm(ENC3(MNM, GPR, SDXB), "llh", r1, dh2, dl2, x2, b2);
3125
3126 return emit_RXY(p, 0xe30000000095ULL, r1, x2, b2, dl2, dh2);
3127 }
3128
3129
3130 static UChar *
3131 s390_emit_LLGH(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
3132 {
3133 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3134 s390_disasm(ENC3(MNM, GPR, SDXB), "llgh", r1, dh2, dl2, x2, b2);
3135
3136 return emit_RXY(p, 0xe30000000091ULL, r1, x2, b2, dl2, dh2);
3137 }
3138
3139
3140 static UChar *
3141 s390_emit_LLILF(UChar *p, UChar r1, UInt i2)
3142 {
3143 vassert(s390_host_has_eimm);
3144
3145 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3146 s390_disasm(ENC3(MNM, GPR, UINT), "llilf", r1, i2);
3147
3148 return emit_RIL(p, 0xc00f00000000ULL, r1, i2);
3149 }
3150
3151
3152 static UChar *
3153 s390_emit_LLILH(UChar *p, UChar r1, UShort i2)
3154 {
3155 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3156 s390_disasm(ENC3(MNM, GPR, UINT), "llilh", r1, i2);
3157
3158 return emit_RI(p, 0xa50e0000, r1, i2);
3159 }
3160
3161
3162 static UChar *
3163 s390_emit_LLILL(UChar *p, UChar r1, UShort i2)
3164 {
3165 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3166 s390_disasm(ENC3(MNM, GPR, UINT), "llill", r1, i2);
3167
3168 return emit_RI(p, 0xa50f0000, r1, i2);
3169 }
3170
3171
3172 static UChar *
3173 s390_emit_MR(UChar *p, UChar r1, UChar r2)
3174 {
3175 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3176 s390_disasm(ENC3(MNM, GPR, GPR), "mr", r1, r2);
3177
3178 return emit_RR(p, 0x1c00, r1, r2);
3179 }
3180
3181
3182 static UChar *
3183 s390_emit_M(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
3184 {
3185 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3186 s390_disasm(ENC3(MNM, GPR, UDXB), "m", r1, d2, x2, b2);
3187
3188 return emit_RX(p, 0x5c000000, r1, x2, b2, d2);
3189 }
3190
3191
3192 static UChar *
3193 s390_emit_MFY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
3194 {
3195 vassert(s390_host_has_gie);
3196
3197 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3198 s390_disasm(ENC3(MNM, GPR, SDXB), "mfy", r1, dh2, dl2, x2, b2);
3199
3200 return emit_RXY(p, 0xe3000000005cULL, r1, x2, b2, dl2, dh2);
3201 }
3202
3203
3204 static UChar *
3205 s390_emit_MG(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
3206 {
3207 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3208 s390_disasm(ENC3(MNM, GPR, SDXB), "mg", r1, dh2, dl2, x2, b2);
3209
3210 return emit_RXY(p, 0xe30000000084ULL, r1, x2, b2, dl2, dh2);
3211 }
3212
3213
3214 static UChar *
3215 s390_emit_MGRK(UChar *p, UChar r3, UChar r1, UChar r2)
3216 {
3217 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3218 s390_disasm(ENC4(MNM, GPR, GPR, GPR), "mgrk", r1, r2, r3);
3219
3220 return emit_RRF3(p, 0xb9ec0000, r3, r1, r2);
3221 }
3222
3223
3224 static UChar *
3225 s390_emit_MH(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
3226 {
3227 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3228 s390_disasm(ENC3(MNM, GPR, UDXB), "mh", r1, d2, x2, b2);
3229
3230 return emit_RX(p, 0x4c000000, r1, x2, b2, d2);
3231 }
3232
3233
3234 static UChar *
3235 s390_emit_MHY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
3236 {
3237 vassert(s390_host_has_gie);
3238
3239 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3240 s390_disasm(ENC3(MNM, GPR, SDXB), "mhy", r1, dh2, dl2, x2, b2);
3241
3242 return emit_RXY(p, 0xe3000000007cULL, r1, x2, b2, dl2, dh2);
3243 }
3244
3245
3246 static UChar *
3247 s390_emit_MHI(UChar *p, UChar r1, UShort i2)
3248 {
3249 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3250 s390_disasm(ENC3(MNM, GPR, INT), "mhi", r1, (Int)(Short)i2);
3251
3252 return emit_RI(p, 0xa70c0000, r1, i2);
3253 }
3254
3255
3256 static UChar *
3257 s390_emit_MLR(UChar *p, UChar r1, UChar r2)
3258 {
3259 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3260 s390_disasm(ENC3(MNM, GPR, GPR), "mlr", r1, r2);
3261
3262 return emit_RRE(p, 0xb9960000, r1, r2);
3263 }
3264
3265
3266 static UChar *
3267 s390_emit_MLGR(UChar *p, UChar r1, UChar r2)
3268 {
3269 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3270 s390_disasm(ENC3(MNM, GPR, GPR), "mlgr", r1, r2);
3271
3272 return emit_RRE(p, 0xb9860000, r1, r2);
3273 }
3274
3275
3276 static UChar *
3277 s390_emit_ML(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
3278 {
3279 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3280 s390_disasm(ENC3(MNM, GPR, SDXB), "ml", r1, dh2, dl2, x2, b2);
3281
3282 return emit_RXY(p, 0xe30000000096ULL, r1, x2, b2, dl2, dh2);
3283 }
3284
3285
3286 static UChar *
3287 s390_emit_MLG(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
3288 {
3289 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3290 s390_disasm(ENC3(MNM, GPR, SDXB), "mlg", r1, dh2, dl2, x2, b2);
3291
3292 return emit_RXY(p, 0xe30000000086ULL, r1, x2, b2, dl2, dh2);
3293 }
3294
3295
3296 static UChar *
3297 s390_emit_MSR(UChar *p, UChar r1, UChar r2)
3298 {
3299 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3300 s390_disasm(ENC3(MNM, GPR, GPR), "msr", r1, r2);
3301
3302 return emit_RRE(p, 0xb2520000, r1, r2);
3303 }
3304
3305
3306 static UChar *
3307 s390_emit_MSGR(UChar *p, UChar r1, UChar r2)
3308 {
3309 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3310 s390_disasm(ENC3(MNM, GPR, GPR), "msgr", r1, r2);
3311
3312 return emit_RRE(p, 0xb90c0000, r1, r2);
3313 }
3314
3315
3316 static UChar *
3317 s390_emit_MS(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
3318 {
3319 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3320 s390_disasm(ENC3(MNM, GPR, UDXB), "ms", r1, d2, x2, b2);
3321
3322 return emit_RX(p, 0x71000000, r1, x2, b2, d2);
3323 }
3324
3325
3326 static UChar *
3327 s390_emit_MSY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
3328 {
3329 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3330 s390_disasm(ENC3(MNM, GPR, SDXB), "msy", r1, dh2, dl2, x2, b2);
3331
3332 return emit_RXY(p, 0xe30000000051ULL, r1, x2, b2, dl2, dh2);
3333 }
3334
3335
3336 static UChar *
3337 s390_emit_MSG(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
3338 {
3339 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3340 s390_disasm(ENC3(MNM, GPR, SDXB), "msg", r1, dh2, dl2, x2, b2);
3341
3342 return emit_RXY(p, 0xe3000000000cULL, r1, x2, b2, dl2, dh2);
3343 }
3344
3345
3346 static UChar *
3347 s390_emit_MSFI(UChar *p, UChar r1, UInt i2)
3348 {
3349 vassert(s390_host_has_gie);
3350
3351 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3352 s390_disasm(ENC3(MNM, GPR, INT), "msfi", r1, i2);
3353
3354 return emit_RIL(p, 0xc20100000000ULL, r1, i2);
3355 }
3356
3357
3358 static UChar *
3359 s390_emit_MSGFI(UChar *p, UChar r1, UInt i2)
3360 {
3361 vassert(s390_host_has_gie);
3362
3363 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3364 s390_disasm(ENC3(MNM, GPR, INT), "msgfi", r1, i2);
3365
3366 return emit_RIL(p, 0xc20000000000ULL, r1, i2);
3367 }
3368
3369
3370 static UChar *
3371 s390_emit_MVC(UChar *p, UInt l, UChar b1, UShort d1, UChar b2, UShort d2)
3372 {
3373 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3374 s390_disasm(ENC3(MNM, UDLB, UDXB), "mvc", d1, l, b1, d2, 0, b2);
3375
3376 return emit_SSa(p, 0xd20000000000ULL, l, b1, d1, b2, d2);
3377 }
3378
3379
3380 static UChar *
3381 s390_emit_MVI(UChar *p, UChar i2, UChar b1, UShort d1)
3382 {
3383 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3384 s390_disasm(ENC3(MNM, UDXB, INT), "mvi", d1, 0, b1, i2);
3385
3386 return emit_SI(p, 0x92000000, i2, b1, d1);
3387 }
3388
3389
3390 static UChar *
3391 s390_emit_MVHHI(UChar *p, UChar b1, UShort d1, UShort i2)
3392 {
3393 vassert(s390_host_has_gie);
3394
3395 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3396 s390_disasm(ENC3(MNM, UDXB, INT), "mvhhi", d1, 0, b1, i2);
3397
3398 return emit_SIL(p, 0xe54400000000ULL, b1, d1, i2);
3399 }
3400
3401
3402 static UChar *
3403 s390_emit_MVHI(UChar *p, UChar b1, UShort d1, UShort i2)
3404 {
3405 vassert(s390_host_has_gie);
3406
3407 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3408 s390_disasm(ENC3(MNM, UDXB, INT), "mvhi", d1, 0, b1, i2);
3409
3410 return emit_SIL(p, 0xe54c00000000ULL, b1, d1, i2);
3411 }
3412
3413
3414 static UChar *
3415 s390_emit_MVGHI(UChar *p, UChar b1, UShort d1, UShort i2)
3416 {
3417 vassert(s390_host_has_gie);
3418
3419 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3420 s390_disasm(ENC3(MNM, UDXB, INT), "mvghi", d1, 0, b1, i2);
3421
3422 return emit_SIL(p, 0xe54800000000ULL, b1, d1, i2);
3423 }
3424
3425
3426 static UChar *
3427 s390_emit_OR(UChar *p, UChar r1, UChar r2)
3428 {
3429 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3430 s390_disasm(ENC3(MNM, GPR, GPR), "or", r1, r2);
3431
3432 return emit_RR(p, 0x1600, r1, r2);
3433 }
3434
3435
3436 static UChar *
3437 s390_emit_OGR(UChar *p, UChar r1, UChar r2)
3438 {
3439 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3440 s390_disasm(ENC3(MNM, GPR, GPR), "ogr", r1, r2);
3441
3442 return emit_RRE(p, 0xb9810000, r1, r2);
3443 }
3444
3445
3446 static UChar *
3447 s390_emit_O(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
3448 {
3449 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3450 s390_disasm(ENC3(MNM, GPR, UDXB), "o", r1, d2, x2, b2);
3451
3452 return emit_RX(p, 0x56000000, r1, x2, b2, d2);
3453 }
3454
3455
3456 static UChar *
3457 s390_emit_OY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
3458 {
3459 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3460 s390_disasm(ENC3(MNM, GPR, SDXB), "oy", r1, dh2, dl2, x2, b2);
3461
3462 return emit_RXY(p, 0xe30000000056ULL, r1, x2, b2, dl2, dh2);
3463 }
3464
3465
3466 static UChar *
3467 s390_emit_OG(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
3468 {
3469 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3470 s390_disasm(ENC3(MNM, GPR, SDXB), "og", r1, dh2, dl2, x2, b2);
3471
3472 return emit_RXY(p, 0xe30000000081ULL, r1, x2, b2, dl2, dh2);
3473 }
3474
3475
3476 static UChar *
3477 s390_emit_OIHF(UChar *p, UChar r1, UInt i2)
3478 {
3479 vassert(s390_host_has_eimm);
3480
3481 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3482 s390_disasm(ENC3(MNM, GPR, UINT), "oihf", r1, i2);
3483
3484 return emit_RIL(p, 0xc00c00000000ULL, r1, i2);
3485 }
3486
3487
3488 static UChar *
3489 s390_emit_OILF(UChar *p, UChar r1, UInt i2)
3490 {
3491 vassert(s390_host_has_eimm);
3492
3493 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3494 s390_disasm(ENC3(MNM, GPR, UINT), "oilf", r1, i2);
3495
3496 return emit_RIL(p, 0xc00d00000000ULL, r1, i2);
3497 }
3498
3499
3500 static UChar *
3501 s390_emit_OILL(UChar *p, UChar r1, UShort i2)
3502 {
3503 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3504 s390_disasm(ENC3(MNM, GPR, UINT), "oill", r1, i2);
3505
3506 return emit_RI(p, 0xa50b0000, r1, i2);
3507 }
3508
3509
3510 static UChar *
3511 s390_emit_SLL(UChar *p, UChar r1, UChar b2, UShort d2)
3512 {
3513 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3514 s390_disasm(ENC3(MNM, GPR, UDXB), "sll", r1, d2, 0, b2);
3515
3516 return emit_RS(p, 0x89000000, r1, 0, b2, d2);
3517 }
3518
3519
3520 static UChar *
3521 s390_emit_SLLG(UChar *p, UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
3522 {
3523 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3524 s390_disasm(ENC4(MNM, GPR, GPR, SDXB), "sllg", r1, r3, dh2, dl2, 0, b2);
3525
3526 return emit_RSY(p, 0xeb000000000dULL, r1, r3, b2, dl2, dh2);
3527 }
3528
3529
3530 static UChar *
3531 s390_emit_SRA(UChar *p, UChar r1, UChar b2, UShort d2)
3532 {
3533 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3534 s390_disasm(ENC3(MNM, GPR, UDXB), "sra", r1, d2, 0, b2);
3535
3536 return emit_RS(p, 0x8a000000, r1, 0, b2, d2);
3537 }
3538
3539
3540 static UChar *
3541 s390_emit_SRAG(UChar *p, UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
3542 {
3543 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3544 s390_disasm(ENC4(MNM, GPR, GPR, SDXB), "srag", r1, r3, dh2, dl2, 0, b2);
3545
3546 return emit_RSY(p, 0xeb000000000aULL, r1, r3, b2, dl2, dh2);
3547 }
3548
3549
3550 static UChar *
3551 s390_emit_SRL(UChar *p, UChar r1, UChar b2, UShort d2)
3552 {
3553 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3554 s390_disasm(ENC3(MNM, GPR, UDXB), "srl", r1, d2, 0, b2);
3555
3556 return emit_RS(p, 0x88000000, r1, 0, b2, d2);
3557 }
3558
3559
3560 static UChar *
3561 s390_emit_SRLG(UChar *p, UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
3562 {
3563 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3564 s390_disasm(ENC4(MNM, GPR, GPR, SDXB), "srlg", r1, r3, dh2, dl2, 0, b2);
3565
3566 return emit_RSY(p, 0xeb000000000cULL, r1, r3, b2, dl2, dh2);
3567 }
3568
3569
3570 static UChar *
3571 s390_emit_ST(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
3572 {
3573 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3574 s390_disasm(ENC3(MNM, GPR, UDXB), "st", r1, d2, x2, b2);
3575
3576 return emit_RX(p, 0x50000000, r1, x2, b2, d2);
3577 }
3578
3579
3580 static UChar *
3581 s390_emit_STY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
3582 {
3583 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3584 s390_disasm(ENC3(MNM, GPR, SDXB), "sty", r1, dh2, dl2, x2, b2);
3585
3586 return emit_RXY(p, 0xe30000000050ULL, r1, x2, b2, dl2, dh2);
3587 }
3588
3589
3590 static UChar *
3591 s390_emit_STG(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
3592 {
3593 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3594 s390_disasm(ENC3(MNM, GPR, SDXB), "stg", r1, dh2, dl2, x2, b2);
3595
3596 return emit_RXY(p, 0xe30000000024ULL, r1, x2, b2, dl2, dh2);
3597 }
3598
3599
3600 static UChar *
3601 s390_emit_STC(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
3602 {
3603 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3604 s390_disasm(ENC3(MNM, GPR, UDXB), "stc", r1, d2, x2, b2);
3605
3606 return emit_RX(p, 0x42000000, r1, x2, b2, d2);
3607 }
3608
3609
3610 static UChar *
3611 s390_emit_STCY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
3612 {
3613 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3614 s390_disasm(ENC3(MNM, GPR, SDXB), "stcy", r1, dh2, dl2, x2, b2);
3615
3616 return emit_RXY(p, 0xe30000000072ULL, r1, x2, b2, dl2, dh2);
3617 }
3618
3619
3620 static UChar *
3621 s390_emit_STH(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
3622 {
3623 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3624 s390_disasm(ENC3(MNM, GPR, UDXB), "sth", r1, d2, x2, b2);
3625
3626 return emit_RX(p, 0x40000000, r1, x2, b2, d2);
3627 }
3628
3629
3630 static UChar *
3631 s390_emit_STHY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
3632 {
3633 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3634 s390_disasm(ENC3(MNM, GPR, SDXB), "sthy", r1, dh2, dl2, x2, b2);
3635
3636 return emit_RXY(p, 0xe30000000070ULL, r1, x2, b2, dl2, dh2);
3637 }
3638
3639
3640 static UChar *
3641 s390_emit_SR(UChar *p, UChar r1, UChar r2)
3642 {
3643 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3644 s390_disasm(ENC3(MNM, GPR, GPR), "sr", r1, r2);
3645
3646 return emit_RR(p, 0x1b00, r1, r2);
3647 }
3648
3649
3650 static UChar *
3651 s390_emit_SGR(UChar *p, UChar r1, UChar r2)
3652 {
3653 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3654 s390_disasm(ENC3(MNM, GPR, GPR), "sgr", r1, r2);
3655
3656 return emit_RRE(p, 0xb9090000, r1, r2);
3657 }
3658
3659
3660 static UChar *
3661 s390_emit_S(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
3662 {
3663 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3664 s390_disasm(ENC3(MNM, GPR, UDXB), "s", r1, d2, x2, b2);
3665
3666 return emit_RX(p, 0x5b000000, r1, x2, b2, d2);
3667 }
3668
3669
3670 static UChar *
3671 s390_emit_SY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
3672 {
3673 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3674 s390_disasm(ENC3(MNM, GPR, SDXB), "sy", r1, dh2, dl2, x2, b2);
3675
3676 return emit_RXY(p, 0xe3000000005bULL, r1, x2, b2, dl2, dh2);
3677 }
3678
3679
3680 static UChar *
3681 s390_emit_SG(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
3682 {
3683 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3684 s390_disasm(ENC3(MNM, GPR, SDXB), "sg", r1, dh2, dl2, x2, b2);
3685
3686 return emit_RXY(p, 0xe30000000009ULL, r1, x2, b2, dl2, dh2);
3687 }
3688
3689
3690 static UChar *
3691 s390_emit_SH(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
3692 {
3693 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3694 s390_disasm(ENC3(MNM, GPR, UDXB), "sh", r1, d2, x2, b2);
3695
3696 return emit_RX(p, 0x4b000000, r1, x2, b2, d2);
3697 }
3698
3699
3700 static UChar *
3701 s390_emit_SHY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
3702 {
3703 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3704 s390_disasm(ENC3(MNM, GPR, SDXB), "shy", r1, dh2, dl2, x2, b2);
3705
3706 return emit_RXY(p, 0xe3000000007bULL, r1, x2, b2, dl2, dh2);
3707 }
3708
3709
3710 static UChar *
3711 s390_emit_SLFI(UChar *p, UChar r1, UInt i2)
3712 {
3713 vassert(s390_host_has_eimm);
3714
3715 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3716 s390_disasm(ENC3(MNM, GPR, UINT), "slfi", r1, i2);
3717
3718 return emit_RIL(p, 0xc20500000000ULL, r1, i2);
3719 }
3720
3721
3722 static UChar *
3723 s390_emit_SLGFI(UChar *p, UChar r1, UInt i2)
3724 {
3725 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3726 s390_disasm(ENC3(MNM, GPR, UINT), "slgfi", r1, i2);
3727
3728 return emit_RIL(p, 0xc20400000000ULL, r1, i2);
3729 }
3730
3731
3732 static UChar *
3733 s390_emit_LDR(UChar *p, UChar r1, UChar r2)
3734 {
3735 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3736 s390_disasm(ENC3(MNM, FPR, FPR), "ldr", r1, r2);
3737
3738 return emit_RR(p, 0x2800, r1, r2);
3739 }
3740
3741
3742 static UChar *
3743 s390_emit_LE(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
3744 {
3745 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3746 s390_disasm(ENC3(MNM, FPR, UDXB), "le", r1, d2, x2, b2);
3747
3748 return emit_RX(p, 0x78000000, r1, x2, b2, d2);
3749 }
3750
3751
3752 static UChar *
3753 s390_emit_LD(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
3754 {
3755 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3756 s390_disasm(ENC3(MNM, FPR, UDXB), "ld", r1, d2, x2, b2);
3757
3758 return emit_RX(p, 0x68000000, r1, x2, b2, d2);
3759 }
3760
3761
3762 static UChar *
3763 s390_emit_LEY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
3764 {
3765 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3766 s390_disasm(ENC3(MNM, FPR, SDXB), "ley", r1, dh2, dl2, x2, b2);
3767
3768 return emit_RXY(p, 0xed0000000064ULL, r1, x2, b2, dl2, dh2);
3769 }
3770
3771
3772 static UChar *
3773 s390_emit_LDY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
3774 {
3775 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3776 s390_disasm(ENC3(MNM, FPR, SDXB), "ldy", r1, dh2, dl2, x2, b2);
3777
3778 return emit_RXY(p, 0xed0000000065ULL, r1, x2, b2, dl2, dh2);
3779 }
3780
3781
3782 static UChar *
3783 s390_emit_LDGR(UChar *p, UChar r1, UChar r2)
3784 {
3785 vassert(s390_host_has_fgx);
3786
3787 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3788 s390_disasm(ENC3(MNM, FPR, GPR), "ldgr", r1, r2);
3789
3790 return emit_RRE(p, 0xb3c10000, r1, r2);
3791 }
3792
3793
3794 static UChar *
3795 s390_emit_LGDR(UChar *p, UChar r1, UChar r2)
3796 {
3797 vassert(s390_host_has_fgx);
3798
3799 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3800 s390_disasm(ENC3(MNM, GPR, FPR), "lgdr", r1, r2);
3801
3802 return emit_RRE(p, 0xb3cd0000, r1, r2);
3803 }
3804
3805
3806 static UChar *
3807 s390_emit_LZER(UChar *p, UChar r1, UChar r2)
3808 {
3809 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3810 s390_disasm(ENC2(MNM, FPR), "lzer", r1);
3811
3812 return emit_RRE(p, 0xb3740000, r1, r2);
3813 }
3814
3815
3816 static UChar *
3817 s390_emit_LZDR(UChar *p, UChar r1, UChar r2)
3818 {
3819 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3820 s390_disasm(ENC2(MNM, FPR), "lzdr", r1);
3821
3822 return emit_RRE(p, 0xb3750000, r1, r2);
3823 }
3824
3825
3826 static UChar *
3827 s390_emit_SFPC(UChar *p, UChar r1)
3828 {
3829 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3830 s390_disasm(ENC2(MNM, GPR), "sfpc", r1);
3831
3832 return emit_RRE(p, 0xb3840000, r1, 0);
3833 }
3834
3835
3836 static UChar *
3837 s390_emit_STE(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
3838 {
3839 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3840 s390_disasm(ENC3(MNM, FPR, UDXB), "ste", r1, d2, x2, b2);
3841
3842 return emit_RX(p, 0x70000000, r1, x2, b2, d2);
3843 }
3844
3845
3846 static UChar *
3847 s390_emit_STD(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
3848 {
3849 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3850 s390_disasm(ENC3(MNM, FPR, UDXB), "std", r1, d2, x2, b2);
3851
3852 return emit_RX(p, 0x60000000, r1, x2, b2, d2);
3853 }
3854
3855
3856 static UChar *
3857 s390_emit_STEY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
3858 {
3859 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3860 s390_disasm(ENC3(MNM, FPR, SDXB), "stey", r1, dh2, dl2, x2, b2);
3861
3862 return emit_RXY(p, 0xed0000000066ULL, r1, x2, b2, dl2, dh2);
3863 }
3864
3865
3866 static UChar *
3867 s390_emit_STDY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
3868 {
3869 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3870 s390_disasm(ENC3(MNM, FPR, SDXB), "stdy", r1, dh2, dl2, x2, b2);
3871
3872 return emit_RXY(p, 0xed0000000067ULL, r1, x2, b2, dl2, dh2);
3873 }
3874
3875
3876 static UChar *
3877 s390_emit_AEBR(UChar *p, UChar r1, UChar r2)
3878 {
3879 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3880 s390_disasm(ENC3(MNM, FPR, FPR), "aebr", r1, r2);
3881
3882 return emit_RRE(p, 0xb30a0000, r1, r2);
3883 }
3884
3885
3886 static UChar *
3887 s390_emit_ADBR(UChar *p, UChar r1, UChar r2)
3888 {
3889 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3890 s390_disasm(ENC3(MNM, FPR, FPR), "adbr", r1, r2);
3891
3892 return emit_RRE(p, 0xb31a0000, r1, r2);
3893 }
3894
3895
3896 static UChar *
3897 s390_emit_AXBR(UChar *p, UChar r1, UChar r2)
3898 {
3899 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3900 s390_disasm(ENC3(MNM, FPR, FPR), "axbr", r1, r2);
3901
3902 return emit_RRE(p, 0xb34a0000, r1, r2);
3903 }
3904
3905
3906 static UChar *
3907 s390_emit_CEBR(UChar *p, UChar r1, UChar r2)
3908 {
3909 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3910 s390_disasm(ENC3(MNM, FPR, FPR), "cebr", r1, r2);
3911
3912 return emit_RRE(p, 0xb3090000, r1, r2);
3913 }
3914
3915
3916 static UChar *
3917 s390_emit_CDBR(UChar *p, UChar r1, UChar r2)
3918 {
3919 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3920 s390_disasm(ENC3(MNM, FPR, FPR), "cdbr", r1, r2);
3921
3922 return emit_RRE(p, 0xb3190000, r1, r2);
3923 }
3924
3925
3926 static UChar *
3927 s390_emit_CXBR(UChar *p, UChar r1, UChar r2)
3928 {
3929 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
3930 s390_disasm(ENC3(MNM, FPR, FPR), "cxbr", r1, r2);
3931
3932 return emit_RRE(p, 0xb3490000, r1, r2);
3933 }
3934
3935
3936 static UChar *
3937 s390_emit_CEFBRA(UChar *p, UChar m3, UChar m4, UChar r1, UChar r2)
3938 {
3939 vassert(m4 == 0);
3940 vassert(m3 == 0 || s390_host_has_fpext);
3941
3942 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM)) {
3943 if (m3 == 0)
3944 s390_disasm(ENC3(MNM, FPR, GPR), "cefbr", r1, r2);
3945 else
3946 s390_disasm(ENC5(MNM, FPR, UINT, GPR, UINT),
3947 "cefbra", r1, m3, r2, m4);
3948 }
3949
3950 return emit_RRF2(p, 0xb3940000, m3, m4, r1, r2);
3951 }
3952
3953
3954 static UChar *
3955 s390_emit_CDFBRA(UChar *p, UChar m3, UChar m4, UChar r1, UChar r2)
3956 {
3957 vassert(m4 == 0);
3958 vassert(m3 == 0 || s390_host_has_fpext);
3959
3960 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM)) {
3961 if (m3 == 0)
3962 s390_disasm(ENC3(MNM, FPR, GPR), "cdfbr", r1, r2);
3963 else
3964 s390_disasm(ENC5(MNM, FPR, UINT, GPR, UINT),
3965 "cdfbra", r1, m3, r2, m4);
3966 }
3967
3968 return emit_RRF2(p, 0xb3950000, m3, m4, r1, r2);
3969 }
3970
3971
3972 static UChar *
3973 s390_emit_CXFBRA(UChar *p, UChar m3, UChar m4, UChar r1, UChar r2)
3974 {
3975 vassert(m4 == 0);
3976 vassert(m3 == 0 || s390_host_has_fpext);
3977
3978 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM)) {
3979 if (m3 == 0)
3980 s390_disasm(ENC3(MNM, FPR, GPR), "cxfbr", r1, r2);
3981 else
3982 s390_disasm(ENC5(MNM, FPR, UINT, GPR, UINT),
3983 "cxfbra", r1, m3, r2, m4);
3984 }
3985
3986 return emit_RRF2(p, 0xb3960000, m3, m4, r1, r2);
3987 }
3988
3989
3990 static UChar *
3991 s390_emit_CEGBRA(UChar *p, UChar m3, UChar m4, UChar r1, UChar r2)
3992 {
3993 vassert(m4 == 0);
3994 vassert(m3 == 0 || s390_host_has_fpext);
3995
3996 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM)) {
3997 if (m3 == 0)
3998 s390_disasm(ENC3(MNM, FPR, GPR), "cegbr", r1, r2);
3999 else
4000 s390_disasm(ENC5(MNM, FPR, UINT, GPR, UINT),
4001 "cegbra", r1, m3, r2, m4);
4002 }
4003
4004 return emit_RRF2(p, 0xb3a40000, m3, m4, r1, r2);
4005 }
4006
4007
4008 static UChar *
4009 s390_emit_CDGBRA(UChar *p, UChar m3, UChar m4, UChar r1, UChar r2)
4010 {
4011 vassert(m4 == 0);
4012 vassert(m3 == 0 || s390_host_has_fpext);
4013
4014 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM)) {
4015 if (m3 == 0)
4016 s390_disasm(ENC3(MNM, FPR, GPR), "cdgbr", r1, r2);
4017 else
4018 s390_disasm(ENC5(MNM, FPR, UINT, GPR, UINT),
4019 "cdgbra", r1, m3, r2, m4);
4020 }
4021
4022 return emit_RRF2(p, 0xb3a50000, m3, m4, r1, r2);
4023 }
4024
4025
4026 static UChar *
4027 s390_emit_CXGBRA(UChar *p, UChar m3, UChar m4, UChar r1, UChar r2)
4028 {
4029 vassert(m4 == 0);
4030 vassert(m3 == 0 || s390_host_has_fpext);
4031
4032 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM)) {
4033 if (m3 == 0)
4034 s390_disasm(ENC3(MNM, FPR, GPR), "cxgbr", r1, r2);
4035 else
4036 s390_disasm(ENC5(MNM, FPR, UINT, GPR, UINT),
4037 "cxgbra", r1, m3, r2, m4);
4038 }
4039
4040 return emit_RRF2(p, 0xb3a60000, m3, m4, r1, r2);
4041 }
4042
4043
4044 static UChar *
4045 s390_emit_CELFBR(UChar *p, UChar m3, UChar m4, UChar r1, UChar r2)
4046 {
4047 vassert(m4 == 0);
4048 vassert(s390_host_has_fpext);
4049
4050 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4051 s390_disasm(ENC5(MNM, FPR, UINT, GPR, UINT), "celfbr", r1, m3, r2, m4);
4052
4053 return emit_RRF2(p, 0xb3900000, m3, m4, r1, r2);
4054 }
4055
4056
4057 static UChar *
4058 s390_emit_CDLFBR(UChar *p, UChar m3, UChar m4, UChar r1, UChar r2)
4059 {
4060 vassert(m4 == 0);
4061 vassert(s390_host_has_fpext);
4062
4063 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4064 s390_disasm(ENC5(MNM, FPR, UINT, GPR, UINT), "cdlfbr", r1, m3, r2, m4);
4065
4066 return emit_RRF2(p, 0xb3910000, m3, m4, r1, r2);
4067 }
4068
4069
4070 static UChar *
4071 s390_emit_CXLFBR(UChar *p, UChar m3, UChar m4, UChar r1, UChar r2)
4072 {
4073 vassert(m4 == 0);
4074 vassert(s390_host_has_fpext);
4075
4076 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4077 s390_disasm(ENC5(MNM, FPR, UINT, GPR, UINT), "cxlfbr", r1, m3, r2, m4);
4078
4079 return emit_RRF2(p, 0xb3920000, m3, m4, r1, r2);
4080 }
4081
4082
4083 static UChar *
4084 s390_emit_CELGBR(UChar *p, UChar m3, UChar m4, UChar r1, UChar r2)
4085 {
4086 vassert(m4 == 0);
4087 vassert(s390_host_has_fpext);
4088
4089 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4090 s390_disasm(ENC5(MNM, FPR, UINT, GPR, UINT), "celgbr", r1, m3, r2, m4);
4091
4092 return emit_RRF2(p, 0xb3a00000, m3, m4, r1, r2);
4093 }
4094
4095
4096 static UChar *
4097 s390_emit_CDLGBR(UChar *p, UChar m3, UChar m4, UChar r1, UChar r2)
4098 {
4099 vassert(m4 == 0);
4100 vassert(s390_host_has_fpext);
4101
4102 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4103 s390_disasm(ENC5(MNM, FPR, UINT, GPR, UINT), "cdlgbr", r1, m3, r2, m4);
4104
4105 return emit_RRF2(p, 0xb3a10000, m3, m4, r1, r2);
4106 }
4107
4108
4109 static UChar *
4110 s390_emit_CXLGBR(UChar *p, UChar m3, UChar m4, UChar r1, UChar r2)
4111 {
4112 vassert(m4 == 0);
4113 vassert(s390_host_has_fpext);
4114
4115 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4116 s390_disasm(ENC5(MNM, FPR, UINT, GPR, UINT), "cxlgbr", r1, m3, r2, m4);
4117
4118 return emit_RRF2(p, 0xb3a20000, m3, m4, r1, r2);
4119 }
4120
4121
4122 static UChar *
4123 s390_emit_CLFEBR(UChar *p, UChar m3, UChar m4, UChar r1, UChar r2)
4124 {
4125 vassert(m4 == 0);
4126 vassert(s390_host_has_fpext);
4127
4128 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4129 s390_disasm(ENC5(MNM, GPR, UINT, FPR, UINT), "clfebr", r1, m3, r2, m4);
4130
4131 return emit_RRF2(p, 0xb39c0000, m3, m4, r1, r2);
4132 }
4133
4134
4135 static UChar *
4136 s390_emit_CLFDBR(UChar *p, UChar m3, UChar m4, UChar r1, UChar r2)
4137 {
4138 vassert(m4 == 0);
4139 vassert(s390_host_has_fpext);
4140
4141 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4142 s390_disasm(ENC5(MNM, GPR, UINT, FPR, UINT), "clfdbr", r1, m3, r2, m4);
4143
4144 return emit_RRF2(p, 0xb39d0000, m3, m4, r1, r2);
4145 }
4146
4147
4148 static UChar *
4149 s390_emit_CLFXBR(UChar *p, UChar m3, UChar m4, UChar r1, UChar r2)
4150 {
4151 vassert(m4 == 0);
4152 vassert(s390_host_has_fpext);
4153
4154 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4155 s390_disasm(ENC5(MNM, GPR, UINT, FPR, UINT), "clfxbr", r1, m3, r2, m4);
4156
4157 return emit_RRF2(p, 0xb39e0000, m3, m4, r1, r2);
4158 }
4159
4160
4161 static UChar *
4162 s390_emit_CLGEBR(UChar *p, UChar m3, UChar m4, UChar r1, UChar r2)
4163 {
4164 vassert(m4 == 0);
4165 vassert(s390_host_has_fpext);
4166
4167 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4168 s390_disasm(ENC5(MNM, GPR, UINT, FPR, UINT), "clgebr", r1, m3, r2, m4);
4169
4170 return emit_RRF2(p, 0xb3ac0000, m3, m4, r1, r2);
4171 }
4172
4173
4174 static UChar *
4175 s390_emit_CLGDBR(UChar *p, UChar m3, UChar m4, UChar r1, UChar r2)
4176 {
4177 vassert(m4 == 0);
4178 vassert(s390_host_has_fpext);
4179
4180 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4181 s390_disasm(ENC5(MNM, GPR, UINT, FPR, UINT), "clgdbr", r1, m3, r2, m4);
4182
4183 return emit_RRF2(p, 0xb3ad0000, m3, m4, r1, r2);
4184 }
4185
4186
4187 static UChar *
4188 s390_emit_CLGXBR(UChar *p, UChar m3, UChar m4, UChar r1, UChar r2)
4189 {
4190 vassert(m4 == 0);
4191 vassert(s390_host_has_fpext);
4192
4193 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4194 s390_disasm(ENC5(MNM, GPR, UINT, FPR, UINT), "clgxbr", r1, m3, r2, m4);
4195
4196 return emit_RRF2(p, 0xb3ae0000, m3, m4, r1, r2);
4197 }
4198
4199
4200 static UChar *
4201 s390_emit_CFEBR(UChar *p, UChar r3, UChar r1, UChar r2)
4202 {
4203 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4204 s390_disasm(ENC4(MNM, GPR, UINT, FPR), "cfebr", r1, r3, r2);
4205
4206 return emit_RRF3(p, 0xb3980000, r3, r1, r2);
4207 }
4208
4209
4210 static UChar *
4211 s390_emit_CFDBR(UChar *p, UChar r3, UChar r1, UChar r2)
4212 {
4213 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4214 s390_disasm(ENC4(MNM, GPR, UINT, FPR), "cfdbr", r1, r3, r2);
4215
4216 return emit_RRF3(p, 0xb3990000, r3, r1, r2);
4217 }
4218
4219
4220 static UChar *
4221 s390_emit_CFXBR(UChar *p, UChar r3, UChar r1, UChar r2)
4222 {
4223 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4224 s390_disasm(ENC4(MNM, GPR, UINT, FPR), "cfxbr", r1, r3, r2);
4225
4226 return emit_RRF3(p, 0xb39a0000, r3, r1, r2);
4227 }
4228
4229
4230 static UChar *
4231 s390_emit_CGEBR(UChar *p, UChar r3, UChar r1, UChar r2)
4232 {
4233 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4234 s390_disasm(ENC4(MNM, GPR, UINT, FPR), "cgebr", r1, r3, r2);
4235
4236 return emit_RRF3(p, 0xb3a80000, r3, r1, r2);
4237 }
4238
4239
4240 static UChar *
4241 s390_emit_CGDBR(UChar *p, UChar r3, UChar r1, UChar r2)
4242 {
4243 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4244 s390_disasm(ENC4(MNM, GPR, UINT, FPR), "cgdbr", r1, r3, r2);
4245
4246 return emit_RRF3(p, 0xb3a90000, r3, r1, r2);
4247 }
4248
4249
4250 static UChar *
4251 s390_emit_CGXBR(UChar *p, UChar r3, UChar r1, UChar r2)
4252 {
4253 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4254 s390_disasm(ENC4(MNM, GPR, UINT, FPR), "cgxbr", r1, r3, r2);
4255
4256 return emit_RRF3(p, 0xb3aa0000, r3, r1, r2);
4257 }
4258
4259
4260 static UChar *
4261 s390_emit_DEBR(UChar *p, UChar r1, UChar r2)
4262 {
4263 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4264 s390_disasm(ENC3(MNM, FPR, FPR), "debr", r1, r2);
4265
4266 return emit_RRE(p, 0xb30d0000, r1, r2);
4267 }
4268
4269
4270 static UChar *
4271 s390_emit_DDBR(UChar *p, UChar r1, UChar r2)
4272 {
4273 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4274 s390_disasm(ENC3(MNM, FPR, FPR), "ddbr", r1, r2);
4275
4276 return emit_RRE(p, 0xb31d0000, r1, r2);
4277 }
4278
4279
4280 static UChar *
4281 s390_emit_DXBR(UChar *p, UChar r1, UChar r2)
4282 {
4283 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4284 s390_disasm(ENC3(MNM, FPR, FPR), "dxbr", r1, r2);
4285
4286 return emit_RRE(p, 0xb34d0000, r1, r2);
4287 }
4288
4289
4290 static UChar *
4291 s390_emit_LCEBR(UChar *p, UChar r1, UChar r2)
4292 {
4293 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4294 s390_disasm(ENC3(MNM, FPR, FPR), "lcebr", r1, r2);
4295
4296 return emit_RRE(p, 0xb3030000, r1, r2);
4297 }
4298
4299
4300 static UChar *
4301 s390_emit_LCDBR(UChar *p, UChar r1, UChar r2)
4302 {
4303 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4304 s390_disasm(ENC3(MNM, FPR, FPR), "lcdbr", r1, r2);
4305
4306 return emit_RRE(p, 0xb3130000, r1, r2);
4307 }
4308
4309
4310 static UChar *
4311 s390_emit_LCXBR(UChar *p, UChar r1, UChar r2)
4312 {
4313 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4314 s390_disasm(ENC3(MNM, FPR, FPR), "lcxbr", r1, r2);
4315
4316 return emit_RRE(p, 0xb3430000, r1, r2);
4317 }
4318
4319
4320 static UChar *
4321 s390_emit_LDEBR(UChar *p, UChar r1, UChar r2)
4322 {
4323 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4324 s390_disasm(ENC3(MNM, FPR, FPR), "ldebr", r1, r2);
4325
4326 return emit_RRE(p, 0xb3040000, r1, r2);
4327 }
4328
4329
4330 static UChar *
4331 s390_emit_LXDBR(UChar *p, UChar r1, UChar r2)
4332 {
4333 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4334 s390_disasm(ENC3(MNM, FPR, FPR), "lxdbr", r1, r2);
4335
4336 return emit_RRE(p, 0xb3050000, r1, r2);
4337 }
4338
4339
4340 static UChar *
4341 s390_emit_LXEBR(UChar *p, UChar r1, UChar r2)
4342 {
4343 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4344 s390_disasm(ENC3(MNM, FPR, FPR), "lxebr", r1, r2);
4345
4346 return emit_RRE(p, 0xb3060000, r1, r2);
4347 }
4348
4349
4350 static UChar *
4351 s390_emit_LNEBR(UChar *p, UChar r1, UChar r2)
4352 {
4353 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4354 s390_disasm(ENC3(MNM, FPR, FPR), "lnebr", r1, r2);
4355
4356 return emit_RRE(p, 0xb3010000, r1, r2);
4357 }
4358
4359
4360 static UChar *
4361 s390_emit_LNDBR(UChar *p, UChar r1, UChar r2)
4362 {
4363 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4364 s390_disasm(ENC3(MNM, FPR, FPR), "lndbr", r1, r2);
4365
4366 return emit_RRE(p, 0xb3110000, r1, r2);
4367 }
4368
4369
4370 static UChar *
4371 s390_emit_LNXBR(UChar *p, UChar r1, UChar r2)
4372 {
4373 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4374 s390_disasm(ENC3(MNM, FPR, FPR), "lnxbr", r1, r2);
4375
4376 return emit_RRE(p, 0xb3410000, r1, r2);
4377 }
4378
4379
4380 static UChar *
4381 s390_emit_LPEBR(UChar *p, UChar r1, UChar r2)
4382 {
4383 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4384 s390_disasm(ENC3(MNM, FPR, FPR), "lpebr", r1, r2);
4385
4386 return emit_RRE(p, 0xb3000000, r1, r2);
4387 }
4388
4389
4390 static UChar *
4391 s390_emit_LPDBR(UChar *p, UChar r1, UChar r2)
4392 {
4393 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4394 s390_disasm(ENC3(MNM, FPR, FPR), "lpdbr", r1, r2);
4395
4396 return emit_RRE(p, 0xb3100000, r1, r2);
4397 }
4398
4399
4400 static UChar *
4401 s390_emit_LPXBR(UChar *p, UChar r1, UChar r2)
4402 {
4403 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4404 s390_disasm(ENC3(MNM, FPR, FPR), "lpxbr", r1, r2);
4405
4406 return emit_RRE(p, 0xb3400000, r1, r2);
4407 }
4408
4409
4410 static UChar *
4411 s390_emit_LEDBRA(UChar *p, UChar m3, UChar m4, UChar r1, UChar r2)
4412 {
4413 vassert(m4 == 0);
4414 vassert(m3 == 0 || s390_host_has_fpext);
4415
4416 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM)) {
4417 if (m3 == 0)
4418 s390_disasm(ENC3(MNM, FPR, FPR), "ledbr", r1, r2);
4419 else
4420 s390_disasm(ENC5(MNM, FPR, UINT, FPR, UINT),
4421 "ledbra", r1, m3, r2, m4);
4422 }
4423
4424 return emit_RRF2(p, 0xb3440000, m3, m4, r1, r2);
4425 }
4426
4427
4428 static UChar *
4429 s390_emit_LDXBRA(UChar *p, UChar m3, UChar m4, UChar r1, UChar r2)
4430 {
4431 vassert(m4 == 0);
4432 vassert(m3 == 0 || s390_host_has_fpext);
4433
4434 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM)) {
4435 if (m3 == 0)
4436 s390_disasm(ENC3(MNM, FPR, FPR), "ldxbr", r1, r2);
4437 else
4438 s390_disasm(ENC5(MNM, FPR, UINT, FPR, UINT),
4439 "ldxbra", r1, m3, r2, m4);
4440 }
4441
4442 return emit_RRF2(p, 0xb3450000, m3, m4, r1, r2);
4443 }
4444
4445
4446 static UChar *
4447 s390_emit_LEXBRA(UChar *p, UChar m3, UChar m4, UChar r1, UChar r2)
4448 {
4449 vassert(m4 == 0);
4450 vassert(m3 == 0 || s390_host_has_fpext);
4451
4452 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM)) {
4453 if (m3 == 0)
4454 s390_disasm(ENC3(MNM, FPR, FPR), "lexbr", r1, r2);
4455 else
4456 s390_disasm(ENC5(MNM, FPR, UINT, FPR, UINT),
4457 "lexbra", r1, m3, r2, m4);
4458 }
4459
4460 return emit_RRF2(p, 0xb3460000, m3, m4, r1, r2);
4461 }
4462
4463
4464 static UChar *
4465 s390_emit_FIEBRA(UChar *p, UChar m3, UChar m4, UChar r1, UChar r2)
4466 {
4467 vassert(m3 == 0 || s390_host_has_fpext);
4468
4469 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM)) {
4470 if (m4 == 0)
4471 s390_disasm(ENC4(MNM, FPR, UINT, FPR), "fiebr", r1, m3, r2);
4472 else
4473 s390_disasm(ENC5(MNM, FPR, UINT, FPR, UINT),
4474 "fiebra", r1, m3, r2, m4);
4475 }
4476
4477 return emit_RRF2(p, 0xb3570000, m3, m4, r1, r2);
4478 }
4479
4480
4481 static UChar *
4482 s390_emit_FIDBRA(UChar *p, UChar m3, UChar m4, UChar r1, UChar r2)
4483 {
4484 vassert(m3 == 0 || s390_host_has_fpext);
4485
4486 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM)) {
4487 if (m4 == 0)
4488 s390_disasm(ENC4(MNM, FPR, UINT, FPR), "fidbr", r1, m3, r2);
4489 else
4490 s390_disasm(ENC5(MNM, FPR, UINT, FPR, UINT),
4491 "fidbra", r1, m3, r2, m4);
4492 }
4493
4494 return emit_RRF2(p, 0xb35f0000, m3, m4, r1, r2);
4495 }
4496
4497
4498 static UChar *
4499 s390_emit_FIXBRA(UChar *p, UChar m3, UChar m4, UChar r1, UChar r2)
4500 {
4501 vassert(m3 == 0 || s390_host_has_fpext);
4502
4503 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM)) {
4504 if (m4 == 0)
4505 s390_disasm(ENC4(MNM, FPR, UINT, FPR), "fixbr", r1, m3, r2);
4506 else
4507 s390_disasm(ENC5(MNM, FPR, UINT, FPR, UINT),
4508 "fixbra", r1, m3, r2, m4);
4509 }
4510
4511 return emit_RRF2(p, 0xb3470000, m3, m4, r1, r2);
4512 }
4513
4514
4515 static UChar *
4516 s390_emit_MEEBR(UChar *p, UChar r1, UChar r2)
4517 {
4518 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4519 s390_disasm(ENC3(MNM, FPR, FPR), "meebr", r1, r2);
4520
4521 return emit_RRE(p, 0xb3170000, r1, r2);
4522 }
4523
4524
4525 static UChar *
4526 s390_emit_MDBR(UChar *p, UChar r1, UChar r2)
4527 {
4528 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4529 s390_disasm(ENC3(MNM, FPR, FPR), "mdbr", r1, r2);
4530
4531 return emit_RRE(p, 0xb31c0000, r1, r2);
4532 }
4533
4534
4535 static UChar *
4536 s390_emit_MXBR(UChar *p, UChar r1, UChar r2)
4537 {
4538 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4539 s390_disasm(ENC3(MNM, FPR, FPR), "mxbr", r1, r2);
4540
4541 return emit_RRE(p, 0xb34c0000, r1, r2);
4542 }
4543
4544
4545 static UChar *
4546 s390_emit_MAEBR(UChar *p, UChar r1, UChar r3, UChar r2)
4547 {
4548 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4549 s390_disasm(ENC4(MNM, FPR, FPR, FPR), "maebr", r1, r3, r2);
4550
4551 return emit_RRF(p, 0xb30e0000, r1, r3, r2);
4552 }
4553
4554
4555 static UChar *
4556 s390_emit_MADBR(UChar *p, UChar r1, UChar r3, UChar r2)
4557 {
4558 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4559 s390_disasm(ENC4(MNM, FPR, FPR, FPR), "madbr", r1, r3, r2);
4560
4561 return emit_RRF(p, 0xb31e0000, r1, r3, r2);
4562 }
4563
4564
4565 static UChar *
4566 s390_emit_MSEBR(UChar *p, UChar r1, UChar r3, UChar r2)
4567 {
4568 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4569 s390_disasm(ENC4(MNM, FPR, FPR, FPR), "msebr", r1, r3, r2);
4570
4571 return emit_RRF(p, 0xb30f0000, r1, r3, r2);
4572 }
4573
4574
4575 static UChar *
4576 s390_emit_MSDBR(UChar *p, UChar r1, UChar r3, UChar r2)
4577 {
4578 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4579 s390_disasm(ENC4(MNM, FPR, FPR, FPR), "msdbr", r1, r3, r2);
4580
4581 return emit_RRF(p, 0xb31f0000, r1, r3, r2);
4582 }
4583
4584
4585 static UChar *
4586 s390_emit_SQEBR(UChar *p, UChar r1, UChar r2)
4587 {
4588 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4589 s390_disasm(ENC3(MNM, FPR, FPR), "sqebr", r1, r2);
4590
4591 return emit_RRE(p, 0xb3140000, r1, r2);
4592 }
4593
4594
4595 static UChar *
4596 s390_emit_SQDBR(UChar *p, UChar r1, UChar r2)
4597 {
4598 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4599 s390_disasm(ENC3(MNM, FPR, FPR), "sqdbr", r1, r2);
4600
4601 return emit_RRE(p, 0xb3150000, r1, r2);
4602 }
4603
4604
4605 static UChar *
4606 s390_emit_SQXBR(UChar *p, UChar r1, UChar r2)
4607 {
4608 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4609 s390_disasm(ENC3(MNM, FPR, FPR), "sqxbr", r1, r2);
4610
4611 return emit_RRE(p, 0xb3160000, r1, r2);
4612 }
4613
4614
4615 static UChar *
4616 s390_emit_SEBR(UChar *p, UChar r1, UChar r2)
4617 {
4618 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4619 s390_disasm(ENC3(MNM, FPR, FPR), "sebr", r1, r2);
4620
4621 return emit_RRE(p, 0xb30b0000, r1, r2);
4622 }
4623
4624
4625 static UChar *
4626 s390_emit_SDBR(UChar *p, UChar r1, UChar r2)
4627 {
4628 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4629 s390_disasm(ENC3(MNM, FPR, FPR), "sdbr", r1, r2);
4630
4631 return emit_RRE(p, 0xb31b0000, r1, r2);
4632 }
4633
4634
4635 static UChar *
4636 s390_emit_SXBR(UChar *p, UChar r1, UChar r2)
4637 {
4638 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4639 s390_disasm(ENC3(MNM, FPR, FPR), "sxbr", r1, r2);
4640
4641 return emit_RRE(p, 0xb34b0000, r1, r2);
4642 }
4643
4644
4645 static UChar *
4646 s390_emit_ADTRA(UChar *p, UChar r3, UChar m4, UChar r1, UChar r2)
4647 {
4648 vassert(s390_host_has_dfp);
4649 vassert(m4 == 0 || s390_host_has_fpext);
4650 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM)) {
4651 if (m4 == 0)
4652 s390_disasm(ENC4(MNM, FPR, FPR, FPR), "adtr", r1, r2, r3);
4653 else
4654 s390_disasm(ENC5(MNM, FPR, FPR, FPR, UINT), "adtra", r1, r2, r3, m4);
4655 }
4656
4657 return emit_RRF4(p, 0xb3d20000, r3, m4, r1, r2);
4658 }
4659
4660
4661 static UChar *
4662 s390_emit_AXTRA(UChar *p, UChar r3, UChar m4, UChar r1, UChar r2)
4663 {
4664 vassert(s390_host_has_dfp);
4665 vassert(m4 == 0 || s390_host_has_fpext);
4666 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM)) {
4667 if (m4 == 0)
4668 s390_disasm(ENC4(MNM, FPR, FPR, FPR), "axtr", r1, r2, r3);
4669 else
4670 s390_disasm(ENC5(MNM, FPR, FPR, FPR, UINT), "axtra", r1, r2, r3, m4);
4671 }
4672
4673 return emit_RRF4(p, 0xb3da0000, r3, m4, r1, r2);
4674 }
4675
4676
4677 static UChar *
4678 s390_emit_CDTR(UChar *p, UChar r1, UChar r2)
4679 {
4680 vassert(s390_host_has_dfp);
4681 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4682 s390_disasm(ENC3(MNM, FPR, FPR), "cdtr", r1, r2);
4683
4684 return emit_RRE(p, 0xb3e40000, r1, r2);
4685 }
4686
4687
4688 static UChar *
4689 s390_emit_CXTR(UChar *p, UChar r1, UChar r2)
4690 {
4691 vassert(s390_host_has_dfp);
4692 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4693 s390_disasm(ENC3(MNM, FPR, FPR), "cxtr", r1, r2);
4694
4695 return emit_RRE(p, 0xb3ec0000, r1, r2);
4696 }
4697
4698
4699 static UChar *
4700 s390_emit_CDGTRA(UChar *p, UChar m3, UChar m4, UChar r1, UChar r2)
4701 {
4702 vassert(s390_host_has_dfp);
4703 vassert(m4 == 0);
4704 vassert(m3 == 0 || s390_host_has_fpext);
4705
4706 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM)) {
4707 if (m3 == 0)
4708 s390_disasm(ENC3(MNM, FPR, GPR), "cdgtr", r1, r2);
4709 else
4710 s390_disasm(ENC5(MNM, FPR, UINT, GPR, UINT), "cdgtra", r1, m3, r2, m4);
4711 }
4712
4713 return emit_RRF2(p, 0xb3f10000, m3, m4, r1, r2);
4714 }
4715
4716
4717 static UChar *
4718 s390_emit_CXGTR(UChar *p, UChar m3, UChar m4, UChar r1, UChar r2)
4719 {
4720 vassert(s390_host_has_dfp);
4721 vassert(m4 == 0);
4722 /* rounding mode m3 is not considered, as the corresponding
4723 IRop (Iop_I64StoD128) does not take rounding mode. */
4724 vassert(m3 == 0);
4725
4726 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4727 s390_disasm(ENC3(MNM, FPR, GPR), "cxgtr", r1, r2);
4728
4729 return emit_RRF2(p, 0xb3f90000, m3, m4, r1, r2);
4730 }
4731
4732
4733 static UChar *
4734 s390_emit_CDFTR(UChar *p, UChar m3, UChar m4, UChar r1, UChar r2)
4735 {
4736 vassert(m4 == 0);
4737 vassert(s390_host_has_dfp);
4738 vassert(s390_host_has_fpext);
4739
4740 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4741 s390_disasm(ENC5(MNM, FPR, UINT, GPR, UINT), "cdftr", r1, m3, r2, m4);
4742
4743 return emit_RRF2(p, 0xb9510000, m3, m4, r1, r2);
4744 }
4745
4746
4747 static UChar *
4748 s390_emit_CXFTR(UChar *p, UChar m3, UChar m4, UChar r1, UChar r2)
4749 {
4750 vassert(m4 == 0);
4751 vassert(s390_host_has_dfp);
4752 vassert(s390_host_has_fpext);
4753
4754 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4755 s390_disasm(ENC5(MNM, FPR, UINT, GPR, UINT), "cxftr", r1, m3, r2, m4);
4756
4757 return emit_RRF2(p, 0xb9590000, m3, m4, r1, r2);
4758 }
4759
4760
4761 static UChar *
4762 s390_emit_CDLFTR(UChar *p, UChar m3, UChar m4, UChar r1, UChar r2)
4763 {
4764 vassert(m4 == 0);
4765 vassert(s390_host_has_dfp);
4766 vassert(s390_host_has_fpext);
4767
4768 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4769 s390_disasm(ENC5(MNM, FPR, UINT, GPR, UINT), "cdlftr", r1, m3, r2, m4);
4770
4771 return emit_RRF2(p, 0xb9530000, m3, m4, r1, r2);
4772 }
4773
4774
4775 static UChar *
4776 s390_emit_CXLFTR(UChar *p, UChar m3, UChar m4, UChar r1, UChar r2)
4777 {
4778 vassert(m4 == 0);
4779 vassert(s390_host_has_dfp);
4780 vassert(s390_host_has_fpext);
4781
4782 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4783 s390_disasm(ENC5(MNM, FPR, UINT, GPR, UINT), "cxlftr", r1, m3, r2, m4);
4784
4785 return emit_RRF2(p, 0xb95b0000, m3, m4, r1, r2);
4786 }
4787
4788
4789 static UChar *
4790 s390_emit_CDLGTR(UChar *p, UChar m3, UChar m4, UChar r1, UChar r2)
4791 {
4792 vassert(m4 == 0);
4793 vassert(s390_host_has_dfp);
4794 vassert(s390_host_has_fpext);
4795
4796 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4797 s390_disasm(ENC5(MNM, FPR, UINT, GPR, UINT), "cdlgtr", r1, m3, r2, m4);
4798
4799 return emit_RRF2(p, 0xb9520000, m3, m4, r1, r2);
4800 }
4801
4802
4803 static UChar *
4804 s390_emit_CXLGTR(UChar *p, UChar m3, UChar m4, UChar r1, UChar r2)
4805 {
4806 vassert(m4 == 0);
4807 vassert(s390_host_has_dfp);
4808 vassert(s390_host_has_fpext);
4809
4810 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4811 s390_disasm(ENC5(MNM, FPR, UINT, GPR, UINT), "cxlgtr", r1, m3, r2, m4);
4812
4813 return emit_RRF2(p, 0xb95a0000, m3, m4, r1, r2);
4814 }
4815
4816
4817 static UChar *
4818 s390_emit_CEDTR(UChar *p, UChar r1, UChar r2)
4819 {
4820 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4821 s390_disasm(ENC3(MNM, FPR, FPR), "cedtr", r1, r2);
4822
4823 return emit_RRE(p, 0xb3f40000, r1, r2);
4824 }
4825
4826
4827 static UChar *
4828 s390_emit_CEXTR(UChar *p, UChar r1, UChar r2)
4829 {
4830 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4831 s390_disasm(ENC3(MNM, FPR, FPR), "cextr", r1, r2);
4832
4833 return emit_RRE(p, 0xb3fc0000, r1, r2);
4834 }
4835
4836
4837 static UChar *
4838 s390_emit_CFDTR(UChar *p, UChar m3, UChar m4, UChar r1, UChar r2)
4839 {
4840 vassert(m4 == 0);
4841 vassert(s390_host_has_dfp);
4842 vassert(s390_host_has_fpext);
4843
4844 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4845 s390_disasm(ENC5(MNM, GPR, UINT, FPR, UINT), "cfdtr", r1, m3, r2, m4);
4846
4847 return emit_RRF2(p, 0xb9410000, m3, m4, r1, r2);
4848 }
4849
4850
4851 static UChar *
4852 s390_emit_CFXTR(UChar *p, UChar m3, UChar m4, UChar r1, UChar r2)
4853 {
4854 vassert(m4 == 0);
4855 vassert(s390_host_has_dfp);
4856 vassert(s390_host_has_fpext);
4857
4858 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4859 s390_disasm(ENC5(MNM, GPR, UINT, FPR, UINT), "cfxtr", r1, m3, r2, m4);
4860
4861 return emit_RRF2(p, 0xb9490000, m3, m4, r1, r2);
4862 }
4863
4864
4865 static UChar *
4866 s390_emit_CGDTR(UChar *p, UChar m3, UChar m4, UChar r1, UChar r2)
4867 {
4868 vassert(s390_host_has_dfp);
4869 vassert(m4 == 0);
4870 vassert(s390_host_has_fpext || m3 < 1 || m3 > 7);
4871
4872 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4873 s390_disasm(ENC4(MNM, GPR, UINT, FPR), "cgdtr", r1, m3, r2);
4874
4875 return emit_RRF2(p, 0xb3e10000, m3, m4, r1, r2);
4876 }
4877
4878
4879 static UChar *
4880 s390_emit_CGXTR(UChar *p, UChar m3, UChar m4, UChar r1, UChar r2)
4881 {
4882 vassert(s390_host_has_dfp);
4883 vassert(m4 == 0);
4884 vassert(s390_host_has_fpext || m3 < 1 || m3 > 7);
4885
4886 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4887 s390_disasm(ENC4(MNM, GPR, UINT, FPR), "cgxtr", r1, m3, r2);
4888
4889 return emit_RRF2(p, 0xb3e90000, m3, m4, r1, r2);
4890 }
4891
4892
4893 static UChar *
4894 s390_emit_CLFDTR(UChar *p, UChar m3, UChar m4, UChar r1, UChar r2)
4895 {
4896 vassert(m4 == 0);
4897 vassert(s390_host_has_dfp);
4898 vassert(s390_host_has_fpext);
4899
4900 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4901 s390_disasm(ENC5(MNM, GPR, UINT, FPR, UINT), "clfdtr", r1, m3, r2, m4);
4902
4903 return emit_RRF2(p, 0xb9430000, m3, m4, r1, r2);
4904 }
4905
4906
4907 static UChar *
4908 s390_emit_CLFXTR(UChar *p, UChar m3, UChar m4, UChar r1, UChar r2)
4909 {
4910 vassert(m4 == 0);
4911 vassert(s390_host_has_dfp);
4912 vassert(s390_host_has_fpext);
4913
4914 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4915 s390_disasm(ENC5(MNM, GPR, UINT, FPR, UINT), "clfxtr", r1, m3, r2, m4);
4916
4917 return emit_RRF2(p, 0xb94b0000, m3, m4, r1, r2);
4918 }
4919
4920
4921 static UChar *
4922 s390_emit_CLGDTR(UChar *p, UChar m3, UChar m4, UChar r1, UChar r2)
4923 {
4924 vassert(m4 == 0);
4925 vassert(s390_host_has_dfp);
4926 vassert(s390_host_has_fpext);
4927
4928 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4929 s390_disasm(ENC5(MNM, GPR, UINT, FPR, UINT), "clgdtr", r1, m3, r2, m4);
4930
4931 return emit_RRF2(p, 0xb9420000, m3, m4, r1, r2);
4932 }
4933
4934
4935 static UChar *
4936 s390_emit_CLGXTR(UChar *p, UChar m3, UChar m4, UChar r1, UChar r2)
4937 {
4938 vassert(m4 == 0);
4939 vassert(s390_host_has_dfp);
4940 vassert(s390_host_has_fpext);
4941
4942 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4943 s390_disasm(ENC5(MNM, GPR, UINT, FPR, UINT), "clgxtr", r1, m3, r2, m4);
4944
4945 return emit_RRF2(p, 0xb94a0000, m3, m4, r1, r2);
4946 }
4947
4948
4949 static UChar *
4950 s390_emit_DDTRA(UChar *p, UChar r3, UChar m4, UChar r1, UChar r2)
4951 {
4952 vassert(s390_host_has_dfp);
4953 vassert(m4 == 0 || s390_host_has_fpext);
4954 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM)) {
4955 if (m4 == 0)
4956 s390_disasm(ENC4(MNM, FPR, FPR, FPR), "ddtr", r1, r2, r3);
4957 else
4958 s390_disasm(ENC5(MNM, FPR, FPR, FPR, UINT), "ddtra", r1, r2, r3, m4);
4959 }
4960
4961 return emit_RRF4(p, 0xb3d10000, r3, m4, r1, r2);
4962 }
4963
4964
4965 static UChar *
4966 s390_emit_DXTRA(UChar *p, UChar r3, UChar m4, UChar r1, UChar r2)
4967 {
4968 vassert(s390_host_has_dfp);
4969 vassert(m4 == 0 || s390_host_has_fpext);
4970 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM)) {
4971 if (m4 == 0)
4972 s390_disasm(ENC4(MNM, FPR, FPR, FPR), "dxtr", r1, r2, r3);
4973 else
4974 s390_disasm(ENC5(MNM, FPR, FPR, FPR, UINT), "dxtra", r1, r2, r3, m4);
4975 }
4976
4977 return emit_RRF4(p, 0xb3d90000, r3, m4, r1, r2);
4978 }
4979
4980
4981 static UChar *
4982 s390_emit_EEDTR(UChar *p, UChar r1, UChar r2)
4983 {
4984 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4985 s390_disasm(ENC3(MNM, GPR, FPR), "eedtr", r1, r2);
4986
4987 return emit_RRE(p, 0xb3e50000, r1, r2);
4988 }
4989
4990
4991 static UChar *
4992 s390_emit_EEXTR(UChar *p, UChar r1, UChar r2)
4993 {
4994 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
4995 s390_disasm(ENC3(MNM, GPR, FPR), "eextr", r1, r2);
4996
4997 return emit_RRE(p, 0xb3ed0000, r1, r2);
4998 }
4999
5000
5001 static UChar *
5002 s390_emit_ESDTR(UChar *p, UChar r1, UChar r2)
5003 {
5004 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
5005 s390_disasm(ENC3(MNM, GPR, FPR), "esdtr", r1, r2);
5006
5007 return emit_RRE(p, 0xb3e70000, r1, r2);
5008 }
5009
5010
5011 static UChar *
5012 s390_emit_ESXTR(UChar *p, UChar r1, UChar r2)
5013 {
5014 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
5015 s390_disasm(ENC3(MNM, GPR, FPR), "esxtr", r1, r2);
5016
5017 return emit_RRE(p, 0xb3ef0000, r1, r2);
5018 }
5019
5020
5021 static UChar *
5022 s390_emit_IEDTR(UChar *p, UChar r3, UChar r1, UChar r2)
5023 {
5024 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
5025 s390_disasm(ENC4(MNM, FPR, FPR, GPR), "iedtr", r1, r3, r2);
5026
5027 return emit_RRF(p, 0xb3f60000, r3, r1, r2);
5028 }
5029
5030
5031 static UChar *
5032 s390_emit_IEXTR(UChar *p, UChar r3, UChar r1, UChar r2)
5033 {
5034 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
5035 s390_disasm(ENC4(MNM, FPR, FPR, GPR), "iextr", r1, r3, r2);
5036
5037 return emit_RRF(p, 0xb3fe0000, r3, r1, r2);
5038 }
5039
5040
5041 static UChar *
5042 s390_emit_LDETR(UChar *p, UChar m4, UChar r1, UChar r2)
5043 {
5044 vassert(s390_host_has_dfp);
5045 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
5046 s390_disasm(ENC4(MNM, FPR, FPR, UINT), "ldetr", r1, r2, m4);
5047
5048 return emit_RRF5(p, 0xb3d40000, m4, r1, r2);
5049 }
5050
5051
5052 static UChar *
5053 s390_emit_LXDTR(UChar *p, UChar m4, UChar r1, UChar r2)
5054 {
5055 vassert(s390_host_has_dfp);
5056 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
5057 s390_disasm(ENC4(MNM, FPR, FPR, UINT), "lxdtr", r1, r2, m4);
5058
5059 return emit_RRF5(p, 0xb3dc0000, m4, r1, r2);
5060 }
5061
5062
5063 static UChar *
5064 s390_emit_LEDTR(UChar *p, UChar m3, UChar m4, UChar r1, UChar r2)
5065 {
5066 vassert(s390_host_has_dfp);
5067 vassert(m4 == 0);
5068 vassert(s390_host_has_fpext || m3 < 1 || m3 > 7);
5069
5070 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
5071 s390_disasm(ENC5(MNM, FPR, UINT, FPR, UINT), "ledtr", r1, m3, r2, m4);
5072
5073 return emit_RRF2(p, 0xb3d50000, m3, m4, r1, r2);
5074 }
5075
5076
5077 static UChar *
5078 s390_emit_LDXTR(UChar *p, UChar m3, UChar m4, UChar r1, UChar r2)
5079 {
5080 vassert(s390_host_has_dfp);
5081 vassert(m4 == 0);
5082 vassert(s390_host_has_fpext || m3 < 1 || m3 > 7);
5083
5084 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
5085 s390_disasm(ENC5(MNM, FPR, UINT, FPR, UINT), "ldxtr", r1, m3, r2, m4);
5086
5087 return emit_RRF2(p, 0xb3dd0000, m3, m4, r1, r2);
5088 }
5089
5090
5091 static UChar *
5092 s390_emit_MDTRA(UChar *p, UChar r3, UChar m4, UChar r1, UChar r2)
5093 {
5094 vassert(s390_host_has_dfp);
5095 vassert(m4 == 0 || s390_host_has_fpext);
5096 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM)) {
5097 if (m4 == 0)
5098 s390_disasm(ENC4(MNM, FPR, FPR, FPR), "mdtr", r1, r2, r3);
5099 else
5100 s390_disasm(ENC5(MNM, FPR, FPR, FPR, UINT), "mdtra", r1, r2, r3, m4);
5101 }
5102
5103 return emit_RRF4(p, 0xb3d00000, r3, m4, r1, r2);
5104 }
5105
5106
5107 static UChar *
5108 s390_emit_MXTRA(UChar *p, UChar r3, UChar m4, UChar r1, UChar r2)
5109 {
5110 vassert(s390_host_has_dfp);
5111 vassert(m4 == 0 || s390_host_has_fpext);
5112 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM)) {
5113 if (m4 == 0)
5114 s390_disasm(ENC4(MNM, FPR, FPR, FPR), "mxtr", r1, r2, r3);
5115 else
5116 s390_disasm(ENC5(MNM, FPR, FPR, FPR, UINT), "mxtra", r1, r2, r3, m4);
5117 }
5118
5119 return emit_RRF4(p, 0xb3d80000, r3, m4, r1, r2);
5120 }
5121
5122
5123 static UChar *
5124 emit_E(UChar *p, UInt op)
5125 {
5126 ULong the_insn = op;
5127
5128 return emit_2bytes(p, the_insn);
5129 }
5130
5131
5132 static UChar *
5133 s390_emit_PFPO(UChar *p)
5134 {
5135 vassert(s390_host_has_pfpo);
5136 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM)) {
5137 s390_disasm(ENC1(MNM), "pfpo");
5138 }
5139
5140 return emit_E(p, 0x010a);
5141 }
5142
5143
5144 static UChar *
5145 s390_emit_QADTR(UChar *p, UChar r3, UChar m4, UChar r1, UChar r2)
5146 {
5147 vassert(s390_host_has_dfp);
5148 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
5149 s390_disasm(ENC5(MNM, FPR, FPR, FPR, UINT), "qadtr", r1, r3, r2, m4);
5150
5151 return emit_RRF4(p, 0xb3f50000, r3, m4, r1, r2);
5152 }
5153
5154
5155 static UChar *
5156 s390_emit_QAXTR(UChar *p, UChar r3, UChar m4, UChar r1, UChar r2)
5157 {
5158 vassert(s390_host_has_dfp);
5159 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
5160 s390_disasm(ENC5(MNM, FPR, FPR, FPR, UINT), "qaxtr", r1, r3, r2, m4);
5161
5162 return emit_RRF4(p, 0xb3fd0000, r3, m4, r1, r2);
5163 }
5164
5165
5166 static UChar *
5167 s390_emit_RRDTR(UChar *p, UChar r3, UChar m4, UChar r1, UChar r2)
5168 {
5169 vassert(s390_host_has_dfp);
5170 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
5171 s390_disasm(ENC5(MNM, FPR, FPR, GPR, UINT), "rrdtr", r1, r3, r2, m4);
5172
5173 return emit_RRF4(p, 0xb3f70000, r3, m4, r1, r2);
5174 }
5175
5176
5177 static UChar *
5178 s390_emit_RRXTR(UChar *p, UChar r3, UChar m4, UChar r1, UChar r2)
5179 {
5180 vassert(s390_host_has_dfp);
5181 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
5182 s390_disasm(ENC5(MNM, FPR, FPR, GPR, UINT), "rrxtr", r1, r3, r2, m4);
5183
5184 return emit_RRF4(p, 0xb3ff0000, r3, m4, r1, r2);
5185 }
5186
5187
5188 static UChar *
5189 s390_emit_SDTRA(UChar *p, UChar r3, UChar m4, UChar r1, UChar r2)
5190 {
5191 vassert(s390_host_has_dfp);
5192 vassert(m4 == 0 || s390_host_has_fpext);
5193 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM)) {
5194 if (m4 == 0)
5195 s390_disasm(ENC4(MNM, FPR, FPR, FPR), "sdtr", r1, r2, r3);
5196 else
5197 s390_disasm(ENC5(MNM, FPR, FPR, FPR, UINT), "sdtra", r1, r2, r3, m4);
5198 }
5199
5200 return emit_RRF4(p, 0xb3d30000, r3, m4, r1, r2);
5201 }
5202
5203
5204 static UChar *
5205 s390_emit_SXTRA(UChar *p, UChar r3, UChar m4, UChar r1, UChar r2)
5206 {
5207 vassert(s390_host_has_dfp);
5208 vassert(m4 == 0 || s390_host_has_fpext);
5209 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM)) {
5210 if (m4 == 0)
5211 s390_disasm(ENC4(MNM, FPR, FPR, FPR), "sxtr", r1, r2, r3);
5212 else
5213 s390_disasm(ENC5(MNM, FPR, FPR, FPR, UINT), "sxtra", r1, r2, r3, m4);
5214 }
5215
5216 return emit_RRF4(p, 0xb3db0000, r3, m4, r1, r2);
5217 }
5218
5219
5220 static UChar *
5221 s390_emit_SLDT(UChar *p, UChar r3, UChar r1, UChar r2)
5222 {
5223 vassert(s390_host_has_dfp);
5224 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
5225 s390_disasm(ENC4(MNM, FPR, FPR, UDXB), "sldt", r1, r3, 0, 0, r2);
5226
5227 return emit_RXF(p, 0xED0000000040ULL, r3, 0, r2, 0, r1);
5228 }
5229
5230
5231 static UChar *
5232 s390_emit_SLXT(UChar *p, UChar r3, UChar r1, UChar r2)
5233 {
5234 vassert(s390_host_has_dfp);
5235 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
5236 s390_disasm(ENC4(MNM, FPR, FPR, UDXB), "slxt", r1, r3, 0, 0, r2);
5237
5238 return emit_RXF(p, 0xED0000000048ULL, r3, 0, r2, 0, r1);
5239 }
5240
5241
5242 static UChar *
5243 s390_emit_SRDT(UChar *p, UChar r3, UChar r1, UChar r2)
5244 {
5245 vassert(s390_host_has_dfp);
5246 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
5247 s390_disasm(ENC4(MNM, FPR, FPR, UDXB), "srdt", r1, r3, 0, 0, r2);
5248
5249 return emit_RXF(p, 0xED0000000041ULL, r3, 0, r2, 0, r1);
5250 }
5251
5252
5253 static UChar *
5254 s390_emit_SRXT(UChar *p, UChar r3, UChar r1, UChar r2)
5255 {
5256 vassert(s390_host_has_dfp);
5257 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
5258 s390_disasm(ENC4(MNM, FPR, FPR, UDXB), "srxt", r1, r3, 0, 0, r2);
5259
5260 return emit_RXF(p, 0xED0000000049ULL, r3, 0, r2, 0, r1);
5261 }
5262
5263
5264 static UChar *
5265 s390_emit_LOCGR(UChar *p, UChar m3, UChar r1, UChar r2)
5266 {
5267 vassert(s390_host_has_lsc);
5268 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
5269 s390_disasm(ENC4(MNM, GPR, GPR, UINT), "locgr", r1, r2, m3);
5270
5271 return emit_RRF3(p, 0xb9e20000, m3, r1, r2);
5272 }
5273
5274
5275 static UChar *
5276 s390_emit_LOC(UChar *p, UChar r1, UChar m3, UChar b2, UShort dl2, UChar dh2)
5277 {
5278 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
5279 s390_disasm(ENC4(MNM, GPR, UINT, SDXB), "loc", r1, m3, dh2, dl2, 0, b2);
5280
5281 return emit_RSY(p, 0xeb00000000f2ULL, r1, m3, b2, dl2, dh2);
5282 }
5283
5284
5285 static UChar *
5286 s390_emit_LOCG(UChar *p, UChar r1, UChar m3, UChar b2, UShort dl2, UChar dh2)
5287 {
5288 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
5289 s390_disasm(ENC4(MNM, GPR, UINT, SDXB), "locg", r1, m3, dh2, dl2, 0, b2);
5290
5291 return emit_RSY(p, 0xeb00000000e2ULL, r1, m3, b2, dl2, dh2);
5292 }
5293
5294 static UChar *
5295 s390_emit_LOCGHI(UChar *p, UChar r1, UShort i2, UChar m3)
5296 {
5297 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
5298 s390_disasm(ENC4(MNM, GPR, INT, UINT), "locghi", r1, (Int)(Short)i2, m3);
5299
5300 return emit_RIE(p, 0xec0000000046ULL, r1, i2, m3);
5301 }
5302
5303 static UChar *
5304 s390_emit_RISBG(UChar *p, UChar r1, UChar r2, UChar i3, Char i4, UChar i5)
5305 {
5306 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
5307 s390_disasm(ENC6(MNM, GPR, GPR, UINT, UINT, UINT),
5308 "risbg", r1, r2, i3, i4, i5);
5309
5310 return emit_RIEf(p, 0xec0000000055ULL, r1, r2, i3, i4, i5);
5311 }
5312
5313
5314 /* Provide a symbolic name for register "R0" */
5315 #define R0 0
5316
5317 /* Split up a 20-bit displacement into its high and low piece
5318 suitable for passing as function arguments */
5319 #define DISP20(d) (((UInt)d) & 0xFFF), ((((UInt)d) >> 12) & 0xFF)
5320
5321 /*---------------------------------------------------------------*/
5322 /*--- Helper functions ---*/
5323 /*---------------------------------------------------------------*/
5324
5325 static __inline__ Bool
5326 uint_fits_signed_16bit(UInt val)
5327 {
5328 UInt v = val & 0xFFFFu;
5329
5330 /* sign extend */
5331 v = (Int)(v << 16) >> 16;
5332
5333 return val == v;
5334 }
5335
5336
5337 static __inline__ Bool
5338 ulong_fits_signed_16bit(ULong val)
5339 {
5340 ULong v = val & 0xFFFFu;
5341
5342 /* sign extend */
5343 v = (Long)(v << 48) >> 48;
5344
5345 return val == v;
5346 }
5347
5348
5349 static __inline__ Bool
5350 ulong_fits_signed_32bit(ULong val)
5351 {
5352 ULong v = val & 0xFFFFFFFFu;
5353
5354 /* sign extend */
5355 v = (Long)(v << 32) >> 32;
5356
5357 return val == v;
5358 }
5359
5360
5361 static __inline__ Bool
5362 ulong_fits_unsigned_32bit(ULong val)
5363 {
5364 return (val & 0xFFFFFFFFu) == val;
5365 }
5366
5367
5368 /* Load a 64-bit immediate VAL into register REG. */
5369 static UChar *
5370 s390_emit_load_64imm(UChar *p, UChar reg, ULong val)
5371 {
5372 if (ulong_fits_signed_16bit(val)) {
5373 return s390_emit_LGHI(p, reg, val);
5374 }
5375
5376 if (s390_host_has_eimm) {
5377 if (ulong_fits_unsigned_32bit(val)) {
5378 return s390_emit_LLILF(p, reg, val);
5379 }
5380 if (ulong_fits_signed_32bit(val)) {
5381 /* LGFI's sign extension will recreate the correct 64-bit value */
5382 return s390_emit_LGFI(p, reg, val);
5383 }
5384 /* Do it in two steps: upper half [0:31] and lower half [32:63] */
5385 p = s390_emit_IIHF(p, reg, val >> 32);
5386 return s390_emit_IILF(p, reg, val & 0xFFFFFFFF);
5387 }
5388
5389 /* Fall back */
5390 if (ulong_fits_unsigned_32bit(val)) {
5391 p = s390_emit_LLILH(p, reg, (val >> 16) & 0xFFFF); /* sets val[32:47]
5392 val[0:31] = 0 */
5393 p = s390_emit_IILL(p, reg, val & 0xFFFF); /* sets val[48:63] */
5394 return p;
5395 }
5396
5397 p = s390_emit_IIHH(p, reg, (val >> 48) & 0xFFFF);
5398 p = s390_emit_IIHL(p, reg, (val >> 32) & 0xFFFF);
5399 p = s390_emit_IILH(p, reg, (val >> 16) & 0xFFFF);
5400 p = s390_emit_IILL(p, reg, val & 0xFFFF);
5401
5402 return p;
5403 }
5404
5405 /* Load a 32-bit immediate VAL into register REG. */
5406 static UChar *
5407 s390_emit_load_32imm(UChar *p, UChar reg, UInt val)
5408 {
5409 if (uint_fits_signed_16bit(val)) {
5410 /* LHI's sign extension will recreate the correct 32-bit value */
5411 return s390_emit_LHI(p, reg, val);
5412 }
5413 if (s390_host_has_eimm) {
5414 return s390_emit_IILF(p, reg, val);
5415 }
5416 /* val[0:15] --> (val >> 16) & 0xFFFF
5417 val[16:31] --> val & 0xFFFF */
5418 p = s390_emit_IILH(p, reg, (val >> 16) & 0xFFFF);
5419 return s390_emit_IILL(p, reg, val & 0xFFFF);
5420 }
5421
5422 /*------------------------------------------------------------*/
5423 /*--- Wrapper functions ---*/
5424 /*------------------------------------------------------------*/
5425
5426 /* r1[32:63],r1+1[32:63] = r1+1[32:63] * memory[op2addr][0:31] */
5427 static UChar *
5428 s390_emit_MFYw(UChar *p, UChar r1, UChar x, UChar b, UShort dl, UChar dh)
5429 {
5430 if (s390_host_has_gie) {
5431 return s390_emit_MFY(p, r1, x, b, dl, dh);
5432 }
5433
5434 /* Load from memory into R0, then MULTIPLY with R1 */
5435 p = s390_emit_LY(p, R0, x, b, dl, dh);
5436 return s390_emit_MR(p, r1, R0);
5437 }
5438
5439 /* r1[32:63] = r1[32:63] * memory[op2addr][0:15] */
5440 static UChar *
5441 s390_emit_MHYw(UChar *p, UChar r1, UChar x, UChar b, UShort dl, UChar dh)
5442 {
5443 if (s390_host_has_gie) {
5444 return s390_emit_MHY(p, r1, x, b, dl, dh);
5445 }
5446
5447 /* Load from memory into R0, then MULTIPLY with R1 */
5448 p = s390_emit_LHY(p, R0, x, b, dl, dh);
5449 return s390_emit_MSR(p, r1, R0);
5450 }
5451
5452 /* r1[32:63] = r1[32:63] * i2 */
5453 static UChar *
5454 s390_emit_MSFIw(UChar *p, UChar r1, UInt i2)
5455 {
5456 if (s390_host_has_gie) {
5457 return s390_emit_MSFI(p, r1, i2);
5458 }
5459
5460 /* Load I2 into R0; then MULTIPLY R0 with R1 */
5461 p = s390_emit_load_32imm(p, R0, i2);
5462 return s390_emit_MSR(p, r1, R0);
5463 }
5464
5465
5466 /* r1[32:63] = r1[32:63] & i2 */
5467 static UChar *
5468 s390_emit_NILFw(UChar *p, UChar r1, UInt i2)
5469 {
5470 if (s390_host_has_eimm) {
5471 return s390_emit_NILF(p, r1, i2);
5472 }
5473
5474 /* Load I2 into R0; then AND R0 with R1 */
5475 p = s390_emit_load_32imm(p, R0, i2);
5476 return s390_emit_NR(p, r1, R0);
5477 }
5478
5479
5480 /* r1[32:63] = r1[32:63] | i2 */
5481 static UChar *
5482 s390_emit_OILFw(UChar *p, UChar r1, UInt i2)
5483 {
5484 if (s390_host_has_eimm) {
5485 return s390_emit_OILF(p, r1, i2);
5486 }
5487
5488 /* Load I2 into R0; then AND R0 with R1 */
5489 p = s390_emit_load_32imm(p, R0, i2);
5490 return s390_emit_OR(p, r1, R0);
5491 }
5492
5493
5494 /* r1[32:63] = r1[32:63] ^ i2 */
5495 static UChar *
5496 s390_emit_XILFw(UChar *p, UChar r1, UInt i2)
5497 {
5498 if (s390_host_has_eimm) {
5499 return s390_emit_XILF(p, r1, i2);
5500 }
5501
5502 /* Load I2 into R0; then AND R0 with R1 */
5503 p = s390_emit_load_32imm(p, R0, i2);
5504 return s390_emit_XR(p, r1, R0);
5505 }
5506
5507
5508 /* r1[32:63] = sign_extend(r2[56:63]) */
5509 static UChar *
5510 s390_emit_LBRw(UChar *p, UChar r1, UChar r2)
5511 {
5512 if (s390_host_has_eimm) {
5513 return s390_emit_LBR(p, r1, r2);
5514 }
5515
5516 p = s390_emit_LR(p, r1, r2); /* r1 = r2 */
5517 p = s390_emit_SLL(p, r1, R0, 24); /* r1 = r1 << 24 */
5518 return s390_emit_SRA(p, r1, R0, 24); /* r1 = r1 >>a 24 */
5519 }
5520
5521
5522 /* r1[0:63] = sign_extend(r2[56:63]) */
5523 static UChar *
5524 s390_emit_LGBRw(UChar *p, UChar r1, UChar r2)
5525 {
5526 if (s390_host_has_eimm) {
5527 return s390_emit_LGBR(p, r1, r2);
5528 }
5529
5530 p = s390_emit_LR(p, r1, r2); /* r1 = r2 */
5531 p = s390_emit_SLLG(p, r1, r1, R0, DISP20(56)); /* r1 = r1 << 56 */
5532 return s390_emit_SRAG(p, r1, r1, R0, DISP20(56)); /* r1 = r1 >>a 56 */
5533 }
5534
5535
5536 /* r1[32:63] = sign_extend(r2[48:63]) */
5537 static UChar *
5538 s390_emit_LHRw(UChar *p, UChar r1, UChar r2)
5539 {
5540 if (s390_host_has_eimm) {
5541 return s390_emit_LHR(p, r1, r2);
5542 }
5543
5544 p = s390_emit_LR(p, r1, r2); /* r1 = r2 */
5545 p = s390_emit_SLL(p, r1, R0, 16); /* r1 = r1 << 16 */
5546 return s390_emit_SRA(p, r1, R0, 16); /* r1 = r1 >>a 16 */
5547 }
5548
5549
5550 /* r1[0:63] = sign_extend(r2[48:63]) */
5551 static UChar *
5552 s390_emit_LGHRw(UChar *p, UChar r1, UChar r2)
5553 {
5554 if (s390_host_has_eimm) {
5555 return s390_emit_LGHR(p, r1, r2);
5556 }
5557
5558 p = s390_emit_LR(p, r1, r2); /* r1 = r2 */
5559 p = s390_emit_SLLG(p, r1, r1, R0, DISP20(48)); /* r1 = r1 << 48 */
5560 return s390_emit_SRAG(p, r1, r1, R0, DISP20(48)); /* r1 = r1 >>a 48 */
5561 }
5562
5563
5564 /* r1[0:63] = sign_extend(i2) */
5565 static UChar *
5566 s390_emit_LGFIw(UChar *p, UChar r1, UInt i2)
5567 {
5568 if (s390_host_has_eimm) {
5569 return s390_emit_LGFI(p, r1, i2);
5570 }
5571
5572 p = s390_emit_load_32imm(p, R0, i2);
5573 return s390_emit_LGFR(p, r1, R0);
5574 }
5575
5576
5577 /* r1[32:63] = zero_extend($r2[56:63]) */
5578 static UChar *
5579 s390_emit_LLCRw(UChar *p, UChar r1, UChar r2)
5580 {
5581 if (s390_host_has_eimm) {
5582 return s390_emit_LLCR(p, r1, r2);
5583 }
5584
5585 p = s390_emit_LR(p, r1, r2);
5586 p = s390_emit_LHI(p, R0, 0xFF);
5587 return s390_emit_NR(p, r1, R0);
5588 }
5589
5590
5591 /* r1[0:63] = zero_extend($r2[56:63]) */
5592 static UChar *
5593 s390_emit_LLGCRw(UChar *p, UChar r1, UChar r2)
5594 {
5595 if (s390_host_has_eimm) {
5596 return s390_emit_LLGCR(p, r1, r2);
5597 }
5598
5599 p = s390_emit_LR(p, r1, r2);
5600 p = s390_emit_LLILL(p, R0, 0xFF);
5601 return s390_emit_NGR(p, r1, R0);
5602 }
5603
5604
5605 /* r1[32:63] = zero_extend(r2[48:63]) */
5606 static UChar *
5607 s390_emit_LLHRw(UChar *p, UChar r1, UChar r2)
5608 {
5609 if (s390_host_has_eimm) {
5610 return s390_emit_LLHR(p, r1, r2);
5611 }
5612
5613 p = s390_emit_LR(p, r1, r2);
5614 p = s390_emit_LLILL(p, R0, 0xFFFF);
5615 return s390_emit_NR(p, r1, R0);
5616 }
5617
5618
5619 /* r1[0:63] = zero_extend(r2[48:63]) */
5620 static UChar *
5621 s390_emit_LLGHRw(UChar *p, UChar r1, UChar r2)
5622 {
5623 if (s390_host_has_eimm) {
5624 return s390_emit_LLGHR(p, r1, r2);
5625 }
5626
5627 p = s390_emit_LR(p, r1, r2);
5628 p = s390_emit_LLILL(p, R0, 0xFFFF);
5629 return s390_emit_NGR(p, r1, R0);
5630 }
5631
5632
5633 /* r1[32:63] = zero_extend(mem[op2addr][0:7]) */
5634 static UChar *
5635 s390_emit_LLCw(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl, UChar dh)
5636 {
5637 if (s390_host_has_eimm) {
5638 return s390_emit_LLC(p, r1, x2, b2, dl, dh);
5639 }
5640
5641 if (dh == 0) {
5642 p = s390_emit_IC(p, r1, x2, b2, dl);
5643 } else {
5644 p = s390_emit_ICY(p, r1, x2, b2, dl, dh);
5645 }
5646 p = s390_emit_LLILL(p, R0, 0xFF);
5647 return s390_emit_NR(p, r1, R0);
5648 }
5649
5650
5651 /* r1[32:63] = zero_extend(mem[op2addr][0:15]) */
5652 static UChar *
5653 s390_emit_LLHw(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl, UChar dh)
5654 {
5655 if (s390_host_has_eimm) {
5656 return s390_emit_LLH(p, r1, x2, b2, dl, dh);
5657 }
5658
5659 p = s390_emit_LLGH(p, r1, x2, b2, dl, dh);
5660 p = s390_emit_LLILL(p, R0, 0xFFFF);
5661 return s390_emit_NR(p, r1, R0);
5662 }
5663
5664
5665 /* r1[0:63] = zero_extend(i2) */
5666 static UChar *
5667 s390_emit_LLILFw(UChar *p, UChar r1, UInt i2)
5668 {
5669 if (s390_host_has_eimm) {
5670 return s390_emit_LLILF(p, r1, i2);
5671 }
5672
5673 p = s390_emit_LLILH(p, r1, (i2 >> 16) & 0xFFFF); /* i2[0:15] */
5674 return s390_emit_OILL(p, r1, i2 & 0xFFFF);
5675 }
5676
5677
5678 /* r1[32:63] = r1[32:63] + i2 */
5679 static UChar *
5680 s390_emit_AFIw(UChar *p, UChar r1, UInt i2)
5681 {
5682 if (s390_host_has_eimm) {
5683 return s390_emit_AFI(p, r1, i2);
5684 }
5685 /* Load 32 bit immediate to R0 then add */
5686 p = s390_emit_load_32imm(p, R0, i2);
5687 return s390_emit_AR(p, r1, R0);
5688 }
5689
5690
5691 /* r1[32:63] = r1[32:63] - i2 */
5692 static UChar *
5693 s390_emit_SLFIw(UChar *p, UChar r1, UInt i2)
5694 {
5695 if (s390_host_has_eimm) {
5696 return s390_emit_SLFI(p, r1, i2);
5697 }
5698
5699 /* Load 32 bit immediate to R0 then subtract */
5700 p = s390_emit_load_32imm(p, R0, i2);
5701 return s390_emit_SR(p, r1, R0);
5702 }
5703
5704
5705 /* r1[0:63] = r1[0:63] - zero_extend(i2) */
5706 static UChar *
5707 s390_emit_SLGFIw(UChar *p, UChar r1, UInt i2)
5708 {
5709 if (s390_host_has_eimm) {
5710 return s390_emit_SLGFI(p, r1, i2);
5711 }
5712
5713 /* Load zero-extended 32 bit immediate to R0 then subtract */
5714 p = s390_emit_load_64imm(p, R0, i2);
5715 return s390_emit_SGR(p, r1, R0);
5716 }
5717
5718
5719 static UChar *
5720 s390_emit_LTw(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl, UChar dh)
5721 {
5722 if (s390_host_has_eimm) {
5723 return s390_emit_LT(p, r1, x2, b2, dl, dh);
5724 }
5725 /* Load 32 bit from memory to R0 then compare */
5726 if (dh == 0) {
5727 p = s390_emit_L(p, R0, x2, b2, dl);
5728 } else {
5729 p = s390_emit_LY(p, R0, x2, b2, dl, dh);
5730 }
5731 return s390_emit_LTR(p, r1, R0);
5732 }
5733
5734
5735 static UChar *
5736 s390_emit_LTGw(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl, UChar dh)
5737 {
5738 if (s390_host_has_eimm) {
5739 return s390_emit_LTG(p, r1, x2, b2, dl, dh);
5740 }
5741 /* Load 64 bit from memory to R0 then compare */
5742 p = s390_emit_LG(p, R0, x2, b2, dl, dh);
5743 return s390_emit_LTGR(p, r1, R0);
5744 }
5745
5746
5747 static UChar *
5748 s390_emit_CFIw(UChar *p, UChar r1, UInt i2)
5749 {
5750 if (s390_host_has_eimm) {
5751 return s390_emit_CFI(p, r1, i2);
5752 }
5753 /* Load 32 bit immediate to R0 then compare */
5754 p = s390_emit_load_32imm(p, R0, i2);
5755 return s390_emit_CR(p, r1, R0);
5756 }
5757
5758
5759 static UChar *
5760 s390_emit_CLFIw(UChar *p, UChar r1, UInt i2)
5761 {
5762 if (s390_host_has_eimm) {
5763 return s390_emit_CLFI(p, r1, i2);
5764 }
5765 /* Load 32 bit immediate to R0 then compare */
5766 p = s390_emit_load_32imm(p, R0, i2);
5767 return s390_emit_CLR(p, r1, R0);
5768 }
5769
5770
5771 static UChar *
5772 s390_emit_LGDRw(UChar *p, UChar r1, UChar r2)
5773 {
5774 if (s390_host_has_fgx) {
5775 return s390_emit_LGDR(p, r1, r2);
5776 }
5777
5778 /* Store the FPR at memory[sp - 8]. This is safe because SP grows towards
5779 smaller addresses and is 8-byte aligned. Then load the GPR from that
5780 memory location/ */
5781 p = s390_emit_STDY(p, r2, R0, S390_REGNO_STACK_POINTER, DISP20(-8));
5782 return s390_emit_LG(p, r1, R0, S390_REGNO_STACK_POINTER, DISP20(-8));
5783 }
5784
5785
5786 static UChar *
5787 s390_emit_LDGRw(UChar *p, UChar r1, UChar r2)
5788 {
5789 if (s390_host_has_fgx) {
5790 return s390_emit_LDGR(p, r1, r2);
5791 }
5792
5793 /* Store the GPR at memory[sp - 8]. This is safe because SP grows towards
5794 smaller addresses and is 8-byte aligned. Then load the FPR from that
5795 memory location/ */
5796 p = s390_emit_STG(p, r2, R0, S390_REGNO_STACK_POINTER, DISP20(-8));
5797 return s390_emit_LDY(p, r1, R0, S390_REGNO_STACK_POINTER, DISP20(-8));
5798 }
5799
5800
5801 static UChar *
5802 s390_emit_VL(UChar *p, UChar v1, UChar x2, UChar b2, UShort d2)
5803 {
5804 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
5805 s390_disasm(ENC3(MNM, VR, UDXB), "vl", v1, d2, x2, b2);
5806
5807 return emit_VRX(p, 0xE70000000006ULL, v1, x2, b2, d2, 0);
5808 }
5809
5810 static UChar *
5811 s390_emit_VLR(UChar *p, UChar v1, UChar v2)
5812 {
5813 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
5814 s390_disasm(ENC3(MNM, VR, UDXB), "vlr", v1, v2);
5815
5816 return emit_VRR_VV(p, 0xE70000000056ULL, v1, v2);
5817 }
5818
5819
5820 static UChar *
5821 s390_emit_VLREP(UChar *p, UChar v1, UChar x2, UChar b2, UShort d2, UShort m3)
5822 {
5823 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
5824 s390_disasm(ENC4(MNM, VR, UDXB, UINT), "vlrep", v1, d2, x2, b2, m3);
5825
5826 return emit_VRX(p, 0xE70000000005ULL, v1, x2, b2, d2, m3);
5827 }
5828
5829
5830 static UChar *
5831 s390_emit_VST(UChar *p, UChar v1, UChar x2, UChar b2, UShort d2)
5832 {
5833 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
5834 s390_disasm(ENC3(MNM, VR, UDXB), "vst", v1, d2, x2, b2);
5835
5836 return emit_VRX(p, 0xE7000000000eULL, v1, x2, b2, d2, 0);
5837 }
5838
5839
5840 static UChar *
5841 s390_emit_VLGV(UChar *p, UChar r1, UChar b2, UShort d2, UChar v3, UChar m4)
5842 {
5843 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
5844 s390_disasm(ENC5(MNM, GPR, UDXB, VR, UINT), "vlgv", r1, d2, 0, b2, v3, m4);
5845
5846 return emit_VRS(p, 0xE70000000021ULL, r1, b2, d2, v3, m4);
5847 }
5848
5849
5850 static UChar *
5851 s390_emit_VLVG(UChar *p, UChar v1, UChar b2, UShort d2, UChar r3, UChar m4)
5852 {
5853 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
5854 s390_disasm(ENC5(MNM, VR, UDXB, GPR, UINT), "vlvg", v1, d2, 0, b2, r3, m4);
5855
5856 return emit_VRS(p, 0xE70000000022ULL, v1, b2, d2, r3, m4);
5857 }
5858
5859
5860 static UChar *
5861 s390_emit_VPERM(UChar *p, UChar v1, UChar v2, UChar v3, UChar v4)
5862 {
5863 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
5864 s390_disasm(ENC5(MNM, VR, VR, VR, VR), "vperm", v1, v2, v3, v4);
5865
5866 return emit_VRR_VVVV(p, 0xE7000000008cULL, v1, v2, v3, v4);
5867 }
5868
5869 static UChar *
5870 s390_emit_VO(UChar *p, UChar v1, UChar v2, UChar v3)
5871 {
5872 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
5873 s390_disasm(ENC4(MNM, VR, VR, VR), "vo", v1, v2, v3);
5874
5875 return emit_VRR_VVV(p, 0xE7000000006aULL, v1, v2, v3);
5876 }
5877
5878 static UChar *
5879 s390_emit_VOC(UChar *p, UChar v1, UChar v2, UChar v3)
5880 {
5881 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
5882 s390_disasm(ENC4(MNM, VR, VR, VR), "voc", v1, v2, v3);
5883
5884 return emit_VRR_VVV(p, 0xE7000000006fULL, v1, v2, v3);
5885 }
5886
5887 static UChar *
5888 s390_emit_VX(UChar *p, UChar v1, UChar v2, UChar v3)
5889 {
5890 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
5891 s390_disasm(ENC4(MNM, VR, VR, VR), "vx", v1, v2, v3);
5892
5893 return emit_VRR_VVV(p, 0xE7000000006dULL, v1, v2, v3);
5894 }
5895
5896 static UChar *
5897 s390_emit_VN(UChar *p, UChar v1, UChar v2, UChar v3)
5898 {
5899 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
5900 s390_disasm(ENC4(MNM, VR, VR, VR), "vn", v1, v2, v3);
5901
5902 return emit_VRR_VVV(p, 0xE70000000068ULL, v1, v2, v3);
5903 }
5904
5905 static UChar*
5906 s390_emit_VCEQ(UChar *p, UChar v1, UChar v2, UChar v3, UChar m4)
5907 {
5908 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
5909 s390_disasm(ENC5(MNM, VR, VR, VR, UINT), "vceq", v1, v2, v3, m4);
5910
5911 return emit_VRR_VVVM(p, 0xE700000000f8ULL, v1, v2, v3, m4);
5912 }
5913
5914
5915 static UChar *
5916 s390_emit_VGBM(UChar *p, UChar v1, UShort i2)
5917 {
5918 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
5919 s390_disasm(ENC3(MNM, VR, UINT), "vgbm", v1, i2);
5920
5921 return emit_VRI_VI(p, 0xE70000000044ULL, v1, i2);
5922 }
5923
5924
5925 static UChar *
5926 s390_emit_VPK(UChar *p, UChar v1, UChar v2, UChar v3, UChar m4)
5927 {
5928 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
5929 s390_disasm(ENC5(MNM, VR, VR, VR, UINT), "vpk", v1, v2, v3, m4);
5930
5931 return emit_VRR_VVVM(p, 0xE70000000094ULL, v1, v2, v3, m4);
5932 }
5933
5934
5935 static UChar *
5936 s390_emit_VPKS(UChar *p, UChar v1, UChar v2, UChar v3, UChar m4)
5937 {
5938 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
5939 s390_disasm(ENC6(MNM, VR, VR, VR, UINT, UINT), "vpks", v1, v2, v3, m4, 0);
5940
5941 return emit_VRR_VVVM(p, 0xE70000000097ULL, v1, v2, v3, m4);
5942 }
5943
5944
5945 static UChar *
5946 s390_emit_VPKLS(UChar *p, UChar v1, UChar v2, UChar v3, UChar m4)
5947 {
5948 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
5949 s390_disasm(ENC6(MNM, VR, VR, VR, UINT, UINT), "vpkls", v1, v2, v3, m4, 0);
5950
5951 return emit_VRR_VVVM(p, 0xE70000000095ULL, v1, v2, v3, m4);
5952 }
5953
5954
5955 static UChar *
5956 s390_emit_VREP(UChar *p, UChar v1, UChar v3, UShort i2, UChar m4)
5957 {
5958 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
5959 s390_disasm(ENC5(MNM, VR, VR, UINT, UINT), "vrep", v1, v3, i2, m4);
5960
5961 return emit_VRI_VVMM(p, 0xE7000000004DULL, v1, v3, i2, m4);
5962 }
5963
5964
5965 static UChar *
5966 s390_emit_VREPI(UChar *p, UChar v1, UShort i2, UChar m3)
5967 {
5968 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
5969 s390_disasm(ENC4(MNM, VR, UINT, UINT), "vrepi", v1, i2, m3);
5970
5971 return emit_VRI_VIM(p, 0xE70000000045ULL, v1, i2, m3);
5972 }
5973
5974
5975 static UChar *
5976 s390_emit_VUPH(UChar *p, UChar v1, UChar v3, UChar m3)
5977 {
5978 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
5979 s390_disasm(ENC4(MNM, VR, VR, UINT), "vuph", v1, v3, m3);
5980
5981 return emit_VRR_VVM(p, 0xE700000000D7ULL, v1, v3, m3);
5982 }
5983
5984
5985 static UChar *
5986 s390_emit_VUPLH(UChar *p, UChar v1, UChar v3, UChar m3)
5987 {
5988 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
5989 s390_disasm(ENC4(MNM, VR, VR, UINT), "vuplh", v1, v3, m3);
5990
5991 return emit_VRR_VVM(p, 0xE700000000D5ULL, v1, v3, m3);
5992 }
5993
5994
5995 static UChar*
5996 s390_emit_VMRH(UChar *p, UChar v1, UChar v2, UChar v3, UChar m4)
5997 {
5998 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
5999 s390_disasm(ENC5(MNM, VR, VR, VR, UINT), "vmrh", v1, v2, v3, m4);
6000
6001 return emit_VRR_VVVM(p, 0xE70000000061ULL, v1, v2, v3, m4);
6002 }
6003
6004
6005 static UChar*
6006 s390_emit_VMRL(UChar *p, UChar v1, UChar v2, UChar v3, UChar m4)
6007 {
6008 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
6009 s390_disasm(ENC5(MNM, VR, VR, VR, UINT), "vmrl", v1, v2, v3, m4);
6010
6011 return emit_VRR_VVVM(p, 0xE70000000060ULL, v1, v2, v3, m4);
6012 }
6013
6014 static UChar *
6015 s390_emit_VA(UChar *p, UChar v1, UChar v2, UChar v3, UChar m4)
6016 {
6017 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
6018 s390_disasm(ENC5(MNM, VR, VR, VR, UINT), "va", v1, v2, v3, m4);
6019
6020 return emit_VRR_VVVM(p, 0xE700000000f3ULL, v1, v2, v3, m4);
6021 }
6022
6023 static UChar *
6024 s390_emit_VS(UChar *p, UChar v1, UChar v2, UChar v3, UChar m4)
6025 {
6026 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
6027 s390_disasm(ENC5(MNM, VR, VR, VR, UINT), "vs", v1, v2, v3, m4);
6028
6029 return emit_VRR_VVVM(p, 0xE700000000f7ULL, v1, v2, v3, m4);
6030 }
6031
6032 static UChar *
6033 s390_emit_VNO(UChar *p, UChar v1, UChar v2, UChar v3)
6034 {
6035 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
6036 s390_disasm(ENC4(MNM, VR, VR, VR), "vno", v1, v2, v3);
6037
6038 return emit_VRR_VVV(p, 0xE7000000006bULL, v1, v2, v3);
6039 }
6040
6041 static UChar *
6042 s390_emit_VCH(UChar *p, UChar v1, UChar v2, UChar v3, UChar m4)
6043 {
6044 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
6045 s390_disasm(ENC5(MNM, VR, VR, VR, UINT), "vch", v1, v2, v3, m4);
6046
6047 return emit_VRR_VVVM(p, 0xE700000000fbULL, v1, v2, v3, m4);
6048 }
6049
6050 static UChar *
6051 s390_emit_VCHL(UChar *p, UChar v1, UChar v2, UChar v3, UChar m4)
6052 {
6053 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
6054 s390_disasm(ENC5(MNM, VR, VR, VR, UINT), "vchl", v1, v2, v3, m4);
6055
6056 return emit_VRR_VVVM(p, 0xE700000000f9ULL, v1, v2, v3, m4);
6057 }
6058
6059 static UChar *
6060 s390_emit_VCLZ(UChar *p, UChar v1, UChar v2, UChar m4)
6061 {
6062 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
6063 s390_disasm(ENC4(MNM, VR, VR, UINT), "vclz", v1, v2, m4);
6064
6065 return emit_VRR_VVM(p, 0xE70000000053ULL, v1, v2, m4);
6066 }
6067
6068 static UChar *
6069 s390_emit_VCTZ(UChar *p, UChar v1, UChar v2, UChar m4)
6070 {
6071 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
6072 s390_disasm(ENC4(MNM, VR, VR, UINT), "vctz", v1, v2, m4);
6073
6074 return emit_VRR_VVM(p, 0xE70000000052ULL, v1, v2, m4);
6075 }
6076
6077 static UChar *
6078 s390_emit_VPOPCT(UChar *p, UChar v1, UChar v2, UChar m4)
6079 {
6080 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
6081 s390_disasm(ENC4(MNM, VR, VR, UINT), "vpopct", v1, v2, m4);
6082
6083 return emit_VRR_VVM(p, 0xE70000000050ULL, v1, v2, m4);
6084 }
6085
6086 static UChar *
6087 s390_emit_VMX(UChar *p, UChar v1, UChar v2, UChar v3, UChar m4)
6088 {
6089 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
6090 s390_disasm(ENC5(MNM, VR, VR, VR, UINT), "vmx", v1, v2, v3, m4);
6091
6092 return emit_VRR_VVVM(p, 0xE700000000ffULL, v1, v2, v3, m4);
6093 }
6094
6095 static UChar *
6096 s390_emit_VMXL(UChar *p, UChar v1, UChar v2, UChar v3, UChar m4)
6097 {
6098 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
6099 s390_disasm(ENC5(MNM, VR, VR, VR, UINT), "vmxl", v1, v2, v3, m4);
6100
6101 return emit_VRR_VVVM(p, 0xE700000000fdULL, v1, v2, v3, m4);
6102 }
6103
6104 static UChar *
6105 s390_emit_VMN(UChar *p, UChar v1, UChar v2, UChar v3, UChar m4)
6106 {
6107 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
6108 s390_disasm(ENC5(MNM, VR, VR, VR, UINT), "vmn", v1, v2, v3, m4);
6109
6110 return emit_VRR_VVVM(p, 0xE700000000feULL, v1, v2, v3, m4);
6111 }
6112
6113 static UChar *
6114 s390_emit_VMNL(UChar *p, UChar v1, UChar v2, UChar v3, UChar m4)
6115 {
6116 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
6117 s390_disasm(ENC5(MNM, VR, VR, VR, UINT), "vmnl", v1, v2, v3, m4);
6118
6119 return emit_VRR_VVVM(p, 0xE700000000fcULL, v1, v2, v3, m4);
6120 }
6121
6122 static UChar *
6123 s390_emit_VAVG(UChar *p, UChar v1, UChar v2, UChar v3, UChar m4)
6124 {
6125 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
6126 s390_disasm(ENC5(MNM, VR, VR, VR, UINT), "vavg", v1, v2, v3, m4);
6127
6128 return emit_VRR_VVVM(p, 0xE700000000f2ULL, v1, v2, v3, m4);
6129 }
6130
6131 static UChar *
6132 s390_emit_VAVGL(UChar *p, UChar v1, UChar v2, UChar v3, UChar m4)
6133 {
6134 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
6135 s390_disasm(ENC5(MNM, VR, VR, VR, UINT), "vavgl", v1, v2, v3, m4);
6136
6137 return emit_VRR_VVVM(p, 0xE700000000f0ULL, v1, v2, v3, m4);
6138 }
6139
6140 static UChar *
6141 s390_emit_VLP(UChar *p, UChar v1, UChar v2, UChar m3)
6142 {
6143 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
6144 s390_disasm(ENC4(MNM, VR, VR, UINT), "vlp", v1, v2, m3);
6145
6146 return emit_VRR_VVM(p, 0xE700000000DFULL, v1, v2, m3);
6147 }
6148
6149 static UChar *
6150 s390_emit_VMH(UChar *p, UChar v1, UChar v2, UChar v3, UChar m4)
6151 {
6152 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
6153 s390_disasm(ENC5(MNM, VR, VR, VR, UINT), "vmh", v1, v2, v3, m4);
6154
6155 return emit_VRR_VVVM(p, 0xE700000000a3ULL, v1, v2, v3, m4);
6156 }
6157
6158 static UChar *
6159 s390_emit_VMLH(UChar *p, UChar v1, UChar v2, UChar v3, UChar m4)
6160 {
6161 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
6162 s390_disasm(ENC5(MNM, VR, VR, VR, UINT), "vmlh", v1, v2, v3, m4);
6163
6164 return emit_VRR_VVVM(p, 0xE700000000a1ULL, v1, v2, v3, m4);
6165 }
6166
6167 static UChar *
6168 s390_emit_VML(UChar *p, UChar v1, UChar v2, UChar v3, UChar m4)
6169 {
6170 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
6171 s390_disasm(ENC5(MNM, VR, VR, VR, UINT), "vml", v1, v2, v3, m4);
6172
6173 return emit_VRR_VVVM(p, 0xE700000000a2ULL, v1, v2, v3, m4);
6174 }
6175
6176 static UChar *
6177 s390_emit_VME(UChar *p, UChar v1, UChar v2, UChar v3, UChar m4)
6178 {
6179 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
6180 s390_disasm(ENC5(MNM, VR, VR, VR, UINT), "vme", v1, v2, v3, m4);
6181
6182 return emit_VRR_VVVM(p, 0xE700000000a6ULL, v1, v2, v3, m4);
6183 }
6184
6185 static UChar *
6186 s390_emit_VMLE(UChar *p, UChar v1, UChar v2, UChar v3, UChar m4)
6187 {
6188 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
6189 s390_disasm(ENC5(MNM, VR, VR, VR, UINT), "vmle", v1, v2, v3, m4);
6190
6191 return emit_VRR_VVVM(p, 0xE700000000a4ULL, v1, v2, v3, m4);
6192 }
6193
6194 static UChar *
6195 s390_emit_VESLV(UChar *p, UChar v1, UChar v2, UChar v3, UChar m4)
6196 {
6197 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
6198 s390_disasm(ENC5(MNM, VR, VR, VR, UINT), "veslv", v1, v2, v3, m4);
6199
6200 return emit_VRR_VVVM(p, 0xE70000000070ULL, v1, v2, v3, m4);
6201 }
6202
6203 static UChar *
6204 s390_emit_VESRAV(UChar *p, UChar v1, UChar v2, UChar v3, UChar m4)
6205 {
6206 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
6207 s390_disasm(ENC5(MNM, VR, VR, VR, UINT), "vesrav", v1, v2, v3, m4);
6208
6209 return emit_VRR_VVVM(p, 0xE7000000007aULL, v1, v2, v3, m4);
6210 }
6211
6212 static UChar *
6213 s390_emit_VESRLV(UChar *p, UChar v1, UChar v2, UChar v3, UChar m4)
6214 {
6215 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
6216 s390_disasm(ENC5(MNM, VR, VR, VR, UINT), "vesrlv", v1, v2, v3, m4);
6217
6218 return emit_VRR_VVVM(p, 0xE70000000078ULL, v1, v2, v3, m4);
6219 }
6220
6221 static UChar *
6222 s390_emit_VESL(UChar *p, UChar v1, UChar b2, UShort d2, UChar v3, UChar m4)
6223 {
6224 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
6225 s390_disasm(ENC5(MNM, VR, UDXB, VR, UINT), "vesl", v1, d2, 0, b2, v3, m4);
6226
6227 return emit_VRS(p, 0xE70000000030ULL, v1, b2, d2, v3, m4);
6228 }
6229
6230 static UChar *
6231 s390_emit_VESRA(UChar *p, UChar v1, UChar b2, UShort d2, UChar v3, UChar m4)
6232 {
6233 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
6234 s390_disasm(ENC5(MNM, VR, UDXB, VR, UINT), "vesra", v1, d2, 0, b2, v3, m4);
6235
6236 return emit_VRS(p, 0xE7000000003aULL, v1, b2, d2, v3, m4);
6237 }
6238
6239 static UChar *
6240 s390_emit_VESRL(UChar *p, UChar v1, UChar b2, UShort d2, UChar v3, UChar m4)
6241 {
6242 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
6243 s390_disasm(ENC5(MNM, VR, UDXB, VR, UINT), "vesrl", v1, d2, 0, b2, v3, m4);
6244
6245 return emit_VRS(p, 0xE70000000038ULL, v1, b2, d2, v3, m4);
6246 }
6247
6248 static UChar *
6249 s390_emit_VERLLV(UChar *p, UChar v1, UChar v2, UChar v3, UChar m4)
6250 {
6251 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
6252 s390_disasm(ENC5(MNM, VR, VR, VR, UINT), "verllv", v1, v2, v3, m4);
6253
6254 return emit_VRR_VVVM(p, 0xE70000000073ULL, v1, v2, v3, m4);
6255 }
6256
6257 static UChar *
6258 s390_emit_VSL(UChar *p, UChar v1, UChar v2, UChar v3)
6259 {
6260 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
6261 s390_disasm(ENC4(MNM, VR, VR, VR), "vsl", v1, v2, v3);
6262
6263 return emit_VRR_VVV(p, 0xE70000000074ULL, v1, v2, v3);
6264 }
6265
6266 static UChar *
6267 s390_emit_VSRL(UChar *p, UChar v1, UChar v2, UChar v3)
6268 {
6269 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
6270 s390_disasm(ENC4(MNM, VR, VR, VR), "vsrl", v1, v2, v3);
6271
6272 return emit_VRR_VVV(p, 0xE7000000007cULL, v1, v2, v3);
6273 }
6274
6275 static UChar *
6276 s390_emit_VSRA(UChar *p, UChar v1, UChar v2, UChar v3)
6277 {
6278 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
6279 s390_disasm(ENC4(MNM, VR, VR, VR), "vsra", v1, v2, v3);
6280
6281 return emit_VRR_VVV(p, 0xE7000000007eULL, v1, v2, v3);
6282 }
6283
6284 static UChar *
6285 s390_emit_VSLB(UChar *p, UChar v1, UChar v2, UChar v3)
6286 {
6287 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
6288 s390_disasm(ENC4(MNM, VR, VR, VR), "vslb", v1, v2, v3);
6289
6290 return emit_VRR_VVV(p, 0xE70000000075ULL, v1, v2, v3);
6291 }
6292
6293 static UChar *
6294 s390_emit_VSRLB(UChar *p, UChar v1, UChar v2, UChar v3)
6295 {
6296 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
6297 s390_disasm(ENC4(MNM, VR, VR, VR), "vsrlb", v1, v2, v3);
6298
6299 return emit_VRR_VVV(p, 0xE7000000007dULL, v1, v2, v3);
6300 }
6301
6302 static UChar *
6303 s390_emit_VSRAB(UChar *p, UChar v1, UChar v2, UChar v3)
6304 {
6305 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
6306 s390_disasm(ENC4(MNM, VR, VR, VR), "vsrab", v1, v2, v3);
6307
6308 return emit_VRR_VVV(p, 0xE7000000007fULL, v1, v2, v3);
6309 }
6310
6311 static UChar *
6312 s390_emit_VSUM(UChar *p, UChar v1, UChar v2, UChar v3, UChar m4)
6313 {
6314 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
6315 s390_disasm(ENC5(MNM, VR, VR, VR, UINT), "vsum", v1, v2, v3, m4);
6316
6317 return emit_VRR_VVVM(p, 0xE70000000064ULL, v1, v2, v3, m4);
6318 }
6319
6320 static UChar *
6321 s390_emit_VSUMG(UChar *p, UChar v1, UChar v2, UChar v3, UChar m4)
6322 {
6323 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
6324 s390_disasm(ENC5(MNM, VR, VR, VR, UINT), "vsumg", v1, v2, v3, m4);
6325
6326 return emit_VRR_VVVM(p, 0xE70000000065ULL, v1, v2, v3, m4);
6327 }
6328
6329 static UChar *
6330 s390_emit_VSUMQ(UChar *p, UChar v1, UChar v2, UChar v3, UChar m4)
6331 {
6332 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
6333 s390_disasm(ENC5(MNM, VR, VR, VR, UINT), "vsumq", v1, v2, v3, m4);
6334
6335 return emit_VRR_VVVM(p, 0xE70000000067ULL, v1, v2, v3, m4);
6336 }
6337
6338 static UChar *
6339 s390_emit_VLVGP(UChar *p, UChar v1, UChar r2, UChar r3)
6340 {
6341 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
6342 s390_disasm(ENC4(MNM, VR, GPR, GPR), "vlvgp", v1, r2, r3);
6343
6344 return emit_VRR_VRR(p, 0xE70000000062ULL, v1, r2, r3);
6345 }
6346
6347 static UChar *
6348 s390_emit_VFPSO(UChar *p, UChar v1, UChar v2, UChar m3, UChar m4, UChar m5)
6349 {
6350 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
6351 s390_disasm(ENC6(MNM, VR, VR, UINT, UINT, UINT), "vfpso", v1, v2, m3, m4,
6352 m5);
6353
6354 return emit_VRR_VVMMM(p, 0xE700000000CCULL, v1, v2, m3, m4, m5);
6355 }
6356
6357 static UChar *
6358 s390_emit_VFA(UChar *p, UChar v1, UChar v2, UChar v3, UChar m4, UChar m5)
6359 {
6360 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
6361 s390_disasm(ENC6(MNM, VR, VR, VR, UINT, UINT), "vfa", v1, v2, v3, m4, m5);
6362
6363 return emit_VRR_VVVMM(p, 0xE700000000e3ULL, v1, v2, v3, m4, m5);
6364 }
6365
6366 static UChar *
6367 s390_emit_VFS(UChar *p, UChar v1, UChar v2, UChar v3, UChar m4, UChar m5)
6368 {
6369 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
6370 s390_disasm(ENC6(MNM, VR, VR, VR, UINT, UINT), "vfs", v1, v2, v3, m4, m5);
6371
6372 return emit_VRR_VVVMM(p, 0xE700000000e2ULL, v1, v2, v3, m4, m5);
6373 }
6374
6375 static UChar *
6376 s390_emit_VFM(UChar *p, UChar v1, UChar v2, UChar v3, UChar m4, UChar m5)
6377 {
6378 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
6379 s390_disasm(ENC6(MNM, VR, VR, VR, UINT, UINT), "vfm", v1, v2, v3, m4, m5);
6380
6381 return emit_VRR_VVVMM(p, 0xE700000000e7ULL, v1, v2, v3, m4, m5);
6382 }
6383
6384 static UChar *
6385 s390_emit_VFD(UChar *p, UChar v1, UChar v2, UChar v3, UChar m4, UChar m5)
6386 {
6387 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
6388 s390_disasm(ENC6(MNM, VR, VR, VR, UINT, UINT), "vfd", v1, v2, v3, m4, m5);
6389
6390 return emit_VRR_VVVMM(p, 0xE700000000e5ULL, v1, v2, v3, m4, m5);
6391 }
6392
6393 static UChar *
6394 s390_emit_VFSQ(UChar *p, UChar v1, UChar v2, UChar m3, UChar m4)
6395 {
6396 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
6397 s390_disasm(ENC5(MNM, VR, VR, UINT, UINT), "vfsq", v1, v2, m3, m4);
6398
6399 return emit_VRR_VVMMM(p, 0xE700000000CEULL, v1, v2, m3, m4, 0);
6400 }
6401
6402 static UChar *
6403 s390_emit_VFMA(UChar *p, UChar v1, UChar v2, UChar v3, UChar v4, UChar m5,
6404 UChar m6)
6405 {
6406 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
6407 s390_disasm(ENC7(MNM, VR, VR, VR, VR, UINT, UINT), "vfma",
6408 v1, v2, v3, v4, m5, m6);
6409
6410 return emit_VRRe_VVVVMM(p, 0xE7000000008fULL, v1, v2, v3, v4, m5, m6);
6411 }
6412
6413 static UChar *
6414 s390_emit_VFMS(UChar *p, UChar v1, UChar v2, UChar v3, UChar v4, UChar m5,
6415 UChar m6)
6416 {
6417 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
6418 s390_disasm(ENC7(MNM, VR, VR, VR, VR, UINT, UINT), "vfms",
6419 v1, v2, v3, v4, m5, m6);
6420
6421 return emit_VRRe_VVVVMM(p, 0xE7000000008eULL, v1, v2, v3, v4, m5, m6);
6422 }
6423
6424 static UChar *
6425 s390_emit_VFCE(UChar *p, UChar v1, UChar v2, UChar v3, UChar m4, UChar m5,
6426 UChar m6)
6427 {
6428 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
6429 s390_disasm(ENC7(MNM, VR, VR, VR, UINT, UINT, UINT), "vfce",
6430 v1, v2, v3, m4, m5, m6);
6431
6432 return emit_VRR_VVVMMM(p, 0xE700000000e8ULL, v1, v2, v3, m4, m5, m6);
6433 }
6434
6435 static UChar *
6436 s390_emit_VFCH(UChar *p, UChar v1, UChar v2, UChar v3, UChar m4, UChar m5,
6437 UChar m6)
6438 {
6439 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
6440 s390_disasm(ENC7(MNM, VR, VR, VR, UINT, UINT, UINT), "vfch",
6441 v1, v2, v3, m4, m5, m6);
6442
6443 return emit_VRR_VVVMMM(p, 0xE700000000ebULL, v1, v2, v3, m4, m5, m6);
6444 }
6445
6446 static UChar *
6447 s390_emit_VFCHE(UChar *p, UChar v1, UChar v2, UChar v3, UChar m4, UChar m5,
6448 UChar m6)
6449 {
6450 if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
6451 s390_disasm(ENC7(MNM, VR, VR, VR, UINT, UINT, UINT), "vfche",
6452 v1, v2, v3, m4, m5, m6);
6453
6454 return emit_VRR_VVVMMM(p, 0xE700000000eaULL, v1, v2, v3, m4, m5, m6);
6455 }
6456
6457 /*---------------------------------------------------------------*/
6458 /*--- Constructors for the various s390_insn kinds ---*/
6459 /*---------------------------------------------------------------*/
6460
6461 s390_insn *
6462 s390_insn_load(UChar size, HReg dst, s390_amode *src)
6463 {
6464 s390_insn *insn = LibVEX_Alloc_inline(sizeof(s390_insn));
6465
6466 insn->tag = S390_INSN_LOAD;
6467 insn->size = size;
6468 insn->variant.load.src = src;
6469 insn->variant.load.dst = dst;
6470
6471 vassert(size == 1 || size == 2 || size == 4 || size == 8 || size == 16);
6472
6473 return insn;
6474 }
6475
6476
6477 s390_insn *
6478 s390_insn_store(UChar size, s390_amode *dst, HReg src)
6479 {
6480 s390_insn *insn = LibVEX_Alloc_inline(sizeof(s390_insn));
6481
6482 insn->tag = S390_INSN_STORE;
6483 insn->size = size;
6484 insn->variant.store.src = src;
6485 insn->variant.store.dst = dst;
6486
6487 vassert(size == 1 || size == 2 || size == 4 || size == 8 || size == 16);
6488
6489 return insn;
6490 }
6491
6492
6493 s390_insn *
6494 s390_insn_move(UChar size, HReg dst, HReg src)
6495 {
6496 s390_insn *insn = LibVEX_Alloc_inline(sizeof(s390_insn));
6497
6498 insn->tag = S390_INSN_MOVE;
6499 insn->size = size;
6500 insn->variant.move.src = src;
6501 insn->variant.move.dst = dst;
6502
6503 vassert(size == 1 || size == 2 || size == 4 || size == 8 || size ==16);
6504
6505 return insn;
6506 }
6507
6508
6509 s390_insn *
6510 s390_insn_memcpy(UChar size, s390_amode *dst, s390_amode *src)
6511 {
6512 s390_insn *insn = LibVEX_Alloc_inline(sizeof(s390_insn));
6513
6514 /* This insn will be mapped to MVC which requires base register
6515 plus 12-bit displacement */
6516 vassert(src->tag == S390_AMODE_B12);
6517 vassert(dst->tag == S390_AMODE_B12);
6518
6519 insn->tag = S390_INSN_MEMCPY;
6520 insn->size = size;
6521 insn->variant.memcpy.src = src;
6522 insn->variant.memcpy.dst = dst;
6523
6524 vassert(size == 1 || size == 2 || size == 4 || size == 8 || size == 16);
6525
6526 return insn;
6527 }
6528
6529
6530 s390_insn *
6531 s390_insn_cond_move(UChar size, s390_cc_t cond, HReg dst, s390_opnd_RMI src)
6532 {
6533 s390_insn *insn = LibVEX_Alloc_inline(sizeof(s390_insn));
6534
6535 insn->tag = S390_INSN_COND_MOVE;
6536 insn->size = size;
6537 insn->variant.cond_move.cond = cond;
6538 insn->variant.cond_move.src = src;
6539 insn->variant.cond_move.dst = dst;
6540
6541 vassert(size == 1 || size == 2 || size == 4 || size == 8 || size == 16);
6542
6543 return insn;
6544 }
6545
6546
6547 s390_insn *
6548 s390_insn_load_immediate(UChar size, HReg dst, ULong value)
6549 {
6550 s390_insn *insn = LibVEX_Alloc_inline(sizeof(s390_insn));
6551
6552 insn->tag = S390_INSN_LOAD_IMMEDIATE;
6553 insn->size = size;
6554 insn->variant.load_immediate.dst = dst;
6555 insn->variant.load_immediate.value = value;
6556
6557 return insn;
6558 }
6559
6560
6561 s390_insn *
6562 s390_insn_alu(UChar size, s390_alu_t tag, HReg dst, s390_opnd_RMI op2)
6563 {
6564 s390_insn *insn = LibVEX_Alloc_inline(sizeof(s390_insn));
6565
6566 insn->tag = S390_INSN_ALU;
6567 insn->size = size;
6568 insn->variant.alu.tag = tag;
6569 insn->variant.alu.dst = dst;
6570 insn->variant.alu.op2 = op2;
6571
6572 return insn;
6573 }
6574
6575
6576 s390_insn *
6577 s390_insn_mul(UChar size, HReg dst_hi, HReg dst_lo, s390_opnd_RMI op2,
6578 Bool signed_multiply)
6579 {
6580 s390_insn *insn = LibVEX_Alloc_inline(sizeof(s390_insn));
6581
6582 vassert(! hregIsVirtual(dst_hi));
6583 vassert(! hregIsVirtual(dst_lo));
6584
6585 insn->tag = signed_multiply ? S390_INSN_SMUL : S390_INSN_UMUL;
6586 insn->size = size;
6587 insn->variant.mul.dst_hi = dst_hi;
6588 insn->variant.mul.dst_lo = dst_lo;
6589 insn->variant.mul.op2 = op2;
6590
6591 return insn;
6592 }
6593
6594
6595 s390_insn *
6596 s390_insn_div(UChar size, HReg op1_hi, HReg op1_lo, s390_opnd_RMI op2,
6597 Bool signed_divide)
6598 {
6599 s390_insn *insn = LibVEX_Alloc_inline(sizeof(s390_insn));
6600
6601 vassert(size == 4 || size == 8);
6602 vassert(! hregIsVirtual(op1_hi));
6603 vassert(! hregIsVirtual(op1_lo));
6604
6605 insn->tag = signed_divide ? S390_INSN_SDIV : S390_INSN_UDIV;
6606 insn->size = size;
6607 insn->variant.div.op1_hi = op1_hi;
6608 insn->variant.div.op1_lo = op1_lo;
6609 insn->variant.div.op2 = op2;
6610
6611 return insn;
6612 }
6613
6614
6615 s390_insn *
6616 s390_insn_divs(UChar size, HReg rem, HReg op1, s390_opnd_RMI op2)
6617 {
6618 s390_insn *insn = LibVEX_Alloc_inline(sizeof(s390_insn));
6619
6620 vassert(size == 8);
6621 vassert(! hregIsVirtual(op1));
6622 vassert(! hregIsVirtual(rem));
6623
6624 insn->tag = S390_INSN_DIVS;
6625 insn->size = size;
6626 insn->variant.divs.rem = rem; /* remainder */
6627 insn->variant.divs.op1 = op1; /* also quotient */
6628 insn->variant.divs.op2 = op2;
6629
6630 return insn;
6631 }
6632
6633
6634 s390_insn *
6635 s390_insn_clz(UChar size, HReg num_bits, HReg clobber, s390_opnd_RMI src)
6636 {
6637 s390_insn *insn = LibVEX_Alloc_inline(sizeof(s390_insn));
6638
6639 vassert(size == 8);
6640 vassert(! hregIsVirtual(num_bits));
6641 vassert(! hregIsVirtual(clobber));
6642
6643 insn->tag = S390_INSN_CLZ;
6644 insn->size = size;
6645 insn->variant.clz.num_bits = num_bits;
6646 insn->variant.clz.clobber = clobber;
6647 insn->variant.clz.src = src;
6648
6649 return insn;
6650 }
6651
6652
6653 s390_insn *
6654 s390_insn_unop(UChar size, s390_unop_t tag, HReg dst, s390_opnd_RMI opnd)
6655 {
6656 s390_insn *insn = LibVEX_Alloc_inline(sizeof(s390_insn));
6657
6658 insn->tag = S390_INSN_UNOP;
6659 insn->size = size;
6660 insn->variant.unop.tag = tag;
6661 insn->variant.unop.dst = dst;
6662 insn->variant.unop.src = opnd;
6663
6664 return insn;
6665 }
6666
6667
6668 s390_insn *
6669 s390_insn_test(UChar size, s390_opnd_RMI src)
6670 {
6671 s390_insn *insn = LibVEX_Alloc_inline(sizeof(s390_insn));
6672
6673 vassert(size == 1 || size == 2 || size == 4 || size == 8);
6674
6675 insn->tag = S390_INSN_TEST;
6676 insn->size = size;
6677 insn->variant.test.src = src;
6678
6679 return insn;
6680 }
6681
6682
6683 s390_insn *
6684 s390_insn_cc2bool(HReg dst, s390_cc_t cond)
6685 {
6686 s390_insn *insn = LibVEX_Alloc_inline(sizeof(s390_insn));
6687
6688 insn->tag = S390_INSN_CC2BOOL;
6689 insn->size = 0; /* does not matter */
6690 insn->variant.cc2bool.cond = cond;
6691 insn->variant.cc2bool.dst = dst;
6692
6693 return insn;
6694 }
6695
6696
6697 s390_insn *
6698 s390_insn_cas(UChar size, HReg op1, s390_amode *op2, HReg op3, HReg old_mem)
6699 {
6700 s390_insn *insn = LibVEX_Alloc_inline(sizeof(s390_insn));
6701
6702 vassert(size == 4 || size == 8);
6703 vassert(hregNumber(op2->x) == 0);
6704 vassert(op2->tag == S390_AMODE_B12 || op2->tag == S390_AMODE_B20);
6705
6706 insn->tag = S390_INSN_CAS;
6707 insn->size = size;
6708 insn->variant.cas.op1 = op1;
6709 insn->variant.cas.op2 = op2;
6710 insn->variant.cas.op3 = op3;
6711 insn->variant.cas.old_mem = old_mem;
6712
6713 return insn;
6714 }
6715
6716
6717 s390_insn *
6718 s390_insn_cdas(UChar size, HReg op1_high, HReg op1_low, s390_amode *op2,
6719 HReg op3_high, HReg op3_low, HReg old_mem_high, HReg old_mem_low,
6720 HReg scratch)
6721 {
6722 s390_insn *insn = LibVEX_Alloc_inline(sizeof(s390_insn));
6723 s390_cdas *cdas = LibVEX_Alloc_inline(sizeof(s390_cdas));
6724
6725 vassert(size == 4 || size == 8);
6726 vassert(hregNumber(op2->x) == 0);
6727 vassert(hregNumber(scratch) == 1); /* r0,r1 used as scratch reg pair */
6728 vassert(op2->tag == S390_AMODE_B12 || op2->tag == S390_AMODE_B20);
6729
6730 insn->tag = S390_INSN_CDAS;
6731 insn->size = size;
6732 insn->variant.cdas.details = cdas;
6733
6734 cdas->op1_high = op1_high;
6735 cdas->op1_low = op1_low;
6736 cdas->op2 = op2;
6737 cdas->op3_high = op3_high;
6738 cdas->op3_low = op3_low;
6739 cdas->old_mem_high = old_mem_high;
6740 cdas->old_mem_low = old_mem_low;
6741 cdas->scratch = scratch;
6742
6743 return insn;
6744 }
6745
6746
6747 s390_insn *
6748 s390_insn_compare(UChar size, HReg src1, s390_opnd_RMI src2,
6749 Bool signed_comparison)
6750 {
6751 s390_insn *insn = LibVEX_Alloc_inline(sizeof(s390_insn));
6752
6753 vassert(size == 4 || size == 8);
6754
6755 insn->tag = S390_INSN_COMPARE;
6756 insn->size = size;
6757 insn->variant.compare.src1 = src1;
6758 insn->variant.compare.src2 = src2;
6759 insn->variant.compare.signed_comparison = signed_comparison;
6760
6761 return insn;
6762 }
6763
6764
6765 s390_insn *
6766 s390_insn_helper_call(s390_cc_t cond, Addr64 target, UInt num_args,
6767 const HChar *name, RetLoc rloc)
6768 {
6769 s390_insn *insn = LibVEX_Alloc_inline(sizeof(s390_insn));
6770 s390_helper_call *helper_call = LibVEX_Alloc_inline(sizeof(s390_helper_call));
6771
6772 insn->tag = S390_INSN_HELPER_CALL;
6773 insn->size = 0; /* does not matter */
6774 insn->variant.helper_call.details = helper_call;
6775
6776 helper_call->cond = cond;
6777 helper_call->target = target;
6778 helper_call->num_args = num_args;
6779 helper_call->name = name;
6780 helper_call->rloc = rloc;
6781
6782 vassert(is_sane_RetLoc(rloc));
6783
6784 return insn;
6785 }
6786
6787
6788 s390_insn *
6789 s390_insn_bfp_triop(UChar size, s390_bfp_triop_t tag, HReg dst, HReg op2,
6790 HReg op3)
6791 {
6792 s390_insn *insn = LibVEX_Alloc_inline(sizeof(s390_insn));
6793
6794 vassert(size == 4 || size == 8);
6795
6796 insn->tag = S390_INSN_BFP_TRIOP;
6797 insn->size = size;
6798 insn->variant.bfp_triop.tag = tag;
6799 insn->variant.bfp_triop.dst = dst;
6800 insn->variant.bfp_triop.op2 = op2;
6801 insn->variant.bfp_triop.op3 = op3;
6802
6803 return insn;
6804 }
6805
6806
6807 s390_insn *
6808 s390_insn_bfp_binop(UChar size, s390_bfp_binop_t tag, HReg dst, HReg op2)
6809 {
6810 s390_insn *insn = LibVEX_Alloc_inline(sizeof(s390_insn));
6811
6812 vassert(size == 4 || size == 8);
6813
6814 insn->tag = S390_INSN_BFP_BINOP;
6815 insn->size = size;
6816 insn->variant.bfp_binop.tag = tag;
6817 insn->variant.bfp_binop.dst_hi = dst;
6818 insn->variant.bfp_binop.op2_hi = op2;
6819 insn->variant.bfp_binop.dst_lo = INVALID_HREG;
6820 insn->variant.bfp_binop.op2_lo = INVALID_HREG;
6821
6822 return insn;
6823 }
6824
6825
6826 s390_insn *
6827 s390_insn_bfp_unop(UChar size, s390_bfp_unop_t tag, HReg dst, HReg op)
6828 {
6829 s390_insn *insn = LibVEX_Alloc_inline(sizeof(s390_insn));
6830
6831 vassert(size == 4 || size == 8);
6832
6833 insn->tag = S390_INSN_BFP_UNOP;
6834 insn->size = size;
6835 insn->variant.bfp_unop.tag = tag;
6836 insn->variant.bfp_unop.dst_hi = dst;
6837 insn->variant.bfp_unop.op_hi = op;
6838 insn->variant.bfp_unop.dst_lo = INVALID_HREG;
6839 insn->variant.bfp_unop.op_lo = INVALID_HREG;
6840
6841 return insn;
6842 }
6843
6844
6845 s390_insn *
6846 s390_insn_bfp_compare(UChar size, HReg dst, HReg op1, HReg op2)
6847 {
6848 s390_insn *insn = LibVEX_Alloc_inline(sizeof(s390_insn));
6849
6850 vassert(size == 4 || size == 8);
6851
6852 insn->tag = S390_INSN_BFP_COMPARE;
6853 insn->size = size;
6854 insn->variant.bfp_compare.dst = dst;
6855 insn->variant.bfp_compare.op1_hi = op1;
6856 insn->variant.bfp_compare.op2_hi = op2;
6857 insn->variant.bfp_compare.op1_lo = INVALID_HREG;
6858 insn->variant.bfp_compare.op2_lo = INVALID_HREG;
6859
6860 return insn;
6861 }
6862
6863
6864 s390_insn *
6865 s390_insn_bfp_convert(UChar size, s390_bfp_conv_t tag, HReg dst, HReg op,
6866 s390_bfp_round_t rounding_mode)
6867 {
6868 s390_insn *insn = LibVEX_Alloc_inline(sizeof(s390_insn));
6869
6870 vassert(size == 4 || size == 8);
6871
6872 insn->tag = S390_INSN_BFP_CONVERT;
6873 insn->size = size;
6874 insn->variant.bfp_convert.tag = tag;
6875 insn->variant.bfp_convert.dst_hi = dst;
6876 insn->variant.bfp_convert.op_hi = op;
6877 insn->variant.bfp_convert.dst_lo = INVALID_HREG;
6878 insn->variant.bfp_convert.op_lo = INVALID_HREG;
6879 insn->variant.bfp_convert.rounding_mode = rounding_mode;
6880
6881 return insn;
6882 }
6883
6884
6885 /* Check validity of a register pair for 128-bit FP. Valid register
6886 pairs are (0,2), (1,3), (4, 6), (5, 7), (8, 10), (9, 11), (12, 14),
6887 and (13, 15). */
6888 static Bool
6889 is_valid_fp128_regpair(HReg hi, HReg lo)
6890 {
6891 UInt hi_regno = hregNumber(hi);
6892 UInt lo_regno = hregNumber(lo);
6893
6894 if (lo_regno != hi_regno + 2) return False;
6895 if ((hi_regno & 0x2) != 0) return False;
6896
6897 return True;
6898 }
6899
6900 s390_insn *
6901 s390_insn_bfp128_binop(UChar size, s390_bfp_binop_t tag, HReg dst_hi,
6902 HReg dst_lo, HReg op2_hi, HReg op2_lo)
6903 {
6904 s390_insn *insn = LibVEX_Alloc_inline(sizeof(s390_insn));
6905
6906 vassert(size == 16);
6907 vassert(is_valid_fp128_regpair(dst_hi, dst_lo));
6908 vassert(is_valid_fp128_regpair(op2_hi, op2_lo));
6909
6910 insn->tag = S390_INSN_BFP_BINOP;
6911 insn->size = size;
6912 insn->variant.bfp_binop.tag = tag;
6913 insn->variant.bfp_binop.dst_hi = dst_hi;
6914 insn->variant.bfp_binop.dst_lo = dst_lo;
6915 insn->variant.bfp_binop.op2_hi = op2_hi;
6916 insn->variant.bfp_binop.op2_lo = op2_lo;
6917
6918 return insn;
6919 }
6920
6921
6922 s390_insn *
6923 s390_insn_bfp128_unop(UChar size, s390_bfp_unop_t tag, HReg dst_hi,
6924 HReg dst_lo, HReg op_hi, HReg op_lo)
6925 {
6926 s390_insn *insn = LibVEX_Alloc_inline(sizeof(s390_insn));
6927
6928 vassert(size == 16);
6929 vassert(is_valid_fp128_regpair(dst_hi, dst_lo));
6930 vassert(is_valid_fp128_regpair(op_hi, op_lo));
6931
6932 insn->tag = S390_INSN_BFP_UNOP;
6933 insn->size = size;
6934 insn->variant.bfp_unop.tag = tag;
6935 insn->variant.bfp_unop.dst_hi = dst_hi;
6936 insn->variant.bfp_unop.dst_lo = dst_lo;
6937 insn->variant.bfp_unop.op_hi = op_hi;
6938 insn->variant.bfp_unop.op_lo = op_lo;
6939
6940 return insn;
6941 }
6942
6943
6944 s390_insn *
6945 s390_insn_bfp128_compare(UChar size, HReg dst, HReg op1_hi, HReg op1_lo,
6946 HReg op2_hi, HReg op2_lo)
6947 {
6948 s390_insn *insn = LibVEX_Alloc_inline(sizeof(s390_insn));
6949
6950 vassert(size == 16);
6951 vassert(is_valid_fp128_regpair(op1_hi, op1_lo));
6952 vassert(is_valid_fp128_regpair(op2_hi, op2_lo));
6953
6954 insn->tag = S390_INSN_BFP_COMPARE;
6955 insn->size = size;
6956 insn->variant.bfp_compare.dst = dst;
6957 insn->variant.bfp_compare.op1_hi = op1_hi;
6958 insn->variant.bfp_compare.op1_lo = op1_lo;
6959 insn->variant.bfp_compare.op2_hi = op2_hi;
6960 insn->variant.bfp_compare.op2_lo = op2_lo;
6961
6962 return insn;
6963 }
6964
6965
6966 s390_insn *
6967 s390_insn_bfp128_convert(UChar size, s390_bfp_conv_t tag, HReg dst_hi,
6968 HReg dst_lo, HReg op_hi, HReg op_lo,
6969 s390_bfp_round_t rounding_mode)
6970 {
6971 s390_insn *insn = LibVEX_Alloc_inline(sizeof(s390_insn));
6972
6973 if (size == 16) {
6974 /* From smaller or equal size to 16 bytes */
6975 vassert(is_valid_fp128_regpair(dst_hi, dst_lo));
6976 vassert(hregIsInvalid(op_lo)
6977 || is_valid_fp128_regpair(op_hi, op_lo));
6978 } else {
6979 /* From 16 bytes to smaller size */
6980 vassert(is_valid_fp128_regpair(op_hi, op_lo));
6981 }
6982
6983 insn->tag = S390_INSN_BFP_CONVERT;
6984 insn->size = size;
6985 insn->variant.bfp_convert.tag = tag;
6986 insn->variant.bfp_convert.dst_hi = dst_hi;
6987 insn->variant.bfp_convert.dst_lo = dst_lo;
6988 insn->variant.bfp_convert.op_hi = op_hi;
6989 insn->variant.bfp_convert.op_lo = op_lo;
6990 insn->variant.bfp_convert.rounding_mode = rounding_mode;
6991
6992 return insn;
6993 }
6994
6995
6996 s390_insn *
6997 s390_insn_bfp128_convert_to(UChar size, s390_bfp_conv_t tag, HReg dst_hi,
6998 HReg dst_lo, HReg op)
6999 {
7000 /* Conversion to bfp128 never requires a rounding mode. Provide default
7001 rounding mode. It will not be used when emitting insns. */
7002 s390_bfp_round_t rounding_mode = S390_BFP_ROUND_NEAREST_EVEN;
7003
7004 return s390_insn_bfp128_convert(size, tag, dst_hi, dst_lo, op,
7005 INVALID_HREG, rounding_mode);
7006 }
7007
7008
7009 s390_insn *
7010 s390_insn_bfp128_convert_from(UChar size, s390_bfp_conv_t tag, HReg dst_hi,
7011 HReg dst_lo, HReg op_hi, HReg op_lo,
7012 s390_bfp_round_t rounding_mode)
7013 {
7014 return s390_insn_bfp128_convert(size, tag, dst_hi, dst_lo, op_hi, op_lo,
7015 rounding_mode);
7016 }
7017
7018
7019 s390_insn *
7020 s390_insn_dfp_binop(UChar size, s390_dfp_binop_t tag, HReg dst, HReg op2,
7021 HReg op3, s390_dfp_round_t rounding_mode)
7022 {
7023 s390_insn *insn = LibVEX_Alloc_inline(sizeof(s390_insn));
7024 s390_dfp_binop *dfp_binop = LibVEX_Alloc_inline(sizeof(s390_dfp_binop));
7025
7026 vassert(size == 8);
7027
7028 insn->tag = S390_INSN_DFP_BINOP;
7029 insn->size = size;
7030 insn->variant.dfp_binop.details = dfp_binop;
7031
7032 dfp_binop->tag = tag;
7033 dfp_binop->dst_hi = dst;
7034 dfp_binop->op2_hi = op2;
7035 dfp_binop->op3_hi = op3;
7036 dfp_binop->dst_lo = INVALID_HREG;
7037 dfp_binop->op2_lo = INVALID_HREG;
7038 dfp_binop->op3_lo = INVALID_HREG;
7039 dfp_binop->rounding_mode = rounding_mode;
7040
7041 return insn;
7042 }
7043
7044
7045 s390_insn *
7046 s390_insn_dfp_unop(UChar size, s390_dfp_unop_t tag, HReg dst, HReg op)
7047 {
7048 s390_insn *insn = LibVEX_Alloc_inline(sizeof(s390_insn));
7049
7050 vassert(size == 8);
7051
7052 insn->tag = S390_INSN_DFP_UNOP;
7053 insn->size = size;
7054 insn->variant.dfp_unop.tag = tag;
7055 insn->variant.dfp_unop.dst_hi = dst;
7056 insn->variant.dfp_unop.op_hi = op;
7057 insn->variant.dfp_unop.dst_lo = INVALID_HREG;
7058 insn->variant.dfp_unop.op_lo = INVALID_HREG;
7059
7060 return insn;
7061 }
7062
7063
7064 s390_insn *
7065 s390_insn_dfp_intop(UChar size, s390_dfp_intop_t tag, HReg dst, HReg op2,
7066 HReg op3)
7067 {
7068 s390_insn *insn = LibVEX_Alloc_inline(sizeof(s390_insn));
7069
7070 vassert(size == 8);
7071
7072 insn->tag = S390_INSN_DFP_INTOP;
7073 insn->size = size;
7074 insn->variant.dfp_intop.tag = tag;
7075 insn->variant.dfp_intop.dst_hi = dst;
7076 insn->variant.dfp_intop.op2 = op2;
7077 insn->variant.dfp_intop.op3_hi = op3;
7078 insn->variant.dfp_intop.dst_lo = INVALID_HREG;
7079 insn->variant.dfp_intop.op3_lo = INVALID_HREG;
7080
7081 return insn;
7082 }
7083
7084
7085 s390_insn *
7086 s390_insn_dfp_compare(UChar size, s390_dfp_cmp_t tag, HReg dst,
7087 HReg op1, HReg op2)
7088 {
7089 s390_insn *insn = LibVEX_Alloc_inline(sizeof(s390_insn));
7090
7091 vassert(size == 8);
7092
7093 insn->tag = S390_INSN_DFP_COMPARE;
7094 insn->size = size;
7095 insn->variant.dfp_compare.tag = tag;
7096 insn->variant.dfp_compare.dst = dst;
7097 insn->variant.dfp_compare.op1_hi = op1;
7098 insn->variant.dfp_compare.op2_hi = op2;
7099 insn->variant.dfp_compare.op1_lo = INVALID_HREG;
7100 insn->variant.dfp_compare.op2_lo = INVALID_HREG;
7101
7102 return insn;
7103 }
7104
7105
7106 s390_insn *
7107 s390_insn_dfp_convert(UChar size, s390_dfp_conv_t tag, HReg dst, HReg op,
7108 s390_dfp_round_t rounding_mode)
7109 {
7110 s390_insn *insn = LibVEX_Alloc_inline(sizeof(s390_insn));
7111
7112 vassert(size == 4 || size == 8);
7113
7114 insn->tag = S390_INSN_DFP_CONVERT;
7115 insn->size = size;
7116 insn->variant.dfp_convert.tag = tag;
7117 insn->variant.dfp_convert.dst_hi = dst;
7118 insn->variant.dfp_convert.op_hi = op;
7119 insn->variant.dfp_convert.dst_lo = INVALID_HREG;
7120 insn->variant.dfp_convert.op_lo = INVALID_HREG;
7121 insn->variant.dfp_convert.rounding_mode = rounding_mode;
7122
7123 return insn;
7124 }
7125
7126
7127 s390_insn *
7128 s390_insn_dfp_reround(UChar size, HReg dst, HReg op2, HReg op3,
7129 s390_dfp_round_t rounding_mode)
7130 {
7131 s390_insn *insn = LibVEX_Alloc_inline(sizeof(s390_insn));
7132
7133 vassert(size == 8);
7134
7135 insn->tag = S390_INSN_DFP_REROUND;
7136 insn->size = size;
7137 insn->variant.dfp_reround.dst_hi = dst;
7138 insn->variant.dfp_reround.op2 = op2;
7139 insn->variant.dfp_reround.op3_hi = op3;
7140 insn->variant.dfp_reround.dst_lo = INVALID_HREG;
7141 insn->variant.dfp_reround.op3_lo = INVALID_HREG;
7142 insn->variant.dfp_reround.rounding_mode = rounding_mode;
7143
7144 return insn;
7145 }
7146
7147
7148 s390_insn *
7149 s390_insn_fp_convert(UChar size, s390_fp_conv_t tag, HReg dst, HReg op,
7150 HReg r1, s390_dfp_round_t rounding_mode)
7151 {
7152 s390_insn *insn = LibVEX_Alloc_inline(sizeof(s390_insn));
7153 s390_fp_convert *fp_convert = LibVEX_Alloc_inline(sizeof(s390_fp_convert));
7154
7155 vassert(size == 4 || size == 8);
7156
7157 insn->tag = S390_INSN_FP_CONVERT;
7158 insn->size = size;
7159 insn->variant.fp_convert.details = fp_convert;
7160
7161 fp_convert->tag = tag;
7162 fp_convert->dst_hi = dst;
7163 fp_convert->op_hi = op;
7164 fp_convert->r1 = r1;
7165 fp_convert->dst_lo = INVALID_HREG;
7166 fp_convert->op_lo = INVALID_HREG;
7167 fp_convert->rounding_mode = rounding_mode;
7168
7169 return insn;
7170 }
7171
7172
7173 s390_insn *
7174 s390_insn_fp128_convert(UChar size, s390_fp_conv_t tag, HReg dst_hi,
7175 HReg dst_lo, HReg op_hi, HReg op_lo, HReg r1,
7176 s390_dfp_round_t rounding_mode)
7177 {
7178 s390_insn *insn = LibVEX_Alloc_inline(sizeof(s390_insn));
7179 s390_fp_convert *fp_convert = LibVEX_Alloc_inline(sizeof(s390_fp_convert));
7180
7181 vassert(size == 16);
7182
7183 insn->tag = S390_INSN_FP_CONVERT;
7184 insn->size = size;
7185 insn->variant.fp_convert.details = fp_convert;
7186
7187 fp_convert->tag = tag;
7188 fp_convert->dst_hi = dst_hi;
7189 fp_convert->dst_lo = dst_lo;
7190 fp_convert->op_hi = op_hi;
7191 fp_convert->r1 = r1;
7192 fp_convert->op_lo = op_lo;
7193 fp_convert->rounding_mode = rounding_mode;
7194
7195 return insn;
7196 }
7197
7198
7199 s390_insn *
7200 s390_insn_dfp128_binop(UChar size, s390_dfp_binop_t tag, HReg dst_hi,
7201 HReg dst_lo, HReg op2_hi, HReg op2_lo, HReg op3_hi,
7202 HReg op3_lo, s390_dfp_round_t rounding_mode)
7203 {
7204 s390_insn *insn = LibVEX_Alloc_inline(sizeof(s390_insn));
7205 s390_dfp_binop *dfp_binop = LibVEX_Alloc_inline(sizeof(s390_dfp_binop));
7206
7207 vassert(size == 16);
7208 vassert(is_valid_fp128_regpair(dst_hi, dst_lo));
7209 vassert(is_valid_fp128_regpair(op2_hi, op2_lo));
7210 vassert(is_valid_fp128_regpair(op3_hi, op3_lo));
7211
7212 insn->tag = S390_INSN_DFP_BINOP;
7213 insn->size = size;
7214 insn->variant.dfp_binop.details = dfp_binop;
7215
7216 dfp_binop->tag = tag;
7217 dfp_binop->dst_hi = dst_hi;
7218 dfp_binop->dst_lo = dst_lo;
7219 dfp_binop->op2_hi = op2_hi;
7220 dfp_binop->op2_lo = op2_lo;
7221 dfp_binop->op3_hi = op3_hi;
7222 dfp_binop->op3_lo = op3_lo;
7223 dfp_binop->rounding_mode = rounding_mode;
7224
7225 return insn;
7226 }
7227
7228
7229 s390_insn *
7230 s390_insn_dfp128_unop(UChar size, s390_dfp_unop_t tag, HReg dst,
7231 HReg op_hi, HReg op_lo)
7232 {
7233 s390_insn *insn = LibVEX_Alloc_inline(sizeof(s390_insn));
7234
7235 /* destination is an 8 byte integer value */
7236 vassert(size == 8);
7237 vassert(is_valid_fp128_regpair(op_hi, op_lo));
7238
7239 insn->tag = S390_INSN_DFP_UNOP;
7240 insn->size = size;
7241 insn->variant.dfp_unop.tag = tag;
7242 insn->variant.dfp_unop.dst_hi = dst;
7243 insn->variant.dfp_unop.dst_lo = INVALID_HREG;
7244 insn->variant.dfp_unop.op_hi = op_hi;
7245 insn->variant.dfp_unop.op_lo = op_lo;
7246
7247 return insn;
7248 }
7249
7250
7251 s390_insn *
7252 s390_insn_dfp128_intop(UChar size, s390_dfp_intop_t tag, HReg dst_hi,
7253 HReg dst_lo, HReg op2, HReg op3_hi, HReg op3_lo)
7254 {
7255 s390_insn *insn = LibVEX_Alloc_inline(sizeof(s390_insn));
7256
7257 vassert(size == 16);
7258 vassert(is_valid_fp128_regpair(dst_hi, dst_lo));
7259 vassert(is_valid_fp128_regpair(op3_hi, op3_lo));
7260
7261 insn->tag = S390_INSN_DFP_INTOP;
7262 insn->size = size;
7263 insn->variant.dfp_intop.tag = tag;
7264 insn->variant.dfp_intop.dst_hi = dst_hi;
7265 insn->variant.dfp_intop.dst_lo = dst_lo;
7266 insn->variant.dfp_intop.op2 = op2;
7267 insn->variant.dfp_intop.op3_hi = op3_hi;
7268 insn->variant.dfp_intop.op3_lo = op3_lo;
7269
7270 return insn;
7271 }
7272
7273
7274 s390_insn *
7275 s390_insn_dfp128_compare(UChar size, s390_dfp_cmp_t tag, HReg dst, HReg op1_hi,
7276 HReg op1_lo, HReg op2_hi, HReg op2_lo)
7277 {
7278 s390_insn *insn = LibVEX_Alloc_inline(sizeof(s390_insn));
7279
7280 vassert(size == 16);
7281 vassert(is_valid_fp128_regpair(op1_hi, op1_lo));
7282 vassert(is_valid_fp128_regpair(op2_hi, op2_lo));
7283
7284 insn->tag = S390_INSN_DFP_COMPARE;
7285 insn->size = size;
7286 insn->variant.dfp_compare.tag = tag;
7287 insn->variant.dfp_compare.dst = dst;
7288 insn->variant.dfp_compare.op1_hi = op1_hi;
7289 insn->variant.dfp_compare.op1_lo = op1_lo;
7290 insn->variant.dfp_compare.op2_hi = op2_hi;
7291 insn->variant.dfp_compare.op2_lo = op2_lo;
7292
7293 return insn;
7294 }
7295
7296
7297 static s390_insn *
7298 s390_insn_dfp128_convert(UChar size, s390_dfp_conv_t tag, HReg dst_hi,
7299 HReg dst_lo, HReg op_hi, HReg op_lo,
7300 s390_dfp_round_t rounding_mode)
7301 {
7302 s390_insn *insn = LibVEX_Alloc_inline(sizeof(s390_insn));
7303
7304 if (size == 16) {
7305 /* From smaller size to 16 bytes */
7306 vassert(is_valid_fp128_regpair(dst_hi, dst_lo));
7307 vassert(hregIsInvalid(op_lo));
7308 } else {
7309 /* From 16 bytes to smaller size */
7310 vassert(is_valid_fp128_regpair(op_hi, op_lo));
7311 }
7312
7313 insn->tag = S390_INSN_DFP_CONVERT;
7314 insn->size = size;
7315 insn->variant.dfp_convert.tag = tag;
7316 insn->variant.dfp_convert.dst_hi = dst_hi;
7317 insn->variant.dfp_convert.dst_lo = dst_lo;
7318 insn->variant.dfp_convert.op_hi = op_hi;
7319 insn->variant.dfp_convert.op_lo = op_lo;
7320 insn->variant.dfp_convert.rounding_mode = rounding_mode;
7321
7322 return insn;
7323 }
7324
7325
7326 s390_insn *
7327 s390_insn_dfp128_convert_to(UChar size, s390_dfp_conv_t tag, HReg dst_hi,
7328 HReg dst_lo, HReg op)
7329 {
7330 /* Conversion to dfp128 never requires a rounding mode. Provide default
7331 rounding mode. It will not be used when emitting insns. */
7332 s390_dfp_round_t rounding_mode = S390_DFP_ROUND_NEAREST_EVEN_4;
7333
7334 return s390_insn_dfp128_convert(size, tag, dst_hi, dst_lo, op,
7335 INVALID_HREG, rounding_mode);
7336 }
7337
7338
7339 s390_insn *
7340 s390_insn_dfp128_convert_from(UChar size, s390_dfp_conv_t tag, HReg dst_hi,
7341 HReg dst_lo, HReg op_hi, HReg op_lo,
7342 s390_dfp_round_t rounding_mode)
7343 {
7344 return s390_insn_dfp128_convert(size, tag, dst_hi, dst_lo, op_hi, op_lo,
7345 rounding_mode);
7346 }
7347
7348
7349 s390_insn *
7350 s390_insn_dfp128_reround(UChar size, HReg dst_hi, HReg dst_lo, HReg op2,
7351 HReg op3_hi, HReg op3_lo,
7352 s390_dfp_round_t rounding_mode)
7353 {
7354 s390_insn *insn = LibVEX_Alloc_inline(sizeof(s390_insn));
7355
7356 vassert(size == 16);
7357 vassert(is_valid_fp128_regpair(dst_hi, dst_lo));
7358 vassert(is_valid_fp128_regpair(op3_hi, op3_lo));
7359
7360 insn->tag = S390_INSN_DFP_REROUND;
7361 insn->size = size;
7362 insn->variant.dfp_reround.dst_hi = dst_hi;
7363 insn->variant.dfp_reround.dst_lo = dst_lo;
7364 insn->variant.dfp_reround.op2 = op2;
7365 insn->variant.dfp_reround.op3_hi = op3_hi;
7366 insn->variant.dfp_reround.op3_lo = op3_lo;
7367 insn->variant.dfp_reround.rounding_mode = rounding_mode;
7368
7369 return insn;
7370 }
7371
7372
7373 s390_insn *
7374 s390_insn_mfence(void)
7375 {
7376 s390_insn *insn = LibVEX_Alloc_inline(sizeof(s390_insn));
7377
7378 insn->tag = S390_INSN_MFENCE;
7379 insn->size = 0; /* not needed */
7380
7381 return insn;
7382 }
7383
7384
7385 s390_insn *
7386 s390_insn_mimm(UChar size, s390_amode *dst, ULong value)
7387 {
7388 s390_insn *insn = LibVEX_Alloc_inline(sizeof(s390_insn));
7389
7390 /* This insn will be mapped to insns that require base register
7391 plus 12-bit displacement */
7392 vassert(dst->tag == S390_AMODE_B12);
7393
7394 insn->tag = S390_INSN_MIMM;
7395 insn->size = size;
7396 insn->variant.mimm.dst = dst;
7397 insn->variant.mimm.value = value;
7398
7399 return insn;
7400 }
7401
7402
7403 s390_insn *
7404 s390_insn_madd(UChar size, s390_amode *dst, UChar delta, ULong value)
7405 {
7406 s390_insn *insn = LibVEX_Alloc_inline(sizeof(s390_insn));
7407
7408 vassert(size == 4 || size == 8);
7409
7410 /* This insn will be mapped to an ASI or AGSI so we can only allow base
7411 register plus 12-bit / 20-bit displacement. */
7412 vassert(dst->tag == S390_AMODE_B12 || dst->tag == S390_AMODE_B20);
7413 /* ASI and AGSI require the GIE facility */
7414 vassert(s390_host_has_gie);
7415
7416 insn->tag = S390_INSN_MADD;
7417 insn->size = size;
7418 insn->variant.madd.dst = dst;
7419 insn->variant.madd.delta = delta;
7420 insn->variant.madd.value = value;
7421
7422 return insn;
7423 }
7424
7425
7426 s390_insn *
7427 s390_insn_set_fpc_bfprm(UChar size, HReg mode)
7428 {
7429 vassert(size == 4);
7430
7431 s390_insn *insn = LibVEX_Alloc_inline(sizeof(s390_insn));
7432
7433 insn->tag = S390_INSN_SET_FPC_BFPRM;
7434 insn->size = size;
7435 insn->variant.set_fpc_bfprm.mode = mode;
7436
7437 return insn;
7438 }
7439
7440
7441 s390_insn *
7442 s390_insn_set_fpc_dfprm(UChar size, HReg mode)
7443 {
7444 vassert(size == 4);
7445
7446 s390_insn *insn = LibVEX_Alloc_inline(sizeof(s390_insn));
7447
7448 insn->tag = S390_INSN_SET_FPC_DFPRM;
7449 insn->size = size;
7450 insn->variant.set_fpc_dfprm.mode = mode;
7451
7452 return insn;
7453 }
7454
7455
7456 s390_insn *
7457 s390_insn_xdirect(s390_cc_t cond, Addr64 dst, s390_amode *guest_IA,
7458 Bool to_fast_entry)
7459 {
7460 s390_insn *insn = LibVEX_Alloc_inline(sizeof(s390_insn));
7461
7462 vassert(guest_IA->tag == S390_AMODE_B12);
7463
7464 insn->tag = S390_INSN_XDIRECT;
7465 insn->size = 0; /* does not matter */
7466
7467 insn->variant.xdirect.cond = cond;
7468 insn->variant.xdirect.dst = dst;
7469 insn->variant.xdirect.guest_IA = guest_IA;
7470 insn->variant.xdirect.to_fast_entry = to_fast_entry;
7471
7472 return insn;
7473 }
7474
7475
7476 s390_insn *
7477 s390_insn_xindir(s390_cc_t cond, HReg dst, s390_amode *guest_IA)
7478 {
7479 s390_insn *insn = LibVEX_Alloc_inline(sizeof(s390_insn));
7480
7481 vassert(guest_IA->tag == S390_AMODE_B12);
7482
7483 insn->tag = S390_INSN_XINDIR;
7484 insn->size = 0; /* does not matter */
7485
7486 insn->variant.xindir.cond = cond;
7487 insn->variant.xindir.dst = dst;
7488 insn->variant.xindir.guest_IA = guest_IA;
7489
7490 return insn;
7491 }
7492
7493
7494 s390_insn *
7495 s390_insn_xassisted(s390_cc_t cond, HReg dst, s390_amode *guest_IA,
7496 IRJumpKind kind)
7497 {
7498 s390_insn *insn = LibVEX_Alloc_inline(sizeof(s390_insn));
7499
7500 vassert(guest_IA->tag == S390_AMODE_B12);
7501
7502 insn->tag = S390_INSN_XASSISTED;
7503 insn->size = 0; /* does not matter */
7504
7505 insn->variant.xassisted.cond = cond;
7506 insn->variant.xassisted.dst = dst;
7507 insn->variant.xassisted.guest_IA = guest_IA;
7508 insn->variant.xassisted.kind = kind;
7509
7510 return insn;
7511 }
7512
7513
7514 s390_insn *
7515 s390_insn_evcheck(s390_amode *counter, s390_amode *fail_addr)
7516 {
7517 s390_insn *insn = LibVEX_Alloc_inline(sizeof(s390_insn));
7518
7519 vassert(counter->tag == S390_AMODE_B12);
7520 vassert(fail_addr->tag == S390_AMODE_B12);
7521
7522 insn->tag = S390_INSN_EVCHECK;
7523 insn->size = 0; /* does not matter */
7524
7525 insn->variant.evcheck.counter = counter;
7526 insn->variant.evcheck.fail_addr = fail_addr;
7527
7528 return insn;
7529 }
7530
7531
7532 s390_insn *
7533 s390_insn_profinc(void)
7534 {
7535 s390_insn *insn = LibVEX_Alloc_inline(sizeof(s390_insn));
7536
7537 insn->tag = S390_INSN_PROFINC;
7538 insn->size = 0; /* does not matter */
7539
7540 return insn;
7541 }
7542
7543
7544 s390_insn *
7545 s390_insn_vec_amodeop(UChar size, s390_vec_amodeop_t tag, HReg dst, HReg op1,
7546 s390_amode *op2)
7547 {
7548 s390_insn *insn = LibVEX_Alloc_inline(sizeof(s390_insn));
7549
7550 vassert(size == 1 || size == 2 || size == 4 || size == 8);
7551
7552 insn->tag = S390_INSN_VEC_AMODEOP;
7553 insn->size = size;
7554 insn->variant.vec_amodeop.tag = tag;
7555 insn->variant.vec_amodeop.dst = dst;
7556 insn->variant.vec_amodeop.op1 = op1;
7557 insn->variant.vec_amodeop.op2 = op2;
7558
7559 return insn;
7560 }
7561
7562 s390_insn *s390_insn_vec_amodeintop(UChar size, s390_vec_amodeintop_t tag, HReg dst,
7563 s390_amode* op2, HReg op3)
7564 {
7565 s390_insn *insn = LibVEX_Alloc_inline(sizeof(s390_insn));
7566
7567 vassert(size == 1 || size == 2 || size == 4 || size == 8);
7568
7569 insn->tag = S390_INSN_VEC_AMODEINTOP;
7570 insn->size = size;
7571 insn->variant.vec_amodeintop.tag = tag;
7572 insn->variant.vec_amodeintop.dst = dst;
7573 insn->variant.vec_amodeintop.op2 = op2;
7574 insn->variant.vec_amodeintop.op3 = op3;
7575
7576 return insn;
7577 }
7578
7579 s390_insn *s390_insn_vec_binop(UChar size, s390_vec_binop_t tag, HReg dst,
7580 HReg op1, HReg op2)
7581 {
7582 s390_insn *insn = LibVEX_Alloc_inline(sizeof(s390_insn));
7583
7584 vassert(size == 1 || size == 2 || size == 4 || size == 8 || size == 16);
7585
7586 insn->tag = S390_INSN_VEC_BINOP;
7587 insn->size = size;
7588 insn->variant.vec_binop.tag = tag;
7589 insn->variant.vec_binop.dst = dst;
7590 insn->variant.vec_binop.op1 = op1;
7591 insn->variant.vec_binop.op2 = op2;
7592
7593 return insn;
7594 }
7595
7596 s390_insn *s390_insn_vec_triop(UChar size, s390_vec_triop_t tag, HReg dst,
7597 HReg op1, HReg op2, HReg op3)
7598 {
7599 s390_insn *insn = LibVEX_Alloc_inline(sizeof(s390_insn));
7600
7601
7602 insn->tag = S390_INSN_VEC_TRIOP;
7603 insn->size = size;
7604 insn->variant.vec_triop.tag = tag;
7605 insn->variant.vec_triop.dst = dst;
7606 insn->variant.vec_triop.op1 = op1;
7607 insn->variant.vec_triop.op2 = op2;
7608 insn->variant.vec_triop.op3 = op3;
7609
7610 return insn;
7611 }
7612
7613 s390_insn *s390_insn_vec_replicate(UChar size, HReg dst, HReg op1,
7614 UChar idx)
7615 {
7616 s390_insn *insn = LibVEX_Alloc_inline(sizeof(s390_insn));
7617
7618 insn->tag = S390_INSN_VEC_REPLICATE;
7619 insn->size = size;
7620 insn->variant.vec_replicate.dst = dst;
7621 insn->variant.vec_replicate.op1 = op1;
7622 insn->variant.vec_replicate.idx = idx;
7623
7624 return insn;
7625 }
7626
7627 /*---------------------------------------------------------------*/
7628 /*--- Debug print ---*/
7629 /*---------------------------------------------------------------*/
7630
7631 static const HChar *
7632 s390_cc_as_string(s390_cc_t cc)
7633 {
7634 switch (cc) {
7635 case S390_CC_NEVER: return "never";
7636 case S390_CC_OVFL: return "overflow";
7637 case S390_CC_H: return "greater than"; /* A > B ; high */
7638 case S390_CC_NLE: return "not low or equal";
7639 case S390_CC_L: return "less than"; /* A < B ; low */
7640 case S390_CC_NHE: return "not high or equal";
7641 case S390_CC_LH: return "low or high";
7642 case S390_CC_NE: return "not equal"; /* A != B ; not zero */
7643 case S390_CC_E: return "equal"; /* A == B ; zero */
7644 case S390_CC_NLH: return "not low or high";
7645 case S390_CC_HE: return "greater or equal"; /* A >= B ; high or equal*/
7646 case S390_CC_NL: return "not low"; /* not low */
7647 case S390_CC_LE: return "less or equal"; /* A <= B ; low or equal */
7648 case S390_CC_NH: return "not high";
7649 case S390_CC_NO: return "not overflow";
7650 case S390_CC_ALWAYS: return "always";
7651 default:
7652 vpanic("s390_cc_as_string");
7653 }
7654 }
7655
7656
7657 static const HChar *
7658 s390_jump_kind_as_string(IRJumpKind kind)
7659 {
7660 switch (kind) {
7661 case Ijk_Boring: return "Boring";
7662 case Ijk_Call: return "Call";
7663 case Ijk_Ret: return "Return";
7664 case Ijk_ClientReq: return "ClientReq";
7665 case Ijk_Yield: return "Yield";
7666 case Ijk_EmWarn: return "EmWarn";
7667 case Ijk_EmFail: return "EmFail";
7668 case Ijk_NoDecode: return "NoDecode";
7669 case Ijk_MapFail: return "MapFail";
7670 case Ijk_InvalICache: return "Invalidate";
7671 case Ijk_NoRedir: return "NoRedir";
7672 case Ijk_SigTRAP: return "SigTRAP";
7673 case Ijk_SigFPE: return "SigFPE";
7674 case Ijk_SigSEGV: return "SigSEGV";
7675 case Ijk_SigBUS: return "SigBUS";
7676 case Ijk_Sys_syscall: return "Sys_syscall";
7677 case Ijk_Extension: return "Extension";
7678 default:
7679 vpanic("s390_jump_kind_as_string");
7680 }
7681 }
7682
7683
7684 /* Helper function for writing out a V insn */
7685 static void
7686 s390_sprintf(HChar *buf, const HChar *fmt, ...)
7687 {
7688 HChar *p;
7689 ULong value;
7690 va_list args;
7691 va_start(args, fmt);
7692
7693 p = buf;
7694 for ( ; *fmt; ++fmt) {
7695 Int c = *fmt;
7696
7697 if (c != '%') {
7698 *p++ = c;
7699 continue;
7700 }
7701
7702 c = *++fmt; /* next char */
7703 switch (c) {
7704 case '%':
7705 *p++ = c; /* %% */
7706 continue;
7707
7708 case 's': /* %s */
7709 p += vex_sprintf(p, "%s", va_arg(args, HChar *));
7710 continue;
7711
7712 case 'M': /* %M = mnemonic */
7713 p += vex_sprintf(p, "%-8s", va_arg(args, HChar *));
7714 continue;
7715
7716 case 'R': /* %R = register */
7717 p += vex_sprintf(p, "%s", s390_hreg_as_string(va_arg(args, HReg)));
7718 continue;
7719
7720 case 'A': /* %A = amode */
7721 p += vex_sprintf(p, "%s",
7722 s390_amode_as_string(va_arg(args, s390_amode *)));
7723 continue;
7724
7725 case 'G': /* %G = guest state @ offset */
7726 p += vex_sprintf(p, "guest[%u]", va_arg(args, UInt));
7727 continue;
7728
7729 case 'C': /* %C = condition code */
7730 p += vex_sprintf(p, "%s", s390_cc_as_string(va_arg(args, s390_cc_t)));
7731 continue;
7732
7733 case 'J': /* &J = jump kind */
7734 p += vex_sprintf(p, "%s",
7735 s390_jump_kind_as_string(va_arg(args, IRJumpKind)));
7736 continue;
7737
7738 case 'L': { /* %L = argument list in helper call*/
7739 UInt i, num_args;
7740
7741 num_args = va_arg(args, UInt);
7742
7743 for (i = 0; i < num_args; ++i) {
7744 if (i != 0) p += vex_sprintf(p, ", ");
7745 p += vex_sprintf(p, "r%u", s390_gprno_from_arg_index(i));
7746 }
7747 continue;
7748 }
7749
7750 case 'O': { /* %O = RMI operand */
7751 s390_opnd_RMI *op = va_arg(args, s390_opnd_RMI *);
7752
7753 switch (op->tag) {
7754 case S390_OPND_REG:
7755 p += vex_sprintf(p, "%s", s390_hreg_as_string(op->variant.reg));
7756 continue;
7757
7758 case S390_OPND_AMODE:
7759 p += vex_sprintf(p, "%s", s390_amode_as_string(op->variant.am));
7760 continue;
7761
7762 case S390_OPND_IMMEDIATE:
7763 value = op->variant.imm;
7764 goto print_value;
7765
7766 default:
7767 goto fail;
7768 }
7769 }
7770
7771 case 'I': /* %I = immediate value */
7772 value = va_arg(args, ULong);
7773 goto print_value;
7774
7775 print_value:
7776 if ((Long)value < 0)
7777 p += vex_sprintf(p, "%lld", (Long)value);
7778 else if (value < 100)
7779 p += vex_sprintf(p, "%llu", value);
7780 else
7781 p += vex_sprintf(p, "0x%llx", value);
7782 continue;
7783
7784 default:
7785 goto fail;
7786 }
7787 }
7788 *p = '\0';
7789 va_end(args);
7790
7791 return;
7792
7793 fail: vpanic("s390_printf");
7794 }
7795
7796
7797 /* Decompile the given insn into a static buffer and return it */
7798 const HChar *
7799 s390_insn_as_string(const s390_insn *insn)
7800 {
7801 static HChar buf[300]; // large enough
7802 const HChar *op;
7803 HChar *p;
7804
7805 buf[0] = '\0';
7806
7807 switch (insn->tag) {
7808 case S390_INSN_LOAD:
7809 s390_sprintf(buf, "%M %R,%A", "v-load", insn->variant.load.dst,
7810 insn->variant.load.src);
7811 break;
7812
7813 case S390_INSN_STORE:
7814 s390_sprintf(buf, "%M %R,%A", "v-store", insn->variant.store.src,
7815 insn->variant.store.dst);
7816 break;
7817
7818 case S390_INSN_MOVE:
7819 s390_sprintf(buf, "%M %R,%R", "v-move", insn->variant.move.dst,
7820 insn->variant.move.src);
7821 break;
7822
7823 case S390_INSN_MEMCPY:
7824 s390_sprintf(buf, "%M %A,%A", "v-memcpy", insn->variant.memcpy.dst,
7825 insn->variant.memcpy.src);
7826 break;
7827
7828 case S390_INSN_COND_MOVE:
7829 s390_sprintf(buf, "%M if (%C) %R,%O", "v-move",
7830 insn->variant.cond_move.cond, insn->variant.cond_move.dst,
7831 &insn->variant.cond_move.src);
7832 break;
7833
7834 case S390_INSN_LOAD_IMMEDIATE:
7835 s390_sprintf(buf, "%M %R,%I", "v-loadi", insn->variant.load_immediate.dst,
7836 insn->variant.load_immediate.value);
7837 break;
7838
7839 case S390_INSN_ALU:
7840 switch (insn->variant.alu.tag) {
7841 case S390_ALU_ADD: op = "v-add"; break;
7842 case S390_ALU_SUB: op = "v-sub"; break;
7843 case S390_ALU_MUL: op = "v-mul"; break;
7844 case S390_ALU_AND: op = "v-and"; break;
7845 case S390_ALU_OR: op = "v-or"; break;
7846 case S390_ALU_XOR: op = "v-xor"; break;
7847 case S390_ALU_LSH: op = "v-lsh"; break;
7848 case S390_ALU_RSH: op = "v-rsh"; break;
7849 case S390_ALU_RSHA: op = "v-rsha"; break;
7850 case S390_ALU_ILIH: op = "v-ilih"; break;
7851 default: goto fail;
7852 }
7853 s390_sprintf(buf, "%M %R,%O", op, insn->variant.alu.dst, /* also op1 */
7854 &insn->variant.alu.op2);
7855 break;
7856
7857 case S390_INSN_SMUL:
7858 case S390_INSN_UMUL:
7859 if (insn->tag == S390_INSN_SMUL) {
7860 op = "v-muls";
7861 } else {
7862 op = "v-mulu";
7863 }
7864 s390_sprintf(buf, "%M %R,%O", op, insn->variant.mul.dst_hi,
7865 &insn->variant.mul.op2);
7866 break;
7867
7868 case S390_INSN_SDIV:
7869 case S390_INSN_UDIV:
7870 if (insn->tag == S390_INSN_SDIV) {
7871 op = "v-divs";
7872 } else {
7873 op = "v-divu";
7874 }
7875 s390_sprintf(buf, "%M %R,%O", op, insn->variant.div.op1_hi,
7876 &insn->variant.div.op2);
7877 break;
7878
7879 case S390_INSN_DIVS:
7880 s390_sprintf(buf, "%M %R,%O", "v-divsi", insn->variant.divs.op1,
7881 &insn->variant.divs.op2);
7882 break;
7883
7884 case S390_INSN_CLZ:
7885 s390_sprintf(buf, "%M %R,%O", "v-clz", insn->variant.clz.num_bits,
7886 &insn->variant.clz.src);
7887 break;
7888
7889 case S390_INSN_UNOP:
7890 switch (insn->variant.unop.tag) {
7891 case S390_ZERO_EXTEND_8:
7892 case S390_ZERO_EXTEND_16:
7893 case S390_ZERO_EXTEND_32:
7894 op = "v-zerox";
7895 break;
7896
7897 case S390_SIGN_EXTEND_8:
7898 case S390_SIGN_EXTEND_16:
7899 case S390_SIGN_EXTEND_32:
7900 op = "v-signx";
7901 break;
7902
7903 case S390_NEGATE:
7904 op = "v-neg";
7905 break;
7906
7907 case S390_VEC_FILL:
7908 op = "v-vfill";
7909 break;
7910
7911 case S390_VEC_DUPLICATE:
7912 op = "v-vdup";
7913 break;
7914
7915 case S390_VEC_UNPACKLOWS:
7916 op = "v-vunpacks";
7917 break;
7918
7919 case S390_VEC_UNPACKLOWU:
7920 op = "v-vunpacku";
7921 break;
7922
7923 case S390_VEC_ABS:
7924 op = "v-vabs";
7925 break;
7926
7927 case S390_VEC_COUNT_LEADING_ZEROES:
7928 op = "v-vclz";
7929 break;
7930
7931 case S390_VEC_COUNT_TRAILING_ZEROES:
7932 op = "v-vctz";
7933 break;
7934
7935 case S390_VEC_COUNT_ONES:
7936 op = "v-vpopct";
7937 break;
7938
7939 case S390_VEC_FLOAT_NEG:
7940 op = "v-vfloatneg";
7941 break;
7942
7943 case S390_VEC_FLOAT_ABS:
7944 op = "v-vfloatabs";
7945 break;
7946
7947 case S390_VEC_FLOAT_NABS:
7948 op = "v-vfloatnabs";
7949 break;
7950
7951 case S390_VEC_FLOAT_SQRT:
7952 op = "v-vfloatsqrt";
7953 break;
7954
7955 default:
7956 goto fail;
7957 }
7958 s390_sprintf(buf, "%M %R,%O", op, insn->variant.unop.dst,
7959 &insn->variant.unop.src);
7960 break;
7961
7962 case S390_INSN_TEST:
7963 s390_sprintf(buf, "%M %O", "v-test", &insn->variant.test.src);
7964 break;
7965
7966 case S390_INSN_CC2BOOL:
7967 s390_sprintf(buf, "%M %R,%C", "v-cc2b", insn->variant.cc2bool.dst,
7968 insn->variant.cc2bool.cond);
7969 break;
7970
7971 case S390_INSN_CAS:
7972 s390_sprintf(buf, "%M %R,%A,%R,%R", "v-cas", insn->variant.cas.op1,
7973 insn->variant.cas.op2, insn->variant.cas.op3,
7974 insn->variant.cas.old_mem);
7975 break;
7976
7977 case S390_INSN_CDAS: {
7978 s390_cdas *cdas = insn->variant.cdas.details;
7979
7980 s390_sprintf(buf, "%M %R,%R,%A,%R,%R,%R,%R", "v-cdas",
7981 cdas->op1_high, cdas->op1_low, cdas->op2, cdas->op3_high,
7982 cdas->op3_low, cdas->old_mem_high, cdas->old_mem_low);
7983 break;
7984 }
7985
7986 case S390_INSN_COMPARE:
7987 if (insn->variant.compare.signed_comparison) {
7988 op = "v-cmps";
7989 } else {
7990 op = "v-cmpu";
7991 }
7992 s390_sprintf(buf, "%M %R,%O", op, insn->variant.compare.src1,
7993 &insn->variant.compare.src2);
7994 break;
7995
7996 case S390_INSN_HELPER_CALL: {
7997 s390_helper_call *helper_call = insn->variant.helper_call.details;
7998 s390_sprintf(buf, "%M if (%C) %s{%I}(%L)", "v-call",
7999 helper_call->cond,
8000 helper_call->name,
8001 helper_call->target,
8002 helper_call->num_args);
8003 return buf; /* avoid printing "size = ..." which is meaningless */
8004 }
8005
8006 case S390_INSN_BFP_TRIOP:
8007 switch (insn->variant.bfp_triop.tag) {
8008 case S390_BFP_MADD: op = "v-fmadd"; break;
8009 case S390_BFP_MSUB: op = "v-fmsub"; break;
8010 default: goto fail;
8011 }
8012 s390_sprintf(buf, "%M %R,%R,%R", op,
8013 insn->variant.bfp_triop.dst /* op1 same as dst */,
8014 insn->variant.bfp_triop.op2, insn->variant.bfp_triop.op3);
8015 break;
8016
8017 case S390_INSN_BFP_BINOP:
8018 switch (insn->variant.bfp_binop.tag) {
8019 case S390_BFP_ADD: op = "v-fadd"; break;
8020 case S390_BFP_SUB: op = "v-fsub"; break;
8021 case S390_BFP_MUL: op = "v-fmul"; break;
8022 case S390_BFP_DIV: op = "v-fdiv"; break;
8023 default: goto fail;
8024 }
8025 s390_sprintf(buf, "%M %R,%R", op,
8026 insn->variant.bfp_binop.dst_hi /* op1 same as dst */,
8027 insn->variant.bfp_binop.op2_hi);
8028 break;
8029
8030 case S390_INSN_BFP_COMPARE:
8031 s390_sprintf(buf, "%M %R,%R,%R", "v-fcmp", insn->variant.bfp_compare.dst,
8032 insn->variant.bfp_compare.op1_hi,
8033 insn->variant.bfp_compare.op2_hi);
8034 break;
8035
8036 case S390_INSN_BFP_UNOP:
8037 switch (insn->variant.bfp_unop.tag) {
8038 case S390_BFP_ABS: op = "v-fabs"; break;
8039 case S390_BFP_NABS: op = "v-fnabs"; break;
8040 case S390_BFP_NEG: op = "v-fneg"; break;
8041 case S390_BFP_SQRT: op = "v-fsqrt"; break;
8042 default: goto fail;
8043 }
8044 s390_sprintf(buf, "%M %R,%R", op, insn->variant.bfp_unop.dst_hi,
8045 insn->variant.bfp_unop.op_hi);
8046 break;
8047
8048 case S390_INSN_BFP_CONVERT:
8049 switch (insn->variant.bfp_convert.tag) {
8050 case S390_BFP_I32_TO_F32:
8051 case S390_BFP_I32_TO_F64:
8052 case S390_BFP_I32_TO_F128:
8053 case S390_BFP_I64_TO_F32:
8054 case S390_BFP_I64_TO_F64:
8055 case S390_BFP_I64_TO_F128: op = "v-i2f"; break;
8056 case S390_BFP_U32_TO_F32:
8057 case S390_BFP_U32_TO_F64:
8058 case S390_BFP_U32_TO_F128:
8059 case S390_BFP_U64_TO_F32:
8060 case S390_BFP_U64_TO_F64:
8061 case S390_BFP_U64_TO_F128: op = "v-u2f"; break;
8062 case S390_BFP_F32_TO_I32:
8063 case S390_BFP_F32_TO_I64:
8064 case S390_BFP_F64_TO_I32:
8065 case S390_BFP_F64_TO_I64:
8066 case S390_BFP_F128_TO_I32:
8067 case S390_BFP_F128_TO_I64: op = "v-f2i"; break;
8068 case S390_BFP_F32_TO_U32:
8069 case S390_BFP_F32_TO_U64:
8070 case S390_BFP_F64_TO_U32:
8071 case S390_BFP_F64_TO_U64:
8072 case S390_BFP_F128_TO_U32:
8073 case S390_BFP_F128_TO_U64: op = "v-f2u"; break;
8074 case S390_BFP_F32_TO_F64:
8075 case S390_BFP_F32_TO_F128:
8076 case S390_BFP_F64_TO_F32:
8077 case S390_BFP_F64_TO_F128:
8078 case S390_BFP_F128_TO_F32:
8079 case S390_BFP_F128_TO_F64: op = "v-f2f"; break;
8080 case S390_BFP_F32_TO_F32I:
8081 case S390_BFP_F64_TO_F64I:
8082 case S390_BFP_F128_TO_F128I: op = "v-f2fi"; break;
8083 default: goto fail;
8084 }
8085 s390_sprintf(buf, "%M %R,%R", op, insn->variant.bfp_convert.dst_hi,
8086 insn->variant.bfp_convert.op_hi);
8087 break;
8088
8089 case S390_INSN_DFP_BINOP: {
8090 s390_dfp_binop *dfp_binop = insn->variant.dfp_binop.details;
8091
8092 switch (dfp_binop->tag) {
8093 case S390_DFP_ADD: op = "v-dadd"; break;
8094 case S390_DFP_SUB: op = "v-dsub"; break;
8095 case S390_DFP_MUL: op = "v-dmul"; break;
8096 case S390_DFP_DIV: op = "v-ddiv"; break;
8097 case S390_DFP_QUANTIZE: op = "v-dqua"; break;
8098 default: goto fail;
8099 }
8100 s390_sprintf(buf, "%M %R,%R,%R", op, dfp_binop->dst_hi,
8101 dfp_binop->op2_hi, dfp_binop->op3_hi);
8102 break;
8103 }
8104
8105 case S390_INSN_DFP_UNOP:
8106 switch (insn->variant.dfp_unop.tag) {
8107 case S390_DFP_EXTRACT_EXP_D64:
8108 case S390_DFP_EXTRACT_EXP_D128: op = "v-d2exp"; break;
8109 case S390_DFP_EXTRACT_SIG_D64:
8110 case S390_DFP_EXTRACT_SIG_D128: op = "v-d2sig"; break;
8111 default: goto fail;
8112 }
8113 s390_sprintf(buf, "%M %R,%R", op, insn->variant.dfp_unop.dst_hi,
8114 insn->variant.dfp_unop.op_hi);
8115 break;
8116
8117 case S390_INSN_DFP_INTOP:
8118 switch (insn->variant.dfp_intop.tag) {
8119 case S390_DFP_SHIFT_LEFT: op = "v-dshl"; break;
8120 case S390_DFP_SHIFT_RIGHT: op = "v-dshr"; break;
8121 case S390_DFP_INSERT_EXP: op = "v-diexp"; break;
8122 default: goto fail;
8123 }
8124 s390_sprintf(buf, "%M %R,%R,%R", op, insn->variant.dfp_intop.dst_hi,
8125 insn->variant.dfp_intop.op2,
8126 insn->variant.dfp_intop.op3_hi);
8127 break;
8128
8129 case S390_INSN_DFP_COMPARE:
8130 switch (insn->variant.dfp_compare.tag) {
8131 case S390_DFP_COMPARE: op = "v-dcmp"; break;
8132 case S390_DFP_COMPARE_EXP: op = "v-dcmpexp"; break;
8133 default: goto fail;
8134 }
8135 s390_sprintf(buf, "%M %R,%R,%R", op, insn->variant.dfp_compare.dst,
8136 insn->variant.dfp_compare.op1_hi,
8137 insn->variant.dfp_compare.op2_hi);
8138 break;
8139
8140 case S390_INSN_DFP_CONVERT:
8141 switch (insn->variant.dfp_convert.tag) {
8142 case S390_DFP_D32_TO_D64:
8143 case S390_DFP_D64_TO_D32:
8144 case S390_DFP_D64_TO_D128:
8145 case S390_DFP_D128_TO_D64: op = "v-d2d"; break;
8146 case S390_DFP_I32_TO_D64:
8147 case S390_DFP_I32_TO_D128:
8148 case S390_DFP_I64_TO_D64:
8149 case S390_DFP_I64_TO_D128: op = "v-i2d"; break;
8150 case S390_DFP_U32_TO_D64:
8151 case S390_DFP_U32_TO_D128:
8152 case S390_DFP_U64_TO_D64:
8153 case S390_DFP_U64_TO_D128: op = "v-u2d"; break;
8154 case S390_DFP_D64_TO_I32:
8155 case S390_DFP_D128_TO_I32:
8156 case S390_DFP_D64_TO_I64:
8157 case S390_DFP_D128_TO_I64: op = "v-d2i"; break;
8158 case S390_DFP_D64_TO_U32:
8159 case S390_DFP_D64_TO_U64:
8160 case S390_DFP_D128_TO_U32:
8161 case S390_DFP_D128_TO_U64: op = "v-d2u"; break;
8162 default: goto fail;
8163 }
8164 s390_sprintf(buf, "%M %R,%R", op, insn->variant.dfp_convert.dst_hi,
8165 insn->variant.dfp_convert.op_hi);
8166 break;
8167
8168 case S390_INSN_DFP_REROUND:
8169 s390_sprintf(buf, "%M %R,%R,%R", "v-drrnd",
8170 insn->variant.dfp_reround.dst_hi,
8171 insn->variant.dfp_reround.op2,
8172 insn->variant.dfp_reround.op3_hi);
8173 break;
8174
8175 case S390_INSN_FP_CONVERT: {
8176 s390_fp_convert *fp_convert = insn->variant.fp_convert.details;
8177
8178 switch (fp_convert->tag) {
8179 case S390_FP_F32_TO_D32:
8180 case S390_FP_F32_TO_D64:
8181 case S390_FP_F32_TO_D128:
8182 case S390_FP_F64_TO_D32:
8183 case S390_FP_F64_TO_D64:
8184 case S390_FP_F64_TO_D128:
8185 case S390_FP_F128_TO_D32:
8186 case S390_FP_F128_TO_D64:
8187 case S390_FP_F128_TO_D128: op = "v-f2d"; break;
8188 case S390_FP_D32_TO_F32:
8189 case S390_FP_D32_TO_F64:
8190 case S390_FP_D32_TO_F128:
8191 case S390_FP_D64_TO_F32:
8192 case S390_FP_D64_TO_F64:
8193 case S390_FP_D64_TO_F128:
8194 case S390_FP_D128_TO_F32:
8195 case S390_FP_D128_TO_F64:
8196 case S390_FP_D128_TO_F128: op = "v-d2f"; break;
8197 default: goto fail;
8198 }
8199 s390_sprintf(buf, "%M %R,%R", op, fp_convert->dst_hi,
8200 fp_convert->op_hi);
8201 break;
8202 }
8203
8204 case S390_INSN_MFENCE:
8205 s390_sprintf(buf, "%M", "v-mfence");
8206 return buf; /* avoid printing "size = ..." which is meaningless */
8207
8208 case S390_INSN_MIMM:
8209 s390_sprintf(buf, "%M %A,%I", "v-mimm", insn->variant.mimm.dst,
8210 insn->variant.mimm.value);
8211 break;
8212
8213 case S390_INSN_MADD:
8214 s390_sprintf(buf, "%M %A += %I (= %I)", "v-madd",
8215 insn->variant.madd.dst,
8216 (Long)(Char)insn->variant.madd.delta,
8217 insn->variant.madd.value);
8218 break;
8219
8220 case S390_INSN_SET_FPC_BFPRM:
8221 s390_sprintf(buf, "%M %R", "v-set-fpc-bfprm",
8222 insn->variant.set_fpc_bfprm.mode);
8223 break;
8224
8225 case S390_INSN_SET_FPC_DFPRM:
8226 s390_sprintf(buf, "%M %R", "v-set-fpc-dfprm",
8227 insn->variant.set_fpc_dfprm.mode);
8228 break;
8229
8230 case S390_INSN_EVCHECK:
8231 s390_sprintf(buf, "%M counter = %A, fail-addr = %A", "v-evcheck",
8232 insn->variant.evcheck.counter,
8233 insn->variant.evcheck.fail_addr);
8234 return buf; /* avoid printing "size = ..." which is meaningless */
8235
8236 case S390_INSN_PROFINC:
8237 s390_sprintf(buf, "%M", "v-profinc");
8238 return buf; /* avoid printing "size = ..." which is meaningless */
8239
8240 case S390_INSN_XDIRECT:
8241 s390_sprintf(buf, "%M if (%C) %A = %I %s", "v-xdirect",
8242 insn->variant.xdirect.cond,
8243 insn->variant.xdirect.guest_IA,
8244 insn->variant.xdirect.dst,
8245 insn->variant.xdirect.to_fast_entry ? "fast" : "slow");
8246 return buf; /* avoid printing "size = ..." which is meaningless */
8247
8248 case S390_INSN_XINDIR:
8249 s390_sprintf(buf, "%M if (%C) %A = %R", "v-xindir",
8250 insn->variant.xindir.cond,
8251 insn->variant.xindir.guest_IA,
8252 insn->variant.xindir.dst);
8253 return buf; /* avoid printing "size = ..." which is meaningless */
8254
8255 case S390_INSN_XASSISTED:
8256 s390_sprintf(buf, "%M if (%C) %J %A = %R", "v-xassisted",
8257 insn->variant.xassisted.cond,
8258 insn->variant.xassisted.kind,
8259 insn->variant.xassisted.guest_IA,
8260 insn->variant.xassisted.dst);
8261 return buf; /* avoid printing "size = ..." which is meaningless */
8262
8263 case S390_INSN_VEC_AMODEOP:
8264 switch (insn->variant.vec_amodeop.tag) {
8265 case S390_VEC_GET_ELEM: op = "v-vgetelem"; break;
8266 case S390_VEC_ELEM_SHL_INT: op = "v-veshl"; break;
8267 case S390_VEC_ELEM_SHRA_INT: op = "v-veshra"; break;
8268 case S390_VEC_ELEM_SHRL_INT: op = "v-veshrl"; break;
8269 default: goto fail;
8270 }
8271 s390_sprintf(buf, "%M %R, %R, %A", op, insn->variant.vec_amodeop.dst,
8272 insn->variant.vec_amodeop.op1,
8273 insn->variant.vec_amodeop.op2);
8274 break;
8275
8276 case S390_INSN_VEC_AMODEINTOP:
8277 switch (insn->variant.vec_amodeintop.tag) {
8278 case S390_VEC_SET_ELEM: op = "v-vsetelem"; break;
8279 default: goto fail;
8280 }
8281 s390_sprintf(buf, "%M %R, %A, %R", op, insn->variant.vec_amodeintop.dst,
8282 insn->variant.vec_amodeintop.op2,
8283 insn->variant.vec_amodeintop.op3);
8284 break;
8285
8286 case S390_INSN_VEC_BINOP:
8287 switch (insn->variant.vec_binop.tag) {
8288 case S390_VEC_PACK: op = "v-vpack"; break;
8289 case S390_VEC_PACK_SATURS: op = "v-vpacksaturs"; break;
8290 case S390_VEC_PACK_SATURU: op = "v-vpacksaturu"; break;
8291 case S390_VEC_COMPARE_EQUAL: op = "v-vcmpeq"; break;
8292 case S390_VEC_OR: op = "v-vor"; break;
8293 case S390_VEC_ORC: op = "v-vorc"; break;
8294 case S390_VEC_XOR: op = "v-vxor"; break;
8295 case S390_VEC_AND: op = "v-vand"; break;
8296 case S390_VEC_MERGEL: op = "v-vmergel"; break;
8297 case S390_VEC_MERGEH: op = "v-vmergeh"; break;
8298 case S390_VEC_NOR: op = "v-vnor"; break;
8299 case S390_VEC_INT_ADD: op = "v-vintadd"; break;
8300 case S390_VEC_INT_SUB: op = "v-vintsub"; break;
8301 case S390_VEC_MAXU: op = "v-vmaxu"; break;
8302 case S390_VEC_MAXS: op = "v-vmaxs"; break;
8303 case S390_VEC_MINU: op = "v-vminu"; break;
8304 case S390_VEC_MINS: op = "v-vmins"; break;
8305 case S390_VEC_AVGU: op = "v-vavgu"; break;
8306 case S390_VEC_AVGS: op = "v-vavgs"; break;
8307 case S390_VEC_COMPARE_GREATERS: op = "v-vcmpgts"; break;
8308 case S390_VEC_COMPARE_GREATERU: op = "v-vcmpgtu"; break;
8309 case S390_VEC_INT_MUL_HIGHS: op = "v-vintmulhis"; break;
8310 case S390_VEC_INT_MUL_HIGHU: op = "v-vintmulhiu"; break;
8311 case S390_VEC_INT_MUL_LOW: op = "v-vintmullo"; break;
8312 case S390_VEC_INT_MUL_EVENS: op = "v-vintmulevens"; break;
8313 case S390_VEC_INT_MUL_EVENU: op = "v-vintmulevenu"; break;
8314 case S390_VEC_ELEM_SHL_V: op = "v-velemshl"; break;
8315 case S390_VEC_ELEM_SHRA_V: op = "v-vshrav"; break;
8316 case S390_VEC_ELEM_SHRL_V: op = "v-vshrlv"; break;
8317 case S390_VEC_ELEM_ROLL_V: op = "v-vrollv"; break;
8318 case S390_VEC_SHL_BITS: op = "v-vshlbits"; break;
8319 case S390_VEC_SHRL_BITS: op = "v-vshrlbits"; break;
8320 case S390_VEC_SHRA_BITS: op = "v-vshrabits"; break;
8321 case S390_VEC_SHL_BYTES: op = "v-vshlbytes"; break;
8322 case S390_VEC_SHRL_BYTES: op = "v-vshrlbytes"; break;
8323 case S390_VEC_SHRA_BYTES: op = "v-vshrabytes"; break;
8324 case S390_VEC_PWSUM_W: op = "v-vpwsumw"; break;
8325 case S390_VEC_PWSUM_DW: op = "v-vpwsumdw"; break;
8326 case S390_VEC_PWSUM_QW: op = "v-vpwsumqw"; break;
8327 case S390_VEC_INIT_FROM_GPRS: op = "v-vinitfromgprs"; break;
8328 case S390_VEC_INIT_FROM_FPRS: op = "v-vinitfromfprs"; break;
8329 case S390_VEC_FLOAT_ADD: op = "v-vfloatadd"; break;
8330 case S390_VEC_FLOAT_SUB: op = "v-vfloatsub"; break;
8331 case S390_VEC_FLOAT_MUL: op = "v-vfloatmul"; break;
8332 case S390_VEC_FLOAT_DIV: op = "v-vfloatdiv"; break;
8333 case S390_VEC_FLOAT_COMPARE_EQUAL: op = "v-vfloatcmpeq"; break;
8334 case S390_VEC_FLOAT_COMPARE_LESS_OR_EQUAL: op = "v-vfloatcmple"; break;
8335 case S390_VEC_FLOAT_COMPARE_LESS: op = "v-vfloatcmpl"; break;
8336 default: goto fail;
8337 }
8338 s390_sprintf(buf, "%M %R, %R, %R", op, insn->variant.vec_binop.dst,
8339 insn->variant.vec_binop.op1, insn->variant.vec_binop.op2);
8340 break;
8341
8342 case S390_INSN_VEC_TRIOP:
8343 switch (insn->variant.vec_triop.tag) {
8344 case S390_VEC_PERM: op = "v-vperm"; break;
8345 case S390_VEC_FLOAT_MADD: op = "v-vfloatmadd"; break;
8346 case S390_VEC_FLOAT_MSUB: op = "v-vfloatmsub"; break;
8347 default: goto fail;
8348 }
8349 s390_sprintf(buf, "%M %R, %R, %R, %R", op, insn->variant.vec_triop.dst,
8350 insn->variant.vec_triop.op1, insn->variant.vec_triop.op2,
8351 insn->variant.vec_triop.op3);
8352 break;
8353
8354 case S390_INSN_VEC_REPLICATE:
8355 s390_sprintf(buf, "%M %R, %R, %I", "v-vrep",
8356 insn->variant.vec_replicate.dst,
8357 insn->variant.vec_replicate.op1,
8358 insn->variant.vec_replicate.idx);
8359 break;
8360
8361 default: goto fail;
8362 }
8363
8364 /* Write out how many bytes are involved in the operation */
8365
8366 {
8367 UInt len, i;
8368
8369 for (p = buf; *p; ++p)
8370 continue;
8371
8372 len = p - buf;
8373
8374 if (len < 32) {
8375 for (i = len; i < 32; ++i)
8376 p += vex_sprintf(p, " ");
8377 } else {
8378 p += vex_sprintf(p, "\t");
8379 }
8380 }
8381
8382 /* Special cases first */
8383 switch (insn->tag) {
8384 case S390_INSN_UNOP:
8385 switch (insn->variant.unop.tag) {
8386 case S390_SIGN_EXTEND_8:
8387 case S390_ZERO_EXTEND_8: p += vex_sprintf(p, "1 -> "); goto common;
8388 case S390_SIGN_EXTEND_16:
8389 case S390_ZERO_EXTEND_16: p += vex_sprintf(p, "2 -> "); goto common;
8390 case S390_SIGN_EXTEND_32:
8391 case S390_ZERO_EXTEND_32: p += vex_sprintf(p, "4 -> "); goto common;
8392 default:
8393 goto common;
8394 }
8395
8396 case S390_INSN_BFP_CONVERT:
8397 switch (insn->variant.bfp_convert.tag) {
8398 case S390_BFP_I32_TO_F32:
8399 case S390_BFP_I32_TO_F64:
8400 case S390_BFP_I32_TO_F128:
8401 case S390_BFP_U32_TO_F32:
8402 case S390_BFP_U32_TO_F64:
8403 case S390_BFP_U32_TO_F128:
8404 case S390_BFP_F32_TO_I32:
8405 case S390_BFP_F32_TO_I64:
8406 case S390_BFP_F32_TO_U32:
8407 case S390_BFP_F32_TO_U64:
8408 case S390_BFP_F32_TO_F64:
8409 case S390_BFP_F32_TO_F128: p += vex_sprintf(p, "4 -> "); goto common;
8410 case S390_BFP_I64_TO_F32:
8411 case S390_BFP_I64_TO_F64:
8412 case S390_BFP_I64_TO_F128:
8413 case S390_BFP_U64_TO_F32:
8414 case S390_BFP_U64_TO_F64:
8415 case S390_BFP_U64_TO_F128:
8416 case S390_BFP_F64_TO_I32:
8417 case S390_BFP_F64_TO_I64:
8418 case S390_BFP_F64_TO_U32:
8419 case S390_BFP_F64_TO_U64:
8420 case S390_BFP_F64_TO_F32:
8421 case S390_BFP_F64_TO_F128: p += vex_sprintf(p, "8 -> "); goto common;
8422 case S390_BFP_F128_TO_I32:
8423 case S390_BFP_F128_TO_I64:
8424 case S390_BFP_F128_TO_U32:
8425 case S390_BFP_F128_TO_U64:
8426 case S390_BFP_F128_TO_F32:
8427 case S390_BFP_F128_TO_F64: p += vex_sprintf(p, "16 -> "); goto common;
8428 default:
8429 goto common;
8430 }
8431
8432 case S390_INSN_DFP_CONVERT:
8433 switch (insn->variant.dfp_convert.tag) {
8434 case S390_DFP_D32_TO_D64:
8435 case S390_DFP_I32_TO_D64:
8436 case S390_DFP_I32_TO_D128:
8437 case S390_DFP_U32_TO_D64:
8438 case S390_DFP_U32_TO_D128: p += vex_sprintf(p, "4 -> "); goto common;
8439 case S390_DFP_D64_TO_D32:
8440 case S390_DFP_D64_TO_D128:
8441 case S390_DFP_I64_TO_D64:
8442 case S390_DFP_I64_TO_D128:
8443 case S390_DFP_U64_TO_D64:
8444 case S390_DFP_U64_TO_D128:
8445 case S390_DFP_D64_TO_I32:
8446 case S390_DFP_D64_TO_I64:
8447 case S390_DFP_D64_TO_U32:
8448 case S390_DFP_D64_TO_U64: p += vex_sprintf(p, "8 -> "); goto common;
8449 case S390_DFP_D128_TO_D64:
8450 case S390_DFP_D128_TO_I32:
8451 case S390_DFP_D128_TO_I64:
8452 case S390_DFP_D128_TO_U32:
8453 case S390_DFP_D128_TO_U64: p += vex_sprintf(p, "16 -> "); goto common;
8454 default:
8455 goto common;
8456 }
8457
8458 case S390_INSN_FP_CONVERT: {
8459 s390_fp_convert *fp_convert = insn->variant.fp_convert.details;
8460
8461 switch (fp_convert->tag) {
8462 case S390_FP_F32_TO_D32:
8463 case S390_FP_F32_TO_D64:
8464 case S390_FP_F32_TO_D128:
8465 case S390_FP_D32_TO_F32:
8466 case S390_FP_D32_TO_F64:
8467 case S390_FP_D32_TO_F128: p += vex_sprintf(p, "4 -> "); goto common;
8468 case S390_FP_F64_TO_D32:
8469 case S390_FP_F64_TO_D64:
8470 case S390_FP_F64_TO_D128:
8471 case S390_FP_D64_TO_F32:
8472 case S390_FP_D64_TO_F64:
8473 case S390_FP_D64_TO_F128: p += vex_sprintf(p, "8 -> "); goto common;
8474 case S390_FP_F128_TO_D32:
8475 case S390_FP_F128_TO_D64:
8476 case S390_FP_F128_TO_D128:
8477 case S390_FP_D128_TO_F32:
8478 case S390_FP_D128_TO_F64:
8479 case S390_FP_D128_TO_F128: p += vex_sprintf(p, "16 -> "); goto common;
8480 default:
8481 goto common;
8482 }
8483 }
8484
8485 default:
8486 goto common;
8487 }
8488
8489 /* Common case */
8490 common:
8491 vex_sprintf(p, "%u bytes", (UInt)insn->size);
8492
8493 return buf;
8494
8495 fail: vpanic("s390_insn_as_string");
8496 }
8497
8498
8499
8500 /* Load NUM bytes from memory into register REG using addressing mode AM. */
8501 static UChar *
8502 s390_emit_load_mem(UChar *p, UInt num, UChar reg, const s390_amode *am)
8503 {
8504 UInt b = hregNumber(am->b);
8505 UInt x = hregNumber(am->x); /* 0 for B12 and B20 */
8506 UInt d = am->d;
8507
8508 switch (am->tag) {
8509 case S390_AMODE_B12:
8510 case S390_AMODE_BX12:
8511 switch (num) {
8512 case 1: return s390_emit_IC(p, reg, x, b, d);
8513 case 2: return s390_emit_LH(p, reg, x, b, d);
8514 case 4: return s390_emit_L(p, reg, x, b, d);
8515 case 8: return s390_emit_LG(p, reg, x, b, DISP20(d));
8516 case 16: return s390_emit_VL(p, reg, x, b, d);
8517 default: goto fail;
8518 }
8519 break;
8520
8521 case S390_AMODE_B20:
8522 case S390_AMODE_BX20:
8523 switch (num) {
8524 case 1: return s390_emit_ICY(p, reg, x, b, DISP20(d));
8525 case 2: return s390_emit_LHY(p, reg, x, b, DISP20(d));
8526 case 4: return s390_emit_LY(p, reg, x, b, DISP20(d));
8527 case 8: return s390_emit_LG(p, reg, x, b, DISP20(d));
8528 default: goto fail;
8529 }
8530 break;
8531
8532 default: goto fail;
8533 }
8534
8535 fail:
8536 vpanic("s390_emit_load_mem");
8537 }
8538
8539
8540 /* Load condition code into register REG */
8541 static UChar *
8542 s390_emit_load_cc(UChar *p, UChar reg)
8543 {
8544 p = s390_emit_LGHI(p, reg, 0); /* Clear out, cc not affected */
8545 p = s390_emit_IPM(p, reg, reg);
8546 /* Shift 28 bits to the right --> [0,1,2,3] */
8547 return s390_emit_SRL(p, reg, 0, 28); /* REG = cc */
8548 }
8549
8550
8551 /*---------------------------------------------------------------*/
8552 /*--- Code generation ---*/
8553 /*---------------------------------------------------------------*/
8554
8555 /* Do not load more bytes than requested. */
8556 static UChar *
8557 s390_insn_load_emit(UChar *buf, const s390_insn *insn)
8558 {
8559 UInt r, x, b, d;
8560 const s390_amode *src;
8561
8562 src = insn->variant.load.src;
8563
8564 r = hregNumber(insn->variant.load.dst);
8565
8566 if (hregClass(insn->variant.load.dst) == HRcFlt64) {
8567 b = hregNumber(src->b);
8568 x = hregNumber(src->x); /* 0 for B12 and B20 */
8569 d = src->d;
8570
8571 switch (insn->size) {
8572
8573 case 4:
8574 switch (src->tag) {
8575 case S390_AMODE_B12:
8576 case S390_AMODE_BX12:
8577 return s390_emit_LE(buf, r, x, b, d);
8578
8579 case S390_AMODE_B20:
8580 case S390_AMODE_BX20:
8581 return s390_emit_LEY(buf, r, x, b, DISP20(d));
8582 }
8583 break;
8584
8585 case 8:
8586 switch (src->tag) {
8587 case S390_AMODE_B12:
8588 case S390_AMODE_BX12:
8589 return s390_emit_LD(buf, r, x, b, d);
8590
8591 case S390_AMODE_B20:
8592 case S390_AMODE_BX20:
8593 return s390_emit_LDY(buf, r, x, b, DISP20(d));
8594 }
8595 break;
8596 }
8597 vpanic("s390_insn_load_emit");
8598 }
8599
8600 /* Integer stuff */
8601 return s390_emit_load_mem(buf, insn->size, r, src);
8602 }
8603
8604
8605 static UChar *
8606 s390_insn_store_emit(UChar *buf, const s390_insn *insn)
8607 {
8608 UInt r, x, b, d;
8609 const s390_amode *dst;
8610
8611 dst = insn->variant.store.dst;
8612
8613 r = hregNumber(insn->variant.store.src);
8614 b = hregNumber(dst->b);
8615 x = hregNumber(dst->x); /* 0 for B12 and B20 */
8616 d = dst->d;
8617
8618 if (hregClass(insn->variant.store.src) == HRcFlt64) {
8619 switch (insn->size) {
8620
8621 case 4:
8622 switch (dst->tag) {
8623 case S390_AMODE_B12:
8624 case S390_AMODE_BX12:
8625 return s390_emit_STE(buf, r, x, b, d);
8626
8627 case S390_AMODE_B20:
8628 case S390_AMODE_BX20:
8629 return s390_emit_STEY(buf, r, x, b, DISP20(d));
8630 }
8631 break;
8632
8633 case 8:
8634 switch (dst->tag) {
8635 case S390_AMODE_B12:
8636 case S390_AMODE_BX12:
8637 return s390_emit_STD(buf, r, x, b, d);
8638
8639 case S390_AMODE_B20:
8640 case S390_AMODE_BX20:
8641 return s390_emit_STDY(buf, r, x, b, DISP20(d));
8642 }
8643 break;
8644 }
8645 vpanic("s390_insn_store_emit");
8646 }
8647
8648 if (hregClass(insn->variant.store.src) == HRcVec128) {
8649 vassert(insn->size == 16);
8650 switch (dst->tag) {
8651 case S390_AMODE_B12:
8652 case S390_AMODE_BX12:
8653 return s390_emit_VST(buf, r, x, b, d);
8654
8655 default:
8656 vpanic("s390_insn_store_emit: unknown dst->tag for HRcVec128");
8657 }
8658 }
8659 /* Integer stuff */
8660 switch (insn->size) {
8661 case 1:
8662 switch (dst->tag) {
8663 case S390_AMODE_B12:
8664 case S390_AMODE_BX12:
8665 return s390_emit_STC(buf, r, x, b, d);
8666
8667 case S390_AMODE_B20:
8668 case S390_AMODE_BX20:
8669 return s390_emit_STCY(buf, r, x, b, DISP20(d));
8670 }
8671 break;
8672
8673 case 2:
8674 switch (dst->tag) {
8675 case S390_AMODE_B12:
8676 case S390_AMODE_BX12:
8677 return s390_emit_STH(buf, r, x, b, d);
8678
8679 case S390_AMODE_B20:
8680 case S390_AMODE_BX20:
8681 return s390_emit_STHY(buf, r, x, b, DISP20(d));
8682 }
8683 break;
8684
8685 case 4:
8686 switch (dst->tag) {
8687 case S390_AMODE_B12:
8688 case S390_AMODE_BX12:
8689 return s390_emit_ST(buf, r, x, b, d);
8690
8691 case S390_AMODE_B20:
8692 case S390_AMODE_BX20:
8693 return s390_emit_STY(buf, r, x, b, DISP20(d));
8694 }
8695 break;
8696
8697 case 8:
8698 return s390_emit_STG(buf, r, x, b, DISP20(d));
8699
8700 default:
8701 break;
8702 }
8703
8704 vpanic("s390_insn_store_emit");
8705 }
8706
8707
8708 static UChar *
8709 s390_insn_move_emit(UChar *buf, const s390_insn *insn)
8710 {
8711 UInt dst, src;
8712 HRegClass dst_class, src_class;
8713
8714 dst = hregNumber(insn->variant.move.dst);
8715 src = hregNumber(insn->variant.move.src);
8716
8717 dst_class = hregClass(insn->variant.move.dst);
8718 src_class = hregClass(insn->variant.move.src);
8719
8720 if (dst_class == src_class) {
8721 if (dst_class == HRcInt64)
8722 return s390_emit_LGR(buf, dst, src);
8723 if (dst_class == HRcFlt64)
8724 return s390_emit_LDR(buf, dst, src);
8725 if (dst_class == HRcVec128) {
8726 return s390_emit_VLR(buf, dst, src);
8727 }
8728 } else {
8729 if (dst_class == HRcFlt64 && src_class == HRcInt64) {
8730 if (insn->size == 4) {
8731 buf = s390_emit_SLLG(buf, R0, src, 0, DISP20(32)); /* r0 = src << 32 */
8732 return s390_emit_LDGRw(buf, dst, R0);
8733 } else {
8734 return s390_emit_LDGRw(buf, dst, src);
8735 }
8736 }
8737 if (dst_class == HRcInt64 && src_class == HRcFlt64) {
8738 if (insn->size == 4) {
8739 buf = s390_emit_LGDRw(buf, dst, src);
8740 return s390_emit_SRLG(buf, dst, dst, 0, DISP20(32)); /* dst >>= 32 */
8741 } else {
8742 return s390_emit_LGDRw(buf, dst, src);
8743 }
8744 }
8745 if (dst_class == HRcFlt64 && src_class == HRcVec128) {
8746 return s390_emit_VLR(buf, dst, src);
8747 }
8748 /* A move between floating point registers and general purpose
8749 registers of different size should never occur and indicates
8750 an error elsewhere. */
8751 }
8752
8753 vpanic("s390_insn_move_emit");
8754 }
8755
8756
8757 static UChar *
8758 s390_insn_memcpy_emit(UChar *buf, const s390_insn *insn)
8759 {
8760 s390_amode *dst = insn->variant.memcpy.dst;
8761 s390_amode *src = insn->variant.memcpy.src;
8762
8763 return s390_emit_MVC(buf, insn->size - 1, hregNumber(dst->b), dst->d,
8764 hregNumber(src->b), src->d);
8765 }
8766
8767
8768 static UChar *
8769 s390_insn_load_immediate_emit(UChar *buf, const s390_insn *insn)
8770 {
8771 UInt r;
8772 ULong value = insn->variant.load_immediate.value;
8773
8774 r = hregNumber(insn->variant.load_immediate.dst);
8775
8776 if (hregClass(insn->variant.load_immediate.dst) == HRcFlt64) {
8777 vassert(value == 0);
8778 switch (insn->size) {
8779 case 4: return s390_emit_LZER(buf, r, value);
8780 case 8: return s390_emit_LZDR(buf, r, value);
8781 }
8782 vpanic("s390_insn_load_immediate_emit");
8783 }
8784
8785 switch (insn->size) {
8786 case 1:
8787 case 2:
8788 /* Load the immediate values as a 4 byte value. That does not hurt as
8789 those extra bytes will not be looked at. Fall through .... */
8790 case 4:
8791 return s390_emit_load_32imm(buf, r, value);
8792
8793 case 8:
8794 return s390_emit_load_64imm(buf, r, value);
8795 }
8796
8797 vpanic("s390_insn_load_immediate_emit");
8798 }
8799
8800
8801 /* Insert low half of r2 into high half of dst. */
8802 static UChar *
8803 s390_emit_ilih(UChar *buf, UChar size, UChar dst, UChar r2)
8804 {
8805 if (s390_host_has_gie)
8806 return s390_emit_RISBG(buf, dst, r2, 64 - 8 * size, 63 - 4 * size,
8807 4 * size);
8808
8809 /* Clear dst's upper half. */
8810 buf = s390_emit_SLLG(buf, dst, dst, 0, DISP20(64 - 4 * size));
8811 buf = s390_emit_SRLG(buf, dst, dst, 0, DISP20(64 - 4 * size));
8812
8813 /* Shift r2 by appropriate amount and OR it into dst. */
8814 buf = s390_emit_SLLG(buf, R0, r2, 0, DISP20(4 * size));
8815 return s390_emit_OGR(buf, dst, R0);
8816 }
8817
8818
8819 /* There is no easy way to do ALU operations on 1-byte or 2-byte operands.
8820 So we simply perform a 4-byte operation. Doing so uses possibly undefined
8821 bits and produces an undefined result in those extra bit positions. But
8822 upstream does not look at those positions, so this is OK. */
8823 static UChar *
8824 s390_insn_alu_emit(UChar *buf, const s390_insn *insn)
8825 {
8826 s390_opnd_RMI op2;
8827 UInt dst;
8828
8829 dst = hregNumber(insn->variant.alu.dst);
8830 op2 = insn->variant.alu.op2;
8831
8832 /* Second operand is in a register */
8833 if (op2.tag == S390_OPND_REG) {
8834 UInt r2 = hregNumber(op2.variant.reg);
8835
8836 switch (insn->size) {
8837 case 1:
8838 case 2:
8839 case 4:
8840 switch (insn->variant.alu.tag) {
8841 case S390_ALU_ADD: return s390_emit_AR(buf, dst, r2);
8842 case S390_ALU_SUB: return s390_emit_SR(buf, dst, r2);
8843 case S390_ALU_MUL: return s390_emit_MSR(buf, dst, r2);
8844 case S390_ALU_AND: return s390_emit_NR(buf, dst, r2);
8845 case S390_ALU_OR: return s390_emit_OR(buf, dst, r2);
8846 case S390_ALU_XOR: return s390_emit_XR(buf, dst, r2);
8847 case S390_ALU_LSH: return s390_emit_SLL(buf, dst, r2, 0);
8848 case S390_ALU_RSH: return s390_emit_SRL(buf, dst, r2, 0);
8849 case S390_ALU_RSHA: return s390_emit_SRA(buf, dst, r2, 0);
8850 case S390_ALU_ILIH: return s390_emit_ilih(buf, insn->size, dst, r2);
8851 }
8852 goto fail;
8853
8854 case 8:
8855 switch (insn->variant.alu.tag) {
8856 case S390_ALU_ADD: return s390_emit_AGR(buf, dst, r2);
8857 case S390_ALU_SUB: return s390_emit_SGR(buf, dst, r2);
8858 case S390_ALU_MUL: return s390_emit_MSGR(buf, dst, r2);
8859 case S390_ALU_AND: return s390_emit_NGR(buf, dst, r2);
8860 case S390_ALU_OR: return s390_emit_OGR(buf, dst, r2);
8861 case S390_ALU_XOR: return s390_emit_XGR(buf, dst, r2);
8862 case S390_ALU_LSH: return s390_emit_SLLG(buf, dst, dst, r2, DISP20(0));
8863 case S390_ALU_RSH: return s390_emit_SRLG(buf, dst, dst, r2, DISP20(0));
8864 case S390_ALU_RSHA: return s390_emit_SRAG(buf, dst, dst, r2, DISP20(0));
8865 case S390_ALU_ILIH: return s390_emit_ilih(buf, 8, dst, r2);
8866 }
8867 goto fail;
8868 }
8869 goto fail;
8870 }
8871
8872 /* 2nd operand is in memory */
8873 if (op2.tag == S390_OPND_AMODE) {
8874 UInt b, x, d;
8875 const s390_amode *src = op2.variant.am;
8876
8877 b = hregNumber(src->b);
8878 x = hregNumber(src->x); /* 0 for B12 and B20 */
8879 d = src->d;
8880
8881 /* Shift operands are special here as there are no opcodes that
8882 allow a memory operand. So we first load the 2nd operand into
8883 some register. R0 is used to save restore the contents of the
8884 chosen register.. */
8885
8886 if (insn->variant.alu.tag == S390_ALU_LSH ||
8887 insn->variant.alu.tag == S390_ALU_RSH ||
8888 insn->variant.alu.tag == S390_ALU_RSHA) {
8889 UInt b2;
8890
8891 /* Choose a register (other than DST or R0) into which to stick the
8892 shift amount. The following works because r15 is reserved and
8893 thusly dst != 15. */
8894 vassert(dst != 15); /* extra paranoia */
8895 b2 = (dst + 1) % 16;
8896
8897 buf = s390_emit_LGR(buf, R0, b2); /* save */
8898
8899 /* Loading SRC to B2 does not modify R0. */
8900 buf = s390_emit_load_mem(buf, insn->size, b2, src);
8901
8902 if (insn->size == 8) {
8903 switch (insn->variant.alu.tag) {
8904 case S390_ALU_LSH:
8905 buf = s390_emit_SLLG(buf, dst, dst, b2, DISP20(0));
8906 break;
8907 case S390_ALU_RSH:
8908 buf = s390_emit_SRLG(buf, dst, dst, b2, DISP20(0));
8909 break;
8910 case S390_ALU_RSHA:
8911 buf = s390_emit_SRAG(buf, dst, dst, b2, DISP20(0));
8912 break;
8913 default: /* unreachable */
8914 goto fail;
8915 }
8916 } else {
8917 switch (insn->variant.alu.tag) {
8918 case S390_ALU_LSH:
8919 buf = s390_emit_SLL(buf, dst, b2, 0);
8920 break;
8921 case S390_ALU_RSH:
8922 buf = s390_emit_SRL(buf, dst, b2, 0);
8923 break;
8924 case S390_ALU_RSHA:
8925 buf = s390_emit_SRA(buf, dst, b2, 0);
8926 break;
8927 default: /* unreachable */
8928 goto fail;
8929 }
8930 }
8931 return s390_emit_LGR(buf, b2, R0); /* restore */
8932 }
8933
8934 switch (insn->size) {
8935 case 1:
8936 /* Move the byte from memory into scratch register r0 */
8937 buf = s390_emit_load_mem(buf, 1, R0, src);
8938
8939 switch (insn->variant.alu.tag) {
8940 case S390_ALU_ADD: return s390_emit_AR(buf, dst, R0);
8941 case S390_ALU_SUB: return s390_emit_SR(buf, dst, R0);
8942 case S390_ALU_MUL: return s390_emit_MSR(buf, dst, R0);
8943 case S390_ALU_AND: return s390_emit_NR(buf, dst, R0);
8944 case S390_ALU_OR: return s390_emit_OR(buf, dst, R0);
8945 case S390_ALU_XOR: return s390_emit_XR(buf, dst, R0);
8946 case S390_ALU_ILIH:
8947 case S390_ALU_LSH:
8948 case S390_ALU_RSH:
8949 case S390_ALU_RSHA: ; /* avoid GCC warning */
8950 }
8951 goto fail;
8952
8953 case 2:
8954 switch (src->tag) {
8955 case S390_AMODE_B12:
8956 case S390_AMODE_BX12:
8957 switch (insn->variant.alu.tag) {
8958 case S390_ALU_ADD:
8959 return s390_emit_AH(buf, dst, x, b, d);
8960
8961 case S390_ALU_SUB:
8962 return s390_emit_SH(buf, dst, x, b, d);
8963
8964 case S390_ALU_MUL:
8965 return s390_emit_MH(buf, dst, x, b, d);
8966
8967 /* For bitwise operations: Move two bytes from memory into scratch
8968 register r0; then perform operation */
8969 case S390_ALU_AND:
8970 buf = s390_emit_LH(buf, R0, x, b, d);
8971 return s390_emit_NR(buf, dst, R0);
8972
8973 case S390_ALU_OR:
8974 buf = s390_emit_LH(buf, R0, x, b, d);
8975 return s390_emit_OR(buf, dst, R0);
8976
8977 case S390_ALU_XOR:
8978 buf = s390_emit_LH(buf, R0, x, b, d);
8979 return s390_emit_XR(buf, dst, R0);
8980
8981 case S390_ALU_ILIH:
8982 case S390_ALU_LSH:
8983 case S390_ALU_RSH:
8984 case S390_ALU_RSHA: ; /* avoid GCC warning */
8985 }
8986 goto fail;
8987
8988 case S390_AMODE_B20:
8989 case S390_AMODE_BX20:
8990 switch (insn->variant.alu.tag) {
8991 case S390_ALU_ADD:
8992 return s390_emit_AHY(buf, dst, x, b, DISP20(d));
8993
8994 case S390_ALU_SUB:
8995 return s390_emit_SHY(buf, dst, x, b, DISP20(d));
8996
8997 case S390_ALU_MUL:
8998 return s390_emit_MHYw(buf, dst, x, b, DISP20(d));
8999
9000 /* For bitwise operations: Move two bytes from memory into scratch
9001 register r0; then perform operation */
9002 case S390_ALU_AND:
9003 buf = s390_emit_LHY(buf, R0, x, b, DISP20(d));
9004 return s390_emit_NR(buf, dst, R0);
9005
9006 case S390_ALU_OR:
9007 buf = s390_emit_LHY(buf, R0, x, b, DISP20(d));
9008 return s390_emit_OR(buf, dst, R0);
9009
9010 case S390_ALU_XOR:
9011 buf = s390_emit_LHY(buf, R0, x, b, DISP20(d));
9012 return s390_emit_XR(buf, dst, R0);
9013
9014 case S390_ALU_ILIH:
9015 case S390_ALU_LSH:
9016 case S390_ALU_RSH:
9017 case S390_ALU_RSHA: ; /* avoid GCC warning */
9018 }
9019 goto fail;
9020 }
9021 goto fail;
9022
9023 case 4:
9024 switch (src->tag) {
9025 case S390_AMODE_B12:
9026 case S390_AMODE_BX12:
9027 switch (insn->variant.alu.tag) {
9028 case S390_ALU_ADD: return s390_emit_A(buf, dst, x, b, d);
9029 case S390_ALU_SUB: return s390_emit_S(buf, dst, x, b, d);
9030 case S390_ALU_MUL: return s390_emit_MS(buf, dst, x, b, d);
9031 case S390_ALU_AND: return s390_emit_N(buf, dst, x, b, d);
9032 case S390_ALU_OR: return s390_emit_O(buf, dst, x, b, d);
9033 case S390_ALU_XOR: return s390_emit_X(buf, dst, x, b, d);
9034 case S390_ALU_ILIH:
9035 case S390_ALU_LSH:
9036 case S390_ALU_RSH:
9037 case S390_ALU_RSHA: ; /* avoid GCC warning */
9038 }
9039 goto fail;
9040
9041 case S390_AMODE_B20:
9042 case S390_AMODE_BX20:
9043 switch (insn->variant.alu.tag) {
9044 case S390_ALU_ADD: return s390_emit_AY(buf, dst, x, b, DISP20(d));
9045 case S390_ALU_SUB: return s390_emit_SY(buf, dst, x, b, DISP20(d));
9046 case S390_ALU_MUL: return s390_emit_MSY(buf, dst, x, b, DISP20(d));
9047 case S390_ALU_AND: return s390_emit_NY(buf, dst, x, b, DISP20(d));
9048 case S390_ALU_OR: return s390_emit_OY(buf, dst, x, b, DISP20(d));
9049 case S390_ALU_XOR: return s390_emit_XY(buf, dst, x, b, DISP20(d));
9050 case S390_ALU_ILIH:
9051 case S390_ALU_LSH:
9052 case S390_ALU_RSH:
9053 case S390_ALU_RSHA: ; /* avoid GCC warning */
9054 }
9055 goto fail;
9056 }
9057 goto fail;
9058
9059 case 8:
9060 switch (insn->variant.alu.tag) {
9061 case S390_ALU_ADD: return s390_emit_AG(buf, dst, x, b, DISP20(d));
9062 case S390_ALU_SUB: return s390_emit_SG(buf, dst, x, b, DISP20(d));
9063 case S390_ALU_MUL: return s390_emit_MSG(buf, dst, x, b, DISP20(d));
9064 case S390_ALU_AND: return s390_emit_NG(buf, dst, x, b, DISP20(d));
9065 case S390_ALU_OR: return s390_emit_OG(buf, dst, x, b, DISP20(d));
9066 case S390_ALU_XOR: return s390_emit_XG(buf, dst, x, b, DISP20(d));
9067 case S390_ALU_ILIH:
9068 case S390_ALU_LSH:
9069 case S390_ALU_RSH:
9070 case S390_ALU_RSHA: ; /* avoid GCC warning */
9071 }
9072 goto fail;
9073 }
9074 goto fail;
9075 }
9076
9077 /* 2nd operand is an immediate value */
9078 if (op2.tag == S390_OPND_IMMEDIATE) {
9079 ULong value;
9080
9081 /* No masking of the value is required as it is not sign extended */
9082 value = op2.variant.imm;
9083
9084 switch (insn->size) {
9085 case 1:
9086 case 2:
9087 /* There is no 1-byte opcode. Do the computation in
9088 2 bytes. The extra byte will be ignored. */
9089 switch (insn->variant.alu.tag) {
9090 case S390_ALU_ADD:
9091 return s390_emit_AHI(buf, dst, value);
9092
9093 case S390_ALU_SUB:
9094 return s390_emit_SLFIw(buf, dst, value);
9095
9096 case S390_ALU_MUL:
9097 return s390_emit_MHI(buf, dst, value);
9098
9099 case S390_ALU_AND: return s390_emit_NILL(buf, dst, value);
9100 case S390_ALU_OR: return s390_emit_OILL(buf, dst, value);
9101 case S390_ALU_XOR:
9102 /* There is no XILL instruction. Load the immediate value into
9103 R0 and combine with the destination register. */
9104 buf = s390_emit_LHI(buf, R0, value);
9105 return s390_emit_XR(buf, dst, R0);
9106
9107 case S390_ALU_LSH:
9108 return s390_emit_SLL(buf, dst, 0, value);
9109
9110 case S390_ALU_RSH:
9111 return s390_emit_SRL(buf, dst, 0, value);
9112
9113 case S390_ALU_RSHA:
9114 return s390_emit_SRA(buf, dst, 0, value);
9115
9116 case S390_ALU_ILIH: ; /* avoid GCC warning */
9117 }
9118 goto fail;
9119
9120 case 4:
9121 switch (insn->variant.alu.tag) {
9122 case S390_ALU_ADD:
9123 if (uint_fits_signed_16bit(value)) {
9124 return s390_emit_AHI(buf, dst, value);
9125 }
9126 return s390_emit_AFIw(buf, dst, value);
9127
9128 case S390_ALU_SUB: return s390_emit_SLFIw(buf, dst, value);
9129 case S390_ALU_MUL: return s390_emit_MSFIw(buf, dst, value);
9130 case S390_ALU_AND: return s390_emit_NILFw(buf, dst, value);
9131 case S390_ALU_OR: return s390_emit_OILFw(buf, dst, value);
9132 case S390_ALU_XOR: return s390_emit_XILFw(buf, dst, value);
9133 case S390_ALU_LSH: return s390_emit_SLL(buf, dst, 0, value);
9134 case S390_ALU_RSH: return s390_emit_SRL(buf, dst, 0, value);
9135 case S390_ALU_RSHA: return s390_emit_SRA(buf, dst, 0, value);
9136 case S390_ALU_ILIH: ; /* avoid GCC warning */
9137 }
9138 goto fail;
9139
9140 case 8:
9141 switch (insn->variant.alu.tag) {
9142 case S390_ALU_ADD:
9143 if (ulong_fits_signed_16bit(value)) {
9144 return s390_emit_AGHI(buf, dst, value);
9145 }
9146 if (ulong_fits_signed_32bit(value) && s390_host_has_eimm) {
9147 return s390_emit_AGFI(buf, dst, value);
9148 }
9149 /* Load constant into R0 then add */
9150 buf = s390_emit_load_64imm(buf, R0, value);
9151 return s390_emit_AGR(buf, dst, R0);
9152
9153 case S390_ALU_SUB:
9154 if (ulong_fits_unsigned_32bit(value)) {
9155 return s390_emit_SLGFIw(buf, dst, value);
9156 }
9157 /* Load value into R0; then subtract from destination reg */
9158 buf = s390_emit_load_64imm(buf, R0, value);
9159 return s390_emit_SGR(buf, dst, R0);
9160
9161 case S390_ALU_MUL:
9162 if (ulong_fits_signed_32bit(value) && s390_host_has_gie) {
9163 return s390_emit_MSGFI(buf, dst, value);
9164 }
9165 /* Load constant into R0 then add */
9166 buf = s390_emit_load_64imm(buf, R0, value);
9167 return s390_emit_MSGR(buf, dst, R0);
9168
9169 /* Do it in two steps: upper half [0:31] and lower half [32:63] */
9170 case S390_ALU_AND:
9171 if (s390_host_has_eimm) {
9172 buf = s390_emit_NIHF(buf, dst, value >> 32);
9173 return s390_emit_NILF(buf, dst, value & 0xFFFFFFFF);
9174 }
9175 /* Load value into R0; then combine with destination reg */
9176 buf = s390_emit_load_64imm(buf, R0, value);
9177 return s390_emit_NGR(buf, dst, R0);
9178
9179 case S390_ALU_OR:
9180 if (s390_host_has_eimm) {
9181 buf = s390_emit_OIHF(buf, dst, value >> 32);
9182 return s390_emit_OILF(buf, dst, value & 0xFFFFFFFF);
9183 }
9184 /* Load value into R0; then combine with destination reg */
9185 buf = s390_emit_load_64imm(buf, R0, value);
9186 return s390_emit_OGR(buf, dst, R0);
9187
9188 case S390_ALU_XOR:
9189 if (s390_host_has_eimm) {
9190 buf = s390_emit_XIHF(buf, dst, value >> 32);
9191 return s390_emit_XILF(buf, dst, value & 0xFFFFFFFF);
9192 }
9193 /* Load value into R0; then combine with destination reg */
9194 buf = s390_emit_load_64imm(buf, R0, value);
9195 return s390_emit_XGR(buf, dst, R0);
9196
9197 /* No special considerations for long displacement here. Only the six
9198 least significant bits of VALUE will be taken; all other bits are
9199 ignored. So the DH2 bits are irrelevant and do not influence the
9200 shift operation, independent of whether long-displacement is available
9201 or not. */
9202 case S390_ALU_LSH: return s390_emit_SLLG(buf, dst, dst, 0, DISP20(value));
9203 case S390_ALU_RSH: return s390_emit_SRLG(buf, dst, dst, 0, DISP20(value));
9204 case S390_ALU_RSHA: return s390_emit_SRAG(buf, dst, dst, 0, DISP20(value));
9205 case S390_ALU_ILIH: ; /* avoid GCC warning */
9206 }
9207 goto fail;
9208 }
9209 goto fail;
9210 }
9211
9212 fail:
9213 vpanic("s390_insn_alu_emit");
9214 }
9215
9216
9217 static UChar *
9218 s390_widen_emit(UChar *buf, const s390_insn *insn, UInt from_size,
9219 Bool sign_extend)
9220 {
9221 s390_opnd_RMI opnd = insn->variant.unop.src;
9222
9223 switch (opnd.tag) {
9224 case S390_OPND_REG: {
9225 UChar r1 = hregNumber(insn->variant.unop.dst);
9226 UChar r2 = hregNumber(opnd.variant.reg);
9227
9228 switch (from_size) {
9229 case 1:
9230 /* Widening to a half-word is implemented like widening to a word
9231 because the upper half-word will not be looked at. */
9232 if (insn->size == 4 || insn->size == 2) { /* 8 --> 32 8 --> 16 */
9233 if (sign_extend)
9234 return s390_emit_LBRw(buf, r1, r2);
9235 else
9236 return s390_emit_LLCRw(buf, r1, r2);
9237 }
9238 if (insn->size == 8) { /* 8 --> 64 */
9239 if (sign_extend)
9240 return s390_emit_LGBRw(buf, r1, r2);
9241 else
9242 return s390_emit_LLGCRw(buf, r1, r2);
9243 }
9244 goto fail;
9245
9246 case 2:
9247 if (insn->size == 4) { /* 16 --> 32 */
9248 if (sign_extend)
9249 return s390_emit_LHRw(buf, r1, r2);
9250 else
9251 return s390_emit_LLHRw(buf, r1, r2);
9252 }
9253 if (insn->size == 8) { /* 16 --> 64 */
9254 if (sign_extend)
9255 return s390_emit_LGHRw(buf, r1, r2);
9256 else
9257 return s390_emit_LLGHRw(buf, r1, r2);
9258 }
9259 goto fail;
9260
9261 case 4:
9262 if (insn->size == 8) { /* 32 --> 64 */
9263 if (sign_extend)
9264 return s390_emit_LGFR(buf, r1, r2);
9265 else
9266 return s390_emit_LLGFR(buf, r1, r2);
9267 }
9268 goto fail;
9269
9270 default: /* unexpected "from" size */
9271 goto fail;
9272 }
9273 }
9274
9275 case S390_OPND_AMODE: {
9276 UChar r1 = hregNumber(insn->variant.unop.dst);
9277 const s390_amode *src = opnd.variant.am;
9278 UChar b = hregNumber(src->b);
9279 UChar x = hregNumber(src->x);
9280 Int d = src->d;
9281
9282 switch (from_size) {
9283 case 1:
9284 if (insn->size == 4 || insn->size == 2) {
9285 if (sign_extend)
9286 return s390_emit_LB(buf, r1, x, b, DISP20(d));
9287 else
9288 return s390_emit_LLCw(buf, r1, x, b, DISP20(d));
9289 }
9290 if (insn->size == 8) {
9291 if (sign_extend)
9292 return s390_emit_LGB(buf, r1, x, b, DISP20(d));
9293 else
9294 return s390_emit_LLGC(buf, r1, x, b, DISP20(d));
9295 }
9296 goto fail;
9297
9298 case 2:
9299 if (insn->size == 4) { /* 16 --> 32 */
9300 if (sign_extend == 0)
9301 return s390_emit_LLHw(buf, r1, x, b, DISP20(d));
9302
9303 switch (src->tag) {
9304 case S390_AMODE_B12:
9305 case S390_AMODE_BX12:
9306 return s390_emit_LH(buf, r1, x, b, d);
9307
9308 case S390_AMODE_B20:
9309 case S390_AMODE_BX20:
9310 return s390_emit_LHY(buf, r1, x, b, DISP20(d));
9311 }
9312 goto fail;
9313 }
9314 if (insn->size == 8) { /* 16 --> 64 */
9315 if (sign_extend)
9316 return s390_emit_LGH(buf, r1, x, b, DISP20(d));
9317 else
9318 return s390_emit_LLGH(buf, r1, x, b, DISP20(d));
9319 }
9320 goto fail;
9321
9322 case 4:
9323 if (insn->size == 8) { /* 32 --> 64 */
9324 if (sign_extend)
9325 return s390_emit_LGF(buf, r1, x, b, DISP20(d));
9326 else
9327 return s390_emit_LLGF(buf, r1, x, b, DISP20(d));
9328 }
9329 goto fail;
9330
9331 default: /* unexpected "from" size */
9332 goto fail;
9333 }
9334 }
9335
9336 case S390_OPND_IMMEDIATE: {
9337 UChar r1 = hregNumber(insn->variant.unop.dst);
9338 ULong value = opnd.variant.imm;
9339
9340 switch (from_size) {
9341 case 1:
9342 if (insn->size == 4 || insn->size == 2) { /* 8 --> 32 8 --> 16 */
9343 if (sign_extend) {
9344 /* host can do the sign extension to 16-bit; LHI does the rest */
9345 return s390_emit_LHI(buf, r1, (Short)(Char)(UChar)value);
9346 } else {
9347 return s390_emit_LHI(buf, r1, value);
9348 }
9349 }
9350 if (insn->size == 8) { /* 8 --> 64 */
9351 if (sign_extend) {
9352 /* host can do the sign extension to 16-bit; LGHI does the rest */
9353 return s390_emit_LGHI(buf, r1, (Short)(Char)(UChar)value);
9354 } else {
9355 return s390_emit_LGHI(buf, r1, value);
9356 }
9357 }
9358 goto fail;
9359
9360 case 2:
9361 if (insn->size == 4) { /* 16 --> 32 */
9362 return s390_emit_LHI(buf, r1, value);
9363 }
9364 if (insn->size == 8) { /* 16 --> 64 */
9365 if (sign_extend)
9366 return s390_emit_LGHI(buf, r1, value);
9367 else
9368 return s390_emit_LLILL(buf, r1, value);
9369 }
9370 goto fail;
9371
9372 case 4:
9373 if (insn->size == 8) { /* 32 --> 64 */
9374 if (sign_extend)
9375 return s390_emit_LGFIw(buf, r1, value);
9376 else
9377 return s390_emit_LLILFw(buf, r1, value);
9378 }
9379 goto fail;
9380
9381 default: /* unexpected "from" size */
9382 goto fail;
9383 }
9384 }
9385 }
9386
9387 fail:
9388 vpanic("s390_widen_emit");
9389 }
9390
9391
9392 static UChar *
9393 s390_negate_emit(UChar *buf, const s390_insn *insn)
9394 {
9395 s390_opnd_RMI opnd;
9396
9397 opnd = insn->variant.unop.src;
9398
9399 switch (opnd.tag) {
9400 case S390_OPND_REG: {
9401 UChar r1 = hregNumber(insn->variant.unop.dst);
9402 UChar r2 = hregNumber(opnd.variant.reg);
9403
9404 switch (insn->size) {
9405 case 1:
9406 case 2:
9407 case 4:
9408 return s390_emit_LCR(buf, r1, r2);
9409
9410 case 8:
9411 return s390_emit_LCGR(buf, r1, r2);
9412
9413 default:
9414 goto fail;
9415 }
9416 }
9417
9418 case S390_OPND_AMODE: {
9419 UChar r1 = hregNumber(insn->variant.unop.dst);
9420
9421 /* Load bytes into scratch register R0, then negate */
9422 buf = s390_emit_load_mem(buf, insn->size, R0, opnd.variant.am);
9423
9424 switch (insn->size) {
9425 case 1:
9426 case 2:
9427 case 4:
9428 return s390_emit_LCR(buf, r1, R0);
9429
9430 case 8:
9431 return s390_emit_LCGR(buf, r1, R0);
9432
9433 default:
9434 goto fail;
9435 }
9436 }
9437
9438 case S390_OPND_IMMEDIATE: {
9439 UChar r1 = hregNumber(insn->variant.unop.dst);
9440 ULong value = opnd.variant.imm;
9441
9442 value = ~value + 1; /* two's complement */
9443
9444 switch (insn->size) {
9445 case 1:
9446 case 2:
9447 /* Load the immediate values as a 4 byte value. That does not hurt as
9448 those extra bytes will not be looked at. Fall through .... */
9449 case 4:
9450 return s390_emit_load_32imm(buf, r1, value);
9451
9452 case 8:
9453 return s390_emit_load_64imm(buf, r1, value);
9454
9455 default:
9456 goto fail;
9457 }
9458 }
9459 }
9460
9461 fail:
9462 vpanic("s390_negate_emit");
9463 }
9464
9465
9466 static UChar *
9467 s390_vec_duplicate_emit(UChar *buf, const s390_insn *insn)
9468 {
9469 UChar v1 = hregNumber(insn->variant.unop.dst);
9470 s390_opnd_RMI opnd = insn->variant.unop.src;
9471 UChar r2;
9472
9473 switch (opnd.tag) {
9474 case S390_OPND_AMODE: {
9475 s390_amode* am = opnd.variant.am;
9476 UInt b = hregNumber(am->b);
9477 UInt x = hregNumber(am->x);
9478 UInt d = am->d;
9479
9480 if (fits_unsigned_12bit(d)) {
9481 return s390_emit_VLREP(buf, v1, x, b, d,
9482 s390_getM_from_size(insn->size));
9483 }
9484 buf = s390_emit_load_mem(buf, insn->size, R0, am);
9485 r2 = R0;
9486 goto duplicate_from_gpr;
9487 }
9488
9489 case S390_OPND_IMMEDIATE: {
9490 ULong val = opnd.variant.imm;
9491
9492 if (ulong_fits_signed_16bit(val)) {
9493 return s390_emit_VREPI(buf, v1, val, s390_getM_from_size(insn->size));
9494 }
9495 buf = s390_emit_load_64imm(buf, R0, val);
9496 r2 = R0;
9497 goto duplicate_from_gpr;
9498 }
9499
9500 case S390_OPND_REG:
9501 r2 = hregNumber(opnd.variant.reg);
9502
9503 duplicate_from_gpr:
9504 buf = s390_emit_VLVGP(buf, v1, r2, r2);
9505 if (insn->size != 8) {
9506 buf = s390_emit_VREP(buf, v1, v1, 8 / insn->size - 1,
9507 s390_getM_from_size(insn->size));
9508 }
9509 return buf;
9510 }
9511
9512 vpanic("s390_vec_duplicate_emit");
9513 }
9514
9515
9516 static UChar *
9517 s390_insn_unop_emit(UChar *buf, const s390_insn *insn)
9518 {
9519 switch (insn->variant.unop.tag) {
9520 case S390_ZERO_EXTEND_8: return s390_widen_emit(buf, insn, 1, 0);
9521 case S390_ZERO_EXTEND_16: return s390_widen_emit(buf, insn, 2, 0);
9522 case S390_ZERO_EXTEND_32: return s390_widen_emit(buf, insn, 4, 0);
9523
9524 case S390_SIGN_EXTEND_8: return s390_widen_emit(buf, insn, 1, 1);
9525 case S390_SIGN_EXTEND_16: return s390_widen_emit(buf, insn, 2, 1);
9526 case S390_SIGN_EXTEND_32: return s390_widen_emit(buf, insn, 4, 1);
9527
9528 case S390_NEGATE: return s390_negate_emit(buf, insn);
9529 case S390_VEC_FILL: {
9530 vassert(insn->variant.unop.src.tag == S390_OPND_IMMEDIATE);
9531 UChar v1 = hregNumber(insn->variant.unop.dst);
9532 UShort i2 = insn->variant.unop.src.variant.imm;
9533 return s390_emit_VGBM(buf, v1, i2);
9534 }
9535 case S390_VEC_DUPLICATE: return s390_vec_duplicate_emit(buf, insn);
9536 case S390_VEC_UNPACKLOWS: {
9537 vassert(insn->variant.unop.src.tag == S390_OPND_REG);
9538 vassert(insn->size < 8);
9539 UChar v1 = hregNumber(insn->variant.unop.dst);
9540 UChar v2 = hregNumber(insn->variant.unop.src.variant.reg);
9541 return s390_emit_VUPH(buf, v1, v2, s390_getM_from_size(insn->size));
9542 }
9543 case S390_VEC_UNPACKLOWU: {
9544 vassert(insn->variant.unop.src.tag == S390_OPND_REG);
9545 vassert(insn->size < 8);
9546 UChar v1 = hregNumber(insn->variant.unop.dst);
9547 UChar v2 = hregNumber(insn->variant.unop.src.variant.reg);
9548 return s390_emit_VUPLH(buf, v1, v2, s390_getM_from_size(insn->size));
9549 }
9550
9551 case S390_VEC_ABS:{
9552 vassert(insn->variant.unop.src.tag == S390_OPND_REG);
9553 UChar v1 = hregNumber(insn->variant.unop.dst);
9554 UChar v2 = hregNumber(insn->variant.unop.src.variant.reg);
9555 return s390_emit_VLP(buf, v1, v2, s390_getM_from_size(insn->size));
9556 }
9557
9558 case S390_VEC_COUNT_LEADING_ZEROES:{
9559 vassert(insn->variant.unop.src.tag == S390_OPND_REG);
9560 UChar v1 = hregNumber(insn->variant.unop.dst);
9561 UChar v2 = hregNumber(insn->variant.unop.src.variant.reg);
9562 return s390_emit_VCLZ(buf, v1, v2, s390_getM_from_size(insn->size));
9563 }
9564
9565 case S390_VEC_COUNT_TRAILING_ZEROES:{
9566 vassert(insn->variant.unop.src.tag == S390_OPND_REG);
9567 UChar v1 = hregNumber(insn->variant.unop.dst);
9568 UChar v2 = hregNumber(insn->variant.unop.src.variant.reg);
9569 return s390_emit_VCTZ(buf, v1, v2, s390_getM_from_size(insn->size));
9570 }
9571
9572 case S390_VEC_COUNT_ONES:{
9573 vassert(insn->variant.unop.src.tag == S390_OPND_REG);
9574 UChar v1 = hregNumber(insn->variant.unop.dst);
9575 UChar v2 = hregNumber(insn->variant.unop.src.variant.reg);
9576 return s390_emit_VPOPCT(buf, v1, v2, s390_getM_from_size(insn->size));
9577 }
9578
9579 case S390_VEC_FLOAT_NEG: {
9580 vassert(insn->variant.unop.src.tag == S390_OPND_REG);
9581 vassert(insn->size >= 4);
9582 UChar v1 = hregNumber(insn->variant.unop.dst);
9583 UChar v2 = hregNumber(insn->variant.unop.src.variant.reg);
9584 return s390_emit_VFPSO(buf, v1, v2, s390_getM_from_size(insn->size), 0, 0);
9585 }
9586 case S390_VEC_FLOAT_ABS: {
9587 vassert(insn->variant.unop.src.tag == S390_OPND_REG);
9588 vassert(insn->size >= 4);
9589 UChar v1 = hregNumber(insn->variant.unop.dst);
9590 UChar v2 = hregNumber(insn->variant.unop.src.variant.reg);
9591 return s390_emit_VFPSO(buf, v1, v2, s390_getM_from_size(insn->size), 0, 2);
9592 }
9593 case S390_VEC_FLOAT_NABS: {
9594 vassert(insn->variant.unop.src.tag == S390_OPND_REG);
9595 vassert(insn->size >= 4);
9596 UChar v1 = hregNumber(insn->variant.unop.dst);
9597 UChar v2 = hregNumber(insn->variant.unop.src.variant.reg);
9598 return s390_emit_VFPSO(buf, v1, v2, s390_getM_from_size(insn->size), 0, 1);
9599 }
9600 case S390_VEC_FLOAT_SQRT: {
9601 vassert(insn->variant.unop.src.tag == S390_OPND_REG);
9602 vassert(insn->size >= 4);
9603 UChar v1 = hregNumber(insn->variant.unop.dst);
9604 UChar v2 = hregNumber(insn->variant.unop.src.variant.reg);
9605 return s390_emit_VFSQ(buf, v1, v2, s390_getM_from_size(insn->size), 0);
9606 }
9607 default:
9608 vpanic("s390_insn_unop_emit");
9609 }
9610 }
9611
9612
9613 /* Test operand for zero. */
9614 static UChar *
9615 s390_insn_test_emit(UChar *buf, const s390_insn *insn)
9616 {
9617 s390_opnd_RMI opnd;
9618
9619 opnd = insn->variant.test.src;
9620
9621 switch (opnd.tag) {
9622 case S390_OPND_REG: {
9623 UInt reg = hregNumber(opnd.variant.reg);
9624
9625 switch (insn->size) {
9626 case 1:
9627 return s390_emit_TMLL(buf, reg, 0xff);
9628
9629 case 2:
9630 return s390_emit_TMLL(buf, reg, 0xffff);
9631
9632 case 4:
9633 return s390_emit_LTR(buf, reg, reg);
9634
9635 case 8:
9636 return s390_emit_LTGR(buf, reg, reg);
9637
9638 default:
9639 goto fail;
9640 }
9641 }
9642
9643 case S390_OPND_AMODE: {
9644 const s390_amode *am = opnd.variant.am;
9645 UChar b = hregNumber(am->b);
9646 UChar x = hregNumber(am->x);
9647 Int d = am->d;
9648
9649 switch (insn->size) {
9650 case 1:
9651 switch (am->tag) {
9652 case S390_AMODE_B12:
9653 return s390_emit_TM(buf, 0xff, b, d);
9654 case S390_AMODE_B20:
9655 return s390_emit_TMY(buf, 0xff, b, DISP20(d));
9656 default:
9657 buf = s390_emit_LB(buf, R0, x, b, DISP20(d));
9658 return s390_emit_TMLL(buf, R0, 0xff);
9659 }
9660
9661 case 2:
9662 switch (am->tag) {
9663 case S390_AMODE_B12:
9664 buf = s390_emit_LH(buf, R0, x, b, d);
9665 return s390_emit_TMLL(buf, R0, 0xffff);
9666 default:
9667 buf = s390_emit_LHY(buf, R0, x, b, DISP20(d));
9668 return s390_emit_TMLL(buf, R0, 0xffff);
9669 }
9670
9671 case 4:
9672 return s390_emit_LTw(buf, R0, x, b, DISP20(d));
9673
9674 case 8:
9675 return s390_emit_LTGw(buf, R0, x, b, DISP20(d));
9676
9677 default:
9678 goto fail;
9679 }
9680 }
9681
9682 case S390_OPND_IMMEDIATE: {
9683 if (opnd.variant.imm == 0)
9684 return s390_emit_CR(buf, R0, R0);
9685 else
9686 return s390_emit_OILL(buf, R0, 1);
9687 }
9688
9689 default:
9690 goto fail;
9691 }
9692
9693 fail:
9694 vpanic("s390_insn_test_emit");
9695 }
9696
9697
9698 static UChar *
9699 s390_insn_cc2bool_emit(UChar *buf, const s390_insn *insn)
9700 {
9701 UChar r1 = hregNumber(insn->variant.cc2bool.dst);
9702 s390_cc_t cond = insn->variant.cc2bool.cond;
9703
9704 /* Make the destination register be -1 or 0, depending on whether
9705 the relevant condition holds. A 64-bit value is computed. */
9706 if (cond == S390_CC_ALWAYS)
9707 return s390_emit_LGHI(buf, r1, -1); /* r1 = -1 */
9708
9709 /* If LOCGHI is available, use it. */
9710 if (s390_host_has_lsc2) {
9711 /* Clear r1, then load immediate -1 on condition. */
9712 buf = s390_emit_LGHI(buf, r1, 0);
9713 if (cond != S390_CC_NEVER)
9714 buf = s390_emit_LOCGHI(buf, r1, -1, cond);
9715 return buf;
9716 }
9717
9718 buf = s390_emit_load_cc(buf, r1); /* r1 = cc */
9719 buf = s390_emit_LGHI(buf, R0, cond); /* r0 = mask */
9720 buf = s390_emit_SLLG(buf, r1, R0, r1, DISP20(60)); /* r1 = mask << (cc+60) */
9721 buf = s390_emit_SRAG(buf, r1, r1, 0, DISP20(63)); /* r1 = r1 >> 63 */
9722
9723 return buf;
9724 }
9725
9726
9727 /* Only 4-byte and 8-byte operands are handled. */
9728 static UChar *
9729 s390_insn_cas_emit(UChar *buf, const s390_insn *insn)
9730 {
9731 UChar r1, r3, b, old;
9732 Int d;
9733 s390_amode *am;
9734
9735 r1 = hregNumber(insn->variant.cas.op1); /* expected value */
9736 r3 = hregNumber(insn->variant.cas.op3);
9737 old= hregNumber(insn->variant.cas.old_mem);
9738 am = insn->variant.cas.op2;
9739 b = hregNumber(am->b);
9740 d = am->d;
9741
9742 vassert(am->tag == S390_AMODE_B12 || am->tag == S390_AMODE_B20);
9743
9744 switch (insn->size) {
9745 case 4:
9746 /* r1 must not be overwritten. So copy it to R0 and let CS clobber it */
9747 buf = s390_emit_LR(buf, R0, r1);
9748 if (am->tag == S390_AMODE_B12)
9749 buf = s390_emit_CS(buf, R0, r3, b, d);
9750 else
9751 buf = s390_emit_CSY(buf, R0, r3, b, DISP20(d));
9752 /* Now copy R0 which has the old memory value to OLD */
9753 return s390_emit_LR(buf, old, R0);
9754
9755 case 8:
9756 /* r1 must not be overwritten. So copy it to R0 and let CS clobber it */
9757 buf = s390_emit_LGR(buf, R0, r1);
9758 buf = s390_emit_CSG(buf, R0, r3, b, DISP20(d));
9759 /* Now copy R0 which has the old memory value to OLD */
9760 return s390_emit_LGR(buf, old, R0);
9761
9762 default:
9763 goto fail;
9764 }
9765
9766 fail:
9767 vpanic("s390_insn_cas_emit");
9768 }
9769
9770
9771 /* Only 4-byte and 8-byte operands are handled. */
9772 static UChar *
9773 s390_insn_cdas_emit(UChar *buf, const s390_insn *insn)
9774 {
9775 UChar r1, r1p1, r3, /*r3p1,*/ b, old_high, old_low, scratch;
9776 Int d;
9777 s390_amode *am;
9778 s390_cdas *cdas = insn->variant.cdas.details;
9779
9780 r1 = hregNumber(cdas->op1_high); /* expected value */
9781 r1p1 = hregNumber(cdas->op1_low); /* expected value */
9782 r3 = hregNumber(cdas->op3_high);
9783 /* r3p1 = hregNumber(cdas->op3_low); */ /* unused */
9784 old_high = hregNumber(cdas->old_mem_high);
9785 old_low = hregNumber(cdas->old_mem_low);
9786 scratch = hregNumber(cdas->scratch);
9787 am = cdas->op2;
9788 b = hregNumber(am->b);
9789 d = am->d;
9790
9791 vassert(scratch == 1);
9792 vassert(am->tag == S390_AMODE_B12 || am->tag == S390_AMODE_B20);
9793
9794 switch (insn->size) {
9795 case 4:
9796 /* r1, r1+1 must not be overwritten. So copy them to R0,scratch
9797 and let CDS/CDSY clobber it */
9798 buf = s390_emit_LR(buf, R0, r1);
9799 buf = s390_emit_LR(buf, scratch, r1p1);
9800
9801 if (am->tag == S390_AMODE_B12)
9802 buf = s390_emit_CDS(buf, R0, r3, b, d);
9803 else
9804 buf = s390_emit_CDSY(buf, R0, r3, b, DISP20(d));
9805
9806 /* Now copy R0,scratch which has the old memory value to OLD */
9807 buf = s390_emit_LR(buf, old_high, R0);
9808 buf = s390_emit_LR(buf, old_low, scratch);
9809 return buf;
9810
9811 case 8:
9812 /* r1, r1+1 must not be overwritten. So copy them to R0,scratch
9813 and let CDSG clobber it */
9814 buf = s390_emit_LGR(buf, R0, r1);
9815 buf = s390_emit_LGR(buf, scratch, r1p1);
9816
9817 buf = s390_emit_CDSG(buf, R0, r3, b, DISP20(d));
9818
9819 /* Now copy R0,scratch which has the old memory value to OLD */
9820 buf = s390_emit_LGR(buf, old_high, R0);
9821 buf = s390_emit_LGR(buf, old_low, scratch);
9822 return buf;
9823
9824 default:
9825 goto fail;
9826 }
9827
9828 fail:
9829 vpanic("s390_insn_cdas_emit");
9830 }
9831
9832
9833 /* Only 4-byte and 8-byte comparisons are handled. 1-byte and 2-byte
9834 comparisons will have been converted to 4-byte comparisons in
9835 s390_isel_cc and should not occur here. */
9836 static UChar *
9837 s390_insn_compare_emit(UChar *buf, const s390_insn *insn)
9838 {
9839 s390_opnd_RMI op2;
9840 HReg op1;
9841 Bool signed_comparison;
9842
9843 op1 = insn->variant.compare.src1;
9844 op2 = insn->variant.compare.src2;
9845 signed_comparison = insn->variant.compare.signed_comparison;
9846
9847 switch (op2.tag) {
9848 case S390_OPND_REG: {
9849 UInt r1 = hregNumber(op1);
9850 UInt r2 = hregNumber(op2.variant.reg);
9851
9852 switch (insn->size) {
9853 case 4:
9854 if (signed_comparison)
9855 return s390_emit_CR(buf, r1, r2);
9856 else
9857 return s390_emit_CLR(buf, r1, r2);
9858
9859 case 8:
9860 if (signed_comparison)
9861 return s390_emit_CGR(buf, r1, r2);
9862 else
9863 return s390_emit_CLGR(buf, r1, r2);
9864
9865 default:
9866 goto fail;
9867 }
9868 }
9869
9870 case S390_OPND_AMODE: {
9871 UChar r1 = hregNumber(op1);
9872 const s390_amode *am = op2.variant.am;
9873 UChar b = hregNumber(am->b);
9874 UChar x = hregNumber(am->x);
9875 Int d = am->d;
9876
9877 switch (insn->size) {
9878 case 4:
9879 switch (am->tag) {
9880 case S390_AMODE_B12:
9881 case S390_AMODE_BX12:
9882 if (signed_comparison)
9883 return s390_emit_C(buf, r1, x, b, d);
9884 else
9885 return s390_emit_CL(buf, r1, x, b, d);
9886
9887 case S390_AMODE_B20:
9888 case S390_AMODE_BX20:
9889 if (signed_comparison)
9890 return s390_emit_CY(buf, r1, x, b, DISP20(d));
9891 else
9892 return s390_emit_CLY(buf, r1, x, b, DISP20(d));
9893 }
9894 goto fail;
9895
9896 case 8:
9897 if (signed_comparison)
9898 return s390_emit_CG(buf, r1, x, b, DISP20(d));
9899 else
9900 return s390_emit_CLG(buf, r1, x, b, DISP20(d));
9901
9902 default:
9903 goto fail;
9904 }
9905 }
9906
9907 case S390_OPND_IMMEDIATE: {
9908 UChar r1 = hregNumber(op1);
9909 ULong value = op2.variant.imm;
9910
9911 switch (insn->size) {
9912 case 4:
9913 if (signed_comparison)
9914 return s390_emit_CFIw(buf, r1, value);
9915 else
9916 return s390_emit_CLFIw(buf, r1, value);
9917
9918 case 8:
9919 if (s390_host_has_eimm) {
9920 if (signed_comparison) {
9921 if (ulong_fits_signed_32bit(value))
9922 return s390_emit_CGFI(buf, r1, value);
9923 } else {
9924 if (ulong_fits_unsigned_32bit(value))
9925 return s390_emit_CLGFI(buf, r1, value);
9926 }
9927 }
9928 buf = s390_emit_load_64imm(buf, R0, value);
9929 if (signed_comparison)
9930 return s390_emit_CGR(buf, r1, R0);
9931 else
9932 return s390_emit_CLGR(buf, r1, R0);
9933
9934 default:
9935 goto fail;
9936 }
9937 }
9938
9939 default:
9940 goto fail;
9941 }
9942
9943 fail:
9944 vpanic("s390_insn_compare_emit");
9945 }
9946
9947
9948 static UChar *
9949 s390_insn_mul_emit(UChar *buf, const s390_insn *insn)
9950 {
9951 s390_opnd_RMI op2;
9952 UChar r1;
9953 Bool signed_multiply;
9954
9955 /* The register number identifying the register pair */
9956 r1 = hregNumber(insn->variant.mul.dst_hi);
9957
9958 op2 = insn->variant.mul.op2;
9959 signed_multiply = insn->tag == S390_INSN_SMUL;
9960
9961 switch (op2.tag) {
9962 case S390_OPND_REG: {
9963 UInt r2 = hregNumber(op2.variant.reg);
9964
9965 switch (insn->size) {
9966 case 1:
9967 case 2:
9968 case 4:
9969 if (signed_multiply)
9970 return s390_emit_MR(buf, r1, r2);
9971 else
9972 return s390_emit_MLR(buf, r1, r2);
9973
9974 case 8:
9975 if (signed_multiply)
9976 return s390_emit_MGRK(buf, r1 + 1, r1, r2);
9977 else
9978 return s390_emit_MLGR(buf, r1, r2);
9979
9980 default:
9981 goto fail;
9982 }
9983 }
9984
9985 case S390_OPND_AMODE: {
9986 const s390_amode *am = op2.variant.am;
9987 UChar b = hregNumber(am->b);
9988 UChar x = hregNumber(am->x);
9989 Int d = am->d;
9990
9991 switch (insn->size) {
9992 case 1:
9993 case 2:
9994 /* Load bytes into scratch register R0, then multiply */
9995 buf = s390_emit_load_mem(buf, insn->size, R0, am);
9996 if (signed_multiply)
9997 return s390_emit_MR(buf, r1, R0);
9998 else
9999 return s390_emit_MLR(buf, r1, R0);
10000
10001 case 4:
10002 switch (am->tag) {
10003 case S390_AMODE_B12:
10004 case S390_AMODE_BX12:
10005 if (signed_multiply)
10006 return s390_emit_M(buf, r1, x, b, d);
10007 else
10008 return s390_emit_ML(buf, r1, x, b, DISP20(d));
10009
10010 case S390_AMODE_B20:
10011 case S390_AMODE_BX20:
10012 if (signed_multiply)
10013 return s390_emit_MFYw(buf, r1, x, b, DISP20(d));
10014 else
10015 return s390_emit_ML(buf, r1, x, b, DISP20(d));
10016 }
10017 goto fail;
10018
10019 case 8:
10020 if (signed_multiply)
10021 return s390_emit_MG(buf, r1, x, b, DISP20(d));
10022 else
10023 return s390_emit_MLG(buf, r1, x, b, DISP20(d));
10024
10025 default:
10026 goto fail;
10027 }
10028 }
10029
10030 case S390_OPND_IMMEDIATE: {
10031 ULong value = op2.variant.imm;
10032
10033 switch (insn->size) {
10034 case 1:
10035 case 2:
10036 case 4:
10037 buf = s390_emit_load_32imm(buf, R0, value);
10038 if (signed_multiply)
10039 return s390_emit_MR(buf, r1, R0);
10040 else
10041 return s390_emit_MLR(buf, r1, R0);
10042
10043 case 8:
10044 buf = s390_emit_load_64imm(buf, R0, value);
10045 if (signed_multiply)
10046 return s390_emit_MGRK(buf, r1 + 1, r1, R0);
10047 else
10048 return s390_emit_MLGR(buf, r1, R0);
10049
10050 default:
10051 goto fail;
10052 }
10053 }
10054
10055 default:
10056 goto fail;
10057 }
10058
10059 fail:
10060 vpanic("s390_insn_mul_emit");
10061 }
10062
10063
10064 static UChar *
10065 s390_insn_div_emit(UChar *buf, const s390_insn *insn)
10066 {
10067 s390_opnd_RMI op2;
10068 UChar r1;
10069 Bool signed_divide;
10070
10071 r1 = hregNumber(insn->variant.div.op1_hi);
10072 op2 = insn->variant.div.op2;
10073 signed_divide = insn->tag == S390_INSN_SDIV;
10074
10075 switch (op2.tag) {
10076 case S390_OPND_REG: {
10077 UInt r2 = hregNumber(op2.variant.reg);
10078
10079 switch (insn->size) {
10080 case 4:
10081 if (signed_divide)
10082 return s390_emit_DR(buf, r1, r2);
10083 else
10084 return s390_emit_DLR(buf, r1, r2);
10085
10086 case 8:
10087 if (signed_divide)
10088 vpanic("s390_insn_div_emit");
10089 else
10090 return s390_emit_DLGR(buf, r1, r2);
10091
10092 default:
10093 goto fail;
10094 }
10095 }
10096
10097 case S390_OPND_AMODE: {
10098 const s390_amode *am = op2.variant.am;
10099 UChar b = hregNumber(am->b);
10100 UChar x = hregNumber(am->x);
10101 Int d = am->d;
10102
10103 switch (insn->size) {
10104 case 4:
10105 switch (am->tag) {
10106 case S390_AMODE_B12:
10107 case S390_AMODE_BX12:
10108 if (signed_divide)
10109 return s390_emit_D(buf, r1, x, b, d);
10110 else
10111 return s390_emit_DL(buf, r1, x, b, DISP20(d));
10112
10113 case S390_AMODE_B20:
10114 case S390_AMODE_BX20:
10115 if (signed_divide) {
10116 buf = s390_emit_LY(buf, R0, x, b, DISP20(d));
10117 return s390_emit_DR(buf, r1, R0);
10118 } else
10119 return s390_emit_DL(buf, r1, x, b, DISP20(d));
10120 }
10121 goto fail;
10122
10123 case 8:
10124 if (signed_divide)
10125 vpanic("s390_insn_div_emit");
10126 else
10127 return s390_emit_DLG(buf, r1, x, b, DISP20(d));
10128
10129 default:
10130 goto fail;
10131 }
10132 }
10133
10134 case S390_OPND_IMMEDIATE: {
10135 ULong value = op2.variant.imm;
10136
10137 switch (insn->size) {
10138 case 4:
10139 buf = s390_emit_load_32imm(buf, R0, value);
10140 if (signed_divide)
10141 return s390_emit_DR(buf, r1, R0);
10142 else
10143 return s390_emit_DLR(buf, r1, R0);
10144
10145 case 8:
10146 buf = s390_emit_load_64imm(buf, R0, value);
10147 if (signed_divide)
10148 vpanic("s390_insn_div_emit");
10149 else
10150 return s390_emit_DLGR(buf, r1, R0);
10151
10152 default:
10153 goto fail;
10154 }
10155 }
10156
10157 default:
10158 goto fail;
10159 }
10160
10161 fail:
10162 vpanic("s390_insn_div_emit");
10163 }
10164
10165
10166 static UChar *
10167 s390_insn_divs_emit(UChar *buf, const s390_insn *insn)
10168 {
10169 s390_opnd_RMI op2;
10170 UChar r1;
10171
10172 r1 = hregNumber(insn->variant.divs.rem);
10173 op2 = insn->variant.divs.op2;
10174
10175 switch (op2.tag) {
10176 case S390_OPND_REG: {
10177 UInt r2 = hregNumber(op2.variant.reg);
10178
10179 return s390_emit_DSGR(buf, r1, r2);
10180 }
10181
10182 case S390_OPND_AMODE: {
10183 const s390_amode *am = op2.variant.am;
10184 UChar b = hregNumber(am->b);
10185 UChar x = hregNumber(am->x);
10186 Int d = am->d;
10187
10188 return s390_emit_DSG(buf, r1, x, b, DISP20(d));
10189 }
10190
10191 case S390_OPND_IMMEDIATE: {
10192 ULong value = op2.variant.imm;
10193
10194 buf = s390_emit_load_64imm(buf, R0, value);
10195 return s390_emit_DSGR(buf, r1, R0);
10196 }
10197
10198 default:
10199 goto fail;
10200 }
10201
10202 fail:
10203 vpanic("s390_insn_divs_emit");
10204 }
10205
10206
10207 static UChar *
10208 s390_insn_clz_emit(UChar *buf, const s390_insn *insn)
10209 {
10210 s390_opnd_RMI src;
10211 UChar r1, r1p1, r2, *p;
10212
10213 r1 = hregNumber(insn->variant.clz.num_bits);
10214 r1p1 = hregNumber(insn->variant.clz.clobber);
10215
10216 vassert((r1 & 0x1) == 0);
10217 vassert(r1p1 == r1 + 1);
10218
10219 p = buf;
10220 src = insn->variant.clz.src;
10221
10222 /* Get operand and move it to r2 */
10223 switch (src.tag) {
10224 case S390_OPND_REG:
10225 r2 = hregNumber(src.variant.reg);
10226 break;
10227
10228 case S390_OPND_AMODE: {
10229 const s390_amode *am = src.variant.am;
10230 UChar b = hregNumber(am->b);
10231 UChar x = hregNumber(am->x);
10232 Int d = am->d;
10233
10234 p = s390_emit_LG(p, R0, x, b, DISP20(d));
10235 r2 = R0;
10236 break;
10237 }
10238
10239 case S390_OPND_IMMEDIATE: {
10240 ULong value = src.variant.imm;
10241
10242 p = s390_emit_load_64imm(p, R0, value);
10243 r2 = R0;
10244 break;
10245 }
10246
10247 default:
10248 goto fail;
10249 }
10250
10251 /* Use FLOGR if you can */
10252 if (s390_host_has_eimm) {
10253 return s390_emit_FLOGR(p, r1, r2);
10254 }
10255
10256 /*
10257 r0 = r2;
10258 r1 = 64;
10259 while (r0 != 0) {
10260 r1 -= 1;
10261 r0 >>= 1;
10262 }
10263 */
10264 p = s390_emit_LTGR(p, R0, r2);
10265 p = s390_emit_LLILL(p, r1, 64);
10266
10267 p = s390_emit_BRC(p, S390_CC_E, (4 + 4 + 6 + 4 + 4)/ 2); /* 4 bytes */
10268 p = s390_emit_AGHI(p, r1, (UShort)-1); /* r1 -= 1; 4 bytes */
10269 p = s390_emit_SRLG(p, R0, R0, R0, DISP20(1)); /* r0 >>= 1; 6 bytes */
10270 p = s390_emit_LTGR(p, R0, R0); /* set cc 4 bytes */
10271 p = s390_emit_BRC(p, S390_CC_NE, /* 4 bytes */
10272 (UShort)(-(4 + 6 + 4) / 2));
10273 return p;
10274
10275 fail:
10276 vpanic("s390_insn_clz_emit");
10277 }
10278
10279
10280 /* Returns a value == BUF to denote failure, != BUF to denote success. */
10281 static UChar *
10282 s390_insn_helper_call_emit(UChar *buf, const s390_insn *insn)
10283 {
10284 s390_cc_t cond;
10285 ULong target;
10286 Int delta;
10287 s390_helper_call *helper_call = insn->variant.helper_call.details;
10288
10289 cond = helper_call->cond;
10290 target = helper_call->target;
10291
10292 const Bool not_always = (cond != S390_CC_ALWAYS);
10293 const Bool not_void_return = (helper_call->rloc.pri != RLPri_None);
10294
10295 /* We have this situation:
10296 ( *** code in this braces is for not_always && not_void_return*** )
10297 ...
10298 before:
10299 brc{!cond} else
10300 call_helper
10301 preElse:
10302 *** j after ***
10303 else:
10304 *** load_64imm $0x5555555555555555, %%r2 *** // e.g. for Int RetLoc
10305 after:
10306 ...
10307 */
10308
10309 // before:
10310 UChar *pBefore = buf;
10311 if (not_always) {
10312 /* 4 bytes (a BRC insn) to be filled in here */
10313 buf += 4;
10314 }
10315
10316 // call_helper
10317 /* Load the target address into a register, that
10318 (a) is not used for passing parameters to the helper and
10319 (b) can be clobbered by the callee
10320 (c) is not special to the BASR insn
10321 r1 is the only choice.
10322 Also, need to arrange for the return address be put into the
10323 link-register */
10324 buf = s390_emit_load_64imm(buf, 1, target);
10325 buf = s390_emit_BASR(buf, S390_REGNO_LINK_REGISTER, 1);
10326
10327 // preElse:
10328 UChar* pPreElse = buf;
10329 if (not_always && not_void_return) {
10330 /* 4 bytes (a BRC insn) to be filled in here */
10331 buf += 4;
10332 }
10333
10334 // else:
10335 UChar* pElse = buf;
10336 if (not_always && not_void_return) {
10337 switch (helper_call->rloc.pri) {
10338 case RLPri_Int:
10339 buf = s390_emit_load_64imm(buf, S390_REGNO_RETURN_VALUE, 0x5555555555555555ULL);
10340 break;
10341 default:
10342 ppS390Instr(insn, True);
10343 vpanic("s390_insn_helper_call_emit: invalid conditional RetLoc.");
10344 }
10345 }
10346
10347 // after:
10348 UChar* pAfter = buf;
10349
10350 // fill "brc{!cond} else"
10351 if(not_always)
10352 {
10353 delta = pElse - pBefore;
10354 delta >>= 1; /* immediate constant is #half-words */
10355 vassert(delta > 0 && delta < (1 << 16));
10356 s390_emit_BRC(pBefore, s390_cc_invert(cond), delta);
10357 }
10358
10359 // fill "brc{ALWAYS} after"
10360 if (not_always && not_void_return)
10361 {
10362 delta = pAfter - pPreElse;
10363 delta >>= 1; /* immediate constant is #half-words */
10364 vassert(delta > 0 && delta < (1 << 16));
10365 s390_emit_BRC(pPreElse, S390_CC_ALWAYS, delta);
10366 }
10367
10368 return buf;
10369 }
10370
10371
10372 static UChar *
10373 s390_insn_cond_move_emit(UChar *buf, const s390_insn *insn)
10374 {
10375 HReg dst;
10376 s390_opnd_RMI src;
10377 s390_cc_t cond;
10378 UChar *p, *ptmp = 0; /* avoid compiler warnings */
10379
10380 cond = insn->variant.cond_move.cond;
10381 dst = insn->variant.cond_move.dst;
10382 src = insn->variant.cond_move.src;
10383
10384 if (cond == S390_CC_NEVER) return buf;
10385
10386 p = buf;
10387
10388 if (s390_host_has_lsc && hregClass(dst) == HRcInt64) {
10389 /* LOCx is not the preferred way to implement an unconditional load. */
10390 if (cond == S390_CC_ALWAYS) goto use_branch_insn;
10391
10392 switch (src.tag) {
10393 case S390_OPND_REG:
10394 return s390_emit_LOCGR(p, cond, hregNumber(dst),
10395 hregNumber(src.variant.reg));
10396
10397 case S390_OPND_AMODE: {
10398 const s390_amode *am = src.variant.am;
10399
10400 /* We cannot use LOCx for loads less than 4 bytes. In that case
10401 load into R0 and then use LOCGR. Do the same if the amode uses
10402 an index register. */
10403 if (insn->size < 4 ||
10404 am->tag == S390_AMODE_BX12 || am->tag == S390_AMODE_BX20) {
10405 p = s390_emit_load_mem(p, insn->size, R0, am);
10406 p = s390_emit_LOCGR(p, cond, hregNumber(dst), R0);
10407 return p;
10408 }
10409
10410 vassert(am->tag == S390_AMODE_B12 || am->tag == S390_AMODE_B20);
10411 vassert(insn->size == 4 || insn->size == 8);
10412
10413 UInt b = hregNumber(am->b);
10414 UInt d = am->d;
10415
10416 if (insn->size == 4) {
10417 return s390_emit_LOC(p, hregNumber(dst), cond, b, DISP20(d));
10418 }
10419 return s390_emit_LOCG(p, hregNumber(dst), cond, b, DISP20(d));
10420 }
10421
10422 case S390_OPND_IMMEDIATE: {
10423 ULong value = src.variant.imm;
10424
10425 /* If LOCGHI is available, use it. */
10426 if (s390_host_has_lsc2 && ulong_fits_signed_16bit(value)) {
10427 return s390_emit_LOCGHI(p, hregNumber(dst), value, cond);
10428 }
10429
10430 /* Load value into R0, then use LOCGR */
10431 if (insn->size <= 4) {
10432 p = s390_emit_load_32imm(p, R0, value);
10433 return s390_emit_LOCGR(p, cond, hregNumber(dst), R0);
10434 }
10435
10436 vassert(insn->size == 8);
10437 p = s390_emit_load_64imm(p, R0, value);
10438 return s390_emit_LOCGR(p, cond, hregNumber(dst), R0);
10439 }
10440 }
10441 }
10442
10443 use_branch_insn:
10444 /* Branch (if cond fails) over move instrs */
10445 if (cond != S390_CC_ALWAYS) {
10446 /* Don't know how many bytes to jump over yet.
10447 Make space for a BRC instruction (4 bytes) and fill in later. */
10448 ptmp = p; /* to be filled in here */
10449 p += 4;
10450 }
10451
10452 // cond true: move src => dst
10453
10454 switch (src.tag) {
10455 case S390_OPND_REG:
10456 switch (hregClass(dst)) {
10457 case HRcInt64:
10458 p = s390_emit_LGR(p, hregNumber(dst), hregNumber(src.variant.reg));
10459 break;
10460 case HRcFlt64:
10461 p = s390_emit_LDR(p, hregNumber(dst), hregNumber(src.variant.reg));
10462 break;
10463 case HRcVec128:
10464 p = s390_emit_VLR(p, hregNumber(dst), hregNumber(src.variant.reg));
10465 break;
10466 default:
10467 goto fail;
10468 }
10469 break;
10470
10471 case S390_OPND_AMODE:
10472 if (hregClass(dst) != HRcInt64)
10473 goto fail;
10474
10475 p = s390_emit_load_mem(p, insn->size, hregNumber(dst), src.variant.am);
10476 break;
10477
10478 case S390_OPND_IMMEDIATE: {
10479 if (hregClass(dst) != HRcInt64)
10480 goto fail;
10481
10482 ULong value = src.variant.imm;
10483 UInt r = hregNumber(dst);
10484
10485 switch (insn->size) {
10486 case 1:
10487 case 2:
10488 /* Load the immediate values as a 4 byte value. That does not hurt as
10489 those extra bytes will not be looked at. Fall through .... */
10490 case 4:
10491 p = s390_emit_load_32imm(p, r, value);
10492 break;
10493
10494 case 8:
10495 p = s390_emit_load_64imm(p, r, value);
10496 break;
10497 }
10498 break;
10499 }
10500
10501 default:
10502 goto fail;
10503 }
10504
10505 if (cond != S390_CC_ALWAYS) {
10506 Int delta = p - ptmp;
10507
10508 delta >>= 1; /* immediate constant is #half-words */
10509 vassert(delta > 0 && delta < (1 << 16));
10510 s390_emit_BRC(ptmp, s390_cc_invert(cond), delta);
10511 }
10512
10513 return p;
10514
10515 fail:
10516 vpanic("s390_insn_cond_move_emit");
10517 }
10518
10519
10520 static UChar *
10521 s390_insn_bfp_triop_emit(UChar *buf, const s390_insn *insn)
10522 {
10523 UInt r1 = hregNumber(insn->variant.bfp_triop.dst);
10524 UInt r2 = hregNumber(insn->variant.bfp_triop.op2);
10525 UInt r3 = hregNumber(insn->variant.bfp_triop.op3);
10526
10527 switch (insn->size) {
10528 case 4:
10529 switch (insn->variant.bfp_triop.tag) {
10530 case S390_BFP_MADD: return s390_emit_MAEBR(buf, r1, r3, r2);
10531 case S390_BFP_MSUB: return s390_emit_MSEBR(buf, r1, r3, r2);
10532 default: goto fail;
10533 }
10534 break;
10535
10536 case 8:
10537 switch (insn->variant.bfp_triop.tag) {
10538 case S390_BFP_MADD: return s390_emit_MADBR(buf, r1, r3, r2);
10539 case S390_BFP_MSUB: return s390_emit_MSDBR(buf, r1, r3, r2);
10540 default: goto fail;
10541 }
10542 break;
10543
10544 default: goto fail;
10545 }
10546
10547 fail:
10548 vpanic("s390_insn_bfp_triop_emit");
10549 }
10550
10551
10552 static UChar *
10553 s390_insn_bfp_binop_emit(UChar *buf, const s390_insn *insn)
10554 {
10555 UInt r1 = hregNumber(insn->variant.bfp_binop.dst_hi);
10556 UInt r2 = hregNumber(insn->variant.bfp_binop.op2_hi);
10557
10558 switch (insn->size) {
10559 case 4:
10560 switch (insn->variant.bfp_binop.tag) {
10561 case S390_BFP_ADD: return s390_emit_AEBR(buf, r1, r2);
10562 case S390_BFP_SUB: return s390_emit_SEBR(buf, r1, r2);
10563 case S390_BFP_MUL: return s390_emit_MEEBR(buf, r1, r2);
10564 case S390_BFP_DIV: return s390_emit_DEBR(buf, r1, r2);
10565 default: goto fail;
10566 }
10567 break;
10568
10569 case 8:
10570 switch (insn->variant.bfp_binop.tag) {
10571 case S390_BFP_ADD: return s390_emit_ADBR(buf, r1, r2);
10572 case S390_BFP_SUB: return s390_emit_SDBR(buf, r1, r2);
10573 case S390_BFP_MUL: return s390_emit_MDBR(buf, r1, r2);
10574 case S390_BFP_DIV: return s390_emit_DDBR(buf, r1, r2);
10575 default: goto fail;
10576 }
10577 break;
10578
10579 case 16:
10580 switch (insn->variant.bfp_binop.tag) {
10581 case S390_BFP_ADD: return s390_emit_AXBR(buf, r1, r2);
10582 case S390_BFP_SUB: return s390_emit_SXBR(buf, r1, r2);
10583 case S390_BFP_MUL: return s390_emit_MXBR(buf, r1, r2);
10584 case S390_BFP_DIV: return s390_emit_DXBR(buf, r1, r2);
10585 default: goto fail;
10586 }
10587 break;
10588
10589 default: goto fail;
10590 }
10591
10592 fail:
10593 vpanic("s390_insn_bfp_binop_emit");
10594 }
10595
10596
10597 static UChar *
10598 s390_insn_bfp_unop_emit(UChar *buf, const s390_insn *insn)
10599 {
10600 UInt r1 = hregNumber(insn->variant.bfp_unop.dst_hi);
10601 UInt r2 = hregNumber(insn->variant.bfp_unop.op_hi);
10602
10603 switch (insn->variant.bfp_unop.tag) {
10604 case S390_BFP_ABS:
10605 switch (insn->size) {
10606 case 4: return s390_emit_LPEBR(buf, r1, r2);
10607 case 8: return s390_emit_LPDBR(buf, r1, r2);
10608 case 16: return s390_emit_LPXBR(buf, r1, r2);
10609 default: goto fail;
10610 }
10611 break;
10612
10613 case S390_BFP_NABS:
10614 switch (insn->size) {
10615 case 4: return s390_emit_LNEBR(buf, r1, r2);
10616 case 8: return s390_emit_LNDBR(buf, r1, r2);
10617 case 16: return s390_emit_LNXBR(buf, r1, r2);
10618 default: goto fail;
10619 }
10620 break;
10621
10622 case S390_BFP_NEG:
10623 switch (insn->size) {
10624 case 4: return s390_emit_LCEBR(buf, r1, r2);
10625 case 8: return s390_emit_LCDBR(buf, r1, r2);
10626 case 16: return s390_emit_LCXBR(buf, r1, r2);
10627 default: goto fail;
10628 }
10629 break;
10630
10631 case S390_BFP_SQRT:
10632 switch (insn->size) {
10633 case 4: return s390_emit_SQEBR(buf, r1, r2);
10634 case 8: return s390_emit_SQDBR(buf, r1, r2);
10635 case 16: return s390_emit_SQXBR(buf, r1, r2);
10636 default: goto fail;
10637 }
10638 break;
10639
10640 default: goto fail;
10641 }
10642
10643 fail:
10644 vpanic("s390_insn_bfp_unop_emit");
10645 }
10646
10647
10648 static UChar *
10649 s390_insn_bfp_convert_emit(UChar *buf, const s390_insn *insn)
10650 {
10651 UInt r1 = hregNumber(insn->variant.bfp_convert.dst_hi);
10652 UInt r2 = hregNumber(insn->variant.bfp_convert.op_hi);
10653 s390_bfp_round_t m3 = insn->variant.bfp_convert.rounding_mode;
10654 /* The IEEE-inexact-exception control is not modelled. So the
10655 m4 field is 0 (which is what GCC does, too) */
10656 const UInt m4 = 0;
10657
10658 switch (insn->variant.bfp_convert.tag) {
10659 /* Convert to fixed */
10660 case S390_BFP_F32_TO_I32: return s390_emit_CFEBR(buf, m3, r1, r2);
10661 case S390_BFP_F64_TO_I32: return s390_emit_CFDBR(buf, m3, r1, r2);
10662 case S390_BFP_F128_TO_I32: return s390_emit_CFXBR(buf, m3, r1, r2);
10663 case S390_BFP_F32_TO_I64: return s390_emit_CGEBR(buf, m3, r1, r2);
10664 case S390_BFP_F64_TO_I64: return s390_emit_CGDBR(buf, m3, r1, r2);
10665 case S390_BFP_F128_TO_I64: return s390_emit_CGXBR(buf, m3, r1, r2);
10666
10667 /* Convert to logical */
10668 case S390_BFP_F32_TO_U32: return s390_emit_CLFEBR(buf, m3, m4, r1, r2);
10669 case S390_BFP_F64_TO_U32: return s390_emit_CLFDBR(buf, m3, m4, r1, r2);
10670 case S390_BFP_F128_TO_U32: return s390_emit_CLFXBR(buf, m3, m4, r1, r2);
10671 case S390_BFP_F32_TO_U64: return s390_emit_CLGEBR(buf, m3, m4, r1, r2);
10672 case S390_BFP_F64_TO_U64: return s390_emit_CLGDBR(buf, m3, m4, r1, r2);
10673 case S390_BFP_F128_TO_U64: return s390_emit_CLGXBR(buf, m3, m4, r1, r2);
10674
10675 /* Convert from fixed */
10676 case S390_BFP_I32_TO_F32: return s390_emit_CEFBRA(buf, m3, m4, r1, r2);
10677 case S390_BFP_I32_TO_F64: return s390_emit_CDFBRA(buf, 0, m4, r1, r2);
10678 case S390_BFP_I32_TO_F128: return s390_emit_CXFBRA(buf, 0, m4, r1, r2);
10679 case S390_BFP_I64_TO_F32: return s390_emit_CEGBRA(buf, m3, m4, r1, r2);
10680 case S390_BFP_I64_TO_F64: return s390_emit_CDGBRA(buf, m3, m4, r1, r2);
10681 case S390_BFP_I64_TO_F128: return s390_emit_CXGBRA(buf, 0, m4, r1, r2);
10682
10683 /* Convert from logical */
10684 case S390_BFP_U32_TO_F32: return s390_emit_CELFBR(buf, m3, m4, r1, r2);
10685 case S390_BFP_U32_TO_F64: return s390_emit_CDLFBR(buf, m3, m4, r1, r2);
10686 case S390_BFP_U32_TO_F128: return s390_emit_CXLFBR(buf, m3, m4, r1, r2);
10687 case S390_BFP_U64_TO_F32: return s390_emit_CELGBR(buf, m3, m4, r1, r2);
10688 case S390_BFP_U64_TO_F64: return s390_emit_CDLGBR(buf, m3, m4, r1, r2);
10689 case S390_BFP_U64_TO_F128: return s390_emit_CXLGBR(buf, m3, m4, r1, r2);
10690
10691 /* Load lengthened */
10692 case S390_BFP_F32_TO_F64: return s390_emit_LDEBR(buf, r1, r2);
10693 case S390_BFP_F32_TO_F128: return s390_emit_LXEBR(buf, r1, r2);
10694 case S390_BFP_F64_TO_F128: return s390_emit_LXDBR(buf, r1, r2);
10695
10696 /* Load rounded */
10697 case S390_BFP_F64_TO_F32: return s390_emit_LEDBRA(buf, m3, m4, r1, r2);
10698 case S390_BFP_F128_TO_F32: return s390_emit_LEXBRA(buf, m3, m4, r1, r2);
10699 case S390_BFP_F128_TO_F64: return s390_emit_LDXBRA(buf, m3, m4, r1, r2);
10700
10701 /* Load FP integer */
10702 case S390_BFP_F32_TO_F32I: return s390_emit_FIEBRA(buf, m3, m4, r1, r2);
10703 case S390_BFP_F64_TO_F64I: return s390_emit_FIDBRA(buf, m3, m4, r1, r2);
10704 case S390_BFP_F128_TO_F128I: return s390_emit_FIXBRA(buf, m3, m4, r1, r2);
10705
10706 default: goto fail;
10707 }
10708
10709 fail:
10710 vpanic("s390_insn_bfp_convert_emit");
10711 }
10712
10713
10714 static UChar *
10715 s390_insn_bfp_compare_emit(UChar *buf, const s390_insn *insn)
10716 {
10717 UInt dst = hregNumber(insn->variant.bfp_compare.dst);
10718 UInt r1 = hregNumber(insn->variant.bfp_compare.op1_hi);
10719 UInt r2 = hregNumber(insn->variant.bfp_compare.op2_hi);
10720
10721 switch (insn->size) {
10722 case 4: buf = s390_emit_CEBR(buf, r1, r2); break;
10723 case 8: buf = s390_emit_CDBR(buf, r1, r2); break;
10724 case 16: buf = s390_emit_CXBR(buf, r1, r2); break;
10725 default: goto fail;
10726 }
10727
10728 return s390_emit_load_cc(buf, dst); /* Load condition code into DST */
10729
10730 fail:
10731 vpanic("s390_insn_bfp_compare_emit");
10732 }
10733
10734
10735 static UChar *
10736 s390_insn_dfp_binop_emit(UChar *buf, const s390_insn *insn)
10737 {
10738 s390_dfp_binop *dfp_binop = insn->variant.dfp_binop.details;
10739
10740 UInt r1 = hregNumber(dfp_binop->dst_hi);
10741 UInt r2 = hregNumber(dfp_binop->op2_hi);
10742 UInt r3 = hregNumber(dfp_binop->op3_hi);
10743 s390_dfp_round_t m4 = dfp_binop->rounding_mode;
10744
10745 switch (insn->size) {
10746 case 8:
10747 switch (dfp_binop->tag) {
10748 case S390_DFP_ADD: return s390_emit_ADTRA(buf, r3, m4, r1, r2);
10749 case S390_DFP_SUB: return s390_emit_SDTRA(buf, r3, m4, r1, r2);
10750 case S390_DFP_MUL: return s390_emit_MDTRA(buf, r3, m4, r1, r2);
10751 case S390_DFP_DIV: return s390_emit_DDTRA(buf, r3, m4, r1, r2);
10752 case S390_DFP_QUANTIZE: return s390_emit_QADTR(buf, r3, m4, r1, r2);
10753 default: goto fail;
10754 }
10755 break;
10756
10757 case 16:
10758 switch (dfp_binop->tag) {
10759 case S390_DFP_ADD: return s390_emit_AXTRA(buf, r3, m4, r1, r2);
10760 case S390_DFP_SUB: return s390_emit_SXTRA(buf, r3, m4, r1, r2);
10761 case S390_DFP_MUL: return s390_emit_MXTRA(buf, r3, m4, r1, r2);
10762 case S390_DFP_DIV: return s390_emit_DXTRA(buf, r3, m4, r1, r2);
10763 case S390_DFP_QUANTIZE: return s390_emit_QAXTR(buf, r3, m4, r1, r2);
10764 default: goto fail;
10765 }
10766 break;
10767
10768 default: goto fail;
10769 }
10770
10771 fail:
10772 vpanic("s390_insn_dfp_binop_emit");
10773 }
10774
10775
10776 static UChar *
10777 s390_insn_dfp_reround_emit(UChar *buf, const s390_insn *insn)
10778 {
10779 UInt r1 = hregNumber(insn->variant.dfp_reround.dst_hi);
10780 UInt r2 = hregNumber(insn->variant.dfp_reround.op2);
10781 UInt r3 = hregNumber(insn->variant.dfp_reround.op3_hi);
10782 s390_dfp_round_t m4 = insn->variant.dfp_reround.rounding_mode;
10783
10784 switch (insn->size) {
10785 case 8:
10786 return s390_emit_RRDTR(buf, r3, m4, r1, r2);
10787
10788 case 16:
10789 return s390_emit_RRXTR(buf, r3, m4, r1, r2);
10790
10791 default: goto fail;
10792 }
10793 fail:
10794 vpanic("s390_insn_dfp_reround_emit");
10795 }
10796
10797
10798 static UChar *
10799 s390_insn_dfp_unop_emit(UChar *buf, const s390_insn *insn)
10800 {
10801 UInt r1 = hregNumber(insn->variant.dfp_unop.dst_hi);
10802 UInt r2 = hregNumber(insn->variant.dfp_unop.op_hi);
10803
10804 switch (insn->variant.dfp_unop.tag) {
10805 case S390_DFP_EXTRACT_EXP_D64: return s390_emit_EEDTR(buf, r1, r2); break;
10806 case S390_DFP_EXTRACT_EXP_D128: return s390_emit_EEXTR(buf, r1, r2); break;
10807 case S390_DFP_EXTRACT_SIG_D64: return s390_emit_ESDTR(buf, r1, r2); break;
10808 case S390_DFP_EXTRACT_SIG_D128: return s390_emit_ESXTR(buf, r1, r2); break;
10809 default: goto fail;
10810 }
10811 fail:
10812 vpanic("s390_insn_dfp_unop_emit");
10813 }
10814
10815
10816 static UChar *
10817 s390_insn_dfp_intop_emit(UChar *buf, const s390_insn *insn)
10818 {
10819 UInt r1 = hregNumber(insn->variant.dfp_intop.dst_hi);
10820 UInt r2 = hregNumber(insn->variant.dfp_intop.op2);
10821 UInt r3 = hregNumber(insn->variant.dfp_intop.op3_hi);
10822
10823 switch (insn->size) {
10824 case 8:
10825 switch (insn->variant.dfp_intop.tag) {
10826 case S390_DFP_SHIFT_LEFT: return s390_emit_SLDT(buf, r3, r1, r2);
10827 case S390_DFP_SHIFT_RIGHT: return s390_emit_SRDT(buf, r3, r1, r2);
10828 case S390_DFP_INSERT_EXP: return s390_emit_IEDTR(buf, r3, r1, r2);
10829 default: goto fail;
10830 }
10831 break;
10832
10833 case 16:
10834 switch (insn->variant.dfp_intop.tag) {
10835 case S390_DFP_SHIFT_LEFT: return s390_emit_SLXT(buf, r3, r1, r2);
10836 case S390_DFP_SHIFT_RIGHT: return s390_emit_SRXT(buf, r3, r1, r2);
10837 case S390_DFP_INSERT_EXP: return s390_emit_IEXTR(buf, r3, r1, r2);
10838 default: goto fail;
10839 }
10840 break;
10841
10842 default: goto fail;
10843 }
10844
10845 fail:
10846 vpanic("s390_insn_dfp_intop_emit");
10847 }
10848
10849
10850 static UChar *
10851 s390_insn_dfp_compare_emit(UChar *buf, const s390_insn *insn)
10852 {
10853 UInt dst = hregNumber(insn->variant.dfp_compare.dst);
10854 UInt r1 = hregNumber(insn->variant.dfp_compare.op1_hi);
10855 UInt r2 = hregNumber(insn->variant.dfp_compare.op2_hi);
10856
10857 switch (insn->size) {
10858 case 8:
10859 switch(insn->variant.dfp_compare.tag) {
10860 case S390_DFP_COMPARE: buf = s390_emit_CDTR(buf, r1, r2); break;
10861 case S390_DFP_COMPARE_EXP: buf = s390_emit_CEDTR(buf, r1, r2); break;
10862 default: goto fail;
10863 }
10864 break;
10865
10866 case 16:
10867 switch(insn->variant.dfp_compare.tag) {
10868 case S390_DFP_COMPARE: buf = s390_emit_CXTR(buf, r1, r2); break;
10869 case S390_DFP_COMPARE_EXP: buf = s390_emit_CEXTR(buf, r1, r2); break;
10870 default: goto fail;
10871 }
10872 break;
10873
10874 default: goto fail;
10875 }
10876
10877 return s390_emit_load_cc(buf, dst); /* Load condition code into DST */
10878
10879 fail:
10880 vpanic("s390_insn_dfp_compare_emit");
10881 }
10882
10883
10884 static UChar *
10885 s390_insn_dfp_convert_emit(UChar *buf, const s390_insn *insn)
10886 {
10887 UInt r1 = hregNumber(insn->variant.dfp_convert.dst_hi);
10888 UInt r2 = hregNumber(insn->variant.dfp_convert.op_hi);
10889 s390_dfp_round_t m3 = insn->variant.dfp_convert.rounding_mode;
10890 /* The IEEE-inexact-exception control is not modelled. So the
10891 m4 field is 0 (which is what GCC does, too) */
10892 const UInt m4 = 0;
10893
10894 switch (insn->variant.dfp_convert.tag) {
10895
10896 /* Convert to fixed */
10897 case S390_DFP_D64_TO_I32: return s390_emit_CFDTR(buf, m3, m4, r1, r2);
10898 case S390_DFP_D128_TO_I32: return s390_emit_CFXTR(buf, m3, m4, r1, r2);
10899 case S390_DFP_D64_TO_I64: return s390_emit_CGDTR(buf, m3, m4, r1, r2);
10900 case S390_DFP_D128_TO_I64: return s390_emit_CGXTR(buf, m3, m4, r1, r2);
10901
10902 /* Convert to logical */
10903 case S390_DFP_D64_TO_U32: return s390_emit_CLFDTR(buf, m3, m4, r1, r2);
10904 case S390_DFP_D128_TO_U32: return s390_emit_CLFXTR(buf, m3, m4, r1, r2);
10905 case S390_DFP_D64_TO_U64: return s390_emit_CLGDTR(buf, m3, m4, r1, r2);
10906 case S390_DFP_D128_TO_U64: return s390_emit_CLGXTR(buf, m3, m4, r1, r2);
10907
10908 /* Convert from fixed */
10909 case S390_DFP_I32_TO_D64: return s390_emit_CDFTR(buf, 0, m4, r1, r2);
10910 case S390_DFP_I32_TO_D128: return s390_emit_CXFTR(buf, 0, m4, r1, r2);
10911 case S390_DFP_I64_TO_D64: return s390_emit_CDGTRA(buf, m3, m4, r1, r2);
10912 case S390_DFP_I64_TO_D128: return s390_emit_CXGTR(buf, 0, m4, r1, r2);
10913
10914 /* Convert from logical */
10915 case S390_DFP_U32_TO_D64: return s390_emit_CDLFTR(buf, m3, m4, r1, r2);
10916 case S390_DFP_U64_TO_D64: return s390_emit_CDLGTR(buf, m3, m4, r1, r2);
10917 case S390_DFP_U32_TO_D128: return s390_emit_CXLFTR(buf, m3, m4, r1, r2);
10918 case S390_DFP_U64_TO_D128: return s390_emit_CXLGTR(buf, m3, m4, r1, r2);
10919
10920 /* Load lengthened */
10921 case S390_DFP_D32_TO_D64: return s390_emit_LDETR(buf, m4, r1, r2);
10922 case S390_DFP_D64_TO_D128: return s390_emit_LXDTR(buf, m4, r1, r2);
10923
10924 /* Load rounded */
10925 case S390_DFP_D64_TO_D32: return s390_emit_LEDTR(buf, m3, m4, r1, r2);
10926 case S390_DFP_D128_TO_D64: return s390_emit_LDXTR(buf, m3, m4, r1, r2);
10927
10928 default: goto fail;
10929 }
10930
10931 fail:
10932 vpanic("s390_insn_dfp_convert_emit");
10933 }
10934
10935
10936 static UChar *
10937 s390_insn_fp_convert_emit(UChar *buf, const s390_insn *insn)
10938 {
10939 UInt pfpo;
10940 s390_fp_convert *fp_convert = insn->variant.fp_convert.details;
10941 s390_dfp_round_t rm = fp_convert->rounding_mode;
10942
10943 vassert(rm < 2 || rm > 7);
10944
10945 switch (fp_convert->tag) {
10946 case S390_FP_F32_TO_D32: pfpo = S390_PFPO_F32_TO_D32 << 8; break;
10947 case S390_FP_F32_TO_D64: pfpo = S390_PFPO_F32_TO_D64 << 8; break;
10948 case S390_FP_F32_TO_D128: pfpo = S390_PFPO_F32_TO_D128 << 8; break;
10949 case S390_FP_F64_TO_D32: pfpo = S390_PFPO_F64_TO_D32 << 8; break;
10950 case S390_FP_F64_TO_D64: pfpo = S390_PFPO_F64_TO_D64 << 8; break;
10951 case S390_FP_F64_TO_D128: pfpo = S390_PFPO_F64_TO_D128 << 8; break;
10952 case S390_FP_F128_TO_D32: pfpo = S390_PFPO_F128_TO_D32 << 8; break;
10953 case S390_FP_F128_TO_D64: pfpo = S390_PFPO_F128_TO_D64 << 8; break;
10954 case S390_FP_F128_TO_D128: pfpo = S390_PFPO_F128_TO_D128 << 8; break;
10955 case S390_FP_D32_TO_F32: pfpo = S390_PFPO_D32_TO_F32 << 8; break;
10956 case S390_FP_D32_TO_F64: pfpo = S390_PFPO_D32_TO_F64 << 8; break;
10957 case S390_FP_D32_TO_F128: pfpo = S390_PFPO_D32_TO_F128 << 8; break;
10958 case S390_FP_D64_TO_F32: pfpo = S390_PFPO_D64_TO_F32 << 8; break;
10959 case S390_FP_D64_TO_F64: pfpo = S390_PFPO_D64_TO_F64 << 8; break;
10960 case S390_FP_D64_TO_F128: pfpo = S390_PFPO_D64_TO_F128 << 8; break;
10961 case S390_FP_D128_TO_F32: pfpo = S390_PFPO_D128_TO_F32 << 8; break;
10962 case S390_FP_D128_TO_F64: pfpo = S390_PFPO_D128_TO_F64 << 8; break;
10963 case S390_FP_D128_TO_F128: pfpo = S390_PFPO_D128_TO_F128 << 8; break;
10964 default: goto fail;
10965 }
10966
10967 pfpo = pfpo | rm;
10968 buf = s390_emit_load_32imm(buf, R0, pfpo);
10969 buf = s390_emit_PFPO(buf);
10970 return buf;
10971
10972 fail:
10973 vpanic("s390_insn_fp_convert_emit");
10974 }
10975
10976
10977 static UChar *
10978 s390_insn_mfence_emit(UChar *buf, const s390_insn *insn)
10979 {
10980 return s390_emit_BCR(buf, 0xF, 0x0);
10981 }
10982
10983
10984 static UChar *
10985 s390_insn_mimm_emit(UChar *buf, const s390_insn *insn)
10986 {
10987 s390_amode *am = insn->variant.mimm.dst;
10988 UChar b = hregNumber(am->b);
10989 Int d = am->d;
10990 ULong value = insn->variant.mimm.value;
10991
10992 if (value == 0) {
10993 return s390_emit_XC(buf, insn->size - 1, b, d, b, d);
10994 }
10995
10996 if (insn->size == 1) {
10997 return s390_emit_MVI(buf, value & 0xFF, b, d);
10998 }
10999
11000 if (s390_host_has_gie && ulong_fits_signed_16bit(value)) {
11001 value &= 0xFFFF;
11002 switch (insn->size) {
11003 case 2: return s390_emit_MVHHI(buf, b, d, value);
11004 case 4: return s390_emit_MVHI(buf, b, d, value);
11005 case 8: return s390_emit_MVGHI(buf, b, d, value);
11006 }
11007 } else {
11008 // Load value to R0, then store.
11009 switch (insn->size) {
11010 case 2:
11011 buf = s390_emit_LHI(buf, R0, value & 0xFFFF);
11012 return s390_emit_STH(buf, R0, 0, b, d);
11013 case 4:
11014 buf = s390_emit_load_32imm(buf, R0, value);
11015 return s390_emit_ST(buf, R0, 0, b, d);
11016 case 8:
11017 buf = s390_emit_load_64imm(buf, R0, value);
11018 return s390_emit_STG(buf, R0, 0, b, DISP20(d));
11019 }
11020 }
11021
11022 vpanic("s390_insn_mimm_emit");
11023 }
11024
11025
11026 static UChar *
11027 s390_insn_madd_emit(UChar *buf, const s390_insn *insn)
11028 {
11029 s390_amode *am = insn->variant.madd.dst;
11030 UChar b = hregNumber(am->b);
11031 Int d = am->d;
11032
11033 if (insn->size == 4) {
11034 return s390_emit_ASI(buf, insn->variant.madd.delta, b, DISP20(d));
11035 }
11036
11037 return s390_emit_AGSI(buf, insn->variant.madd.delta, b, DISP20(d));
11038 }
11039
11040
11041 static UChar *
11042 s390_insn_set_fpc_bfprm_emit(UChar *buf, const s390_insn *insn)
11043 {
11044 UInt mode = hregNumber(insn->variant.set_fpc_bfprm.mode);
11045
11046 /* Copy FPC from guest state to R0 and OR in the new rounding mode */
11047 buf = s390_emit_L(buf, R0, 0, S390_REGNO_GUEST_STATE_POINTER,
11048 S390X_GUEST_OFFSET(guest_fpc)); // r0 = guest_fpc
11049
11050 buf = s390_emit_NILL(buf, R0, 0xFFF8); /* Clear out right-most 3 bits */
11051 buf = s390_emit_OR(buf, R0, mode); /* OR in the new rounding mode */
11052 buf = s390_emit_SFPC(buf, R0); /* Load FPC register from R0 */
11053
11054 return buf;
11055 }
11056
11057
11058 static UChar *
11059 s390_insn_set_fpc_dfprm_emit(UChar *buf, const s390_insn *insn)
11060 {
11061 UInt mode = hregNumber(insn->variant.set_fpc_dfprm.mode);
11062
11063 /* Copy FPC from guest state to R0 and OR in the new rounding mode */
11064 buf = s390_emit_L(buf, R0, 0, S390_REGNO_GUEST_STATE_POINTER,
11065 S390X_GUEST_OFFSET(guest_fpc)); // r0 = guest_fpc
11066
11067 /* DFP rounding mode is set at bit position 25:27 in FPC register */
11068 buf = s390_emit_NILL(buf, R0, 0xFF8F); /* Clear out 25:27 bits */
11069 buf = s390_emit_SLL(buf, mode, 0, 4); /* bring mode to 25:27 bits */
11070 buf = s390_emit_OR(buf, R0, mode); /* OR in the new rounding mode */
11071 buf = s390_emit_SFPC(buf, R0); /* Load FPC register from R0 */
11072
11073 return buf;
11074 }
11075
11076
11077 /* Define convenience functions needed for translation chaining.
11078 Any changes need to be applied to the functions in concert. */
11079
11080 static __inline__ Bool
11081 s390_insn_is_BRCL(const UChar *p, UChar condition)
11082 {
11083 return p[0] == 0xc0 && p[1] == ((condition << 4) | 0x04);
11084 }
11085
11086 static __inline__ Bool
11087 s390_insn_is_BR(const UChar *p, UChar reg)
11088 {
11089 return p[0] == 0x07 && p[1] == (0xF0 | reg); /* BCR 15,reg */
11090 }
11091
11092
11093 /* The length of the BASR insn */
11094 #define S390_BASR_LEN 2
11095
11096
11097 /* Load the 64-bit VALUE into REG. Note that this function must NOT
11098 optimise the generated code by looking at the value. I.e. using
11099 LGHI if value == 0 would be very wrong. */
11100 static UChar *
11101 s390_tchain_load64(UChar *buf, UChar regno, ULong value)
11102 {
11103 UChar *begin = buf;
11104
11105 if (s390_host_has_eimm) {
11106 /* Do it in two steps: upper half [0:31] and lower half [32:63] */
11107 buf = s390_emit_IIHF(buf, regno, value >> 32);
11108 buf = s390_emit_IILF(buf, regno, value & 0xFFFFFFFF);
11109 } else {
11110 buf = s390_emit_IILL(buf, regno, value & 0xFFFF);
11111 value >>= 16;
11112 buf = s390_emit_IILH(buf, regno, value & 0xFFFF);
11113 value >>= 16;
11114 buf = s390_emit_IIHL(buf, regno, value & 0xFFFF);
11115 value >>= 16;
11116 buf = s390_emit_IIHH(buf, regno, value & 0xFFFF);
11117 }
11118
11119 vassert(buf - begin == s390_tchain_load64_len());
11120
11121 return buf;
11122 }
11123
11124 /* Return number of bytes generated by s390_tchain_load64 */
11125 static UInt
11126 s390_tchain_load64_len(void)
11127 {
11128 if (s390_host_has_eimm) {
11129 return 6 + 6; /* IIHF + IILF */
11130 }
11131 return 4 + 4 + 4 + 4; /* IIHH + IIHL + IILH + IILL */
11132 }
11133
11134 /* Verify that CODE is the code sequence generated by s390_tchain_load64
11135 to load VALUE into REGNO. Return pointer to the byte following the
11136 insn sequence. */
11137 static const UChar *
11138 s390_tchain_verify_load64(const UChar *code, UChar regno, ULong value)
11139 {
11140 UInt regmask = regno << 4;
11141 UInt hw;
11142
11143 if (s390_host_has_eimm) {
11144 /* Check for IIHF */
11145 vassert(code[0] == 0xC0);
11146 vassert(code[1] == (0x08 | regmask));
11147 vassert(*(const UInt *)&code[2] == (value >> 32));
11148 /* Check for IILF */
11149 vassert(code[6] == 0xC0);
11150 vassert(code[7] == (0x09 | regmask));
11151 vassert(*(const UInt *)&code[8] == (value & 0xFFFFFFFF));
11152 } else {
11153 /* Check for IILL */
11154 hw = value & 0xFFFF;
11155 vassert(code[0] == 0xA5);
11156 vassert(code[1] == (0x03 | regmask));
11157 vassert(code[2] == (hw >> 8));
11158 vassert(code[3] == (hw & 0xFF));
11159
11160 /* Check for IILH */
11161 hw = (value >> 16) & 0xFFFF;
11162 vassert(code[4] == 0xA5);
11163 vassert(code[5] == (0x02 | regmask));
11164 vassert(code[6] == (hw >> 8));
11165 vassert(code[7] == (hw & 0xFF));
11166
11167 /* Check for IIHL */
11168 hw = (value >> 32) & 0xFFFF;
11169 vassert(code[8] == 0xA5);
11170 vassert(code[9] == (0x01 | regmask));
11171 vassert(code[10] == (hw >> 8));
11172 vassert(code[11] == (hw & 0xFF));
11173
11174 /* Check for IIHH */
11175 hw = (value >> 48) & 0xFFFF;
11176 vassert(code[12] == 0xA5);
11177 vassert(code[13] == (0x00 | regmask));
11178 vassert(code[14] == (hw >> 8));
11179 vassert(code[15] == (hw & 0xFF));
11180 }
11181
11182 return code + s390_tchain_load64_len();
11183 }
11184
11185 /* CODE points to the code sequence as generated by s390_tchain_load64.
11186 Change the loaded value to IMM64. Return pointer to the byte following
11187 the patched code sequence. */
11188 static UChar *
11189 s390_tchain_patch_load64(UChar *code, ULong imm64)
11190 {
11191 if (s390_host_has_eimm) {
11192 /* Patch IIHF */
11193 *(UInt *)&code[2] = imm64 >> 32;
11194 /* Patch IILF */
11195 *(UInt *)&code[8] = imm64 & 0xFFFFFFFF;
11196 } else {
11197 code[3] = imm64 & 0xFF; imm64 >>= 8;
11198 code[2] = imm64 & 0xFF; imm64 >>= 8;
11199 code[7] = imm64 & 0xFF; imm64 >>= 8;
11200 code[6] = imm64 & 0xFF; imm64 >>= 8;
11201 code[11] = imm64 & 0xFF; imm64 >>= 8;
11202 code[10] = imm64 & 0xFF; imm64 >>= 8;
11203 code[15] = imm64 & 0xFF; imm64 >>= 8;
11204 code[14] = imm64 & 0xFF; imm64 >>= 8;
11205 }
11206
11207 return code + s390_tchain_load64_len();
11208 }
11209
11210
11211 /* NB: what goes on here has to be very closely coordinated with the
11212 chainXDirect_S390 and unchainXDirect_S390 below. */
11213 static UChar *
11214 s390_insn_xdirect_emit(UChar *buf, const s390_insn *insn,
11215 const void *disp_cp_chain_me_to_slowEP,
11216 const void *disp_cp_chain_me_to_fastEP)
11217 {
11218 /* We're generating chain-me requests here, so we need to be
11219 sure this is actually allowed -- no-redir translations can't
11220 use chain-me's. Hence: */
11221 vassert(disp_cp_chain_me_to_slowEP != NULL);
11222 vassert(disp_cp_chain_me_to_fastEP != NULL);
11223
11224 /* Use ptmp for backpatching conditional jumps. */
11225 UChar *ptmp = buf;
11226
11227 /* First off, if this is conditional, create a conditional
11228 jump over the rest of it. */
11229 s390_cc_t cond = insn->variant.xdirect.cond;
11230
11231 if (cond != S390_CC_ALWAYS) {
11232 /* So we have something like this
11233 if (cond) do_xdirect;
11234 Y: ...
11235 We convert this into
11236 if (! cond) goto Y; // BRC opcode; 4 bytes
11237 do_xdirect;
11238 Y:
11239 */
11240 /* 4 bytes (a BRC insn) to be filled in here */
11241 buf += 4;
11242 }
11243
11244 /* Update the guest IA. */
11245 buf = s390_emit_load_64imm(buf, R0, insn->variant.xdirect.dst);
11246
11247 const s390_amode *amode = insn->variant.xdirect.guest_IA;
11248 vassert(amode->tag == S390_AMODE_B12);
11249 UInt b = hregNumber(amode->b);
11250 UInt d = amode->d;
11251
11252 buf = s390_emit_STG(buf, R0, 0, b, DISP20(d));
11253
11254 /* Load the chosen entry point into the scratch reg */
11255 const void *disp_cp_chain_me;
11256
11257 disp_cp_chain_me =
11258 insn->variant.xdirect.to_fast_entry ? disp_cp_chain_me_to_fastEP
11259 : disp_cp_chain_me_to_slowEP;
11260 /* Get the address of the beginning of the load64 code sequence into %r1.
11261 Do not change the register! This is part of the protocol with the
11262 dispatcher. */
11263 buf = s390_emit_BASR(buf, 1, R0);
11264
11265 /* --- FIRST PATCHABLE BYTE follows (must not modify %r1) --- */
11266 Addr64 addr = (Addr)disp_cp_chain_me;
11267 buf = s390_tchain_load64(buf, S390_REGNO_TCHAIN_SCRATCH, addr);
11268
11269 /* goto *tchain_scratch */
11270 buf = s390_emit_BCR(buf, S390_CC_ALWAYS, S390_REGNO_TCHAIN_SCRATCH);
11271
11272 /* --- END of PATCHABLE BYTES --- */
11273
11274 /* Fix up the conditional jump, if there was one. */
11275 if (cond != S390_CC_ALWAYS) {
11276 Int delta = buf - ptmp;
11277
11278 delta >>= 1; /* immediate constant is #half-words */
11279 vassert(delta > 0 && delta < (1 << 16));
11280 s390_emit_BRC(ptmp, s390_cc_invert(cond), delta);
11281 }
11282
11283 return buf;
11284 }
11285
11286 /* Return the number of patchable bytes from an xdirect insn. */
11287 static UInt
11288 s390_xdirect_patchable_len(void)
11289 {
11290 return s390_tchain_load64_len() + S390_BASR_LEN;
11291 }
11292
11293
11294 static UChar *
11295 s390_insn_xindir_emit(UChar *buf, const s390_insn *insn,
11296 const void *disp_cp_xindir)
11297 {
11298 /* We're generating transfers that could lead indirectly to a
11299 chain-me, so we need to be sure this is actually allowed --
11300 no-redir translations are not allowed to reach normal
11301 translations without going through the scheduler. That means
11302 no XDirects or XIndirs out from no-redir translations.
11303 Hence: */
11304 vassert(disp_cp_xindir != NULL);
11305
11306 /* Use ptmp for backpatching conditional jumps. */
11307 UChar *ptmp = buf;
11308
11309 /* First off, if this is conditional, create a conditional
11310 jump over the rest of it. */
11311 s390_cc_t cond = insn->variant.xdirect.cond;
11312
11313 if (cond != S390_CC_ALWAYS) {
11314 /* So we have something like this
11315 if (cond) do_xdirect;
11316 Y: ...
11317 We convert this into
11318 if (! cond) goto Y; // BRC opcode; 4 bytes
11319 do_xdirect;
11320 Y:
11321 */
11322 /* 4 bytes (a BRC insn) to be filled in here */
11323 buf += 4;
11324 }
11325
11326 /* Update the guest IA with the address in xdirect.dst. */
11327 const s390_amode *amode = insn->variant.xindir.guest_IA;
11328
11329 vassert(amode->tag == S390_AMODE_B12);
11330 UInt b = hregNumber(amode->b);
11331 UInt d = amode->d;
11332 UInt regno = hregNumber(insn->variant.xindir.dst);
11333
11334 buf = s390_emit_STG(buf, regno, 0, b, DISP20(d));
11335
11336 /* load tchain_scratch, #disp_indir */
11337 buf = s390_tchain_load64(buf, S390_REGNO_TCHAIN_SCRATCH,
11338 (Addr)disp_cp_xindir);
11339 /* goto *tchain_direct */
11340 buf = s390_emit_BCR(buf, S390_CC_ALWAYS, S390_REGNO_TCHAIN_SCRATCH);
11341
11342 /* Fix up the conditional jump, if there was one. */
11343 if (cond != S390_CC_ALWAYS) {
11344 Int delta = buf - ptmp;
11345
11346 delta >>= 1; /* immediate constant is #half-words */
11347 vassert(delta > 0 && delta < (1 << 16));
11348 s390_emit_BRC(ptmp, s390_cc_invert(cond), delta);
11349 }
11350
11351 return buf;
11352 }
11353
11354 static UChar *
11355 s390_insn_xassisted_emit(UChar *buf, const s390_insn *insn,
11356 const void *disp_cp_xassisted)
11357 {
11358 /* Use ptmp for backpatching conditional jumps. */
11359 UChar *ptmp = buf;
11360
11361 /* First off, if this is conditional, create a conditional
11362 jump over the rest of it. */
11363 s390_cc_t cond = insn->variant.xdirect.cond;
11364
11365 if (cond != S390_CC_ALWAYS) {
11366 /* So we have something like this
11367 if (cond) do_xdirect;
11368 Y: ...
11369 We convert this into
11370 if (! cond) goto Y; // BRC opcode; 4 bytes
11371 do_xdirect;
11372 Y:
11373 */
11374 /* 4 bytes (a BRC insn) to be filled in here */
11375 buf += 4;
11376 }
11377
11378 /* Update the guest IA with the address in xassisted.dst. */
11379 const s390_amode *amode = insn->variant.xassisted.guest_IA;
11380
11381 vassert(amode->tag == S390_AMODE_B12);
11382 UInt b = hregNumber(amode->b);
11383 UInt d = amode->d;
11384 UInt regno = hregNumber(insn->variant.xassisted.dst);
11385
11386 buf = s390_emit_STG(buf, regno, 0, b, DISP20(d));
11387
11388 UInt trcval = 0;
11389
11390 switch (insn->variant.xassisted.kind) {
11391 case Ijk_ClientReq: trcval = VEX_TRC_JMP_CLIENTREQ; break;
11392 case Ijk_Sys_syscall: trcval = VEX_TRC_JMP_SYS_SYSCALL; break;
11393 case Ijk_Extension: trcval = VEX_TRC_JMP_EXTENSION; break;
11394 case Ijk_Yield: trcval = VEX_TRC_JMP_YIELD; break;
11395 case Ijk_EmWarn: trcval = VEX_TRC_JMP_EMWARN; break;
11396 case Ijk_EmFail: trcval = VEX_TRC_JMP_EMFAIL; break;
11397 case Ijk_MapFail: trcval = VEX_TRC_JMP_MAPFAIL; break;
11398 case Ijk_NoDecode: trcval = VEX_TRC_JMP_NODECODE; break;
11399 case Ijk_InvalICache: trcval = VEX_TRC_JMP_INVALICACHE; break;
11400 case Ijk_NoRedir: trcval = VEX_TRC_JMP_NOREDIR; break;
11401 case Ijk_SigTRAP: trcval = VEX_TRC_JMP_SIGTRAP; break;
11402 case Ijk_SigFPE: trcval = VEX_TRC_JMP_SIGFPE; break;
11403 case Ijk_SigSEGV: trcval = VEX_TRC_JMP_SIGSEGV; break;
11404 case Ijk_Boring: trcval = VEX_TRC_JMP_BORING; break;
11405 /* We don't expect to see the following being assisted. */
11406 case Ijk_Ret:
11407 case Ijk_Call:
11408 /* fallthrough */
11409 default:
11410 ppIRJumpKind(insn->variant.xassisted.kind);
11411 vpanic("s390_insn_xassisted_emit: unexpected jump kind");
11412 }
11413
11414 vassert(trcval != 0);
11415
11416 /* guest_state_pointer = trcval */
11417 buf = s390_emit_LGHI(buf, S390_REGNO_GUEST_STATE_POINTER, trcval);
11418
11419 /* load tchain_scratch, #disp_assisted */
11420 buf = s390_tchain_load64(buf, S390_REGNO_TCHAIN_SCRATCH,
11421 (Addr)disp_cp_xassisted);
11422
11423 /* goto *tchain_direct */
11424 buf = s390_emit_BCR(buf, S390_CC_ALWAYS, S390_REGNO_TCHAIN_SCRATCH);
11425
11426 /* Fix up the conditional jump, if there was one. */
11427 if (cond != S390_CC_ALWAYS) {
11428 Int delta = buf - ptmp;
11429
11430 delta >>= 1; /* immediate constant is #half-words */
11431 vassert(delta > 0 && delta < (1 << 16));
11432 s390_emit_BRC(ptmp, s390_cc_invert(cond), delta);
11433 }
11434
11435 return buf;
11436 }
11437
11438
11439 /* Pseudo code:
11440
11441 guest_state[host_EvC_COUNTER] -= 1;
11442 if (guest_state[host_EvC_COUNTER] >= 0) goto nofail;
11443 goto guest_state[host_EvC_FAILADDR];
11444 nofail: ;
11445
11446 The dispatch counter is a 32-bit value. */
11447 static UChar *
11448 s390_insn_evcheck_emit(UChar *buf, const s390_insn *insn,
11449 VexEndness endness_host)
11450 {
11451 s390_amode *amode;
11452 UInt b, d;
11453 UChar *code_begin, *code_end;
11454
11455 code_begin = buf;
11456
11457 amode = insn->variant.evcheck.counter;
11458 vassert(amode->tag == S390_AMODE_B12);
11459 b = hregNumber(amode->b);
11460 d = amode->d;
11461
11462 /* Decrement the dispatch counter in the guest state */
11463 if (s390_host_has_gie) {
11464 buf = s390_emit_ASI(buf, -1, b, DISP20(d)); /* 6 bytes */
11465 } else {
11466 buf = s390_emit_LHI(buf, R0, -1); /* 4 bytes */
11467 buf = s390_emit_A(buf, R0, 0, b, d); /* 4 bytes */
11468 buf = s390_emit_ST(buf, R0, 0, b, d); /* 4 bytes */
11469 }
11470
11471 /* Jump over the next insn if >= 0 */
11472 buf = s390_emit_BRC(buf, S390_CC_HE, (4 + 6 + 2) / 2); /* 4 bytes */
11473
11474 /* Computed goto to fail_address */
11475 amode = insn->variant.evcheck.fail_addr;
11476 b = hregNumber(amode->b);
11477 d = amode->d;
11478 buf = s390_emit_LG(buf, S390_REGNO_TCHAIN_SCRATCH, 0, b, DISP20(d)); /* 6 bytes */
11479 buf = s390_emit_BCR(buf, S390_CC_ALWAYS, S390_REGNO_TCHAIN_SCRATCH); /* 2 bytes */
11480
11481 code_end = buf;
11482
11483 /* Make sure the size of the generated code is identical to the size
11484 returned by evCheckSzB_S390 */
11485 vassert(evCheckSzB_S390() == code_end - code_begin);
11486
11487 return buf;
11488 }
11489
11490
11491 static UChar *
11492 s390_insn_profinc_emit(UChar *buf,
11493 const s390_insn *insn __attribute__((unused)))
11494 {
11495 /* Generate a code template to increment a memory location whose
11496 address will be known later as an immediate value. This code
11497 template will be patched once the memory location is known.
11498 For now we do this with address == 0. */
11499 buf = s390_tchain_load64(buf, S390_REGNO_TCHAIN_SCRATCH, 0);
11500 if (s390_host_has_gie) {
11501 buf = s390_emit_AGSI(buf, 1, S390_REGNO_TCHAIN_SCRATCH, DISP20(0));
11502 } else {
11503 buf = s390_emit_LGHI(buf, R0, 1);
11504 buf = s390_emit_AG( buf, R0, 0, S390_REGNO_TCHAIN_SCRATCH, DISP20(0));
11505 buf = s390_emit_STG(buf, R0, 0, S390_REGNO_TCHAIN_SCRATCH, DISP20(0));
11506 }
11507
11508 return buf;
11509 }
11510
11511
11512 static UChar *
11513 s390_insn_vec_amodeop_emit(UChar *buf, const s390_insn *insn)
11514 {
11515 UChar v1 = hregNumber(insn->variant.vec_amodeop.dst);
11516 UChar v2 = hregNumber(insn->variant.vec_amodeop.op1);
11517 s390_amode* op2 = insn->variant.vec_amodeop.op2;
11518
11519 vassert(hregNumber(op2->x) == 0);
11520 vassert(fits_unsigned_12bit(op2->d));
11521
11522 UChar b = hregNumber(op2->b);
11523 UShort d = op2->d;
11524
11525
11526 switch (insn->variant.vec_amodeop.tag) {
11527 case S390_VEC_GET_ELEM:
11528 return s390_emit_VLGV(buf, v1, b, d, v2, s390_getM_from_size(insn->size));
11529
11530 case S390_VEC_ELEM_SHL_INT:
11531 return s390_emit_VESL(buf, v1, b, d, v2, s390_getM_from_size(insn->size));
11532
11533 case S390_VEC_ELEM_SHRA_INT:
11534 return s390_emit_VESRA(buf, v1, b, d, v2, s390_getM_from_size(insn->size));
11535
11536 case S390_VEC_ELEM_SHRL_INT:
11537 return s390_emit_VESRL(buf, v1, b, d, v2, s390_getM_from_size(insn->size));
11538
11539 default: goto fail;
11540 }
11541
11542 fail:
11543 vpanic("s390_insn_vec_amodeop_emit");
11544 }
11545
11546
11547 static UChar *
11548 s390_insn_vec_amodeintop_emit(UChar *buf, const s390_insn *insn)
11549 {
11550 UChar v1 = hregNumber(insn->variant.vec_amodeintop.dst);
11551 s390_amode* op2 = insn->variant.vec_amodeintop.op2;
11552 UChar r3 = hregNumber(insn->variant.vec_amodeintop.op3);
11553
11554 vassert(hregNumber(op2->x) == 0);
11555 UChar b = hregNumber(op2->b);
11556 UShort d = op2->d;
11557
11558 switch (insn->variant.vec_amodeintop.tag) {
11559 case S390_VEC_SET_ELEM:
11560 return s390_emit_VLVG(buf, v1, b, d, r3, s390_getM_from_size(insn->size));
11561 default: goto fail;
11562 }
11563
11564 fail:
11565 vpanic("s390_insn_vec_amodeop_emit");
11566 }
11567
11568
11569 static UChar *
11570 s390_insn_vec_binop_emit(UChar *buf, const s390_insn *insn)
11571 {
11572 s390_vec_binop_t tag = insn->variant.vec_binop.tag;
11573 UChar size = insn->size;
11574 UChar v1 = hregNumber(insn->variant.vec_binop.dst);
11575 UChar v2 = hregNumber(insn->variant.vec_binop.op1);
11576 UChar v3 = hregNumber(insn->variant.vec_binop.op2);
11577
11578 switch (tag) {
11579 case S390_VEC_PACK:
11580 return s390_emit_VPK(buf, v1, v2, v3, s390_getM_from_size(size));
11581 case S390_VEC_PACK_SATURU:
11582 return s390_emit_VPKLS(buf, v1, v2, v3, s390_getM_from_size(size));
11583 case S390_VEC_PACK_SATURS:
11584 return s390_emit_VPKS(buf, v1, v2, v3, s390_getM_from_size(size));
11585 case S390_VEC_COMPARE_EQUAL:
11586 return s390_emit_VCEQ(buf, v1, v2, v3, s390_getM_from_size(size));
11587 case S390_VEC_OR:
11588 return s390_emit_VO(buf, v1, v2, v3);
11589 case S390_VEC_ORC:
11590 return s390_emit_VOC(buf, v1, v2, v3);
11591 case S390_VEC_XOR:
11592 return s390_emit_VX(buf, v1, v2, v3);
11593 case S390_VEC_AND:
11594 return s390_emit_VN(buf, v1, v2, v3);
11595 case S390_VEC_MERGEL:
11596 return s390_emit_VMRL(buf, v1, v2, v3, s390_getM_from_size(size));
11597 case S390_VEC_MERGEH:
11598 return s390_emit_VMRH(buf, v1, v2, v3, s390_getM_from_size(size));
11599 case S390_VEC_NOR:
11600 return s390_emit_VNO(buf, v1, v2, v3);
11601 case S390_VEC_INT_ADD:
11602 return s390_emit_VA(buf, v1, v2, v3, s390_getM_from_size(size));
11603 case S390_VEC_INT_SUB:
11604 return s390_emit_VS(buf, v1, v2, v3, s390_getM_from_size(size));
11605 case S390_VEC_MAXU:
11606 return s390_emit_VMXL(buf, v1, v2, v3, s390_getM_from_size(size));
11607 case S390_VEC_MAXS:
11608 return s390_emit_VMX(buf, v1, v2, v3, s390_getM_from_size(size));
11609 case S390_VEC_MINU:
11610 return s390_emit_VMNL(buf, v1, v2, v3, s390_getM_from_size(size));
11611 case S390_VEC_MINS:
11612 return s390_emit_VMN(buf, v1, v2, v3, s390_getM_from_size(size));
11613 case S390_VEC_AVGU:
11614 return s390_emit_VAVGL(buf, v1, v2, v3, s390_getM_from_size(size));
11615 case S390_VEC_AVGS:
11616 return s390_emit_VAVG(buf, v1, v2, v3, s390_getM_from_size(size));
11617 case S390_VEC_COMPARE_GREATERS:
11618 return s390_emit_VCH(buf, v1, v2, v3, s390_getM_from_size(size));
11619 case S390_VEC_COMPARE_GREATERU:
11620 return s390_emit_VCHL(buf, v1, v2, v3, s390_getM_from_size(size));
11621 case S390_VEC_INT_MUL_HIGHS:
11622 return s390_emit_VMH(buf, v1, v2, v3, s390_getM_from_size(size));
11623 case S390_VEC_INT_MUL_HIGHU:
11624 return s390_emit_VMLH(buf, v1, v2, v3, s390_getM_from_size(size));
11625 case S390_VEC_INT_MUL_LOW:
11626 return s390_emit_VML(buf, v1, v2, v3, s390_getM_from_size(size));
11627 case S390_VEC_INT_MUL_EVENS:
11628 return s390_emit_VME(buf, v1, v2, v3, s390_getM_from_size(size));
11629 case S390_VEC_INT_MUL_EVENU:
11630 return s390_emit_VMLE(buf, v1, v2, v3, s390_getM_from_size(size));
11631 case S390_VEC_ELEM_SHL_V:
11632 return s390_emit_VESLV(buf, v1, v2, v3, s390_getM_from_size(size));
11633 case S390_VEC_ELEM_SHRA_V:
11634 return s390_emit_VESRAV(buf, v1, v2, v3, s390_getM_from_size(size));
11635 case S390_VEC_ELEM_SHRL_V:
11636 return s390_emit_VESRLV(buf, v1, v2, v3, s390_getM_from_size(size));
11637 case S390_VEC_ELEM_ROLL_V:
11638 return s390_emit_VERLLV(buf, v1, v2, v3, s390_getM_from_size(size));
11639 case S390_VEC_SHL_BITS:
11640 return s390_emit_VSL(buf, v1, v2, v3);
11641 case S390_VEC_SHRL_BITS:
11642 return s390_emit_VSRL(buf, v1, v2, v3);
11643 case S390_VEC_SHRA_BITS:
11644 return s390_emit_VSRA(buf, v1, v2, v3);
11645 case S390_VEC_SHL_BYTES:
11646 return s390_emit_VSLB(buf, v1, v2, v3);
11647 case S390_VEC_SHRL_BYTES:
11648 return s390_emit_VSRLB(buf, v1, v2, v3);
11649 case S390_VEC_SHRA_BYTES:
11650 return s390_emit_VSRAB(buf, v1, v2, v3);
11651 case S390_VEC_PWSUM_W:
11652 vassert((size == 1) || (size == 2));
11653 return s390_emit_VSUM(buf, v1, v2, v3, s390_getM_from_size(size));
11654 case S390_VEC_PWSUM_DW:
11655 vassert((size == 2) || (size == 4));
11656 return s390_emit_VSUMG(buf, v1, v2, v3, s390_getM_from_size(size));
11657 case S390_VEC_PWSUM_QW:
11658 vassert((size == 4) || (size == 8));
11659 return s390_emit_VSUMQ(buf, v1, v2, v3, s390_getM_from_size(size));
11660 case S390_VEC_INIT_FROM_GPRS:
11661 return s390_emit_VLVGP(buf, v1, v2, v3);
11662 case S390_VEC_INIT_FROM_FPRS:
11663 return s390_emit_VMRH(buf, v1, v2, v3, 3);
11664 case S390_VEC_FLOAT_ADD:
11665 return s390_emit_VFA(buf, v1, v2, v3, s390_getM_from_size(size), 0);
11666 case S390_VEC_FLOAT_SUB:
11667 return s390_emit_VFS(buf, v1, v2, v3, s390_getM_from_size(size), 0);
11668 case S390_VEC_FLOAT_MUL:
11669 return s390_emit_VFM(buf, v1, v2, v3, s390_getM_from_size(size), 0);
11670 case S390_VEC_FLOAT_DIV:
11671 return s390_emit_VFD(buf, v1, v2, v3, s390_getM_from_size(size), 0);
11672 case S390_VEC_FLOAT_COMPARE_EQUAL:
11673 return s390_emit_VFCE(buf, v1, v2, v3, s390_getM_from_size(size), 0, 0);
11674 case S390_VEC_FLOAT_COMPARE_LESS_OR_EQUAL:
11675 // PJF I assume that CHE is compare higher or equal so the order needs swapping
11676 // coverity[SWAPPED_ARGUMENTS:FALSE]
11677 return s390_emit_VFCHE(buf, v1, v3, v2, s390_getM_from_size(size), 0, 0);
11678 case S390_VEC_FLOAT_COMPARE_LESS:
11679 // PJF as above but this time compare higher
11680 // coverity[SWAPPED_ARGUMENTS:FALSE]
11681 return s390_emit_VFCH(buf, v1, v3, v2, s390_getM_from_size(size), 0, 0);
11682
11683 default:
11684 goto fail;
11685 }
11686
11687 fail:
11688 ppS390Instr(insn, True);
11689 vpanic("s390_insn_vec_binop_emit");
11690
11691 }
11692
11693
11694 static UChar *
11695 s390_insn_vec_triop_emit(UChar *buf, const s390_insn *insn)
11696 {
11697 s390_vec_triop_t tag = insn->variant.vec_triop.tag;
11698 UChar size = insn->size;
11699 UChar v1 = hregNumber(insn->variant.vec_triop.dst);
11700 UChar v2 = hregNumber(insn->variant.vec_triop.op1);
11701 UChar v3 = hregNumber(insn->variant.vec_triop.op2);
11702 UChar v4 = hregNumber(insn->variant.vec_triop.op3);
11703
11704 switch (tag) {
11705 case S390_VEC_PERM: {
11706 vassert(size == 16);
11707 return s390_emit_VPERM(buf, v1, v2, v3, v4);
11708 }
11709 case S390_VEC_FLOAT_MADD:
11710 return s390_emit_VFMA(buf, v1, v2, v3, v4, 0,
11711 s390_getM_from_size(size));
11712 case S390_VEC_FLOAT_MSUB:
11713 return s390_emit_VFMS(buf, v1, v2, v3, v4, 0,
11714 s390_getM_from_size(size));
11715 default:
11716 goto fail;
11717 }
11718
11719 fail:
11720 vpanic("s390_insn_vec_triop_emit");
11721
11722 }
11723
11724
11725 static UChar *
11726 s390_insn_vec_replicate_emit(UChar *buf, const s390_insn *insn)
11727 {
11728 UChar v1 = hregNumber(insn->variant.vec_replicate.dst);
11729 UChar v2 = hregNumber(insn->variant.vec_replicate.op1);
11730 UShort idx = (UShort) insn->variant.vec_replicate.idx;
11731 return s390_emit_VREP(buf, v1, v2, idx, s390_getM_from_size(insn->size));
11732 }
11733
11734
11735 Int
11736 emit_S390Instr(Bool *is_profinc, UChar *buf, Int nbuf, const s390_insn *insn,
11737 Bool mode64, VexEndness endness_host,
11738 const void *disp_cp_chain_me_to_slowEP,
11739 const void *disp_cp_chain_me_to_fastEP,
11740 const void *disp_cp_xindir,
11741 const void *disp_cp_xassisted)
11742 {
11743 UChar *end;
11744
11745 /* Used to be 48 bytes. Make sure it stays low */
11746 vassert(sizeof(s390_insn) == 32);
11747
11748 switch (insn->tag) {
11749 case S390_INSN_LOAD:
11750 end = s390_insn_load_emit(buf, insn);
11751 break;
11752
11753 case S390_INSN_STORE:
11754 end = s390_insn_store_emit(buf, insn);
11755 break;
11756
11757 case S390_INSN_MOVE:
11758 end = s390_insn_move_emit(buf, insn);
11759 break;
11760
11761 case S390_INSN_MEMCPY:
11762 end = s390_insn_memcpy_emit(buf, insn);
11763 break;
11764
11765 case S390_INSN_COND_MOVE:
11766 end = s390_insn_cond_move_emit(buf, insn);
11767 break;
11768
11769 case S390_INSN_LOAD_IMMEDIATE:
11770 end = s390_insn_load_immediate_emit(buf, insn);
11771 break;
11772
11773 case S390_INSN_ALU:
11774 end = s390_insn_alu_emit(buf, insn);
11775 break;
11776
11777 case S390_INSN_SMUL:
11778 case S390_INSN_UMUL:
11779 end = s390_insn_mul_emit(buf, insn);
11780 break;
11781
11782 case S390_INSN_SDIV:
11783 case S390_INSN_UDIV:
11784 end = s390_insn_div_emit(buf, insn);
11785 break;
11786
11787 case S390_INSN_DIVS:
11788 end = s390_insn_divs_emit(buf, insn);
11789 break;
11790
11791 case S390_INSN_CLZ:
11792 end = s390_insn_clz_emit(buf, insn);
11793 break;
11794
11795 case S390_INSN_UNOP:
11796 end = s390_insn_unop_emit(buf, insn);
11797 break;
11798
11799 case S390_INSN_TEST:
11800 end = s390_insn_test_emit(buf, insn);
11801 break;
11802
11803 case S390_INSN_CC2BOOL:
11804 end = s390_insn_cc2bool_emit(buf, insn);
11805 break;
11806
11807 case S390_INSN_CAS:
11808 end = s390_insn_cas_emit(buf, insn);
11809 break;
11810
11811 case S390_INSN_CDAS:
11812 end = s390_insn_cdas_emit(buf, insn);
11813 break;
11814
11815 case S390_INSN_COMPARE:
11816 end = s390_insn_compare_emit(buf, insn);
11817 break;
11818
11819 case S390_INSN_HELPER_CALL:
11820 end = s390_insn_helper_call_emit(buf, insn);
11821 if (end == buf) goto fail;
11822 break;
11823
11824 case S390_INSN_BFP_TRIOP:
11825 end = s390_insn_bfp_triop_emit(buf, insn);
11826 break;
11827
11828 case S390_INSN_BFP_BINOP:
11829 end = s390_insn_bfp_binop_emit(buf, insn);
11830 break;
11831
11832 case S390_INSN_BFP_UNOP:
11833 end = s390_insn_bfp_unop_emit(buf, insn);
11834 break;
11835
11836 case S390_INSN_BFP_COMPARE:
11837 end = s390_insn_bfp_compare_emit(buf, insn);
11838 break;
11839
11840 case S390_INSN_BFP_CONVERT:
11841 end = s390_insn_bfp_convert_emit(buf, insn);
11842 break;
11843
11844 case S390_INSN_DFP_BINOP:
11845 end = s390_insn_dfp_binop_emit(buf, insn);
11846 break;
11847
11848 case S390_INSN_DFP_UNOP:
11849 end = s390_insn_dfp_unop_emit(buf, insn);
11850 break;
11851
11852 case S390_INSN_DFP_INTOP:
11853 end = s390_insn_dfp_intop_emit(buf, insn);
11854 break;
11855
11856 case S390_INSN_DFP_COMPARE:
11857 end = s390_insn_dfp_compare_emit(buf, insn);
11858 break;
11859
11860 case S390_INSN_DFP_CONVERT:
11861 end = s390_insn_dfp_convert_emit(buf, insn);
11862 break;
11863
11864 case S390_INSN_DFP_REROUND:
11865 end = s390_insn_dfp_reround_emit(buf, insn);
11866 break;
11867
11868 case S390_INSN_FP_CONVERT:
11869 end = s390_insn_fp_convert_emit(buf, insn);
11870 break;
11871
11872 case S390_INSN_MFENCE:
11873 end = s390_insn_mfence_emit(buf, insn);
11874 break;
11875
11876 case S390_INSN_MIMM:
11877 end = s390_insn_mimm_emit(buf, insn);
11878 break;
11879
11880 case S390_INSN_MADD:
11881 end = s390_insn_madd_emit(buf, insn);
11882 break;
11883
11884 case S390_INSN_SET_FPC_BFPRM:
11885 end = s390_insn_set_fpc_bfprm_emit(buf, insn);
11886 break;
11887
11888 case S390_INSN_SET_FPC_DFPRM:
11889 end = s390_insn_set_fpc_dfprm_emit(buf, insn);
11890 break;
11891
11892 case S390_INSN_PROFINC:
11893 end = s390_insn_profinc_emit(buf, insn);
11894 /* Tell the caller .. */
11895 vassert(*is_profinc == False);
11896 *is_profinc = True;
11897 break;
11898
11899 case S390_INSN_EVCHECK:
11900 end = s390_insn_evcheck_emit(buf, insn, endness_host);
11901 break;
11902
11903 case S390_INSN_XDIRECT:
11904 end = s390_insn_xdirect_emit(buf, insn, disp_cp_chain_me_to_slowEP,
11905 disp_cp_chain_me_to_fastEP);
11906 break;
11907
11908 case S390_INSN_XINDIR:
11909 end = s390_insn_xindir_emit(buf, insn, disp_cp_xindir);
11910 break;
11911
11912 case S390_INSN_XASSISTED:
11913 end = s390_insn_xassisted_emit(buf, insn, disp_cp_xassisted);
11914 break;
11915
11916 case S390_INSN_VEC_AMODEOP:
11917 end = s390_insn_vec_amodeop_emit(buf, insn);
11918 break;
11919
11920 case S390_INSN_VEC_AMODEINTOP:
11921 end = s390_insn_vec_amodeintop_emit(buf, insn);
11922 break;
11923
11924 case S390_INSN_VEC_BINOP:
11925 end = s390_insn_vec_binop_emit(buf, insn);
11926 break;
11927
11928 case S390_INSN_VEC_TRIOP:
11929 end = s390_insn_vec_triop_emit(buf, insn);
11930 break;
11931
11932 case S390_INSN_VEC_REPLICATE:
11933 end = s390_insn_vec_replicate_emit(buf, insn);
11934 break;
11935
11936 fail:
11937 default:
11938 vpanic("emit_S390Instr");
11939 }
11940
11941 vassert(end - buf <= nbuf);
11942
11943 return end - buf;
11944 }
11945
11946
11947 /* Return the number of bytes emitted for an S390_INSN_EVCHECK.
11948 See s390_insn_evcheck_emit */
11949 Int
11950 evCheckSzB_S390(void)
11951 {
11952 return s390_host_has_gie ? 18 : 24;
11953 }
11954
11955
11956 /* Patch the counter address into CODE_TO_PATCH as previously
11957 generated by s390_insn_profinc_emit. */
11958 VexInvalRange
11959 patchProfInc_S390(VexEndness endness_host,
11960 void *code_to_patch, const ULong *location_of_counter)
11961 {
11962 vassert(sizeof(ULong *) == 8);
11963
11964 s390_tchain_verify_load64(code_to_patch, S390_REGNO_TCHAIN_SCRATCH, 0);
11965
11966 UChar *p = s390_tchain_patch_load64(code_to_patch,
11967 (Addr)location_of_counter);
11968
11969 UInt len = p - (UChar *)code_to_patch;
11970 VexInvalRange vir = { (HWord)code_to_patch, len };
11971 return vir;
11972 }
11973
11974
11975 /* NB: what goes on here has to be very closely coordinated with the
11976 s390_insn_xdirect_emit code above. */
11977 VexInvalRange
11978 chainXDirect_S390(VexEndness endness_host,
11979 void *place_to_chain,
11980 const void *disp_cp_chain_me_EXPECTED,
11981 const void *place_to_jump_to)
11982 {
11983 vassert(endness_host == VexEndnessBE);
11984
11985 /* What we're expecting to see @ PLACE_TO_CHAIN is:
11986
11987 load tchain_scratch, #disp_cp_chain_me_EXPECTED
11988 goto *tchain_scratch
11989 */
11990 const UChar *next;
11991 next = s390_tchain_verify_load64(place_to_chain, S390_REGNO_TCHAIN_SCRATCH,
11992 (Addr)disp_cp_chain_me_EXPECTED);
11993 vassert(s390_insn_is_BR(next, S390_REGNO_TCHAIN_SCRATCH));
11994
11995 /* And what we want to change it to is either:
11996 (general case):
11997
11998 load tchain_scratch, #place_to_jump_to
11999 goto *tchain_scratch
12000
12001 ---OR---
12002
12003 in the case where the displacement is small enough
12004
12005 BRCL delta where delta is in half-words
12006 invalid opcodes
12007
12008 In both cases the replacement has the same length as the original.
12009 To remain sane & verifiable,
12010 (1) limit the displacement for the short form to
12011 (say) +/- one billion, so as to avoid wraparound
12012 off-by-ones
12013 (2) even if the short form is applicable, once every (say)
12014 1024 times use the long form anyway, so as to maintain
12015 verifiability
12016 */
12017
12018 /* This is the delta we need to put into a BRCL insn. Note, that the
12019 offset in BRCL is in half-words. Hence division by 2. */
12020 Long delta =
12021 (Long)((const UChar *)place_to_jump_to - (const UChar *)place_to_chain) / 2;
12022 Bool shortOK = delta >= -1000*1000*1000 && delta < 1000*1000*1000;
12023
12024 static UInt shortCTR = 0; /* DO NOT MAKE NON-STATIC */
12025 if (shortOK) {
12026 shortCTR++; // thread safety bleh
12027 if (0 == (shortCTR & 0x3FF)) {
12028 shortOK = False;
12029 if (0)
12030 vex_printf("QQQ chainXDirect_S390: shortCTR = %u, "
12031 "using long jmp\n", shortCTR);
12032 }
12033 }
12034
12035 /* And make the modifications. */
12036 UChar *p = (UChar *)place_to_chain;
12037 if (shortOK) {
12038 p = s390_emit_BRCL(p, S390_CC_ALWAYS, delta); /* 6 bytes */
12039
12040 /* Make sure that BRCL fits into the patchable part of an xdirect
12041 code sequence */
12042 vassert(6 <= s390_xdirect_patchable_len());
12043
12044 /* Fill remaining bytes with 0x00 (invalid opcode) */
12045 Int i;
12046 for (i = 0; i < s390_xdirect_patchable_len() - 6; ++i)
12047 p[i] = 0x00;
12048 } else {
12049 /*
12050 load tchain_scratch, #place_to_jump_to
12051 goto *tchain_scratch
12052 */
12053 Addr64 addr = (Addr)place_to_jump_to;
12054 p = s390_tchain_load64(p, S390_REGNO_TCHAIN_SCRATCH, addr);
12055 /* There is not need to emit a BCR here, as it is already there. */
12056 }
12057
12058 UInt len = p - (UChar *)place_to_chain;
12059 VexInvalRange vir = { (HWord)place_to_chain, len };
12060 return vir;
12061 }
12062
12063
12064 /* NB: what goes on here has to be very closely coordinated with the
12065 s390_insn_xdirect_emit code above. */
12066 VexInvalRange
12067 unchainXDirect_S390(VexEndness endness_host,
12068 void *place_to_unchain,
12069 const void *place_to_jump_to_EXPECTED,
12070 const void *disp_cp_chain_me)
12071 {
12072 vassert(endness_host == VexEndnessBE);
12073
12074 /* What we're expecting to see @ PLACE_TO_UNCHAIN:
12075
12076 load tchain_scratch, #place_to_jump_to_EXPECTED
12077 goto *tchain_scratch
12078
12079 ---OR---
12080 in the case where the displacement falls within 32 bits
12081
12082 BRCL delta
12083 invalid opcodes
12084 */
12085 UChar *p = place_to_unchain;
12086
12087 Bool uses_short_form = False;
12088
12089 if (s390_insn_is_BRCL(p, S390_CC_ALWAYS)) {
12090 /* Looks like the short form */
12091 Int num_hw = *(Int *)&p[2];
12092 Int delta = 2 *num_hw;
12093
12094 vassert(p + delta == place_to_jump_to_EXPECTED);
12095
12096 Int i;
12097 for (i = 0; i < s390_xdirect_patchable_len() - 6; ++i)
12098 vassert(p[6+i] == 0x00);
12099 uses_short_form = True;
12100 } else {
12101 /* Should be the long form */
12102 const UChar *next;
12103
12104 next = s390_tchain_verify_load64(p, S390_REGNO_TCHAIN_SCRATCH,
12105 (Addr)place_to_jump_to_EXPECTED);
12106 /* Check for BR *tchain_scratch */
12107 vassert(s390_insn_is_BR(next, S390_REGNO_TCHAIN_SCRATCH));
12108 }
12109
12110 /* And what we want to change it to is:
12111
12112 load tchain_scratch, #disp_cp_chain_me
12113 goto *tchain_scratch
12114 */
12115
12116 /* Get the address of the beginning of the load64 code sequence into %r1.
12117 Do not change the register! This is part of the protocol with the
12118 dispatcher.
12119 Note: the incoming argument PLACE_TO_CHAIN points to the beginning of the
12120 load64 insn sequence. That sequence is prefixed with a BASR to get its
12121 address (see s390_insn_xdirect_emit). */
12122 p = s390_emit_BASR(p - S390_BASR_LEN, 1, R0);
12123
12124 Addr64 addr = (Addr)disp_cp_chain_me;
12125 p = s390_tchain_load64(p, S390_REGNO_TCHAIN_SCRATCH, addr);
12126
12127 /* Emit the BCR in case the short form was used. In case of the long
12128 form, the BCR is already there. */
12129 if (uses_short_form)
12130 s390_emit_BCR(p, S390_CC_ALWAYS, S390_REGNO_TCHAIN_SCRATCH);
12131
12132 UInt len = p - (UChar *)place_to_unchain;
12133 VexInvalRange vir = { (HWord)place_to_unchain, len };
12134 return vir;
12135 }
12136
12137 /*---------------------------------------------------------------*/
12138 /*--- end host_s390_defs.c ---*/
12139 /*---------------------------------------------------------------*/
Instrumentation framework for detecting many memory management and threading bugs, and profile your programs in detail.