VEX/priv/mips_defs.h

   1
   2 /*---------------------------------------------------------------*/
   3 /*--- begin                                       mips_defs.h ---*/
   4 /*---------------------------------------------------------------*/
   5
   6 /*
   7    This file is part of Valgrind, a dynamic binary instrumentation
   8    framework.
   9
  10    Copyright (C) 2017-2019 RT-RK
  11
  12    This program is free software; you can redistribute it and/or
  13    modify it under the terms of the GNU General Public License as
  14    published by the Free Software Foundation; either version 2 of the
  15    License, or (at your option) any later version.
  16
  17    This program is distributed in the hope that it will be useful, but
  18    WITHOUT ANY WARRANTY; without even the implied warranty of
  19    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  20    General Public License for more details.
  21
  22    You should have received a copy of the GNU General Public License
  23    along with this program; if not, see <http://www.gnu.org/licenses/>.
  24
  25    The GNU General Public License is contained in the file COPYING.
  26 */
  27 #ifndef __VEX_MIPS_DEFS_H
  28 #define __VEX_MIPS_DEFS_H
  29
  30 #include "libvex_basictypes.h"
  31 #include "libvex_ir.h"
  32 #include "libvex.h"
  33
  34 /* MOD: The IRSB* into which we're generating code. */
  35 extern IRSB *irsb;
  36
  37 /* Is our guest binary 32 or 64bit? Set at each call to
  38    disInstr_MIPS below. */
  39 extern Bool mode64;
  40
  41 /* Pointer to the guest code area. */
  42 extern const UChar *guest_code;
  43
  44 /*------------------------------------------------------------*/
  45 /*---              DSP to IR function                      ---*/
  46 /*------------------------------------------------------------*/
  47
  48 UInt disDSPInstr_MIPS_WRK ( UInt );
  49
  50 /*------------------------------------------------------------*/
  51 /*---                  Debugging output                    ---*/
  52 /*------------------------------------------------------------*/
  53
  54 #define DIP(format, args...)           \
  55    if (vex_traceflags & VEX_TRACE_FE)  \
  56       vex_printf(format, ## args)
  57
  58 /* ------------ MIPS32 DSP ASE(r2) accumulators ------------- */
  59
  60 extern UInt accumulatorGuestRegOffset( UInt );
  61
  62 /*------------------------------------------------------------*/
  63 /*--- Helper bits and pieces for creating IR fragments.    ---*/
  64 /*------------------------------------------------------------*/
  65
  66 static inline IRExpr *mkU8(UInt i)
  67 {
  68    vassert(i < 256);
  69    return IRExpr_Const(IRConst_U8((UChar) i));
  70 }
  71
  72 /* Create an expression node for a 16-bit integer constant. */
  73 static inline IRExpr *mkU16(UInt i)
  74 {
  75    return IRExpr_Const(IRConst_U16(i));
  76 }
  77
  78 /* Create an expression node for a 32-bit integer constant. */
  79 static inline IRExpr *mkU32(UInt i)
  80 {
  81    return IRExpr_Const(IRConst_U32(i));
  82 }
  83
  84 /* Create an expression node for a 64-bit integer constant. */
  85 static inline IRExpr *mkU64(ULong i)
  86 {
  87    return IRExpr_Const(IRConst_U64(i));
  88 }
  89
  90 static inline IRExpr *mkexpr(IRTemp tmp)
  91 {
  92    return IRExpr_RdTmp(tmp);
  93 }
  94
  95 static inline IRExpr *unop(IROp op, IRExpr * a)
  96 {
  97    return IRExpr_Unop(op, a);
  98 }
  99
 100 static inline IRExpr *binop(IROp op, IRExpr * a1, IRExpr * a2)
 101 {
 102    return IRExpr_Binop(op, a1, a2);
 103 }
 104
 105 static inline IRExpr *triop(IROp op, IRExpr * a1, IRExpr * a2, IRExpr * a3)
 106 {
 107    return IRExpr_Triop(op, a1, a2, a3);
 108 }
 109
 110 static inline IRExpr *qop ( IROp op, IRExpr * a1, IRExpr * a2, IRExpr * a3,
 111                      IRExpr * a4 )
 112 {
 113    return IRExpr_Qop(op, a1, a2, a3, a4);
 114 }
 115
 116 static inline IRExpr *load(IRType ty, IRExpr * addr)
 117 {
 118    IRExpr *load1 = NULL;
 119 #if defined (_MIPSEL)
 120    load1 = IRExpr_Load(Iend_LE, ty, addr);
 121 #elif defined (_MIPSEB)
 122    load1 = IRExpr_Load(Iend_BE, ty, addr);
 123 #endif
 124    return load1;
 125 }
 126
 127 /* Add a statement to the list held by "irsb". */
 128 static inline void stmt(IRStmt * st)
 129 {
 130    addStmtToIRSB(irsb, st);
 131 }
 132
 133 static inline void assign(IRTemp dst, IRExpr * e)
 134 {
 135    stmt(IRStmt_WrTmp(dst, e));
 136 }
 137
 138 static inline void store(IRExpr * addr, IRExpr * data)
 139 {
 140 #if defined (_MIPSEL)
 141    stmt(IRStmt_Store(Iend_LE, addr, data));
 142 #elif defined (_MIPSEB)
 143    stmt(IRStmt_Store(Iend_BE, addr, data));
 144 #endif
 145 }
 146
 147 /* Generate a new temporary of the given type. */
 148 static inline IRTemp newTemp(IRType ty)
 149 {
 150    vassert(isPlausibleIRType(ty));
 151    return newIRTemp(irsb->tyenv, ty);
 152 }
 153
 154 static inline UShort extend_s_9to16(UInt x)
 155 {
 156    return (UShort) ((((Int) x) << 23) >> 23);
 157 }
 158
 159 static inline UShort extend_s_10to16(UInt x)
 160 {
 161    return (UShort) ((((Int) x) << 22) >> 22);
 162 }
 163
 164 static inline UInt extend_s_10to32(UInt x)
 165 {
 166    return (UInt)((((Int) x) << 22) >> 22);
 167 }
 168
 169 static inline ULong extend_s_10to64(UInt x)
 170 {
 171    return (ULong)((((Long) x) << 54) >> 54);
 172 }
 173
 174 static inline UInt extend_s_16to32(UInt x)
 175 {
 176    return (UInt) ((((Int) x) << 16) >> 16);
 177 }
 178
 179 static inline UInt extend_s_18to32(UInt x)
 180 {
 181    return (UInt) ((((Int) x) << 14) >> 14);
 182 }
 183
 184 static inline UInt extend_s_19to32(UInt x)
 185 {
 186    return (UInt) ((((Int) x) << 13) >> 13);
 187 }
 188
 189 static inline UInt extend_s_23to32(UInt x)
 190 {
 191    return (UInt) ((((Int) x) << 9) >> 9);
 192 }
 193
 194 static inline UInt extend_s_26to32(UInt x)
 195 {
 196    return (UInt) ((((Int) x) << 6) >> 6);
 197 }
 198
 199 static inline ULong extend_s_16to64 ( UInt x )
 200 {
 201    return (ULong) ((((Long) x) << 48) >> 48);
 202 }
 203
 204 static inline ULong extend_s_18to64 ( UInt x )
 205 {
 206    return (ULong) ((((Long) x) << 46) >> 46);
 207 }
 208
 209 static inline ULong extend_s_19to64(UInt x)
 210 {
 211    return (ULong) ((((Long) x) << 45) >> 45);
 212 }
 213
 214 static inline ULong extend_s_23to64(UInt x)
 215 {
 216    return (ULong) ((((Long) x) << 41) >> 41);
 217 }
 218
 219 static inline ULong extend_s_26to64(UInt x)
 220 {
 221    return (ULong) ((((Long) x) << 38) >> 38);
 222 }
 223
 224 static inline ULong extend_s_32to64 ( UInt x )
 225 {
 226    return (ULong) ((((Long) x) << 32) >> 32);
 227 }
 228
 229 extern IRExpr *getIReg(UInt);
 230
 231 extern void putIReg(UInt, IRExpr *);
 232
 233 /* Get value from accumulator (helper function for MIPS32 DSP ASE instructions).
 234    This function should be called before any other operation if widening
 235    multiplications are used. */
 236 extern IRExpr *getAcc(UInt acNo);
 237
 238 extern IRExpr *getDSPControl(void);
 239
 240 extern IRExpr *mkNarrowTo32(IRType, IRExpr *);
 241
 242 extern void putLO(IRExpr *);
 243
 244 extern void putHI(IRExpr *);
 245
 246 /*------------------------------------------------------------*/
 247 /*---                  Field helpers                       ---*/
 248 /*------------------------------------------------------------*/
 249
 250 static inline UInt get_opcode(UInt mipsins)
 251 {
 252    return (0xFC000000 & mipsins) >> 26;
 253 }
 254
 255 static inline UInt get_rs(UInt mipsins)
 256 {
 257    return (0x03E00000 & mipsins) >> 21;
 258 }
 259
 260 static inline UInt get_rt(UInt mipsins)
 261 {
 262    return (0x001F0000 & mipsins) >> 16;
 263 }
 264
 265 static inline UInt get_imm(UInt mipsins)
 266 {
 267    return (0x0000FFFF & mipsins);
 268 }
 269
 270 static inline UInt get_instr_index(UInt mipsins)
 271 {
 272    return (0x03FFFFFF & mipsins);
 273 }
 274
 275 static inline UInt get_rd(UInt mipsins)
 276 {
 277    return (0x0000F800 & mipsins) >> 11;
 278 }
 279
 280 static inline UInt get_sa(UInt mipsins)
 281 {
 282    return (0x000007C0 & mipsins) >> 6;
 283 }
 284
 285 static inline UInt get_function(UInt mipsins)
 286 {
 287    return (0x0000003F & mipsins);
 288 }
 289
 290 static inline UInt get_ft(UInt mipsins)
 291 {
 292    return (0x001F0000 & mipsins) >> 16;
 293 }
 294
 295 static inline UInt get_fs(UInt mipsins)
 296 {
 297    return (0x0000F800 & mipsins) >> 11;
 298 }
 299
 300 static inline UInt get_fd(UInt mipsins)
 301 {
 302    return (0x000007C0 & mipsins) >> 6;
 303 }
 304
 305 static inline UInt get_mov_cc(UInt mipsins)
 306 {
 307    return (0x001C0000 & mipsins) >> 18;
 308 }
 309
 310 static inline UInt get_bc1_cc(UInt mipsins)
 311 {
 312    return (0x001C0000 & mipsins) >> 18;
 313 }
 314
 315 static inline UInt get_fpc_cc(UInt mipsins)
 316 {
 317    return (0x00000700 & mipsins) >> 8;
 318 }
 319
 320 static inline UInt get_tf(UInt mipsins)
 321 {
 322    return (0x00010000 & mipsins) >> 16;
 323 }
 324
 325 static inline UInt get_nd(UInt mipsins)
 326 {
 327    return (0x00020000 & mipsins) >> 17;
 328 }
 329
 330 static inline UInt get_fmt(UInt mipsins)
 331 {
 332    return (0x03E00000 & mipsins) >> 21;
 333 }
 334
 335 static inline UInt get_FC(UInt mipsins)
 336 {
 337    return (0x000000F0 & mipsins) >> 4;
 338 }
 339
 340 static inline UInt get_cond(UInt mipsins)
 341 {
 342    return (0x0000000F & mipsins);
 343 }
 344
 345 /* for break & syscall */
 346 static inline UInt get_code(UInt mipsins)
 347 {
 348    return (0xFFC0 & mipsins) >> 6;
 349 }
 350
 351 static inline UInt get_lsb(UInt mipsins)
 352 {
 353    return (0x7C0 & mipsins) >> 6;
 354 }
 355
 356 static inline UInt get_msb(UInt mipsins)
 357 {
 358    return (0x0000F800 & mipsins) >> 11;
 359 }
 360
 361 static inline UInt get_rot(UInt mipsins)
 362 {
 363    return (0x00200000 & mipsins) >> 21;
 364 }
 365
 366 static inline UInt get_rotv(UInt mipsins)
 367 {
 368    return (0x00000040 & mipsins) >> 6;
 369 }
 370
 371 static inline UInt get_sel(UInt mipsins)
 372 {
 373    return (0x00000007 & mipsins);
 374 }
 375
 376 /* Get acc number for all MIPS32 DSP ASE(r2) instructions that use them,
 377    except for MFHI and MFLO. */
 378 static inline UInt get_acNo(UInt mipsins)
 379 {
 380    return (0x00001800 & mipsins) >> 11;
 381 }
 382
 383 /* Get accumulator number for MIPS32 DSP ASEr2 MFHI and MFLO instructions. */
 384 static inline UInt get_acNo_mfhilo(UInt mipsins)
 385 {
 386    return (0x00600000 & mipsins) >> 21;
 387 }
 388
 389 /* Get mask field (helper function for wrdsp instruction). */
 390 static inline UInt get_wrdspMask(UInt mipsins)
 391 {
 392    return (0x001ff800 & mipsins) >> 11;
 393 }
 394
 395 /* Get mask field (helper function for rddsp instruction). */
 396 static inline UInt get_rddspMask(UInt mipsins)
 397 {
 398    return (0x03ff0000 & mipsins) >> 16;
 399 }
 400
 401 /* Get shift field (helper function for DSP ASE instructions). */
 402 static inline UInt get_shift(UInt mipsins)
 403 {
 404    return (0x03f00000 & mipsins) >> 20;
 405 }
 406
 407 /* Get immediate field for DSP ASE instructions. */
 408 static inline UInt get_dspImm(UInt mipsins)
 409 {
 410    return (0x03ff0000 & mipsins) >> 16;
 411 }
 412
 413
 414 #endif
 415
 416 /*---------------------------------------------------------------*/
 417 /*--- end                                         mips_defs.h ---*/
 418 /*---------------------------------------------------------------*/