none/tests/fdleak_cmsg_supp.supp: Add suppressions for older glibc
[valgrind.git] / none / tests / mips32 / pc_instructions_r6.c
blob134f3e8b6febb457b7b06919fbd8b5ea993a7f49
1 #include <stdio.h>
5 #define TESTINST1(instruction, RSval, RD) \
6 { \
7 unsigned int out; \
8 unsigned int out1; \
9 __asm__ volatile( \
10 ".set push \n\t" \
11 ".set noreorder \n\t" \
12 "jal end"instruction#RSval "\n\t" \
13 "nop \n\t" \
14 "end"instruction#RSval ": \n\t" \
15 instruction " $" #RD ", " #RSval " \n\t" \
16 "move %0, $" #RD "\n\t" \
17 "move %1, $ra \n\t" \
18 ".set pop \n\t" \
19 : "=&r" (out), "=&r" (out1) \
20 : "r" (RSval) \
21 : #RD, "ra", "cc", "memory" \
22 ); \
23 printf(instruction" :: out - ra %x, RSval 0x%08x\n", \
24 out - out1, RSval); \
27 #define TESTINST2(instruction, RSval, RD) \
28 { \
29 unsigned int out; \
30 unsigned int out1; \
31 __asm__ volatile( \
32 ".set push \n\t" \
33 ".set noreorder \n\t" \
34 "jal end"instruction#RSval "\n\t" \
35 "nop \n\t" \
36 "end"instruction#RSval ": \n\t" \
37 instruction " $" #RD ", " #RSval " \n\t" \
38 "move %0, $" #RD "\n\t" \
39 "move %1, $ra \n\t" \
40 ".set pop \n\t" \
41 : "=&r" (out), "=&r" (out1) \
42 : "r" (RSval) \
43 : #RD, "ra", "cc", "memory" \
44 ); \
45 printf(instruction" :: out - ra %x, RSval 0x%08x\n", \
46 out - (out1 & ~0xffffffff), RSval); \
49 #define TESTINST3(instruction, RSval, RD) \
50 { \
51 unsigned int out = 0; \
52 __asm__ __volatile__( \
53 ".set push \n\t" \
54 ".set noreorder \n\t" \
55 "lbl"instruction#RSval ": \n\t" \
56 "or $0, $0, $0 \n\t" \
57 "and $0, $0, $0 \n\t" \
58 instruction" $"#RD ", lbl"instruction#RSval "\n\t" \
59 "move %0, $"#RD "\n\t" \
60 ".set pop \n\t" \
61 : "=r" (out) \
62 : \
63 : "t0", "t1" \
64 ); \
65 printf("%s :: out: 0x%x\n", instruction, out); \
68 int main() {
69 #if (__mips_isa_rev>=6)
70 printf("addiupc\n");
71 TESTINST1("addiupc", 0, v0);
72 TESTINST1("addiupc", 4, v1);
73 TESTINST1("addiupc", 16, a0);
74 TESTINST1("addiupc", 64, a1);
75 TESTINST1("addiupc", 256, a3);
76 TESTINST1("addiupc", 1024, t0);
77 TESTINST1("addiupc", 4096, t1);
78 TESTINST1("addiupc", 16384, t2);
80 printf("\naluipc\n");
81 TESTINST2("aluipc", 0, v0);
82 TESTINST2("aluipc", 4, v1);
83 TESTINST2("aluipc", 16, a0);
84 TESTINST2("aluipc", 64, a1);
85 TESTINST2("aluipc", 256, a3);
86 TESTINST2("aluipc", 1024, t0);
87 TESTINST2("aluipc", 4096, t1);
88 TESTINST2("aluipc", 16384, t2);
90 printf("\nauipc\n");
91 TESTINST1("auipc", 0, v0);
92 TESTINST1("auipc", 4, v1);
93 TESTINST1("auipc", 16, a0);
94 TESTINST1("auipc", 64, a1);
95 TESTINST1("auipc", 256, a3);
96 TESTINST1("auipc", 1024, t0);
97 TESTINST1("auipc", 4096, t1);
98 TESTINST1("auipc", 16384, t2);
100 printf("\nlwpc\n");
101 TESTINST3("lwpc", 0, v0);
102 TESTINST3("lwpc", 4, v1);
103 TESTINST3("lwpc", 16, a0);
104 TESTINST3("lwpc", 64, a1);
105 TESTINST3("lwpc", 256, a3);
106 TESTINST3("lwpc", 1024, t0);
107 TESTINST3("lwpc", 4096, t1);
108 TESTINST3("lwpc", 16384, t2);
110 #endif
112 return 0;