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Bug499183 - FreeBSD: differences in avx-vmovq output
[valgrind.git] / none / tests / mips32 / vfp.c
blobf545ff40d38480ae0d68e2a4960a4856e258eb9b
1 #if defined(__mips_hard_float)
2 #include <setjmp.h>
3 #include <signal.h>
4 #include <stdint.h>
5 #include <stdio.h>
6 #include <stdlib.h>
7
8 unsigned int mem[] = {
9 0x4095A266, 0x66666666,
10 0xBFF00000, 0x00000000,
11 0x3FF00000, 0x00000000,
12 0x252a2e2b, 0x262d2d2a,
13 0xFFFFFFFF, 0xFFFFFFFF,
14 0x41D26580, 0xB487E5C9,
15 0x42026580, 0xB750E388,
16 0x3E45798E, 0xE2308C3A,
17 0x3FBF9ADD, 0x3746F65F
18 };
19
20 long long meml[] = {
21 0x236457894095A266, 0x7777777766666666,
22 0xBFF00000aaaaccde, 0x0004563217800000,
23 0x3FF0556644770000, 0x0002255889900000,
24 0x25254123698a2e2b, 0x21a2b3d6f62d2d2a,
25 0xFFaabb22ccFFFFFF, 0x542698eeFFFFFFFF,
26 0x41D2658041D26580, 0xB487E5C9B487E5C9,
27 0x420774411aa26580, 0xaabbccddB750E388,
28 0xffffeeee3E45798E, 0xccccccccE2308C3A,
29 0x123abb983FBF9ADD, 0x002255443746F65F
30 };
31
32 float fs_f[] = {
33 0, 456.2489562, 3, -1,
34 1384.6, -7.2945676, 1000000000, -5786.47,
35 1752, 0.0024575, 0.00000001, -248562.76,
36 -45786.476, 456.2489562, 34.00046, 45786.476,
37 1752065, 107, -45667.24, -7.2945676,
38 -347856.475, 356047.56, -1.0, 23.04
39 };
40
41 double fs_d[] = {
42 0, 456.2489562, 3, -1,
43 1384.6, -7.2945676, 1000000000, -5786.47,
44 1752, 0.0024575, 0.00000001, -248562.76,
45 -45786.476, 456.2489562, 34.00046, 45786.476,
46 1752065, 107, -45667.24, -7.2945676,
47 -347856.475, 356047.56, -1.0, 23.04
48 };
49
50 double mem1[] = {
51 0, 0, 0, 0,
52 0, 0, 0, 0,
53 0, 0, 0, 0,
54 0, 0, 0, 0
55 };
56
57 float mem1f[] = {
58 0, 0, 0, 0,
59 0, 0, 0, 0,
60 0, 0, 0, 0,
61 0, 0, 0, 0
62 };
63
64 // ldc1 $f0, 0($t1)
65 #define TESTINSN5LOAD(instruction, RTval, offset, RT) \
66 { \
67 double out; \
68 uint64_t outl; \
69 __asm__ volatile( \
70 "move $t1, %1\n\t" \
71 "li $t0, " #RTval"\n\t" \
72 instruction "\n\t" \
73 "mov.d %0, $" #RT "\n\t" \
74 "sdc1 $" #RT ", 0(%3) \n\t" \
75 : "=&f" (out) \
76 : "r" (mem), "r" (RTval), "r" (&outl) \
77 : "t0", "t1", "$"#RT, "memory" \
78 ); \
79 printf("%s :: ft 0x%x%x\n", \
80 instruction, (uint32_t)outl, (uint32_t)(outl >> 32)); \
81 }
82
83 // lwc1 $f0, 0($t1)
84 #define TESTINSN5LOADw(instruction, RTval, offset, RT) \
85 { \
86 double out; \
87 int out1; \
88 __asm__ volatile( \
89 "move $t1, %2\n\t" \
90 "li $t0, " #RTval"\n\t" \
91 instruction "\n\t" \
92 "mov.d %0, $" #RT "\n\t" \
93 "mfc1 %1, $" #RT "\n\t" \
94 : "=f" (out), "=r" (out1) \
95 : "r" (mem), "r" (RTval) \
96 : "t0", "t1", "$"#RT, "memory" \
97 ); \
98 printf("%s :: ft 0x%x\n", \
99 instruction, out1); \
100 }
101
102 // lwxc1 $f0, $a3($v0)
103 #define TESTINSN6LOADw(instruction, indexVal, fd, index, base) \
104 { \
105 int out; \
106 __asm__ volatile( \
107 "move $" #base ", %1\n\t" \
108 "li $" #index ", " #indexVal"\n\t" \
109 instruction "\n\t" \
110 "mfc1 %0, $" #fd "\n\t" \
111 : "=r" (out) \
112 : "r" (mem) \
113 : #base, #index, "$"#fd, "memory" \
114 ); \
115 printf("%s :: ft 0x%x\n", \
116 instruction, out); \
117 }
118
119 // ldxc1 $f0, $a3($v0)
120 #define TESTINSN6LOADd(instruction, indexVal, fd, index, base) \
121 { \
122 uint64_t out; \
123 __asm__ volatile( \
124 "move $" #base ", %0\n\t" \
125 "li $" #index ", " #indexVal"\n\t" \
126 instruction "\n\t" \
127 "sdc1 $"#fd ", 0(%1)" \
128 : : "r" (mem), "r" (&out) \
129 : #base, #index, "$"#fd, "memory" \
130 ); \
131 printf("%s :: ft lo: 0x%x, ft hi: 0x%x\n", \
132 instruction, (uint32_t)out, (uint32_t)(out >> 32)); \
133 }
134
135 // luxc1 $f0, $a3($v0)
136 #define TESTINSN6LOADlu(instruction, indexVal, fd, index, base) \
137 { \
138 uint64_t out; \
139 __asm__ volatile( \
140 "move $" #base ", %0\n\t" \
141 "li $" #index ", " #indexVal"\n\t" \
142 instruction "\n\t" \
143 "sdc1 $"#fd ", 0(%1)" \
144 : : "r" (meml), "r" (&out) \
145 : #base, #index, "$"#fd, "memory" \
146 ); \
147 printf("%s :: ft lo: 0x%x, ft hi: 0x%x\n", \
148 instruction, (uint32_t)out, (uint32_t)(out >> 32)); \
149 }
150
151 // sdc1 $f0, 0($t0)
152 #define TESTINST1(offset) \
153 { \
154 unsigned int out; \
155 __asm__ volatile( \
156 "move $t0, %1\n\t" \
157 "move $t1, %2\n\t" \
158 "ldc1 $f0, "#offset"($t1)\n\t" \
159 "sdc1 $f0, "#offset"($t0) \n\t" \
160 "lw %0, "#offset"($t0)\n\t" \
161 : "=r" (out) \
162 : "r" (mem1), "r" (fs_d) \
163 : "t1", "t0", "$f0", "memory" \
164 ); \
165 printf("sdc1 $f0, 0($t0) :: out: 0x%x\n", \
166 out); \
167 }
168
169 // sdxc1 $f0, $t2($t0)
170 #define TESTINST1a(offset) \
171 { \
172 unsigned int out; \
173 unsigned int out1; \
174 __asm__ volatile( \
175 "move $t0, %2\n\t" \
176 "move $t1, %3\n\t" \
177 "li $t2, "#offset"\n\t" \
178 "ldc1 $f0, "#offset"($t1)\n\t" \
179 "sdxc1 $f0, $t2($t0) \n\t" \
180 "lw %0, "#offset"($t0)\n\t" \
181 "addi $t0, $t0, 4 \n\t" \
182 "lw %1, "#offset"($t0)\n\t" \
183 : "=r" (out), "=r" (out1) \
184 : "r" (mem1), "r" (fs_d) \
185 : "t2", "t1", "t0", "$f0", "memory" \
186 ); \
187 printf("sdc1 $f0, #t2($t0) :: out: 0x%x : out1: 0x%x\n", \
188 out, out1); \
189 }
190
191 // SUXC1 $f0, $t2($t0)
192 #define TESTINST1b(offset, unligned_offset) \
193 { \
194 unsigned int out; \
195 unsigned int out1; \
196 __asm__ volatile( \
197 "move $t0, %2\n\t" \
198 "move $t1, %3\n\t" \
199 "li $t2, "#unligned_offset"\n\t" \
200 "ldc1 $f0, "#offset"($t1)\n\t" \
201 "suxc1 $f0, $t2($t0) \n\t" \
202 "lw %0, "#offset"($t0)\n\t" \
203 "addi $t0, $t0, 4 \n\t" \
204 "lw %1, "#offset"($t0)\n\t" \
205 : "=r" (out), "=r" (out1) \
206 : "r" (mem1), "r" (fs_d) \
207 : "t2", "t1", "t0", "$f0", "memory" \
208 ); \
209 printf("suxc1 $f0, #t2($t0) :: out: 0x%x : out1: 0x%x\n", \
210 out, out1); \
211 }
212
213 // swc1 $f0, 0($t0)
214 #define TESTINST2(offset) \
215 { \
216 unsigned int out; \
217 __asm__ volatile( \
218 "move $t0, %1\n\t" \
219 "move $t1, %2\n\t" \
220 "lwc1 $f0, "#offset"($t1)\n\t" \
221 "swc1 $f0, "#offset"($t0) \n\t" \
222 "lw %0, "#offset"($t0)\n\t" \
223 : "=r" (out) \
224 : "r" (mem1f), "r" (fs_f) \
225 : "t1", "t0", "$f0", "memory" \
226 ); \
227 printf("swc1 $f0, 0($t0) :: out: 0x%x\n", \
228 out); \
229 }
230
231 // SWXC1 $f0, $t2($t0)
232 #define TESTINST2a(offset) \
233 { \
234 unsigned int out; \
235 __asm__ volatile( \
236 "move $t0, %1\n\t" \
237 "move $t1, %2\n\t" \
238 "li $t2, "#offset" \n\t" \
239 "lwc1 $f0, "#offset"($t1)\n\t" \
240 "swxc1 $f0, $t2($t0) \n\t" \
241 "lw %0, "#offset"($t0)\n\t" \
242 : "=r" (out) \
243 : "r" (mem1f), "r" (fs_f) \
244 : "t2", "t1", "t0", "$f0", "memory" \
245 ); \
246 printf("swxc1 $f0, 0($t0) :: out: 0x%x\n", \
247 out); \
248 }
249
250 #if (__mips==32) && (__mips_isa_rev>=2) && (__mips_isa_rev<6) \
251 && (__mips_fpr==64 || __mips_fpr==xx)
252
253 #define TEST_FPU64 \
254 __asm__ __volatile__( \
255 "cvt.l.s $f0, $f0" "\n\t" \
256 : \
257 : \
258 : "$f0" \
259 );
260
261 static void handler(int sig)
262 {
263 exit(0);
264 }
265 #endif
266
267 void ppMem(double *m, int len)
268 {
269 int i;
270 printf("MEM1:\n");
271 for (i = 0; i < len; i=i+4)
272 {
273 printf("%lf, %lf, %lf, %lf\n", m[i], m[i+1], m[i+2], m[i+3]);
274 m[i] = 0;
275 m[i+1] = 0;
276 m[i+2] = 0;
277 m[i+3] = 0;
278 }
279 }
280
281 void ppMemF(float *m, int len)
282 {
283 int i;
284 printf("MEM1:\n");
285 for (i = 0; i < len; i=i+4)
286 {
287 printf("%lf, %lf, %lf, %lf\n", m[i], m[i+1], m[i+2], m[i+3]);
288 m[i] = 0;
289 m[i+1] = 0;
290 m[i+2] = 0;
291 m[i+3] = 0;
292 }
293 }
294
295 int main()
296 {
297 printf("LDC1\n");
298 TESTINSN5LOAD("ldc1 $f0, 0($t1)", 0, 0, f0);
299 TESTINSN5LOAD("ldc1 $f0, 8($t1)", 0, 8, f0);
300 TESTINSN5LOAD("ldc1 $f0, 16($t1)", 0, 16, f0);
301 TESTINSN5LOAD("ldc1 $f0, 24($t1)", 0, 24, f0);
302 TESTINSN5LOAD("ldc1 $f0, 32($t1)", 0, 32, f0);
303 TESTINSN5LOAD("ldc1 $f0, 40($t1)", 0, 40, f0);
304 TESTINSN5LOAD("ldc1 $f0, 48($t1)", 0, 48, f0);
305 TESTINSN5LOAD("ldc1 $f0, 56($t1)", 0, 56, f0);
306 TESTINSN5LOAD("ldc1 $f0, 64($t1)", 0, 64, f0);
307 TESTINSN5LOAD("ldc1 $f0, 0($t1)", 0, 0, f0);
308 TESTINSN5LOAD("ldc1 $f0, 8($t1)", 0, 8, f0);
309 TESTINSN5LOAD("ldc1 $f0, 16($t1)", 0, 16, f0);
310 TESTINSN5LOAD("ldc1 $f0, 24($t1)", 0, 24, f0);
311 TESTINSN5LOAD("ldc1 $f0, 32($t1)", 0, 32, f0);
312 TESTINSN5LOAD("ldc1 $f0, 40($t1)", 0, 40, f0);
313 TESTINSN5LOAD("ldc1 $f0, 48($t1)", 0, 48, f0);
314 TESTINSN5LOAD("ldc1 $f0, 56($t1)", 0, 56, f0);
315 TESTINSN5LOAD("ldc1 $f0, 0($t1)", 0, 0, f0);
316 TESTINSN5LOAD("ldc1 $f0, 8($t1)", 0, 8, f0);
317 TESTINSN5LOAD("ldc1 $f0, 16($t1)", 0, 16, f0);
318 TESTINSN5LOAD("ldc1 $f0, 24($t1)", 0, 24, f0);
319 TESTINSN5LOAD("ldc1 $f0, 32($t1)", 0, 32, f0);
320 TESTINSN5LOAD("ldc1 $f0, 40($t1)", 0, 40, f0);
321 TESTINSN5LOAD("ldc1 $f0, 48($t1)", 0, 48, f0);
322 TESTINSN5LOAD("ldc1 $f0, 56($t1)", 0, 56, f0);
323 TESTINSN5LOAD("ldc1 $f0, 64($t1)", 0, 64, f0);
324 TESTINSN5LOAD("ldc1 $f0, 0($t1)", 0, 0, f0);
325
326 printf("LWC1\n");
327 TESTINSN5LOADw("lwc1 $f0, 0($t1)", 0, 0, f0);
328 TESTINSN5LOADw("lwc1 $f0, 4($t1)", 0, 4, f0);
329 TESTINSN5LOADw("lwc1 $f0, 8($t1)", 0, 8, f0);
330 TESTINSN5LOADw("lwc1 $f0, 12($t1)", 0, 12, f0);
331 TESTINSN5LOADw("lwc1 $f0, 16($t1)", 0, 16, f0);
332 TESTINSN5LOADw("lwc1 $f0, 20($t1)", 0, 20, f0);
333 TESTINSN5LOADw("lwc1 $f0, 24($t1)", 0, 24, f0);
334 TESTINSN5LOADw("lwc1 $f0, 28($t1)", 0, 28, f0);
335 TESTINSN5LOADw("lwc1 $f0, 32($t1)", 0, 32, f0);
336 TESTINSN5LOADw("lwc1 $f0, 36($t1)", 0, 36, f0);
337 TESTINSN5LOADw("lwc1 $f0, 40($t1)", 0, 40, f0);
338 TESTINSN5LOADw("lwc1 $f0, 44($t1)", 0, 44, f0);
339 TESTINSN5LOADw("lwc1 $f0, 48($t1)", 0, 48, f0);
340 TESTINSN5LOADw("lwc1 $f0, 52($t1)", 0, 52, f0);
341 TESTINSN5LOADw("lwc1 $f0, 56($t1)", 0, 56, f0);
342 TESTINSN5LOADw("lwc1 $f0, 60($t1)", 0, 60, f0);
343 TESTINSN5LOADw("lwc1 $f0, 64($t1)", 0, 64, f0);
344 TESTINSN5LOADw("lwc1 $f0, 0($t1)", 0, 0, f0);
345 TESTINSN5LOADw("lwc1 $f0, 8($t1)", 0, 8, f0);
346 TESTINSN5LOADw("lwc1 $f0, 16($t1)", 0, 16, f0);
347 TESTINSN5LOADw("lwc1 $f0, 24($t1)", 0, 24, f0);
348 TESTINSN5LOADw("lwc1 $f0, 32($t1)", 0, 32, f0);
349 TESTINSN5LOADw("lwc1 $f0, 40($t1)", 0, 40, f0);
350 TESTINSN5LOADw("lwc1 $f0, 48($t1)", 0, 48, f0);
351 TESTINSN5LOADw("lwc1 $f0, 56($t1)", 0, 56, f0);
352 TESTINSN5LOADw("lwc1 $f0, 64($t1)", 0, 64, f0);
353 TESTINSN5LOADw("lwc1 $f0, 0($t1)", 0, 0, f0);
354
355 #if (__mips==32) && (__mips_isa_rev>=2) && (__mips_isa_rev<6)
356 printf("LWXC1\n");
357 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 0, f0, a3, v0);
358 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 4, f0, a3, v0);
359 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 8, f0, a3, v0);
360 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 12, f0, a3, v0);
361 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 16, f0, a3, v0);
362 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 20, f0, a3, v0);
363 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 24, f0, a3, v0);
364 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 28, f0, a3, v0);
365 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 32, f0, a3, v0);
366 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 36, f0, a3, v0);
367 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 40, f0, a3, v0);
368 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 44, f0, a3, v0);
369 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 48, f0, a3, v0);
370 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 52, f0, a3, v0);
371 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 56, f0, a3, v0);
372 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 60, f0, a3, v0);
373 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 64, f0, a3, v0);
374 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 0, f0, a3, v0);
375 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 4, f0, a3, v0);
376 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 8, f0, a3, v0);
377 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 12, f0, a3, v0);
378 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 16, f0, a3, v0);
379 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 20, f0, a3, v0);
380 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 24, f0, a3, v0);
381 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 28, f0, a3, v0);
382 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 32, f0, a3, v0);
383 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 36, f0, a3, v0);
384 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 40, f0, a3, v0);
385 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 44, f0, a3, v0);
386 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 48, f0, a3, v0);
387 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 52, f0, a3, v0);
388 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 56, f0, a3, v0);
389
390 printf("LDXC1\n");
391 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 0, f0, a3, v0);
392 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 8, f0, a3, v0);
393 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 16, f0, a3, v0);
394 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 24, f0, a3, v0);
395 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 32, f0, a3, v0);
396 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 40, f0, a3, v0);
397 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 48, f0, a3, v0);
398 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 56, f0, a3, v0);
399 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 64, f0, a3, v0);
400 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 0, f0, a3, v0);
401 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 8, f0, a3, v0);
402 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 16, f0, a3, v0);
403 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 24, f0, a3, v0);
404 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 32, f0, a3, v0);
405 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 40, f0, a3, v0);
406 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 48, f0, a3, v0);
407 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 56, f0, a3, v0);
408 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 64, f0, a3, v0);
409 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 0, f0, a3, v0);
410 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 8, f0, a3, v0);
411 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 16, f0, a3, v0);
412 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 24, f0, a3, v0);
413 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 32, f0, a3, v0);
414 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 40, f0, a3, v0);
415 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 48, f0, a3, v0);
416 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 56, f0, a3, v0);
417 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 64, f0, a3, v0);
418 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 0, f0, a3, v0);
419 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 8, f0, a3, v0);
420 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 16, f0, a3, v0);
421 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 24, f0, a3, v0);
422 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 32, f0, a3, v0);
423 #endif
424
425 printf("SDC1\n");
426 TESTINST1(0);
427 TESTINST1(8);
428 TESTINST1(16);
429 TESTINST1(24);
430 TESTINST1(32);
431 TESTINST1(40);
432 TESTINST1(48);
433 TESTINST1(56);
434 TESTINST1(64);
435 ppMem(mem1, 16);
436
437 #if (__mips==32) && (__mips_isa_rev>=2) && (__mips_isa_rev<6)
438 printf("SDXC1\n");
439 TESTINST1a(0);
440 TESTINST1a(8);
441 TESTINST1a(16);
442 TESTINST1a(24);
443 TESTINST1a(32);
444 TESTINST1a(40);
445 TESTINST1a(48);
446 TESTINST1a(56);
447 TESTINST1a(64);
448 ppMem(mem1, 16);
449 #endif
450
451 printf("SWC1\n");
452 TESTINST2(0);
453 TESTINST2(8);
454 TESTINST2(16);
455 TESTINST2(24);
456 TESTINST2(32);
457 TESTINST2(40);
458 TESTINST2(48);
459 TESTINST2(56);
460 TESTINST2(64);
461 ppMemF(mem1f, 16);
462
463 #if (__mips==32) && (__mips_isa_rev>=2) && (__mips_isa_rev<6)
464 printf("SWXC1\n");
465 TESTINST2a(0);
466 TESTINST2a(8);
467 TESTINST2a(16);
468 TESTINST2a(24);
469 TESTINST2a(32);
470 TESTINST2a(40);
471 TESTINST2a(48);
472 TESTINST2a(56);
473 TESTINST2a(64);
474 ppMemF(mem1f, 16);
475 #endif
476
477 #if (__mips==32) && (__mips_isa_rev>=2) && (__mips_isa_rev<6) \
478 && (__mips_fpr==64 || __mips_fpr==xx)
479 signal(SIGILL, handler);
480 /* Test fpu64 mode. */
481 TEST_FPU64;
482
483 printf("luxc1\n");
484 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 0, f0, a3, v0);
485 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 8, f0, a3, v0);
486 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 16, f0, a3, v0);
487 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 24, f0, a3, v0);
488 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 32, f0, a3, v0);
489 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 40, f0, a3, v0);
490 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 48, f0, a3, v0);
491 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 56, f0, a3, v0);
492 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 64, f0, a3, v0);
493 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 0, f0, a3, v0);
494 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 8, f0, a3, v0);
495 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 16, f0, a3, v0);
496 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 24, f0, a3, v0);
497 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 32, f0, a3, v0);
498 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 40, f0, a3, v0);
499 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 48, f0, a3, v0);
500 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 56, f0, a3, v0);
501 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 64, f0, a3, v0);
502 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 0, f0, a3, v0);
503 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 8, f0, a3, v0);
504 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 16, f0, a3, v0);
505 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 24, f0, a3, v0);
506 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 32, f0, a3, v0);
507 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 40, f0, a3, v0);
508 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 48, f0, a3, v0);
509 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 56, f0, a3, v0);
510 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 64, f0, a3, v0);
511 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 0, f0, a3, v0);
512 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 8, f0, a3, v0);
513 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 16, f0, a3, v0);
514 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 24, f0, a3, v0);
515 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 32, f0, a3, v0);
516
517 printf("SUXC1\n");
518 TESTINST1b(0, 0);
519 TESTINST1b(0, 1);
520 TESTINST1b(8, 8);
521 TESTINST1b(8, 9);
522 TESTINST1b(16, 16);
523 TESTINST1b(16, 17);
524 TESTINST1b(24, 24);
525 TESTINST1b(24, 25);
526 TESTINST1b(32, 32);
527 TESTINST1b(32, 35);
528 TESTINST1b(40, 40);
529 TESTINST1b(40, 42);
530 TESTINST1b(48, 48);
531 TESTINST1b(48, 50);
532 TESTINST1b(56, 56);
533 TESTINST1b(56, 60);
534 TESTINST1b(64, 64);
535 TESTINST1b(64, 67);
536 ppMem(mem1, 16);
537 #endif
538 return 0;
539 }
540 #else
541 int main() {
542 return 0;
543 }
544 #endif
Instrumentation framework for detecting many memory management and threading bugs, and profile your programs in detail.