none/tests/ppc32/jm-insns.c

   1
   2 /* HOW TO COMPILE:
   3
   4 * 32bit build:
   5    gcc -Winline -Wall -g -O -mregnames -maltivec
   6 * 64bit build:
   7    gcc -Winline -Wall -g -O -mregnames -maltivec -m64
   8
   9 This program is useful, but the register usage conventions in
  10 it are a complete dog.  In particular, _patch_op_imm has to
  11 be inlined, else you wind up with it segfaulting in
  12 completely different places due to corruption (of r20 in the
  13 case I chased).
  14 */
  15
  16 /*
  17  * test-ppc.c:
  18  * PPC tests for qemu-PPC CPU emulation checks
  19  *
  20  * Copyright (c) 2005 Jocelyn Mayer
  21  *
  22  *   This program is free software; you can redistribute it and/or
  23  *   modify it under the terms of the GNU General Public License V2
  24  *   as published by the Free Software Foundation
  25  *
  26  *   This program is distributed in the hope that it will be useful,
  27  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
  28  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  29  *   GNU General Public License for more details.
  30  *
  31  *   You should have received a copy of the GNU General Public License
  32  *   along with this program; if not, see <http://www.gnu.org/licenses/>.
  33  */
  34
  35 /*
  36  * Theory of operations:
  37  * a few registers are reserved for the test program:
  38  * r14 => r18
  39  * f14 => f18
  40  * I do preload test values in r14 thru r17 (or less, depending on the number
  41  * of register operands needed), patch the test opcode if any immediate
  42  * operands are required, execute the tested opcode.
  43  * XER, CCR and FPSCR are cleared before every test.
  44  * I always get the result in r17 and also save XER and CCR for fixed-point
  45  * operations. I also check FPSCR for floating points operations.
  46  *
  47  * Improvements:
  48  * a more clever FPSCR management is needed: for now, I always test
  49  * the round-to-zero case. Other rounding modes also need to be tested.
  50  */
  51
  52 /*
  53  * Operation details
  54  * -----------------
  55  * The 'test' functions (via all_tests[]) are wrappers of single asm instns
  56  *
  57  * The 'loops' (e.g. int_loops) do the actual work:
  58  *  - loops over as many arguments as the instn needs (regs | imms)
  59  *     - sets up the environment (reset cr,xer, assign src regs...)
  60  *     - maybe modifies the asm instn to test different imm args
  61  *     - calls the test function
  62  *     - retrieves relevant register data (rD,cr,xer,...)
  63  *     - prints argument and result data.
  64  *
  65  * More specifically...
  66  *
  67  * all_tests[i] holds insn tests
  68  *  - of which each holds: {instn_test_arr[], description, flags}
  69  *
  70  * flags hold 3 instn classifiers: {family, type, arg_type}
  71  *
  72  * // The main test loop:
  73  * do_tests( user_ctl_flags ) {
  74  *    foreach(curr_test = all_test[i]) {
  75  *
  76  *       // flags are used to control what tests are run:
  77  *       if (curr_test->flags && !user_ctl_flags)
  78  *          continue;
  79  *
  80  *       // a 'loop_family_arr' is chosen based on the 'family' flag...
  81  *       switch(curr_test->flags->family) {
  82  *       case x: loop_family_arr = int_loops;
  83  *      ...
  84  *       }
  85  *
  86  *       // ...and the actual test_loop to run is found by indexing into
  87  *       // the loop_family_arr with the 'arg_type' flag:
  88  *       test_loop = loop_family[curr_test->flags->arg_type]
  89  *
  90  *       // finally, loop over all instn tests for this test:
  91  *       foreach (instn_test = curr_test->instn_test_arr[i]) {
  92  *
  93  *          // and call the test_loop with the current instn_test function,name
  94  *          test_loop( instn_test->func, instn_test->name )
  95  *       }
  96  *    }
  97  * }
  98  *
  99  *
 100  * Details of instruction patching for immediate operands
 101  * -----------------------------------------------------
 102  * All the immediate insn test functions are of the form {imm_insn, blr}
 103  * In order to patch one of these functions, we simply copy both insns
 104  * to a stack buffer, and rewrite the immediate part of imm_insn.
 105  * We then execute our stack buffer.
 106  * All ppc instructions are 32bits wide, which makes this fairly easy.
 107  *
 108  * Example:
 109  * extern void test_addi (void);
 110  * asm(".section \".text\"\n"
 111  *     "    .align 2\n"
 112  *     "    .type test_addi,@function\n"
 113  *     "test_addi:\n"
 114  *     "    addi\n"
 115  *     "    blr\n"
 116  *     "    .previous\n"
 117  *     );
 118  *
 119  * We are interested only in:
 120  *      "    addi         17, 14, 0\n"
 121  *      "    blr\n"
 122  *
 123  * In a loop test, we may see:
 124  * uint32_t func_buf[2];               // our new stack based 'function'
 125  * for imm...                          // loop over imm
 126  *   init_function( &func, func_buf );   // copy insns, set func ptr
 127  *   patch_op_imm16(&func_buf[0], imm);  // patch 'addi' insn
 128  *   ...
 129  *   (*func)();                              // exec our rewritten code
 130  *
 131  * patch_op_imm16() itself simply takes the uint32_t insn and overwrites
 132  * the immediate field with the new value (which, for 'addi', is the
 133  * low 16 bits).
 134  *
 135  * So in the loop test, if 'imm' is currently 9, and p[0] is:
 136  *   0x3A2E0000   => addi 17, 14, 0
 137  *
 138  * after patch_op_imm16(), func_buf[0] becomes:
 139  *   0x3A2E0009   => addi 17, 14, 9
 140  *
 141  * Note: init_function() needs to be called on every iteration
 142  *  - don't ask me why!
 143 */
 144
 145
 146 /**********************************************************************/
 147 /* Uncomment to enable many arguments for altivec insns */
 148 #define USAGE_SIMPLE
 149
 150 /* Uncomment to enable many arguments for altivec insns */
 151 //#define ALTIVEC_ARGS_LARGE
 152
 153 /* Uncomment to enable output of CR flags for float tests */
 154 //#define TEST_FLOAT_FLAGS
 155
 156 /* Uncomment to enable debug output */
 157 //#define DEBUG_ARGS_BUILD
 158 //#define DEBUG_FILTER
 159
 160 /* These should be set at build time */
 161 //#define NO_FLOAT
 162 //#define HAS_ALTIVEC  // CFLAGS += -maltivec
 163 //#define IS_PPC405
 164 /**********************************************************************/
 165
 166
 167 #include <stdint.h>
 168 #include "tests/sys_mman.h"
 169 #include "tests/malloc.h"       // memalign16
 170 #include "./opcodes.h"
 171
 172 #define STATIC_ASSERT(e) sizeof(struct { int:-!(e); })
 173
 174 /* Something of the same size as void*, so can be safely be coerced
 175  * to/from a pointer type. Also same size as the host's gp registers.
 176  * According to the AltiVec section of the GCC manual, the syntax does
 177  * not allow the use of a typedef name as a type specifier in conjunction
 178  * with the vector keyword, so typedefs uint[32|64]_t are #undef'ed here
 179  * and redefined using #define.
 180  */
 181 #undef uint32_t
 182 #undef uint64_t
 183 #define uint32_t unsigned int
 184 #define uint64_t unsigned long long int
 185
 186 #ifndef __powerpc64__
 187 typedef uint32_t  HWord_t;
 188 #else
 189 typedef uint64_t  HWord_t;
 190 #endif /* __powerpc64__ */
 191
 192 enum {
 193     compile_time_test1 = STATIC_ASSERT(sizeof(uint32_t) == 4),
 194     compile_time_test2 = STATIC_ASSERT(sizeof(uint64_t) == 8),
 195 };
 196
 197 #define ALLCR "cr0","cr1","cr2","cr3","cr4","cr5","cr6","cr7"
 198
 199 #define SET_CR(_arg) \
 200       __asm__ __volatile__ ("mtcr  %0" : : "b"(_arg) : ALLCR );
 201
 202 #define SET_XER(_arg) \
 203       __asm__ __volatile__ ("mtxer %0" : : "b"(_arg) : "xer" );
 204
 205 #define GET_CR(_lval) \
 206       __asm__ __volatile__ ("mfcr %0"  : "=b"(_lval) )
 207
 208 #define GET_XER(_lval) \
 209       __asm__ __volatile__ ("mfxer %0" : "=b"(_lval) )
 210
 211 #define GET_CR_XER(_lval_cr,_lval_xer) \
 212    do { GET_CR(_lval_cr); GET_XER(_lval_xer); } while (0)
 213
 214 #define SET_CR_ZERO \
 215       SET_CR(0)
 216
 217 #define SET_XER_ZERO \
 218       SET_XER(0)
 219
 220 #define SET_CR_XER_ZERO \
 221    do { SET_CR_ZERO; SET_XER_ZERO; } while (0)
 222
 223 #define SET_FPSCR_ZERO \
 224    do { double _d = 0.0; \
 225         __asm__ __volatile__ ("mtfsf 0xFF, %0" : : "f"(_d) ); \
 226    } while (0)
 227
 228
 229 /* XXXX these must all be callee-save regs! */
 230 register double f14 __asm__ ("fr14");
 231 register double f15 __asm__ ("fr15");
 232 register double f16 __asm__ ("fr16");
 233 register double f17 __asm__ ("fr17");
 234 register HWord_t r14 __asm__ ("r14");
 235 register HWord_t r15 __asm__ ("r15");
 236 register HWord_t r16 __asm__ ("r16");
 237 register HWord_t r17 __asm__ ("r17");
 238
 239 #include "config.h"         // HAS_ALTIVEC
 240 #if defined (HAS_ALTIVEC)
 241 #   include <altivec.h>
 242 #endif
 243 #include <assert.h>
 244 #include <ctype.h>     // isspace
 245 #include <stdio.h>
 246 #include <stdlib.h>
 247 #include <string.h>
 248 #include <unistd.h>    // getopt
 249
 250
 251 #ifndef __powerpc64__
 252 #define ASSEMBLY_FUNC(__fname, __insn)     \
 253 asm(".section \".text\"\n"                 \
 254     "\t.align 2\n"                         \
 255     "\t.type "__fname",@function\n"        \
 256     __fname":\n"                           \
 257     "\t"__insn"\n"                         \
 258     "\tblr\n"                              \
 259     "\t.previous\n"                        \
 260     )
 261 #else
 262 #if defined(VGP_ppc64be_linux)
 263 #define ASSEMBLY_FUNC(__fname, __insn)     \
 264 asm(".section  \".text\"\n"                \
 265     "\t.align 2\n"                         \
 266     "\t.global "__fname"\n"                \
 267     "\t.section \".opd\",\"aw\"\n"         \
 268     "\t.align 3\n"                         \
 269     ""__fname":\n"                         \
 270     "\t.quad ."__fname",.TOC.@tocbase,0\n" \
 271     "\t.previous\n"                        \
 272     "\t.type ."__fname",@function\n"       \
 273     "\t.global  ."__fname"\n"              \
 274     "."__fname":\n"                        \
 275     "\t"__insn"\n"                         \
 276     "\tblr\n"                              \
 277     )
 278 #elif defined(VGP_ppc64le_linux)
 279 #define ASSEMBLY_FUNC(__fname, __insn)     \
 280 asm(".section  \".text\"\n"         \
 281     "\t.align 2\n"                         \
 282     "\t.global "__fname"\n"                \
 283     ""__fname":\n"                         \
 284     "\t"__insn"\n"                         \
 285     "\tblr\n"                              \
 286     )
 287 #endif // VGP_ppc64 or VGP_ppc64le
 288 #endif // #ifndef __powerpc64__
 289
 290
 291 /* Return a pointer to a 1-page area where is is safe to both write
 292    and execute instructions.  Area is filled with 'trap' insns. */
 293 static
 294 uint32_t* get_rwx_area ( void )
 295 {
 296    int i;
 297    static uint32_t* p = NULL;
 298    if (p == NULL) {
 299       p = mmap(NULL, 4096, PROT_READ|PROT_WRITE|PROT_EXEC,
 300                            MAP_PRIVATE|MAP_ANONYMOUS, -1, 0);
 301       assert(p != MAP_FAILED);
 302    }
 303
 304    for (i = 0; i < 4096/sizeof(uint32_t); i++)
 305       p[i] = 0x7fe00008; /* trap */
 306
 307    return p;
 308 }
 309
 310
 311 /* -------------- BEGIN #include "test-ppc.h" -------------- */
 312 /*
 313  * test-ppc.h:
 314  * PPC tests for qemu-PPC CPU emulation checks - definitions
 315  *
 316  * Copyright (c) 2005 Jocelyn Mayer
 317  *
 318  *   This program is free software; you can redistribute it and/or
 319  *   modify it under the terms of the GNU General Public License V2
 320  *   as published by the Free Software Foundation
 321  *
 322  *   This program is distributed in the hope that it will be useful,
 323  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
 324  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 325  *   GNU General Public License for more details.
 326  *
 327  *   You should have received a copy of the GNU General Public License
 328  *   along with this program; if not, see <http://www.gnu.org/licenses/>.
 329  */
 330
 331 #if !defined (__TEST_PPC_H__)
 332 #define __TEST_PPC_H__
 333
 334 #include <stdint.h>
 335
 336 typedef void (*test_func_t) (void);
 337 typedef struct test_t test_t;
 338 typedef struct test_table_t test_table_t;
 339 struct test_t {
 340     test_func_t func;
 341     const char *name;
 342 };
 343
 344 struct test_table_t {
 345     test_t *tests;
 346     const char *name;
 347     uint32_t flags;
 348 };
 349
 350 typedef void (*test_loop_t) (const char *name, test_func_t func,
 351                              uint32_t flags);
 352
 353 enum test_flags {
 354     /* Nb arguments */
 355     PPC_ONE_ARG    = 0x00000001,
 356     PPC_TWO_ARGS   = 0x00000002,
 357     PPC_THREE_ARGS = 0x00000003,
 358     PPC_CMP_ARGS   = 0x00000004,  // family: compare
 359     PPC_CMPI_ARGS  = 0x00000005,  // family: compare
 360     PPC_TWO_I16    = 0x00000006,  // family: arith/logical
 361     PPC_SPECIAL    = 0x00000007,  // family: logical
 362     PPC_LD_ARGS    = 0x00000008,  // family: ldst
 363     PPC_LDX_ARGS   = 0x00000009,  // family: ldst
 364     PPC_ST_ARGS    = 0x0000000A,  // family: ldst
 365     PPC_STX_ARGS   = 0x0000000B,  // family: ldst
 366     PPC_ONE_IMM    = 0x0000000C,  // PPC_MISC family
 367     PPC_NB_ARGS    = 0x0000000F,
 368     /* Type */
 369     PPC_ARITH      = 0x00000100,
 370     PPC_LOGICAL    = 0x00000200,
 371     PPC_COMPARE    = 0x00000300,
 372     PPC_CROP       = 0x00000400,
 373     PPC_LDST       = 0x00000500,
 374     PPC_POPCNT     = 0x00000600,
 375     PPC_ANY        = 0x00000700,
 376     PPC_TYPE       = 0x00000F00,
 377     /* Family */
 378     PPC_INTEGER    = 0x00010000,
 379     PPC_FLOAT      = 0x00020000,
 380     PPC_405        = 0x00030000,
 381     PPC_ALTIVEC    = 0x00040000,
 382     PPC_FALTIVEC   = 0x00050000,
 383     PPC_MISC       = 0x00060000,
 384     PPC_SH_ALGEBRAIC = 0x00070000,
 385     PPC_MFSPR      = 0x00080000,
 386     PPC_FAMILY     = 0x000F0000,
 387     /* Flags: these may be combined, so use separate bitfields. */
 388     PPC_CR         = 0x01000000,
 389     PPC_XER_CA     = 0x02000000,
 390 };
 391
 392 #endif /* !defined (__TEST_PPC_H__) */
 393
 394 /* -------------- END #include "test-ppc.h" -------------- */
 395
 396
 397
 398
 399 #if defined (DEBUG_ARGS_BUILD)
 400 #define AB_DPRINTF(fmt, args...) do { fprintf(stderr, fmt , ##args); } while (0)
 401 #else
 402 #define AB_DPRINTF(fmt, args...) do { } while (0)
 403 #endif
 404
 405 #if defined (DEBUG_FILTER)
 406 #define FDPRINTF(fmt, args...) do { fprintf(stderr, fmt , ##args); } while (0)
 407 #else
 408 #define FDPRINTF(fmt, args...) do { } while (0)
 409 #endif
 410
 411
 412 /* Produce the 64-bit pattern corresponding to the supplied double. */
 413 static uint64_t double_to_bits ( double d )
 414 {
 415    union { uint64_t i; double d; } u;
 416    assert(8 == sizeof(uint64_t));
 417    assert(8 == sizeof(double));
 418    assert(8 == sizeof(u));
 419    u.d = d;
 420    return u.i;
 421 }
 422
 423 #if 0
 424 static float bits_to_float ( uint32_t i )
 425 {
 426    union { uint32_t i; float f; } u;
 427    assert(4 == sizeof(uint32_t));
 428    assert(4 == sizeof(float));
 429    assert(4 == sizeof(u));
 430    u.i = i;
 431    return u.f;
 432 }
 433 #endif
 434
 435
 436 #if defined (HAS_ALTIVEC)
 437 static void AB_DPRINTF_VEC32x4 ( vector unsigned int v )
 438 {
 439 #if defined (DEBUG_ARGS_BUILD)
 440    int i;
 441    unsigned int* p_int = (unsigned int*)&v;
 442    AB_DPRINTF("val");
 443    for (i=0; i<4; i++) {
 444       AB_DPRINTF(" %08x", p_int[i]);
 445    }
 446    AB_DPRINTF("\n");
 447 #endif
 448 }
 449 #endif
 450
 451
 452 #define unused __attribute__ (( unused ))
 453
 454
 455 /* -------------- BEGIN #include "ops-ppc.c" -------------- */
 456
 457 /* #include "test-ppc.h" */
 458
 459 static void test_add (void)
 460 {
 461     __asm__ __volatile__ ("add          17, 14, 15");
 462 }
 463
 464 static void test_addo (void)
 465 {
 466     __asm__ __volatile__ ("addo         17, 14, 15");
 467 }
 468
 469 static void test_addc (void)
 470 {
 471     __asm__ __volatile__ ("addc         17, 14, 15");
 472 }
 473
 474 static void test_addco (void)
 475 {
 476     __asm__ __volatile__ ("addco        17, 14, 15");
 477 }
 478
 479 static void test_divw (void)
 480 {
 481     __asm__ __volatile__ ("divw         17, 14, 15");
 482 }
 483
 484 static void test_divwo (void)
 485 {
 486     __asm__ __volatile__ ("divwo        17, 14, 15");
 487 }
 488
 489 static void test_divwu (void)
 490 {
 491     __asm__ __volatile__ ("divwu        17, 14, 15");
 492 }
 493
 494 static void test_divwuo (void)
 495 {
 496     __asm__ __volatile__ ("divwuo       17, 14, 15");
 497 }
 498
 499 static void test_mulhw (void)
 500 {
 501     __asm__ __volatile__ ("mulhw        17, 14, 15");
 502 }
 503
 504 static void test_mulhwu (void)
 505 {
 506     __asm__ __volatile__ ("mulhwu       17, 14, 15");
 507 }
 508
 509 static void test_mullw (void)
 510 {
 511     __asm__ __volatile__ ("mullw        17, 14, 15");
 512 }
 513
 514 static void test_mullwo (void)
 515 {
 516     __asm__ __volatile__ ("mullwo       17, 14, 15");
 517 }
 518
 519 static void test_subf (void)
 520 {
 521     __asm__ __volatile__ ("subf         17, 14, 15");
 522 }
 523
 524 static void test_subfo (void)
 525 {
 526     __asm__ __volatile__ ("subfo        17, 14, 15");
 527 }
 528
 529 static void test_subfc (void)
 530 {
 531     __asm__ __volatile__ ("subfc        17, 14, 15");
 532 }
 533
 534 static void test_subfco (void)
 535 {
 536     __asm__ __volatile__ ("subfco       17, 14, 15");
 537 }
 538
 539 #ifdef __powerpc64__
 540 static void test_mulld (void)
 541 {
 542     __asm__ __volatile__ ("mulld        17, 14, 15");
 543 }
 544
 545 static void test_mulldo (void)
 546 {
 547     __asm__ __volatile__ ("mulldo        17, 14, 15");
 548 }
 549
 550 static void test_mulhd (void)
 551 {
 552     __asm__ __volatile__ ("mulhd        17, 14, 15");
 553 }
 554
 555 static void test_mulhdu (void)
 556 {
 557     __asm__ __volatile__ ("mulhdu       17, 14, 15");
 558 }
 559
 560 static void test_divd (void)
 561 {
 562     __asm__ __volatile__ ("divd         17, 14, 15");
 563 }
 564
 565 static void test_divdu (void)
 566 {
 567     __asm__ __volatile__ ("divdu        17, 14, 15");
 568 }
 569
 570 static void test_divdo (void)
 571 {
 572     __asm__ __volatile__ ("divdo        17, 14, 15");
 573 }
 574
 575 static void test_divduo (void)
 576 {
 577     __asm__ __volatile__ ("divduo        17, 14, 15");
 578 }
 579 #endif // #ifdef __powerpc64__
 580
 581 static test_t tests_ia_ops_two[] = {
 582     { &test_add             , "         add", },
 583     { &test_addo            , "        addo", },
 584     { &test_addc            , "        addc", },
 585     { &test_addco           , "       addco", },
 586     { &test_divw            , "        divw", },
 587     { &test_divwo           , "       divwo", },
 588     { &test_divwu           , "       divwu", },
 589     { &test_divwuo          , "      divwuo", },
 590     { &test_mulhw           , "       mulhw", },
 591     { &test_mulhwu          , "      mulhwu", },
 592     { &test_mullw           , "       mullw", },
 593     { &test_mullwo          , "      mullwo", },
 594     { &test_subf            , "        subf", },
 595     { &test_subfo           , "       subfo", },
 596     { &test_subfc           , "       subfc", },
 597     { &test_subfco          , "      subfco", },
 598 #ifdef __powerpc64__
 599     { &test_mulhd           , "       mulhd", },
 600     { &test_mulhdu          , "      mulhdu", },
 601     { &test_mulld           , "       mulld", },
 602     { &test_mulldo          , "      mulldo", },
 603     { &test_divd            , "        divd", },
 604     { &test_divdu           , "       divdu", },
 605     { &test_divdo           , "       divdo", },
 606     { &test_divduo          , "      divduo", },
 607 #endif // #ifdef __powerpc64__
 608     { NULL,                   NULL,           },
 609 };
 610
 611 static void test_add_ (void)
 612 {
 613     __asm__ __volatile__ ("add.         17, 14, 15");
 614 }
 615
 616 static void test_addo_ (void)
 617 {
 618     __asm__ __volatile__ ("addo.        17, 14, 15");
 619 }
 620
 621 static void test_addc_ (void)
 622 {
 623     __asm__ __volatile__ ("addc.        17, 14, 15");
 624 }
 625
 626 static void test_addco_ (void)
 627 {
 628     __asm__ __volatile__ ("addco.       17, 14, 15");
 629 }
 630
 631 static void test_divw_ (void)
 632 {
 633     __asm__ __volatile__ ("divw.        17, 14, 15");
 634 }
 635
 636 static void test_divwo_ (void)
 637 {
 638     __asm__ __volatile__ ("divwo.       17, 14, 15");
 639 }
 640
 641 static void test_divwu_ (void)
 642 {
 643     __asm__ __volatile__ ("divwu.       17, 14, 15");
 644 }
 645
 646 static void test_divwuo_ (void)
 647 {
 648     __asm__ __volatile__ ("divwuo.      17, 14, 15");
 649 }
 650
 651 static void test_mulhw_ (void)
 652 {
 653     __asm__ __volatile__ ("mulhw.       17, 14, 15");
 654 }
 655
 656 static void test_mulhwu_ (void)
 657 {
 658     __asm__ __volatile__ ("mulhwu.      17, 14, 15");
 659 }
 660
 661 static void test_mullw_ (void)
 662 {
 663     __asm__ __volatile__ ("mullw.       17, 14, 15");
 664 }
 665
 666 static void test_mullwo_ (void)
 667 {
 668     __asm__ __volatile__ ("mullwo.      17, 14, 15");
 669 }
 670
 671 static void test_subf_ (void)
 672 {
 673     __asm__ __volatile__ ("subf.        17, 14, 15");
 674 }
 675
 676 static void test_subfo_ (void)
 677 {
 678     __asm__ __volatile__ ("subfo.       17, 14, 15");
 679 }
 680
 681 static void test_subfc_ (void)
 682 {
 683     __asm__ __volatile__ ("subfc.       17, 14, 15");
 684 }
 685
 686 static void test_subfco_ (void)
 687 {
 688     __asm__ __volatile__ ("subfco.      17, 14, 15");
 689 }
 690
 691 #ifdef __powerpc64__
 692 static void test_mulhd_ (void)
 693 {
 694     __asm__ __volatile__ ("mulhd.       17, 14, 15");
 695 }
 696
 697 static void test_mulhdu_ (void)
 698 {
 699     __asm__ __volatile__ ("mulhdu.      17, 14, 15");
 700 }
 701
 702 static void test_mulld_ (void)
 703 {
 704     __asm__ __volatile__ ("mulld.       17, 14, 15");
 705 }
 706
 707 static void test_mulldo_ (void)
 708 {
 709     __asm__ __volatile__ ("mulldo.       17, 14, 15");
 710 }
 711
 712 static void test_divd_ (void)
 713 {
 714     __asm__ __volatile__ ("divd.        17, 14, 15");
 715 }
 716
 717 static void test_divdu_ (void)
 718 {
 719     __asm__ __volatile__ ("divdu.       17, 14, 15");
 720 }
 721
 722 static void test_divdo_ (void)
 723 {
 724     __asm__ __volatile__ ("divdo.        17, 14, 15");
 725 }
 726
 727 static void test_divduo_ (void)
 728 {
 729     __asm__ __volatile__ ("divduo.       17, 14, 15");
 730 }
 731 #endif // #ifdef __powerpc64__
 732
 733 static test_t tests_iar_ops_two[] = {
 734     { &test_add_            , "        add.", },
 735     { &test_addo_           , "       addo.", },
 736     { &test_addc_           , "       addc.", },
 737     { &test_addco_          , "      addco.", },
 738     { &test_divw_           , "       divw.", },
 739     { &test_divwo_          , "      divwo.", },
 740     { &test_divwu_          , "      divwu.", },
 741     { &test_divwuo_         , "     divwuo.", },
 742     { &test_mulhw_          , "      mulhw.", },
 743     { &test_mulhwu_         , "     mulhwu.", },
 744     { &test_mullw_          , "      mullw.", },
 745     { &test_mullwo_         , "     mullwo.", },
 746     { &test_subf_           , "       subf.", },
 747     { &test_subfo_          , "      subfo.", },
 748     { &test_subfc_          , "      subfc.", },
 749     { &test_subfco_         , "     subfco.", },
 750 #ifdef __powerpc64__
 751     { &test_mulhd_          , "      mulhd.", },
 752     { &test_mulhdu_         , "     mulhdu.", },
 753     { &test_mulld_          , "      mulld.", },
 754     { &test_mulldo_          , "    mulldo.", },
 755     { &test_divd_           , "       divd.", },
 756     { &test_divdu_          , "      divdu.", },
 757     { &test_divdo_          , "      divdo.", },
 758     { &test_divduo_         , "     divduo.", },
 759 #endif // #ifdef __powerpc64__
 760     { NULL,                   NULL,           },
 761 };
 762
 763 static void test_adde (void)
 764 {
 765     __asm__ __volatile__ ("adde         17, 14, 15");
 766 }
 767
 768 static void test_addeo (void)
 769 {
 770     __asm__ __volatile__ ("addeo        17, 14, 15");
 771 }
 772
 773 static void test_subfe (void)
 774 {
 775     __asm__ __volatile__ ("subfe        17, 14, 15");
 776 }
 777
 778 static void test_subfeo (void)
 779 {
 780     __asm__ __volatile__ ("subfeo       17, 14, 15");
 781 }
 782
 783 static test_t tests_iac_ops_two[] = {
 784     { &test_adde            , "        adde", },
 785     { &test_addeo           , "       addeo", },
 786     { &test_subfe           , "       subfe", },
 787     { &test_subfeo          , "      subfeo", },
 788     { NULL,                   NULL,           },
 789 };
 790
 791 static void test_adde_ (void)
 792 {
 793     __asm__ __volatile__ ("adde.        17, 14, 15");
 794 }
 795
 796 static void test_addeo_ (void)
 797 {
 798     __asm__ __volatile__ ("addeo.       17, 14, 15");
 799 }
 800
 801 static void test_subfe_ (void)
 802 {
 803     __asm__ __volatile__ ("subfe.       17, 14, 15");
 804 }
 805
 806 static void test_subfeo_ (void)
 807 {
 808     __asm__ __volatile__ ("subfeo.      17, 14, 15");
 809 }
 810
 811 static test_t tests_iacr_ops_two[] = {
 812     { &test_adde_           , "       adde.", },
 813     { &test_addeo_          , "      addeo.", },
 814     { &test_subfe_          , "      subfe.", },
 815     { &test_subfeo_         , "     subfeo.", },
 816     { NULL,                   NULL,           },
 817 };
 818
 819 static void test_and (void)
 820 {
 821     __asm__ __volatile__ ("and          17, 14, 15");
 822 }
 823
 824 static void test_andc (void)
 825 {
 826     __asm__ __volatile__ ("andc         17, 14, 15");
 827 }
 828
 829 static void test_eqv (void)
 830 {
 831     __asm__ __volatile__ ("eqv          17, 14, 15");
 832 }
 833
 834 static void test_nand (void)
 835 {
 836     __asm__ __volatile__ ("nand         17, 14, 15");
 837 }
 838
 839 static void test_nor (void)
 840 {
 841     __asm__ __volatile__ ("nor          17, 14, 15");
 842 }
 843
 844 static void test_or (void)
 845 {
 846     __asm__ __volatile__ ("or           17, 14, 15");
 847 }
 848
 849 static void test_orc (void)
 850 {
 851     __asm__ __volatile__ ("orc          17, 14, 15");
 852 }
 853
 854 static void test_xor (void)
 855 {
 856     __asm__ __volatile__ ("xor          17, 14, 15");
 857 }
 858
 859 static void test_slw (void)
 860 {
 861     __asm__ __volatile__ ("slw          17, 14, 15");
 862 }
 863
 864 static void test_sraw (void)
 865 {
 866     __asm__ __volatile__ ("sraw         17, 14, 15");
 867 }
 868
 869 static void test_srw (void)
 870 {
 871     __asm__ __volatile__ ("srw          17, 14, 15");
 872 }
 873
 874 #ifdef __powerpc64__
 875 static void test_sld (void)
 876 {
 877     __asm__ __volatile__ ("sld          17, 14, 15");
 878 }
 879
 880 static void test_srad (void)
 881 {
 882     __asm__ __volatile__ ("srad         17, 14, 15");
 883 }
 884
 885 static void test_srd (void)
 886 {
 887     __asm__ __volatile__ ("srd          17, 14, 15");
 888 }
 889 #endif // #ifdef __powerpc64__
 890
 891 static test_t tests_il_ops_two_sh[] = {
 892     { &test_sraw            , "        sraw", },
 893 #ifdef __powerpc64__
 894     { &test_srad            , "        srad", },
 895 #endif // #ifdef __powerpc64__
 896     { NULL,                   NULL,           },
 897 };
 898
 899 static test_t tests_il_ops_two[] = {
 900     { &test_and             , "         and", },
 901     { &test_andc            , "        andc", },
 902     { &test_eqv             , "         eqv", },
 903     { &test_nand            , "        nand", },
 904     { &test_nor             , "         nor", },
 905     { &test_or              , "          or", },
 906     { &test_orc             , "         orc", },
 907     { &test_xor             , "         xor", },
 908     { &test_slw             , "         slw", },
 909     { &test_srw             , "         srw", },
 910 #ifdef __powerpc64__
 911     { &test_sld             , "         sld", },
 912     { &test_srd             , "         srd", },
 913 #endif // #ifdef __powerpc64__
 914     { NULL,                   NULL,           },
 915 };
 916
 917 static void test_and_ (void)
 918 {
 919     __asm__ __volatile__ ("and.         17, 14, 15");
 920 }
 921
 922 static void test_andc_ (void)
 923 {
 924     __asm__ __volatile__ ("andc.        17, 14, 15");
 925 }
 926
 927 static void test_eqv_ (void)
 928 {
 929     __asm__ __volatile__ ("eqv.         17, 14, 15");
 930 }
 931
 932 static void test_nand_ (void)
 933 {
 934     __asm__ __volatile__ ("nand.        17, 14, 15");
 935 }
 936
 937 static void test_nor_ (void)
 938 {
 939     __asm__ __volatile__ ("nor.         17, 14, 15");
 940 }
 941
 942 static void test_or_ (void)
 943 {
 944     __asm__ __volatile__ ("or.          17, 14, 15");
 945 }
 946
 947 static void test_orc_ (void)
 948 {
 949     __asm__ __volatile__ ("orc.         17, 14, 15");
 950 }
 951
 952 static void test_xor_ (void)
 953 {
 954     __asm__ __volatile__ ("xor.         17, 14, 15");
 955 }
 956
 957 static void test_slw_ (void)
 958 {
 959     __asm__ __volatile__ ("slw.         17, 14, 15");
 960 }
 961
 962 static void test_sraw_ (void)
 963 {
 964     __asm__ __volatile__ ("sraw.        17, 14, 15");
 965 }
 966
 967 static void test_srw_ (void)
 968 {
 969     __asm__ __volatile__ ("srw.         17, 14, 15");
 970 }
 971
 972 #ifdef __powerpc64__
 973 static void test_sld_ (void)
 974 {
 975     __asm__ __volatile__ ("sld.         17, 14, 15");
 976 }
 977
 978 static void test_srad_ (void)
 979 {
 980     __asm__ __volatile__ ("srad.        17, 14, 15");
 981 }
 982
 983 static void test_srd_ (void)
 984 {
 985     __asm__ __volatile__ ("srd.         17, 14, 15");
 986 }
 987 #endif // #ifdef __powerpc64__
 988
 989 static test_t tests_ilr_ops_two_sh[] = {
 990     { &test_sraw_           , "       sraw.", },
 991 #ifdef __powerpc64__
 992     { &test_srad_           , "       srad.", },
 993 #endif // #ifdef __powerpc64__
 994     { NULL,                   NULL,           },
 995 };
 996
 997 static test_t tests_ilr_ops_two[] = {
 998     { &test_and_            , "        and.", },
 999     { &test_andc_           , "       andc.", },
1000     { &test_eqv_            , "        eqv.", },
1001     { &test_nand_           , "       nand.", },
1002     { &test_nor_            , "        nor.", },
1003     { &test_or_             , "         or.", },
1004     { &test_orc_            , "        orc.", },
1005     { &test_xor_            , "        xor.", },
1006     { &test_slw_            , "        slw.", },
1007     { &test_srw_            , "        srw.", },
1008 #ifdef __powerpc64__
1009     { &test_sld_            , "        sld.", },
1010     { &test_srd_            , "        srd.", },
1011 #endif // #ifdef __powerpc64__
1012     { NULL,                   NULL,           },
1013 };
1014
1015 static void test_cmpw (void)
1016 {
1017     __asm__ __volatile__ ("cmpw         2, 14, 15");
1018 }
1019
1020 static void test_cmplw (void)
1021 {
1022     __asm__ __volatile__ ("cmplw        2, 14, 15");
1023 }
1024
1025 #ifdef __powerpc64__
1026 static void test_cmpd (void)
1027 {
1028     __asm__ __volatile__ ("cmpd         2, 14, 15");
1029 }
1030
1031 static void test_cmpld (void)
1032 {
1033     __asm__ __volatile__ ("cmpld        2, 14, 15");
1034 }
1035 #endif // #ifdef __powerpc64__
1036
1037 static test_t tests_icr_ops_two[] = {
1038     { &test_cmpw            , "        cmpw", },
1039     { &test_cmplw           , "       cmplw", },
1040 #ifdef __powerpc64__
1041     { &test_cmpd            , "        cmpd", },
1042     { &test_cmpld           , "       cmpld", },
1043 #endif // #ifdef __powerpc64__
1044     { NULL,                   NULL,           },
1045 };
1046
1047 extern void test_cmpwi (void);
1048 ASSEMBLY_FUNC("test_cmpwi", "cmpwi         2, 14, 0");
1049
1050 extern void test_cmplwi (void);
1051 ASSEMBLY_FUNC("test_cmplwi", "cmplwi        2, 14, 0");
1052
1053 #ifdef __powerpc64__
1054 extern void test_cmpdi (void);
1055 ASSEMBLY_FUNC("test_cmpdi", "cmpdi        2, 14, 0");
1056
1057 extern void test_cmpldi (void);
1058 ASSEMBLY_FUNC("test_cmpldi", "cmpldi       2, 14, 0");
1059 #endif // #ifdef __powerpc64__
1060
1061 static test_t tests_icr_ops_two_i16[] = {
1062     { &test_cmpwi           , "       cmpwi", },
1063     { &test_cmplwi          , "      cmplwi", },
1064 #ifdef __powerpc64__
1065     { &test_cmpdi           , "       cmpdi", },
1066     { &test_cmpldi          , "      cmpldi", },
1067 #endif // #ifdef __powerpc64__
1068     { NULL,                   NULL,           },
1069 };
1070
1071 extern void test_addi (void);
1072 ASSEMBLY_FUNC("test_addi", "addi         17, 14, 0");
1073
1074 extern void test_addic (void);
1075 ASSEMBLY_FUNC("test_addic", "addic        17, 14, 0");
1076
1077 extern void test_addis (void);
1078 ASSEMBLY_FUNC("test_addis", "addis        17, 14, 0");
1079
1080 extern void test_mulli (void);
1081 ASSEMBLY_FUNC("test_mulli", "mulli        17, 14, 0");
1082
1083 extern void test_subfic (void);
1084 ASSEMBLY_FUNC("test_subfic", "subfic       17, 14, 0");
1085
1086 static test_t tests_ia_ops_two_i16[] = {
1087     { &test_addi            , "        addi", },
1088     { &test_addic           , "       addic", },
1089     { &test_addis           , "       addis", },
1090     { &test_mulli           , "       mulli", },
1091     { &test_subfic          , "      subfic", },
1092     { NULL,                   NULL,           },
1093 };
1094
1095 extern void test_addic_ (void);
1096 ASSEMBLY_FUNC("test_addic_", "addic.       17, 14, 0");
1097
1098 static test_t tests_iar_ops_two_i16[] = {
1099     { &test_addic_          , "      addic.", },
1100     { NULL,                   NULL,           },
1101 };
1102
1103 extern void test_ori (void);
1104 ASSEMBLY_FUNC("test_ori", "ori       17, 14, 0");
1105
1106 extern void test_oris (void);
1107 ASSEMBLY_FUNC("test_oris", "oris       17, 14, 0");
1108
1109 extern void test_xori (void);
1110 ASSEMBLY_FUNC("test_xori", "xori       17, 14, 0");
1111
1112 extern void test_xoris (void);
1113 ASSEMBLY_FUNC("test_xoris", "xoris       17, 14, 0");
1114
1115 static test_t tests_il_ops_two_i16[] = {
1116     { &test_ori             , "         ori", },
1117     { &test_oris            , "        oris", },
1118     { &test_xori            , "        xori", },
1119     { &test_xoris           , "       xoris", },
1120     { NULL,                   NULL,           },
1121 };
1122
1123 extern void test_andi_ (void);
1124 ASSEMBLY_FUNC("test_andi_", "andi.       17, 14, 0");
1125
1126 extern void test_andis_ (void);
1127 ASSEMBLY_FUNC("test_andis_", "andis.      17, 14, 0");
1128
1129 static test_t tests_ilr_ops_two_i16[] = {
1130     { &test_andi_           , "       andi.", },
1131     { &test_andis_          , "      andis.", },
1132     { NULL,                   NULL,           },
1133 };
1134
1135 static void test_crand (void)
1136 {
1137     __asm__ __volatile__ ("crand        17, 14, 15");
1138 }
1139
1140 static void test_crandc (void)
1141 {
1142     __asm__ __volatile__ ("crandc       17, 14, 15");
1143 }
1144
1145 static void test_creqv (void)
1146 {
1147     __asm__ __volatile__ ("creqv        17, 14, 15");
1148 }
1149
1150 static void test_crnand (void)
1151 {
1152     __asm__ __volatile__ ("crnand       17, 14, 15");
1153 }
1154
1155 static void test_crnor (void)
1156 {
1157     __asm__ __volatile__ ("crnor        17, 14, 15");
1158 }
1159
1160 static void test_cror (void)
1161 {
1162     __asm__ __volatile__ ("cror         17, 14, 15");
1163 }
1164
1165 static void test_crorc (void)
1166 {
1167     __asm__ __volatile__ ("crorc        17, 14, 15");
1168 }
1169
1170 static void test_crxor (void)
1171 {
1172     __asm__ __volatile__ ("crxor        17, 14, 15");
1173 }
1174
1175 static test_t tests_crl_ops_two[] = {
1176     { &test_crand           , "       crand", },
1177     { &test_crandc          , "      crandc", },
1178     { &test_creqv           , "       creqv", },
1179     { &test_crnand          , "      crnand", },
1180     { &test_crnor           , "       crnor", },
1181     { &test_cror            , "        cror", },
1182     { &test_crorc           , "       crorc", },
1183     { &test_crxor           , "       crxor", },
1184     { NULL,                   NULL,           },
1185 };
1186
1187 static void test_addme (void)
1188 {
1189     __asm__ __volatile__ ("addme        17, 14");
1190 }
1191
1192 static void test_addmeo (void)
1193 {
1194     __asm__ __volatile__ ("addmeo       17, 14");
1195 }
1196
1197 static void test_addze (void)
1198 {
1199     __asm__ __volatile__ ("addze        17, 14");
1200 }
1201
1202 static void test_addzeo (void)
1203 {
1204     __asm__ __volatile__ ("addzeo       17, 14");
1205 }
1206
1207 static void test_subfme (void)
1208 {
1209     __asm__ __volatile__ ("subfme       17, 14");
1210 }
1211
1212 static void test_subfmeo (void)
1213 {
1214     __asm__ __volatile__ ("subfmeo      17, 14");
1215 }
1216
1217 static void test_subfze (void)
1218 {
1219     __asm__ __volatile__ ("subfze       17, 14");
1220 }
1221
1222 static void test_subfzeo (void)
1223 {
1224     __asm__ __volatile__ ("subfzeo      17, 14");
1225 }
1226
1227 static test_t tests_iac_ops_one[] = {
1228     { &test_addme           , "       addme", },
1229     { &test_addmeo          , "      addmeo", },
1230     { &test_addze           , "       addze", },
1231     { &test_addzeo          , "      addzeo", },
1232     { &test_subfme          , "      subfme", },
1233     { &test_subfmeo         , "     subfmeo", },
1234     { &test_subfze          , "      subfze", },
1235     { &test_subfzeo         , "     subfzeo", },
1236     { NULL,                   NULL,           },
1237 };
1238
1239 static void test_addme_ (void)
1240 {
1241     __asm__ __volatile__ ("addme.       17, 14");
1242 }
1243
1244 static void test_addmeo_ (void)
1245 {
1246     __asm__ __volatile__ ("addmeo.      17, 14");
1247 }
1248
1249 static void test_addze_ (void)
1250 {
1251     __asm__ __volatile__ ("addze.       17, 14");
1252 }
1253
1254 static void test_addzeo_ (void)
1255 {
1256     __asm__ __volatile__ ("addzeo.      17, 14");
1257 }
1258
1259 static void test_subfme_ (void)
1260 {
1261     __asm__ __volatile__ ("subfme.      17, 14");
1262 }
1263
1264 static void test_subfmeo_ (void)
1265 {
1266     __asm__ __volatile__ ("subfmeo.     17, 14");
1267 }
1268
1269 static void test_subfze_ (void)
1270 {
1271     __asm__ __volatile__ ("subfze.      17, 14");
1272 }
1273
1274 static void test_subfzeo_ (void)
1275 {
1276     __asm__ __volatile__ ("subfzeo.     17, 14");
1277 }
1278
1279 static test_t tests_iacr_ops_one[] = {
1280     { &test_addme_          , "      addme.", },
1281     { &test_addmeo_         , "     addmeo.", },
1282     { &test_addze_          , "      addze.", },
1283     { &test_addzeo_         , "     addzeo.", },
1284     { &test_subfme_         , "     subfme.", },
1285     { &test_subfmeo_        , "    subfmeo.", },
1286     { &test_subfze_         , "     subfze.", },
1287     { &test_subfzeo_        , "    subfzeo.", },
1288     { NULL,                   NULL,           },
1289 };
1290
1291 static void test_cntlzw (void)
1292 {
1293     __asm__ __volatile__ ("cntlzw       17, 14");
1294 }
1295
1296 static void test_extsb (void)
1297 {
1298     __asm__ __volatile__ ("extsb        17, 14");
1299 }
1300
1301 static void test_extsh (void)
1302 {
1303     __asm__ __volatile__ ("extsh        17, 14");
1304 }
1305
1306 static void test_neg (void)
1307 {
1308     __asm__ __volatile__ ("neg          17, 14");
1309 }
1310
1311 static void test_nego (void)
1312 {
1313     __asm__ __volatile__ ("nego         17, 14");
1314 }
1315
1316 #ifdef __powerpc64__
1317 static void test_cntlzd (void)
1318 {
1319     __asm__ __volatile__ ("cntlzd       17, 14");
1320 }
1321
1322 static void test_extsw (void)
1323 {
1324     __asm__ __volatile__ ("extsw        17, 14");
1325 }
1326 #endif // #ifdef __powerpc64__
1327
1328 static test_t tests_il_ops_one[] = {
1329     { &test_cntlzw          , "      cntlzw", },
1330     { &test_extsb           , "       extsb", },
1331     { &test_extsh           , "       extsh", },
1332     { &test_neg             , "         neg", },
1333     { &test_nego            , "        nego", },
1334 #ifdef __powerpc64__
1335     { &test_cntlzd          , "      cntlzd", },
1336     { &test_extsw           , "       extsw", },
1337 #endif // #ifdef __powerpc64__
1338     { NULL,                   NULL,           },
1339 };
1340
1341 static void test_cntlzw_ (void)
1342 {
1343     __asm__ __volatile__ ("cntlzw.      17, 14");
1344 }
1345
1346 static void test_extsb_ (void)
1347 {
1348     __asm__ __volatile__ ("extsb.       17, 14");
1349 }
1350
1351 static void test_extsh_ (void)
1352 {
1353     __asm__ __volatile__ ("extsh.       17, 14");
1354 }
1355
1356 static void test_neg_ (void)
1357 {
1358     __asm__ __volatile__ ("neg.         17, 14");
1359 }
1360
1361 static void test_nego_ (void)
1362 {
1363     __asm__ __volatile__ ("nego.        17, 14");
1364 }
1365
1366 #ifdef __powerpc64__
1367 static void test_cntlzd_ (void)
1368 {
1369     __asm__ __volatile__ ("cntlzd.      17, 14");
1370 }
1371
1372 static void test_extsw_ (void)
1373 {
1374     __asm__ __volatile__ ("extsw.       17, 14");
1375 }
1376 #endif // #ifdef __powerpc64__
1377
1378 static test_t tests_ilr_ops_one[] = {
1379     { &test_cntlzw_         , "     cntlzw.", },
1380     { &test_extsb_          , "      extsb.", },
1381     { &test_extsh_          , "      extsh.", },
1382     { &test_neg_            , "        neg.", },
1383     { &test_nego_           , "       nego.", },
1384 #ifdef __powerpc64__
1385     { &test_cntlzd_         , "     cntlzd.", },
1386     { &test_extsw_          , "      extsw.", },
1387 #endif // #ifdef __powerpc64__
1388     { NULL,                   NULL,           },
1389 };
1390
1391 extern void test_rlwimi (void);
1392 ASSEMBLY_FUNC("test_rlwimi", "rlwimi      17, 14, 0, 0, 0");
1393
1394 extern void test_rlwinm (void);
1395 ASSEMBLY_FUNC("test_rlwinm", "rlwinm      17, 14, 0, 0, 0");
1396
1397 extern void test_rlwnm (void);
1398 ASSEMBLY_FUNC("test_rlwnm", "rlwnm      17, 14, 15, 0, 0");
1399
1400 extern void test_srawi (void);
1401 ASSEMBLY_FUNC("test_srawi", "srawi      17, 14, 0");
1402
1403 static void test_mfcr (void)
1404 {
1405     __asm__ __volatile__ ("mfcr         17");
1406 }
1407
1408 static void test_mfspr (void)
1409 {
1410     __asm__ __volatile__ ("mfspr        17, 1");
1411 }
1412
1413 static void test_mtspr (void)
1414 {
1415     __asm__ __volatile__ ("mtspr        1, 14");
1416 }
1417
1418 #ifdef __powerpc64__
1419 extern void test_rldcl (void);
1420 ASSEMBLY_FUNC("test_rldcl", "rldcl       17, 14, 15, 0");
1421
1422 extern void test_rldcr (void);
1423 ASSEMBLY_FUNC("test_rldcr", "rldcr       17, 14, 15, 0");
1424
1425 extern void test_rldic (void);
1426 ASSEMBLY_FUNC("test_rldic", "rldic       17, 14, 0, 0");
1427
1428 extern void test_rldicl (void);
1429 ASSEMBLY_FUNC("test_rldicl", "rldicl      17, 14, 0, 0");
1430
1431 extern void test_rldicr (void);
1432 ASSEMBLY_FUNC("test_rldicr", "rldicr      17, 14, 0, 0");
1433
1434 extern void test_rldimi (void);
1435 ASSEMBLY_FUNC("test_rldimi", "rldimi      17, 14, 0, 0");
1436
1437 extern void test_sradi (void);
1438 ASSEMBLY_FUNC("test_sradi", "sradi      17, 14, 0");
1439 #endif // #ifdef __powerpc64__
1440
1441 static test_t tests_il_ops_spe_sh[] = {
1442     { &test_srawi           , "       srawi", },
1443 #ifdef __powerpc64__
1444     { &test_sradi           , "       sradi", },
1445 #endif // #ifdef __powerpc64__
1446     { NULL,                   NULL,           },
1447 };
1448 static test_t tests_il_ops_mfspr[] = {
1449     { &test_mfspr           , "       mfspr", },
1450     { &test_mtspr           , "       mtspr", },
1451     { NULL,                   NULL,           },
1452 };
1453
1454 static test_t tests_il_ops_spe[] = {
1455     { &test_rlwimi          , "      rlwimi", },
1456     { &test_rlwinm          , "      rlwinm", },
1457     { &test_rlwnm           , "       rlwnm", },
1458     { &test_mfcr            , "        mfcr", },
1459 #ifdef __powerpc64__
1460     { &test_rldcl           , "       rldcl", },
1461     { &test_rldcr           , "       rldcr", },
1462     { &test_rldic           , "       rldic", },
1463     { &test_rldicl          , "      rldicl", },
1464     { &test_rldicr          , "      rldicr", },
1465     { &test_rldimi          , "      rldimi", },
1466 #endif // #ifdef __powerpc64__
1467     { NULL,                   NULL,           },
1468 };
1469
1470 extern void test_rlwimi_ (void);
1471 ASSEMBLY_FUNC("test_rlwimi_", "rlwimi.      17, 14, 0, 0, 0");
1472
1473 extern void test_rlwinm_ (void);
1474 ASSEMBLY_FUNC("test_rlwinm_", "rlwinm.      17, 14, 0, 0, 0");
1475
1476 extern void test_rlwnm_ (void);
1477 ASSEMBLY_FUNC("test_rlwnm_", "rlwnm.      17, 14, 15, 0, 0");
1478
1479 extern void test_srawi_ (void);
1480 ASSEMBLY_FUNC("test_srawi_", "srawi.      17, 14, 0");
1481
1482 extern void test_mcrf (void);
1483 ASSEMBLY_FUNC("test_mcrf", "mcrf      0, 0");
1484
1485 extern void test_mcrxr (void);
1486 ASSEMBLY_FUNC("test_mcrxr", ".machine push; .machine power6;" \
1487               "mcrxr 0; .machine pop");
1488
1489 extern void test_mtcrf (void);
1490 ASSEMBLY_FUNC("test_mtcrf", "mtcrf      0, 14");
1491
1492 #ifdef __powerpc64__
1493 extern void test_rldcl_ (void);
1494 ASSEMBLY_FUNC("test_rldcl_", "rldcl.      17, 14, 15, 0");
1495
1496 extern void test_rldcr_ (void);
1497 ASSEMBLY_FUNC("test_rldcr_", "rldcr.      17, 14, 15, 0");
1498
1499 extern void test_rldic_ (void);
1500 ASSEMBLY_FUNC("test_rldic_", "rldic.      17, 14, 0, 0");
1501
1502 extern void test_rldicl_ (void);
1503 ASSEMBLY_FUNC("test_rldicl_", "rldicl.     17, 14, 0, 0");
1504
1505 extern void test_rldicr_ (void);
1506 ASSEMBLY_FUNC("test_rldicr_", "rldicr.     17, 14, 0, 0");
1507
1508 extern void test_rldimi_ (void);
1509 ASSEMBLY_FUNC("test_rldimi_", "rldimi.     17, 14, 0, 0");
1510
1511 extern void test_sradi_ (void);
1512 ASSEMBLY_FUNC("test_sradi_", "sradi.      17, 14, 0");
1513 #endif // #ifdef __powerpc64__
1514
1515 static test_t tests_ilr_ops_spe_sh[] = {
1516     { &test_srawi_          , "      srawi.", },
1517 #ifdef __powerpc64__
1518     { &test_sradi_          , "      sradi.", },
1519 #endif // #ifdef __powerpc64__
1520     { NULL,                   NULL,           },
1521 };
1522 static test_t tests_ilr_ops_spe[] = {
1523     { &test_rlwimi_         , "     rlwimi.", },
1524     { &test_rlwinm_         , "     rlwinm.", },
1525     { &test_rlwnm_          , "      rlwnm.", },
1526     { &test_mcrf            , "        mcrf", },
1527     { &test_mcrxr           , "       mcrxr", },
1528     { &test_mtcrf           , "       mtcrf", },
1529 #ifdef __powerpc64__
1530     { &test_rldcl_          , "      rldcl.", },
1531     { &test_rldcr_          , "      rldcr.", },
1532     { &test_rldic_          , "      rldic.", },
1533     { &test_rldicl_         , "     rldicl.", },
1534     { &test_rldicr_         , "     rldicr.", },
1535     { &test_rldimi_         , "     rldimi.", },
1536 #endif // #ifdef __powerpc64__
1537     { NULL,                   NULL,           },
1538 };
1539
1540 extern void test_lbz (void);
1541 ASSEMBLY_FUNC("test_lbz", "lbz          17,0(14)");
1542
1543 extern void test_lbzu (void);
1544 ASSEMBLY_FUNC("test_lbzu", "lbzu          17,0(14)");
1545
1546 extern void test_lha (void);
1547 ASSEMBLY_FUNC("test_lha", "lha          17,0(14)");
1548
1549 extern void test_lhau (void);
1550 ASSEMBLY_FUNC("test_lhau", "lhau          17,0(14)");
1551
1552 extern void test_lhz (void);
1553 ASSEMBLY_FUNC("test_lhz", "lhz          17,0(14)");
1554
1555 extern void test_lhzu (void);
1556 ASSEMBLY_FUNC("test_lhzu", "lhzu         17,0(14)");
1557
1558 extern void test_lwz (void);
1559 ASSEMBLY_FUNC("test_lwz", "lwz          17,0(14)");
1560
1561 extern void test_lwzu (void);
1562 ASSEMBLY_FUNC("test_lwzu", "lwzu          17,0(14)");
1563
1564 #ifdef __powerpc64__
1565 extern void test_ld (void);
1566 ASSEMBLY_FUNC("test_ld", "ld            17,0(14)");
1567
1568 extern void test_ldu (void);
1569 ASSEMBLY_FUNC("test_ldu", "ldu           17,0(14)");
1570
1571 extern void test_lwa (void);
1572 ASSEMBLY_FUNC("test_lwa", "lwa           17,0(14)");
1573 #endif // #ifdef __powerpc64__
1574
1575 static test_t tests_ild_ops_two_i16[] = {
1576     { &test_lbz             , "         lbz", },
1577     { &test_lbzu            , "        lbzu", },
1578     { &test_lha             , "         lha", },
1579     { &test_lhau            , "        lhau", },
1580     { &test_lhz             , "         lhz", },
1581     { &test_lhzu            , "        lhzu", },
1582     { &test_lwz             , "         lwz", },
1583     { &test_lwzu            , "        lwzu", },
1584 #ifdef __powerpc64__
1585     { &test_ld              , "          ld", },
1586     { &test_ldu             , "         ldu", },
1587     { &test_lwa             , "         lwa", },
1588 #endif // #ifdef __powerpc64__
1589     { NULL,                   NULL,           },
1590 };
1591
1592 static void test_lbzx (void)
1593 {
1594     __asm__ __volatile__ ("lbzx         17,14,15");
1595 }
1596
1597 static void test_lbzux (void)
1598 {
1599     __asm__ __volatile__ ("lbzux        17,14,15");
1600 }
1601
1602 static void test_lhax (void)
1603 {
1604     __asm__ __volatile__ ("lhax         17,14,15");
1605 }
1606
1607 static void test_lhaux (void)
1608 {
1609     __asm__ __volatile__ ("lhaux        17,14,15");
1610 }
1611
1612 static void test_lhzx (void)
1613 {
1614     __asm__ __volatile__ ("lhzx         17,14,15");
1615 }
1616
1617 static void test_lhzux (void)
1618 {
1619     __asm__ __volatile__ ("lhzux        17,14,15");
1620 }
1621
1622 static void test_lwzx (void)
1623 {
1624     __asm__ __volatile__ ("lwzx         17,14,15");
1625 }
1626
1627 static void test_lwzux (void)
1628 {
1629     __asm__ __volatile__ ("lwzux        17,14,15");
1630 }
1631
1632 #ifdef __powerpc64__
1633 static void test_ldx (void)
1634 {
1635     __asm__ __volatile__ ("ldx         17,14,15");
1636 }
1637
1638 static void test_ldux (void)
1639 {
1640     __asm__ __volatile__ ("ldux        17,14,15");
1641 }
1642
1643 static void test_lwax (void)
1644 {
1645     __asm__ __volatile__ ("lwax        17,14,15");
1646 }
1647
1648 static void test_lwaux (void)
1649 {
1650     __asm__ __volatile__ ("lwaux        17,14,15");
1651 }
1652 #endif // #ifdef __powerpc64__
1653
1654 static test_t tests_ild_ops_two[] = {
1655     { &test_lbzx            , "        lbzx", },
1656     { &test_lbzux           , "       lbzux", },
1657     { &test_lhax            , "        lhax", },
1658     { &test_lhaux           , "       lhaux", },
1659     { &test_lhzx            , "        lhzx", },
1660     { &test_lhzux           , "       lhzux", },
1661     { &test_lwzx            , "        lwzx", },
1662     { &test_lwzux           , "       lwzux", },
1663 #ifdef __powerpc64__
1664     { &test_ldx             , "         ldx", },
1665     { &test_ldux            , "        ldux", },
1666     { &test_lwax            , "        lwax", },
1667     { &test_lwaux           , "       lwaux", },
1668 #endif // #ifdef __powerpc64__
1669     { NULL,                   NULL,           },
1670 };
1671
1672 extern void test_stb (void);
1673 ASSEMBLY_FUNC("test_stb", "stb          14,0(15)");
1674
1675 extern void test_stbu (void);
1676 ASSEMBLY_FUNC("test_stbu", "stbu          14,0(15)");
1677
1678 extern void test_sth (void);
1679 ASSEMBLY_FUNC("test_sth", "sth          14,0(15)");
1680
1681 extern void test_sthu (void);
1682 ASSEMBLY_FUNC("test_sthu", "sthu         14,0(15)");
1683
1684 extern void test_stw (void);
1685 ASSEMBLY_FUNC("test_stw", "stw          14,0(15)");
1686
1687 extern void test_stwu (void);
1688 ASSEMBLY_FUNC("test_stwu", "stwu          14,0(15)");
1689
1690 #ifdef __powerpc64__
1691 extern void test_std (void);
1692 ASSEMBLY_FUNC("test_std", "std          14,0(15)");
1693
1694 extern void test_stdu (void);
1695 ASSEMBLY_FUNC("test_stdu", "stdu          14,0(15)");
1696 #endif // #ifdef __powerpc64__
1697
1698 static test_t tests_ist_ops_three_i16[] = {
1699     { &test_stb             , "         stb", },
1700     { &test_stbu            , "        stbu", },
1701     { &test_sth             , "         sth", },
1702     { &test_sthu            , "        sthu", },
1703     { &test_stw             , "         stw", },
1704     { &test_stwu            , "        stwu", },
1705 #ifdef __powerpc64__
1706     { &test_std             , "         std", },
1707     { &test_stdu            , "        stdu", },
1708 #endif // #ifdef __powerpc64__
1709     { NULL,                   NULL,           },
1710 };
1711
1712 static void test_stbx (void)
1713 {
1714     __asm__ __volatile__ ("stbx         14,15,16");
1715 }
1716
1717 static void test_stbux (void)
1718 {
1719     __asm__ __volatile__ ("stbux        14,15,16");
1720 }
1721
1722 static void test_sthx (void)
1723 {
1724     __asm__ __volatile__ ("sthx         14,15,16");
1725 }
1726
1727 static void test_sthux (void)
1728 {
1729     __asm__ __volatile__ ("sthux        14,15,16");
1730 }
1731
1732 static void test_stwx (void)
1733 {
1734     __asm__ __volatile__ ("stwx         14,15,16");
1735 }
1736
1737 static void test_stwux (void)
1738 {
1739     __asm__ __volatile__ ("stwux        14,15,16");
1740 }
1741
1742 #ifdef __powerpc64__
1743 static void test_stdx (void)
1744 {
1745     __asm__ __volatile__ ("stdx         14,15,16");
1746 }
1747
1748 static void test_stdux (void)
1749 {
1750     __asm__ __volatile__ ("stdux        14,15,16");
1751 }
1752 #endif // #ifdef __powerpc64__
1753
1754 static test_t tests_ist_ops_three[] = {
1755     { &test_stbx            , "        stbx", },
1756     { &test_stbux           , "       stbux", },
1757     { &test_sthx            , "        sthx", },
1758     { &test_sthux           , "       sthux", },
1759     { &test_stwx            , "        stwx", },
1760     { &test_stwux           , "       stwux", },
1761 #ifdef __powerpc64__
1762     { &test_stdx            , "        stdx", },
1763     { &test_stdux           , "       stdux", },
1764 #endif // #ifdef __powerpc64__
1765     { NULL,                   NULL,           },
1766 };
1767
1768 static void
1769 tests_popcnt_one(void)
1770 {
1771    __asm__ __volatile__ ("popcntb      17, 14");
1772 }
1773
1774 static test_t tests_popcnt_ops_one[] = {
1775     { &tests_popcnt_one            , "        popcntb", },
1776     { NULL,                   NULL,           },
1777 };
1778
1779 #if !defined (NO_FLOAT)
1780 static void test_fsel (void)
1781 {
1782     __asm__ __volatile__ ("fsel         17, 14, 15, 16");
1783 }
1784
1785 static void test_fmadd (void)
1786 {
1787     __asm__ __volatile__ ("fmadd        17, 14, 15, 16");
1788 }
1789
1790 static void test_fmadds (void)
1791 {
1792     __asm__ __volatile__ ("fmadds       17, 14, 15, 16");
1793 }
1794
1795 static void test_fmsub (void)
1796 {
1797     __asm__ __volatile__ ("fmsub        17, 14, 15, 16");
1798 }
1799
1800 static void test_fmsubs (void)
1801 {
1802     __asm__ __volatile__ ("fmsubs       17, 14, 15, 16");
1803 }
1804
1805 static void test_fnmadd (void)
1806 {
1807     __asm__ __volatile__ ("fnmadd       17, 14, 15, 16");
1808 }
1809
1810 static void test_fnmadds (void)
1811 {
1812     __asm__ __volatile__ ("fnmadds      17, 14, 15, 16");
1813 }
1814
1815 static void test_fnmsub (void)
1816 {
1817     __asm__ __volatile__ ("fnmsub       17, 14, 15, 16");
1818 }
1819
1820 static void test_fnmsubs (void)
1821 {
1822     __asm__ __volatile__ ("fnmsubs      17, 14, 15, 16");
1823 }
1824
1825 static test_t tests_fa_ops_three[] = {
1826     { &test_fsel            , "        fsel", },
1827     { &test_fmadd           , "       fmadd", },
1828     { &test_fmadds          , "      fmadds", },
1829     { &test_fmsub           , "       fmsub", },
1830     { &test_fmsubs          , "      fmsubs", },
1831     { &test_fnmadd          , "      fnmadd", },
1832     { &test_fnmadds         , "     fnmadds", },
1833     { &test_fnmsub          , "      fnmsub", },
1834     { &test_fnmsubs         , "     fnmsubs", },
1835     { NULL,                   NULL,           },
1836 };
1837 #endif /* !defined (NO_FLOAT) */
1838
1839 #if !defined (NO_FLOAT)
1840 static void test_fsel_ (void)
1841 {
1842     __asm__ __volatile__ ("fsel.        17, 14, 15, 16");
1843 }
1844
1845 static void test_fmadd_ (void)
1846 {
1847     __asm__ __volatile__ ("fmadd.       17, 14, 15, 16");
1848 }
1849
1850 static void test_fmadds_ (void)
1851 {
1852     __asm__ __volatile__ ("fmadds.      17, 14, 15, 16");
1853 }
1854
1855 static void test_fmsub_ (void)
1856 {
1857     __asm__ __volatile__ ("fmsub.       17, 14, 15, 16");
1858 }
1859
1860 static void test_fmsubs_ (void)
1861 {
1862     __asm__ __volatile__ ("fmsubs.      17, 14, 15, 16");
1863 }
1864
1865 static void test_fnmadd_ (void)
1866 {
1867     __asm__ __volatile__ ("fnmadd.      17, 14, 15, 16");
1868 }
1869
1870 static void test_fnmadds_ (void)
1871 {
1872     __asm__ __volatile__ ("fnmadds.     17, 14, 15, 16");
1873 }
1874
1875 static void test_fnmsub_ (void)
1876 {
1877     __asm__ __volatile__ ("fnmsub.      17, 14, 15, 16");
1878 }
1879
1880 static void test_fnmsubs_ (void)
1881 {
1882     __asm__ __volatile__ ("fnmsubs.     17, 14, 15, 16");
1883 }
1884
1885 static test_t tests_far_ops_three[] = {
1886     { &test_fsel_           , "       fsel.", },
1887     { &test_fmadd_          , "      fmadd.", },
1888     { &test_fmadds_         , "     fmadds.", },
1889     { &test_fmsub_          , "      fmsub.", },
1890     { &test_fmsubs_         , "     fmsubs.", },
1891     { &test_fnmadd_         , "     fnmadd.", },
1892     { &test_fnmadds_        , "    fnmadds.", },
1893     { &test_fnmsub_         , "     fnmsub.", },
1894     { &test_fnmsubs_        , "    fnmsubs.", },
1895     { NULL,                   NULL,           },
1896 };
1897 #endif /* !defined (NO_FLOAT) */
1898
1899 #if !defined (NO_FLOAT)
1900 static void test_fadd (void)
1901 {
1902     __asm__ __volatile__ ("fadd         17, 14, 15");
1903 }
1904
1905 static void test_fadds (void)
1906 {
1907     __asm__ __volatile__ ("fadds        17, 14, 15");
1908 }
1909
1910 static void test_fsub (void)
1911 {
1912     __asm__ __volatile__ ("fsub         17, 14, 15");
1913 }
1914
1915 static void test_fsubs (void)
1916 {
1917     __asm__ __volatile__ ("fsubs        17, 14, 15");
1918 }
1919
1920 static void test_fmul (void)
1921 {
1922     __asm__ __volatile__ ("fmul         17, 14, 15");
1923 }
1924
1925 static void test_fmuls (void)
1926 {
1927     __asm__ __volatile__ ("fmuls        17, 14, 15");
1928 }
1929
1930 static void test_fdiv (void)
1931 {
1932     __asm__ __volatile__ ("fdiv         17, 14, 15");
1933 }
1934
1935 static void test_fdivs (void)
1936 {
1937     __asm__ __volatile__ ("fdivs        17, 14, 15");
1938 }
1939
1940 static test_t tests_fa_ops_two[] = {
1941     { &test_fadd            , "        fadd", },
1942     { &test_fadds           , "       fadds", },
1943     { &test_fsub            , "        fsub", },
1944     { &test_fsubs           , "       fsubs", },
1945     { &test_fmul            , "        fmul", },
1946     { &test_fmuls           , "       fmuls", },
1947     { &test_fdiv            , "        fdiv", },
1948     { &test_fdivs           , "       fdivs", },
1949     { NULL,                   NULL,           },
1950 };
1951 #endif /* !defined (NO_FLOAT) */
1952
1953 #if !defined (NO_FLOAT)
1954 static void test_fadd_ (void)
1955 {
1956     __asm__ __volatile__ ("fadd.        17, 14, 15");
1957 }
1958
1959 static void test_fadds_ (void)
1960 {
1961     __asm__ __volatile__ ("fadds.       17, 14, 15");
1962 }
1963
1964 static void test_fsub_ (void)
1965 {
1966     __asm__ __volatile__ ("fsub.        17, 14, 15");
1967 }
1968
1969 static void test_fsubs_ (void)
1970 {
1971     __asm__ __volatile__ ("fsubs.       17, 14, 15");
1972 }
1973
1974 static void test_fmul_ (void)
1975 {
1976     __asm__ __volatile__ ("fmul.        17, 14, 15");
1977 }
1978
1979 static void test_fmuls_ (void)
1980 {
1981     __asm__ __volatile__ ("fmuls.       17, 14, 15");
1982 }
1983
1984 static void test_fdiv_ (void)
1985 {
1986     __asm__ __volatile__ ("fdiv.        17, 14, 15");
1987 }
1988
1989 static void test_fdivs_ (void)
1990 {
1991     __asm__ __volatile__ ("fdivs.       17, 14, 15");
1992 }
1993
1994 static test_t tests_far_ops_two[] = {
1995     { &test_fadd_           , "       fadd.", },
1996     { &test_fadds_          , "      fadds.", },
1997     { &test_fsub_           , "       fsub.", },
1998     { &test_fsubs_          , "      fsubs.", },
1999     { &test_fmul_           , "       fmul.", },
2000     { &test_fmuls_          , "      fmuls.", },
2001     { &test_fdiv_           , "       fdiv.", },
2002     { &test_fdivs_          , "      fdivs.", },
2003     { NULL,                   NULL,           },
2004 };
2005 #endif /* !defined (NO_FLOAT) */
2006
2007 #if !defined (NO_FLOAT)
2008 static void test_fcmpo (void)
2009 {
2010     __asm__ __volatile__ ("fcmpo        2, 14, 15");
2011 }
2012
2013 static void test_fcmpu (void)
2014 {
2015     __asm__ __volatile__ ("fcmpu        2, 14, 15");
2016 }
2017
2018 static test_t tests_fcr_ops_two[] = {
2019     { &test_fcmpo           , "       fcmpo", },
2020     { &test_fcmpu           , "       fcmpu", },
2021     { NULL,                   NULL,           },
2022 };
2023 #endif /* !defined (NO_FLOAT) */
2024
2025 #if !defined (NO_FLOAT)
2026
2027 static void test_fres (void)
2028 {
2029     __asm__ __volatile__ ("fres         17, 14");
2030 }
2031
2032 static void test_frsqrte (void)
2033 {
2034     __asm__ __volatile__ ("frsqrte      17, 14");
2035 }
2036
2037 static void test_frsp (void)
2038 {
2039     __asm__ __volatile__ ("frsp         17, 14");
2040 }
2041
2042 static void test_fctiw (void)
2043 {
2044     __asm__ __volatile__ ("fctiw        17, 14");
2045 }
2046
2047 static void test_fctiwz (void)
2048 {
2049     __asm__ __volatile__ ("fctiwz       17, 14");
2050 }
2051
2052 static void test_fmr (void)
2053 {
2054     __asm__ __volatile__ ("fmr          17, 14");
2055 }
2056
2057 static void test_fneg (void)
2058 {
2059     __asm__ __volatile__ ("fneg         17, 14");
2060 }
2061
2062 static void test_fabs (void)
2063 {
2064     __asm__ __volatile__ ("fabs         17, 14");
2065 }
2066
2067 static void test_fnabs (void)
2068 {
2069     __asm__ __volatile__ ("fnabs        17, 14");
2070 }
2071
2072 static void test_fsqrt (void)
2073 {
2074     __asm__ __volatile__ ("fsqrt        17, 14");
2075 }
2076
2077 #ifdef __powerpc64__
2078 static void test_fcfid (void)
2079 {
2080     __asm__ __volatile__ ("fcfid        17, 14");
2081 }
2082
2083 static void test_fctid (void)
2084 {
2085     __asm__ __volatile__ ("fctid        17, 14");
2086 }
2087
2088 static void test_fctidz (void)
2089 {
2090     __asm__ __volatile__ ("fctidz       17, 14");
2091 }
2092 #endif // #ifdef __powerpc64__
2093
2094 static test_t tests_fa_ops_one[] = {
2095     { &test_fres            , "        fres", },
2096     { &test_frsqrte         , "     frsqrte", },
2097     { &test_frsp            , "        frsp", },
2098     { &test_fctiw           , "       fctiw", },
2099     { &test_fctiwz          , "      fctiwz", },
2100     { &test_fmr             , "         fmr", },
2101     { &test_fneg            , "        fneg", },
2102     { &test_fabs            , "        fabs", },
2103     { &test_fnabs           , "       fnabs", },
2104     { &test_fsqrt           , "       fsqrt", },
2105 #ifdef __powerpc64__
2106     { &test_fcfid           , "       fcfid", },
2107     { &test_fctid           , "       fctid", },
2108     { &test_fctidz          , "      fctidz", },
2109 #endif // #ifdef __powerpc64__
2110     { NULL,                   NULL,           },
2111 };
2112 #endif /* !defined (NO_FLOAT) */
2113
2114 #if !defined (NO_FLOAT)
2115
2116 static void test_fres_ (void)
2117 {
2118     __asm__ __volatile__ ("fres.        17, 14");
2119 }
2120
2121 static void test_frsqrte_ (void)
2122 {
2123      __asm__ __volatile__ ("frsqrte.     17, 14");
2124 }
2125
2126 static void test_frsp_ (void)
2127 {
2128     __asm__ __volatile__ ("frsp.        17, 14");
2129 }
2130
2131 static void test_fctiw_ (void)
2132 {
2133     __asm__ __volatile__ ("fctiw.       17, 14");
2134 }
2135
2136 static void test_fctiwz_ (void)
2137 {
2138     __asm__ __volatile__ ("fctiwz.      17, 14");
2139 }
2140
2141 static void test_fmr_ (void)
2142 {
2143     __asm__ __volatile__ ("fmr.         17, 14");
2144 }
2145
2146 static void test_fneg_ (void)
2147 {
2148     __asm__ __volatile__ ("fneg.        17, 14");
2149 }
2150
2151 static void test_fabs_ (void)
2152 {
2153     __asm__ __volatile__ ("fabs.        17, 14");
2154 }
2155
2156 static void test_fnabs_ (void)
2157 {
2158     __asm__ __volatile__ ("fnabs.       17, 14");
2159 }
2160
2161 #ifdef __powerpc64__
2162 static void test_fcfid_ (void)
2163 {
2164     __asm__ __volatile__ ("fcfid.       17, 14");
2165 }
2166
2167 static void test_fctid_ (void)
2168 {
2169     __asm__ __volatile__ ("fctid.       17, 14");
2170 }
2171
2172 static void test_fctidz_ (void)
2173 {
2174     __asm__ __volatile__ ("fctidz.      17, 14");
2175 }
2176 #endif // #ifdef __powerpc64__
2177
2178 static test_t tests_far_ops_one[] = {
2179     { &test_fres_           , "       fres.", },
2180     { &test_frsqrte_        , "    frsqrte.", },
2181     { &test_frsp_           , "       frsp.", },
2182     { &test_fctiw_          , "      fctiw.", },
2183     { &test_fctiwz_         , "     fctiwz.", },
2184     { &test_fmr_            , "        fmr.", },
2185     { &test_fneg_           , "       fneg.", },
2186     { &test_fabs_           , "       fabs.", },
2187     { &test_fnabs_          , "      fnabs.", },
2188 #ifdef __powerpc64__
2189     { &test_fcfid_          , "      fcfid.", },
2190     { &test_fctid_          , "      fctid.", },
2191     { &test_fctidz_         , "     fctidz.", },
2192 #endif // #ifdef __powerpc64__
2193     { NULL,                   NULL,           },
2194 };
2195 #endif /* !defined (NO_FLOAT) */
2196
2197 #if !defined (NO_FLOAT)
2198 static test_t tests_fl_ops_spe[] = {
2199     { NULL,                   NULL,           },
2200 };
2201 #endif /* !defined (NO_FLOAT) */
2202
2203 #if !defined (NO_FLOAT)
2204 static test_t tests_flr_ops_spe[] = {
2205     { NULL,                   NULL,           },
2206 };
2207 #endif /* !defined (NO_FLOAT) */
2208
2209
2210 #if !defined (NO_FLOAT)
2211 extern void test_lfs (void);
2212 ASSEMBLY_FUNC("test_lfs", "lfs          17,0(14)");
2213
2214 extern void test_lfsu (void);
2215 ASSEMBLY_FUNC("test_lfsu", "lfsu          17,0(14)");
2216
2217 extern void test_lfd (void);
2218 ASSEMBLY_FUNC("test_lfd", "lfd          17,0(14)");
2219
2220 extern void test_lfdu (void);
2221 ASSEMBLY_FUNC("test_lfdu", "lfdu          17,0(14)");
2222
2223 static test_t tests_fld_ops_two_i16[] = {
2224     { &test_lfs             , "         lfs", },
2225     { &test_lfsu            , "        lfsu", },
2226     { &test_lfd             , "         lfd", },
2227     { &test_lfdu            , "        lfdu", },
2228     { NULL,                   NULL,           },
2229 };
2230 #endif /* !defined (NO_FLOAT) */
2231
2232 #if !defined (NO_FLOAT)
2233 static void test_lfsx (void)
2234 {
2235     __asm__ __volatile__ ("lfsx         17,14,15");
2236 }
2237
2238 static void test_lfsux (void)
2239 {
2240     __asm__ __volatile__ ("lfsux        17,14,15");
2241 }
2242
2243 static void test_lfdx (void)
2244 {
2245     __asm__ __volatile__ ("lfdx         17,14,15");
2246 }
2247
2248 static void test_lfdux (void)
2249 {
2250     __asm__ __volatile__ ("lfdux        17,14,15");
2251 }
2252
2253 static test_t tests_fld_ops_two[] = {
2254     { &test_lfsx            , "        lfsx", },
2255     { &test_lfsux           , "       lfsux", },
2256     { &test_lfdx            , "        lfdx", },
2257     { &test_lfdux           , "       lfdux", },
2258     { NULL,                   NULL,           },
2259 };
2260 #endif /* !defined (NO_FLOAT) */
2261
2262 #if !defined (NO_FLOAT)
2263 extern void test_stfs (void);
2264 ASSEMBLY_FUNC("test_stfs", "stfs          14,0(15)");
2265
2266 extern void test_stfsu (void);
2267 ASSEMBLY_FUNC("test_stfsu", "stfsu          14,0(15)");
2268
2269 extern void test_stfd (void);
2270 ASSEMBLY_FUNC("test_stfd", "stfd          14,0(15)");
2271
2272 extern void test_stfdu (void);
2273 ASSEMBLY_FUNC("test_stfdu", "stfdu         14,0(15)");
2274
2275 static test_t tests_fst_ops_three_i16[] = {
2276     { &test_stfs             , "         stfs", },
2277     { &test_stfsu            , "        stfsu", },
2278     { &test_stfd             , "         stfd", },
2279     { &test_stfdu            , "        stfdu", },
2280     { NULL,                   NULL,           },
2281 };
2282 #endif /* !defined (NO_FLOAT) */
2283
2284 #if !defined (NO_FLOAT)
2285 static void test_stfsx (void)
2286 {
2287     __asm__ __volatile__ ("stfsx         14,15,16");
2288 }
2289
2290 static void test_stfsux (void)
2291 {
2292     __asm__ __volatile__ ("stfsux        14,15,16");
2293 }
2294
2295 static void test_stfdx (void)
2296 {
2297     __asm__ __volatile__ ("stfdx         14,15,16");
2298 }
2299
2300 static void test_stfdux (void)
2301 {
2302     __asm__ __volatile__ ("stfdux        14,15,16");
2303 }
2304
2305 static test_t tests_fst_ops_three[] = {
2306     { &test_stfsx            , "        stfsx", },
2307     { &test_stfsux           , "       stfsux", },
2308     { &test_stfdx            , "        stfdx", },
2309     { &test_stfdux           , "       stfdux", },
2310     { NULL,                   NULL,           },
2311 };
2312 #endif /* !defined (NO_FLOAT) */
2313
2314
2315 #if defined (HAS_ALTIVEC)
2316 static void test_vmhaddshs (void)
2317 {
2318     __asm__ __volatile__ ("vmhaddshs    17, 14, 15, 16");
2319 }
2320
2321 static void test_vmhraddshs (void)
2322 {
2323     __asm__ __volatile__ ("vmhraddshs   17, 14, 15, 16");
2324 }
2325
2326 static void test_vmladduhm (void)
2327 {
2328     __asm__ __volatile__ ("vmladduhm    17, 14, 15, 16");
2329 }
2330
2331 static void test_vmsumubm (void)
2332 {
2333     __asm__ __volatile__ ("vmsumubm     17, 14, 15, 16");
2334 }
2335
2336 static void test_vmsumuhm (void)
2337 {
2338     __asm__ __volatile__ ("vmsumuhm     17, 14, 15, 16");
2339 }
2340
2341 static void test_vmsumshs (void)
2342 {
2343     __asm__ __volatile__ ("vmsumshs     17, 14, 15, 16");
2344 }
2345
2346 static void test_vmsumuhs (void)
2347 {
2348     __asm__ __volatile__ ("vmsumuhs     17, 14, 15, 16");
2349 }
2350
2351 static void test_vmsummbm (void)
2352 {
2353     __asm__ __volatile__ ("vmsummbm     17, 14, 15, 16");
2354 }
2355
2356 static void test_vmsumshm (void)
2357 {
2358     __asm__ __volatile__ ("vmsumshm     17, 14, 15, 16");
2359 }
2360
2361 static test_t tests_aa_ops_three[] = {
2362     { &test_vmhaddshs       , "   vmhaddshs", },
2363     { &test_vmhraddshs      , "  vmhraddshs", },
2364     { &test_vmladduhm       , "   vmladduhm", },
2365     { &test_vmsumubm        , "    vmsumubm", },
2366     { &test_vmsumuhm        , "    vmsumuhm", },
2367     { &test_vmsumshs        , "    vmsumshs", },
2368     { &test_vmsumuhs        , "    vmsumuhs", },
2369     { &test_vmsummbm        , "    vmsummbm", },
2370     { &test_vmsumshm        , "    vmsumshm", },
2371     { NULL,                   NULL,           },
2372 };
2373 #endif /* defined (HAS_ALTIVEC) */
2374
2375 #if defined (HAS_ALTIVEC)
2376 static void test_vperm (void)
2377 {
2378     __asm__ __volatile__ ("vperm        17, 14, 15, 16");
2379 }
2380
2381 static void test_vsel (void)
2382 {
2383     __asm__ __volatile__ ("vsel         17, 14, 15, 16");
2384 }
2385
2386 static test_t tests_al_ops_three[] = {
2387     { &test_vperm           , "       vperm", },
2388     { &test_vsel            , "        vsel", },
2389     { NULL,                   NULL,           },
2390 };
2391 #endif /* defined (HAS_ALTIVEC) */
2392
2393 #if defined (HAS_ALTIVEC)
2394 static void test_vaddubm (void)
2395 {
2396     __asm__ __volatile__ ("vaddubm      17, 14, 15");
2397 }
2398
2399 static void test_vadduhm (void)
2400 {
2401     __asm__ __volatile__ ("vadduhm      17, 14, 15");
2402 }
2403
2404 static void test_vadduwm (void)
2405 {
2406     __asm__ __volatile__ ("vadduwm      17, 14, 15");
2407 }
2408
2409 static void test_vaddubs (void)
2410 {
2411     __asm__ __volatile__ ("vaddubs      17, 14, 15");
2412 }
2413
2414 static void test_vadduhs (void)
2415 {
2416     __asm__ __volatile__ ("vadduhs      17, 14, 15");
2417 }
2418
2419 static void test_vadduws (void)
2420 {
2421     __asm__ __volatile__ ("vadduws      17, 14, 15");
2422 }
2423
2424 static void test_vaddsbs (void)
2425 {
2426     __asm__ __volatile__ ("vaddsbs      17, 14, 15");
2427 }
2428
2429 static void test_vaddshs (void)
2430 {
2431     __asm__ __volatile__ ("vaddshs      17, 14, 15");
2432 }
2433
2434 static void test_vaddsws (void)
2435 {
2436     __asm__ __volatile__ ("vaddsws      17, 14, 15");
2437 }
2438
2439 static void test_vaddcuw (void)
2440 {
2441     __asm__ __volatile__ ("vaddcuw      17, 14, 15");
2442 }
2443
2444 static void test_vsububm (void)
2445 {
2446     __asm__ __volatile__ ("vsububm      17, 14, 15");
2447 }
2448
2449 static void test_vsubuhm (void)
2450 {
2451     __asm__ __volatile__ ("vsubuhm      17, 14, 15");
2452 }
2453
2454 static void test_vsubuwm (void)
2455 {
2456     __asm__ __volatile__ ("vsubuwm      17, 14, 15");
2457 }
2458
2459 static void test_vsububs (void)
2460 {
2461     __asm__ __volatile__ ("vsububs      17, 14, 15");
2462 }
2463
2464 static void test_vsubuhs (void)
2465 {
2466     __asm__ __volatile__ ("vsubuhs      17, 14, 15");
2467 }
2468
2469 static void test_vsubuws (void)
2470 {
2471     __asm__ __volatile__ ("vsubuws      17, 14, 15");
2472 }
2473
2474 static void test_vsubsbs (void)
2475 {
2476     __asm__ __volatile__ ("vsubsbs      17, 14, 15");
2477 }
2478
2479 static void test_vsubshs (void)
2480 {
2481     __asm__ __volatile__ ("vsubshs      17, 14, 15");
2482 }
2483
2484 static void test_vsubsws (void)
2485 {
2486     __asm__ __volatile__ ("vsubsws      17, 14, 15");
2487 }
2488
2489 static void test_vsubcuw (void)
2490 {
2491     __asm__ __volatile__ ("vsubcuw      17, 14, 15");
2492 }
2493
2494 static void test_vmuloub (void)
2495 {
2496     __asm__ __volatile__ ("vmuloub      17, 14, 15");
2497 }
2498
2499 static void test_vmulouh (void)
2500 {
2501     __asm__ __volatile__ ("vmulouh      17, 14, 15");
2502 }
2503
2504 static void test_vmulosb (void)
2505 {
2506     __asm__ __volatile__ ("vmulosb      17, 14, 15");
2507 }
2508
2509 static void test_vmulosh (void)
2510 {
2511     __asm__ __volatile__ ("vmulosh      17, 14, 15");
2512 }
2513
2514 static void test_vmuleub (void)
2515 {
2516     __asm__ __volatile__ ("vmuleub      17, 14, 15");
2517 }
2518
2519 static void test_vmuleuh (void)
2520 {
2521     __asm__ __volatile__ ("vmuleuh      17, 14, 15");
2522 }
2523
2524 static void test_vmulesb (void)
2525 {
2526     __asm__ __volatile__ ("vmulesb      17, 14, 15");
2527 }
2528
2529 static void test_vmulesh (void)
2530 {
2531     __asm__ __volatile__ ("vmulesh      17, 14, 15");
2532 }
2533
2534 static void test_vsumsws (void)
2535 {
2536     __asm__ __volatile__ ("vsumsws      17, 14, 15");
2537 }
2538
2539 static void test_vsum2sws (void)
2540 {
2541     __asm__ __volatile__ ("vsum2sws     17, 14, 15");
2542 }
2543
2544 static void test_vsum4ubs (void)
2545 {
2546     __asm__ __volatile__ ("vsum4ubs     17, 14, 15");
2547 }
2548
2549 static void test_vsum4sbs (void)
2550 {
2551     __asm__ __volatile__ ("vsum4sbs     17, 14, 15");
2552 }
2553
2554 static void test_vsum4shs (void)
2555 {
2556     __asm__ __volatile__ ("vsum4shs     17, 14, 15");
2557 }
2558
2559 static void test_vavgub (void)
2560 {
2561     __asm__ __volatile__ ("vavgub       17, 14, 15");
2562 }
2563
2564 static void test_vavguh (void)
2565 {
2566     __asm__ __volatile__ ("vavguh       17, 14, 15");
2567 }
2568
2569 static void test_vavguw (void)
2570 {
2571     __asm__ __volatile__ ("vavguw       17, 14, 15");
2572 }
2573
2574 static void test_vavgsb (void)
2575 {
2576     __asm__ __volatile__ ("vavgsb       17, 14, 15");
2577 }
2578
2579 static void test_vavgsh (void)
2580 {
2581     __asm__ __volatile__ ("vavgsh       17, 14, 15");
2582 }
2583
2584 static void test_vavgsw (void)
2585 {
2586     __asm__ __volatile__ ("vavgsw       17, 14, 15");
2587 }
2588
2589 static void test_vmaxub (void)
2590 {
2591     __asm__ __volatile__ ("vmaxub       17, 14, 15");
2592 }
2593
2594 static void test_vmaxuh (void)
2595 {
2596     __asm__ __volatile__ ("vmaxuh       17, 14, 15");
2597 }
2598
2599 static void test_vmaxuw (void)
2600 {
2601     __asm__ __volatile__ ("vmaxuw       17, 14, 15");
2602 }
2603
2604 static void test_vmaxsb (void)
2605 {
2606     __asm__ __volatile__ ("vmaxsb       17, 14, 15");
2607 }
2608
2609 static void test_vmaxsh (void)
2610 {
2611     __asm__ __volatile__ ("vmaxsh       17, 14, 15");
2612 }
2613
2614 static void test_vmaxsw (void)
2615 {
2616     __asm__ __volatile__ ("vmaxsw       17, 14, 15");
2617 }
2618
2619 static void test_vminub (void)
2620 {
2621     __asm__ __volatile__ ("vminub       17, 14, 15");
2622 }
2623
2624 static void test_vminuh (void)
2625 {
2626     __asm__ __volatile__ ("vminuh       17, 14, 15");
2627 }
2628
2629 static void test_vminuw (void)
2630 {
2631     __asm__ __volatile__ ("vminuw       17, 14, 15");
2632 }
2633
2634 static void test_vminsb (void)
2635 {
2636     __asm__ __volatile__ ("vminsb       17, 14, 15");
2637 }
2638
2639 static void test_vminsh (void)
2640 {
2641     __asm__ __volatile__ ("vminsh       17, 14, 15");
2642 }
2643
2644 static void test_vminsw (void)
2645 {
2646     __asm__ __volatile__ ("vminsw       17, 14, 15");
2647 }
2648
2649 static test_t tests_aa_ops_two[] = {
2650     { &test_vaddubm         , "     vaddubm", },
2651     { &test_vadduhm         , "     vadduhm", },
2652     { &test_vadduwm         , "     vadduwm", },
2653     { &test_vaddubs         , "     vaddubs", },
2654     { &test_vadduhs         , "     vadduhs", },
2655     { &test_vadduws         , "     vadduws", },
2656     { &test_vaddsbs         , "     vaddsbs", },
2657     { &test_vaddshs         , "     vaddshs", },
2658     { &test_vaddsws         , "     vaddsws", },
2659     { &test_vaddcuw         , "     vaddcuw", },
2660     { &test_vsububm         , "     vsububm", },
2661     { &test_vsubuhm         , "     vsubuhm", },
2662     { &test_vsubuwm         , "     vsubuwm", },
2663     { &test_vsububs         , "     vsububs", },
2664     { &test_vsubuhs         , "     vsubuhs", },
2665     { &test_vsubuws         , "     vsubuws", },
2666     { &test_vsubsbs         , "     vsubsbs", },
2667     { &test_vsubshs         , "     vsubshs", },
2668     { &test_vsubsws         , "     vsubsws", },
2669     { &test_vsubcuw         , "     vsubcuw", },
2670     { &test_vmuloub         , "     vmuloub", },
2671     { &test_vmulouh         , "     vmulouh", },
2672     { &test_vmulosb         , "     vmulosb", },
2673     { &test_vmulosh         , "     vmulosh", },
2674     { &test_vmuleub         , "     vmuleub", },
2675     { &test_vmuleuh         , "     vmuleuh", },
2676     { &test_vmulesb         , "     vmulesb", },
2677     { &test_vmulesh         , "     vmulesh", },
2678     { &test_vsumsws         , "     vsumsws", },
2679     { &test_vsum2sws        , "    vsum2sws", },
2680     { &test_vsum4ubs        , "    vsum4ubs", },
2681     { &test_vsum4sbs        , "    vsum4sbs", },
2682     { &test_vsum4shs        , "    vsum4shs", },
2683     { &test_vavgub          , "      vavgub", },
2684     { &test_vavguh          , "      vavguh", },
2685     { &test_vavguw          , "      vavguw", },
2686     { &test_vavgsb          , "      vavgsb", },
2687     { &test_vavgsh          , "      vavgsh", },
2688     { &test_vavgsw          , "      vavgsw", },
2689     { &test_vmaxub          , "      vmaxub", },
2690     { &test_vmaxuh          , "      vmaxuh", },
2691     { &test_vmaxuw          , "      vmaxuw", },
2692     { &test_vmaxsb          , "      vmaxsb", },
2693     { &test_vmaxsh          , "      vmaxsh", },
2694     { &test_vmaxsw          , "      vmaxsw", },
2695     { &test_vminub          , "      vminub", },
2696     { &test_vminuh          , "      vminuh", },
2697     { &test_vminuw          , "      vminuw", },
2698     { &test_vminsb          , "      vminsb", },
2699     { &test_vminsh          , "      vminsh", },
2700     { &test_vminsw          , "      vminsw", },
2701     { NULL,                   NULL,           },
2702 };
2703 #endif /* defined (HAS_ALTIVEC) */
2704
2705 #if defined (HAS_ALTIVEC)
2706 static void test_vand (void)
2707 {
2708     __asm__ __volatile__ ("vand         17, 14, 15");
2709 }
2710
2711 static void test_vor (void)
2712 {
2713     __asm__ __volatile__ ("vor          17, 14, 15");
2714 }
2715
2716 static void test_vxor (void)
2717 {
2718     __asm__ __volatile__ ("vxor         17, 14, 15");
2719 }
2720
2721 static void test_vandc (void)
2722 {
2723     __asm__ __volatile__ ("vandc        17, 14, 15");
2724 }
2725
2726 static void test_vnor (void)
2727 {
2728     __asm__ __volatile__ ("vnor         17, 14, 15");
2729 }
2730
2731 static void test_vrlb (void)
2732 {
2733     __asm__ __volatile__ ("vrlb         17, 14, 15");
2734 }
2735
2736 static void test_vrlh (void)
2737 {
2738     __asm__ __volatile__ ("vrlh         17, 14, 15");
2739 }
2740
2741 static void test_vrlw (void)
2742 {
2743     __asm__ __volatile__ ("vrlw         17, 14, 15");
2744 }
2745
2746 static void test_vslb (void)
2747 {
2748     __asm__ __volatile__ ("vslb         17, 14, 15");
2749 }
2750
2751 static void test_vslh (void)
2752 {
2753     __asm__ __volatile__ ("vslh         17, 14, 15");
2754 }
2755
2756 static void test_vslw (void)
2757 {
2758     __asm__ __volatile__ ("vslw         17, 14, 15");
2759 }
2760
2761 static void test_vsrb (void)
2762 {
2763     __asm__ __volatile__ ("vsrb         17, 14, 15");
2764 }
2765
2766 static void test_vsrh (void)
2767 {
2768     __asm__ __volatile__ ("vsrh         17, 14, 15");
2769 }
2770
2771 static void test_vsrw (void)
2772 {
2773     __asm__ __volatile__ ("vsrw         17, 14, 15");
2774 }
2775
2776 static void test_vsrab (void)
2777 {
2778     __asm__ __volatile__ ("vsrab        17, 14, 15");
2779 }
2780
2781 static void test_vsrah (void)
2782 {
2783     __asm__ __volatile__ ("vsrah        17, 14, 15");
2784 }
2785
2786 static void test_vsraw (void)
2787 {
2788     __asm__ __volatile__ ("vsraw        17, 14, 15");
2789 }
2790
2791 static void test_vpkuhum (void)
2792 {
2793     __asm__ __volatile__ ("vpkuhum      17, 14, 15");
2794 }
2795
2796 static void test_vpkuwum (void)
2797 {
2798     __asm__ __volatile__ ("vpkuwum      17, 14, 15");
2799 }
2800
2801 static void test_vpkuhus (void)
2802 {
2803     __asm__ __volatile__ ("vpkuhus      17, 14, 15");
2804 }
2805
2806 static void test_vpkuwus (void)
2807 {
2808     __asm__ __volatile__ ("vpkuwus      17, 14, 15");
2809 }
2810
2811 static void test_vpkshus (void)
2812 {
2813     __asm__ __volatile__ ("vpkshus      17, 14, 15");
2814 }
2815
2816 static void test_vpkswus (void)
2817 {
2818     __asm__ __volatile__ ("vpkswus      17, 14, 15");
2819 }
2820
2821 static void test_vpkshss (void)
2822 {
2823     __asm__ __volatile__ ("vpkshss      17, 14, 15");
2824 }
2825
2826 static void test_vpkswss (void)
2827 {
2828     __asm__ __volatile__ ("vpkswss      17, 14, 15");
2829 }
2830
2831 static void test_vpkpx (void)
2832 {
2833     __asm__ __volatile__ ("vpkpx        17, 14, 15");
2834 }
2835
2836 static void test_vmrghb (void)
2837 {
2838     __asm__ __volatile__ ("vmrghb       17, 14, 15");
2839 }
2840
2841 static void test_vmrghh (void)
2842 {
2843     __asm__ __volatile__ ("vmrghh       17, 14, 15");
2844 }
2845
2846 static void test_vmrghw (void)
2847 {
2848     __asm__ __volatile__ ("vmrghw       17, 14, 15");
2849 }
2850
2851 static void test_vmrglb (void)
2852 {
2853     __asm__ __volatile__ ("vmrglb       17, 14, 15");
2854 }
2855
2856 static void test_vmrglh (void)
2857 {
2858     __asm__ __volatile__ ("vmrglh       17, 14, 15");
2859 }
2860
2861 static void test_vmrglw (void)
2862 {
2863     __asm__ __volatile__ ("vmrglw       17, 14, 15");
2864 }
2865
2866 static void test_vslo (void)
2867 {
2868     __asm__ __volatile__ ("vslo         17, 14, 15");
2869 }
2870
2871 static void test_vsro (void)
2872 {
2873     __asm__ __volatile__ ("vsro         17, 14, 15");
2874 }
2875
2876 static test_t tests_al_ops_two[] = {
2877     { &test_vand            , "        vand", },
2878     { &test_vor             , "         vor", },
2879     { &test_vxor            , "        vxor", },
2880     { &test_vandc           , "       vandc", },
2881     { &test_vnor            , "        vnor", },
2882     { &test_vrlb            , "        vrlb", },
2883     { &test_vrlh            , "        vrlh", },
2884     { &test_vrlw            , "        vrlw", },
2885     { &test_vslb            , "        vslb", },
2886     { &test_vslh            , "        vslh", },
2887     { &test_vslw            , "        vslw", },
2888     { &test_vsrb            , "        vsrb", },
2889     { &test_vsrh            , "        vsrh", },
2890     { &test_vsrw            , "        vsrw", },
2891     { &test_vsrab           , "       vsrab", },
2892     { &test_vsrah           , "       vsrah", },
2893     { &test_vsraw           , "       vsraw", },
2894     { &test_vpkuhum         , "     vpkuhum", },
2895     { &test_vpkuwum         , "     vpkuwum", },
2896     { &test_vpkuhus         , "     vpkuhus", },
2897     { &test_vpkuwus         , "     vpkuwus", },
2898     { &test_vpkshus         , "     vpkshus", },
2899     { &test_vpkswus         , "     vpkswus", },
2900     { &test_vpkshss         , "     vpkshss", },
2901     { &test_vpkswss         , "     vpkswss", },
2902     { &test_vpkpx           , "       vpkpx", },
2903     { &test_vmrghb          , "      vmrghb", },
2904     { &test_vmrghh          , "      vmrghh", },
2905     { &test_vmrghw          , "      vmrghw", },
2906     { &test_vmrglb          , "      vmrglb", },
2907     { &test_vmrglh          , "      vmrglh", },
2908     { &test_vmrglw          , "      vmrglw", },
2909     { &test_vslo            , "        vslo", },
2910     { &test_vsro            , "        vsro", },
2911     { NULL,                   NULL,           },
2912 };
2913 #endif /* defined (HAS_ALTIVEC) */
2914
2915 #if defined (HAS_ALTIVEC)
2916 static void test_vupkhsb (void)
2917 {
2918     __asm__ __volatile__ ("vupkhsb      17, 14");
2919 }
2920
2921 static void test_vupkhsh (void)
2922 {
2923     __asm__ __volatile__ ("vupkhsh      17, 14");
2924 }
2925
2926 static void test_vupkhpx (void)
2927 {
2928     __asm__ __volatile__ ("vupkhpx      17, 14");
2929 }
2930
2931 static void test_vupklsb (void)
2932 {
2933     __asm__ __volatile__ ("vupklsb      17, 14");
2934 }
2935
2936 static void test_vupklsh (void)
2937 {
2938     __asm__ __volatile__ ("vupklsh      17, 14");
2939 }
2940
2941 static void test_vupklpx (void)
2942 {
2943     __asm__ __volatile__ ("vupklpx      17, 14");
2944 }
2945
2946 static test_t tests_al_ops_one[] = {
2947     { &test_vupkhsb         , "     vupkhsb", },
2948     { &test_vupkhsh         , "     vupkhsh", },
2949     { &test_vupkhpx         , "     vupkhpx", },
2950     { &test_vupklsb         , "     vupklsb", },
2951     { &test_vupklsh         , "     vupklsh", },
2952     { &test_vupklpx         , "     vupklpx", },
2953     { NULL,                   NULL,           },
2954 };
2955 #endif /* defined (HAS_ALTIVEC) */
2956
2957 #if defined (HAS_ALTIVEC)
2958 static void test_vcmpgtub (void)
2959 {
2960     __asm__ __volatile__ ("vcmpgtub     17, 14, 15");
2961 }
2962
2963 static void test_vcmpgtuh (void)
2964 {
2965     __asm__ __volatile__ ("vcmpgtuh     17, 14, 15");
2966 }
2967
2968 static void test_vcmpgtuw (void)
2969 {
2970     __asm__ __volatile__ ("vcmpgtuw     17, 14, 15");
2971 }
2972
2973 static void test_vcmpgtsb (void)
2974 {
2975     __asm__ __volatile__ ("vcmpgtsb     17, 14, 15");
2976 }
2977
2978 static void test_vcmpgtsh (void)
2979 {
2980     __asm__ __volatile__ ("vcmpgtsh     17, 14, 15");
2981 }
2982
2983 static void test_vcmpgtsw (void)
2984 {
2985     __asm__ __volatile__ ("vcmpgtsw     17, 14, 15");
2986 }
2987
2988 static void test_vcmpequb (void)
2989 {
2990     __asm__ __volatile__ ("vcmpequb     17, 14, 15");
2991 }
2992
2993 static void test_vcmpequh (void)
2994 {
2995     __asm__ __volatile__ ("vcmpequh     17, 14, 15");
2996 }
2997
2998 static void test_vcmpequw (void)
2999 {
3000     __asm__ __volatile__ ("vcmpequw     17, 14, 15");
3001 }
3002
3003 static test_t tests_ac_ops_two[] = {
3004     { &test_vcmpgtub        , "    vcmpgtub", },
3005     { &test_vcmpgtuh        , "    vcmpgtuh", },
3006     { &test_vcmpgtuw        , "    vcmpgtuw", },
3007     { &test_vcmpgtsb        , "    vcmpgtsb", },
3008     { &test_vcmpgtsh        , "    vcmpgtsh", },
3009     { &test_vcmpgtsw        , "    vcmpgtsw", },
3010     { &test_vcmpequb        , "    vcmpequb", },
3011     { &test_vcmpequh        , "    vcmpequh", },
3012     { &test_vcmpequw        , "    vcmpequw", },
3013     { NULL,                   NULL,           },
3014 };
3015 #endif /* defined (HAS_ALTIVEC) */
3016
3017 #if defined (HAS_ALTIVEC)
3018 static void test_vcmpgtub_ (void)
3019 {
3020     __asm__ __volatile__ ("vcmpgtub.    17, 14, 15");
3021 }
3022
3023 static void test_vcmpgtuh_ (void)
3024 {
3025     __asm__ __volatile__ ("vcmpgtuh.    17, 14, 15");
3026 }
3027
3028 static void test_vcmpgtuw_ (void)
3029 {
3030     __asm__ __volatile__ ("vcmpgtuw.    17, 14, 15");
3031 }
3032
3033 static void test_vcmpgtsb_ (void)
3034 {
3035     __asm__ __volatile__ ("vcmpgtsb.    17, 14, 15");
3036 }
3037
3038 static void test_vcmpgtsh_ (void)
3039 {
3040     __asm__ __volatile__ ("vcmpgtsh.    17, 14, 15");
3041 }
3042
3043 static void test_vcmpgtsw_ (void)
3044 {
3045     __asm__ __volatile__ ("vcmpgtsw.    17, 14, 15");
3046 }
3047
3048 static void test_vcmpequb_ (void)
3049 {
3050     __asm__ __volatile__ ("vcmpequb.    17, 14, 15");
3051 }
3052
3053 static void test_vcmpequh_ (void)
3054 {
3055     __asm__ __volatile__ ("vcmpequh.    17, 14, 15");
3056 }
3057
3058 static void test_vcmpequw_ (void)
3059 {
3060     __asm__ __volatile__ ("vcmpequw.    17, 14, 15");
3061 }
3062
3063 static test_t tests_acr_ops_two[] = {
3064     { &test_vcmpgtub_       , "   vcmpgtub.", },
3065     { &test_vcmpgtuh_       , "   vcmpgtuh.", },
3066     { &test_vcmpgtuw_       , "   vcmpgtuw.", },
3067     { &test_vcmpgtsb_       , "   vcmpgtsb.", },
3068     { &test_vcmpgtsh_       , "   vcmpgtsh.", },
3069     { &test_vcmpgtsw_       , "   vcmpgtsw.", },
3070     { &test_vcmpequb_       , "   vcmpequb.", },
3071     { &test_vcmpequh_       , "   vcmpequh.", },
3072     { &test_vcmpequw_       , "   vcmpequw.", },
3073     { NULL,                   NULL,           },
3074 };
3075 #endif /* defined (HAS_ALTIVEC) */
3076
3077 #if defined (HAS_ALTIVEC)
3078 static void test_vsl (void)
3079 {
3080     __asm__ __volatile__ ("vsl          17, 14, 15");
3081 }
3082
3083 static void test_vsr (void)
3084 {
3085     __asm__ __volatile__ ("vsr          17, 14, 15");
3086 }
3087
3088 extern void test_vspltb (void);
3089 ASSEMBLY_FUNC("test_vspltb", "vspltb       17, 14, 0");
3090
3091 extern void test_vsplth (void);
3092 ASSEMBLY_FUNC("test_vsplth", "vsplth       17, 14, 0");
3093
3094 extern void test_vspltw (void);
3095 ASSEMBLY_FUNC("test_vspltw", "vspltw       17, 14, 0");
3096
3097 extern void test_vspltisb (void);
3098 ASSEMBLY_FUNC("test_vspltisb", "vspltisb       17, 0");
3099
3100 extern void test_vspltish (void);
3101 ASSEMBLY_FUNC("test_vspltish", "vspltish       17, 0");
3102
3103 extern void test_vspltisw (void);
3104 ASSEMBLY_FUNC("test_vspltisw", "vspltisw       17, 0");
3105
3106 extern void test_vsldoi (void);
3107 ASSEMBLY_FUNC("test_vsldoi", "vsldoi       17, 14, 15, 0");
3108
3109 static void test_lvsl (void)
3110 {
3111     __asm__ __volatile__ ("lvsl         17, 14, 15");
3112 }
3113
3114 static void test_lvsr (void)
3115 {
3116     __asm__ __volatile__ ("lvsr         17, 14, 15");
3117 }
3118
3119 static test_t tests_av_int_ops_spe[] = {
3120     { &test_vsl             , "         vsl", },
3121     { &test_vsr             , "         vsr", },
3122     { &test_vspltb          , "      vspltb", },
3123     { &test_vsplth          , "      vsplth", },
3124     { &test_vspltw          , "      vspltw", },
3125     { &test_vspltisb        , "    vspltisb", },
3126     { &test_vspltish        , "    vspltish", },
3127     { &test_vspltisw        , "    vspltisw", },
3128     { &test_vsldoi          , "      vsldoi", },
3129     { &test_lvsl            , "        lvsl", },
3130     { &test_lvsr            , "        lvsr", },
3131     { NULL,                   NULL,           },
3132 };
3133 #endif /* defined (HAS_ALTIVEC) */
3134
3135 #if defined (HAS_ALTIVEC)
3136 static void test_lvebx (void)
3137 {
3138     __asm__ __volatile__ ("lvebx        17,14,15");
3139 }
3140
3141 static void test_lvehx (void)
3142 {
3143     __asm__ __volatile__ ("lvehx        17,14,15");
3144 }
3145
3146 static void test_lvewx (void)
3147 {
3148     __asm__ __volatile__ ("lvewx        17,14,15");
3149 }
3150
3151 static void test_lvx (void)
3152 {
3153     __asm__ __volatile__ ("lvx          17,14,15");
3154 }
3155
3156 static void test_lvxl (void)
3157 {
3158     __asm__ __volatile__ ("lvxl         17,14,15");
3159 }
3160
3161 static test_t tests_ald_ops_two[] = {
3162     { &test_lvebx           , "       lvebx", },
3163     { &test_lvehx           , "       lvehx", },
3164     { &test_lvewx           , "       lvewx", },
3165     { &test_lvx             , "         lvx", },
3166     { &test_lvxl            , "        lvxl", },
3167     { NULL,                   NULL,           },
3168 };
3169 #endif /* defined (HAS_ALTIVEC) */
3170
3171 #if defined (HAS_ALTIVEC)
3172 static void test_stvebx (void)
3173 {
3174     __asm__ __volatile__ ("stvebx       14,15,16");
3175 }
3176
3177 static void test_stvehx (void)
3178 {
3179     __asm__ __volatile__ ("stvehx       14,15,16");
3180 }
3181
3182 static void test_stvewx (void)
3183 {
3184     __asm__ __volatile__ ("stvewx       14,15,16");
3185 }
3186
3187 static void test_stvx (void)
3188 {
3189     __asm__ __volatile__ ("stvx         14,15,16");
3190 }
3191
3192 static void test_stvxl (void)
3193 {
3194     __asm__ __volatile__ ("stvxl        14,15,16");
3195 }
3196
3197 static test_t tests_ast_ops_three[] = {
3198     { &test_stvebx          , "      stvebx", },
3199     { &test_stvehx          , "      stvehx", },
3200     { &test_stvewx          , "      stvewx", },
3201     { &test_stvx            , "        stvx", },
3202     { &test_stvxl           , "       stvxl", },
3203     { NULL,                   NULL,           },
3204 };
3205 #endif /* defined (HAS_ALTIVEC) */
3206
3207 #if defined (HAS_ALTIVEC)
3208 #if 1
3209 static void test_vmaddfp (void)
3210 {
3211     __asm__ __volatile__ ("vmaddfp      17, 14, 15, 16");
3212 }
3213
3214 static void test_vnmsubfp (void)
3215 {
3216     __asm__ __volatile__ ("vnmsubfp     17, 14, 15, 16");
3217 }
3218 #endif
3219
3220 static test_t tests_afa_ops_three[] = {
3221     { &test_vmaddfp         , "     vmaddfp", },
3222     { &test_vnmsubfp        , "    vnmsubfp", },
3223     { NULL,                   NULL,           },
3224 };
3225 #endif /* defined (HAS_ALTIVEC) */
3226
3227 #if defined (HAS_ALTIVEC)
3228 static void test_vaddfp (void)
3229 {
3230     __asm__ __volatile__ ("vaddfp       17, 14, 15");
3231 }
3232
3233 static void test_vsubfp (void)
3234 {
3235     __asm__ __volatile__ ("vsubfp       17, 14, 15");
3236 }
3237
3238 static void test_vmaxfp (void)
3239 {
3240     __asm__ __volatile__ ("vmaxfp       17, 14, 15");
3241 }
3242
3243 static void test_vminfp (void)
3244 {
3245     __asm__ __volatile__ ("vminfp       17, 14, 15");
3246 }
3247
3248 static test_t tests_afa_ops_two[] = {
3249     { &test_vaddfp          , "      vaddfp", },
3250     { &test_vsubfp          , "      vsubfp", },
3251     { &test_vmaxfp          , "      vmaxfp", },
3252     { &test_vminfp          , "      vminfp", },
3253     { NULL,                   NULL,           },
3254 };
3255 #endif /* defined (HAS_ALTIVEC) */
3256
3257 #if defined (HAS_ALTIVEC)
3258 static void test_vrfin (void)
3259 {
3260     __asm__ __volatile__ ("vrfin        17, 14");
3261 }
3262
3263 static void test_vrfiz (void)
3264 {
3265     __asm__ __volatile__ ("vrfiz        17, 14");
3266 }
3267
3268 static void test_vrfip (void)
3269 {
3270     __asm__ __volatile__ ("vrfip        17, 14");
3271 }
3272
3273 static void test_vrfim (void)
3274 {
3275     __asm__ __volatile__ ("vrfim        17, 14");
3276 }
3277
3278 static void test_vrefp (void)
3279 {
3280     __asm__ __volatile__ ("vrefp        17, 14");
3281 }
3282
3283 static void test_vrsqrtefp (void)
3284 {
3285     __asm__ __volatile__ ("vrsqrtefp    17, 14");
3286 }
3287
3288 static void test_vlogefp (void)
3289 {
3290     __asm__ __volatile__ ("vlogefp      17, 14");
3291 }
3292
3293 static void test_vexptefp (void)
3294 {
3295     __asm__ __volatile__ ("vexptefp     17, 14");
3296 }
3297
3298 static test_t tests_afa_ops_one[] = {
3299     { &test_vrfin           , "       vrfin", },
3300     { &test_vrfiz           , "       vrfiz", },
3301     { &test_vrfip           , "       vrfip", },
3302     { &test_vrfim           , "       vrfim", },
3303     { &test_vrefp           , "       vrefp", },
3304     { &test_vrsqrtefp       , "   vrsqrtefp", },
3305     { &test_vlogefp         , "     vlogefp", },
3306     { &test_vexptefp        , "    vexptefp", },
3307     { NULL,                   NULL,           },
3308 };
3309 #endif /* defined (HAS_ALTIVEC) */
3310
3311 #if defined (HAS_ALTIVEC)
3312 static void test_vcmpgtfp (void)
3313 {
3314     __asm__ __volatile__ ("vcmpgtfp     17, 14, 15");
3315 }
3316
3317 static void test_vcmpeqfp (void)
3318 {
3319     __asm__ __volatile__ ("vcmpeqfp     17, 14, 15");
3320 }
3321
3322 static void test_vcmpgefp (void)
3323 {
3324     __asm__ __volatile__ ("vcmpgefp     17, 14, 15");
3325 }
3326
3327 static void test_vcmpbfp (void)
3328 {
3329     __asm__ __volatile__ ("vcmpbfp      17, 14, 15");
3330 }
3331
3332 static test_t tests_afc_ops_two[] = {
3333     { &test_vcmpgtfp        , "    vcmpgtfp", },
3334     { &test_vcmpeqfp        , "    vcmpeqfp", },
3335     { &test_vcmpgefp        , "    vcmpgefp", },
3336     { &test_vcmpbfp         , "     vcmpbfp", },
3337     { NULL,                   NULL,           },
3338 };
3339 #endif /* defined (HAS_ALTIVEC) */
3340
3341 #if defined (HAS_ALTIVEC)
3342 static void test_vcmpgtfp_ (void)
3343 {
3344     __asm__ __volatile__ ("vcmpgtfp.    17, 14, 15");
3345 }
3346
3347 static void test_vcmpeqfp_ (void)
3348 {
3349     __asm__ __volatile__ ("vcmpeqfp.    17, 14, 15");
3350 }
3351
3352 static void test_vcmpgefp_ (void)
3353 {
3354     __asm__ __volatile__ ("vcmpgefp.    17, 14, 15");
3355 }
3356
3357 static void test_vcmpbfp_ (void)
3358 {
3359     __asm__ __volatile__ ("vcmpbfp.     17, 14, 15");
3360 }
3361
3362 static test_t tests_afcr_ops_two[] = {
3363     { &test_vcmpgtfp_       , "   vcmpgtfp.", },
3364     { &test_vcmpeqfp_       , "   vcmpeqfp.", },
3365     { &test_vcmpgefp_       , "   vcmpgefp.", },
3366     { &test_vcmpbfp_        , "    vcmpbfp.", },
3367     { NULL,                   NULL,           },
3368 };
3369 #endif /* defined (HAS_ALTIVEC) */
3370
3371 #if defined (HAS_ALTIVEC)
3372 extern void test_vcfux (void);
3373 ASSEMBLY_FUNC("test_vcfux", "vcfux        17, 14, 0");
3374
3375 extern void test_vcfsx (void);
3376 ASSEMBLY_FUNC("test_vcfsx", "vcfsx        17, 14, 0");
3377
3378 extern void test_vctuxs (void);
3379 ASSEMBLY_FUNC("test_vctuxs", "vctuxs        17, 14, 0");
3380
3381 extern void test_vctsxs (void);
3382 ASSEMBLY_FUNC("test_vctsxs", "vctsxs        17, 14, 0");
3383
3384 static test_t tests_av_float_ops_spe[] = {
3385     { &test_vcfux           , "       vcfux", },
3386     { &test_vcfsx           , "       vcfsx", },
3387     { &test_vctuxs          , "      vctuxs", },
3388     { &test_vctsxs          , "      vctsxs", },
3389     { NULL,                   NULL,           },
3390 };
3391 #endif /* defined (HAS_ALTIVEC) */
3392
3393 /* Power ISA 2.03 support dcbtct and dcbtstct with valid hint values b00000 - 0b00111.
3394  * The ISA 2.06 added support for more valid hint values, but rather than tie ourselves
3395  * in knots trying to test all permutations of ISAs and valid hint values, we'll just
3396  * verify some of the base hint values from ISA 2.03.
3397  *
3398  * In a similar vein, in ISA 2.03, dcbtds had valid values of 0b01000 - 0b01010, whereas
3399  * ISA 2.06 expanded the range of valid hint values to 0b01000 - 0b01111.  We just test
3400  * one of the ISA 2.03-supported values for dcbtds.
3401  */
3402 static void test_dcbtct (void)
3403 {
3404    /*  dcbt RA, RB, TH */
3405    ASM_DCBT(17, 14, 1);
3406    ASM_DCBT(17, 14, 7);
3407 }
3408
3409 static void test_dcbtds (void)
3410 {
3411    /*  dcbt RA, RB, TH */
3412    ASM_DCBT(17, 14, 10);
3413    ASM_DCBT(17, 14, 0);
3414    ASM_DCBT(17, 14, 16);
3415 }
3416
3417 static void test_dcbtst (void)
3418 {
3419    /*  dcbtst RA, RB, TH */
3420    ASM_DCBTST(17, 14, 6);
3421    ASM_DCBTST(17, 14, 15);
3422 }
3423
3424
3425 static test_t tests_dcbt[] = {
3426     { &test_dcbtct       , "   dcbtct", },
3427     { &test_dcbtds       , "   dcbtds", },
3428     { &test_dcbtst       , "   dcbtst", },
3429     { NULL,                   NULL,           },
3430 };
3431
3432
3433 #if defined (IS_PPC405)
3434 static void test_macchw (void)
3435 {
3436     __asm__ __volatile__ ("macchw       17, 14, 15");
3437 }
3438
3439 static void test_macchwo (void)
3440 {
3441     __asm__ __volatile__ ("macchwo      17, 14, 15");
3442 }
3443
3444 static void test_macchws (void)
3445 {
3446     __asm__ __volatile__ ("macchws      17, 14, 15");
3447 }
3448
3449 static void test_macchwso (void)
3450 {
3451     __asm__ __volatile__ ("macchwso     17, 14, 15");
3452 }
3453
3454 static void test_macchwsu (void)
3455 {
3456     __asm__ __volatile__ ("macchwsu     17, 14, 15");
3457 }
3458
3459 static void test_macchwsuo (void)
3460 {
3461     __asm__ __volatile__ ("macchwsuo    17, 14, 15");
3462 }
3463
3464 static void test_macchwu (void)
3465 {
3466     __asm__ __volatile__ ("macchwu      17, 14, 15");
3467 }
3468
3469 static void test_macchwuo (void)
3470 {
3471     __asm__ __volatile__ ("macchwuo     17, 14, 15");
3472 }
3473
3474 static void test_machhw (void)
3475 {
3476     __asm__ __volatile__ ("machhw       17, 14, 15");
3477 }
3478
3479 static void test_machhwo (void)
3480 {
3481     __asm__ __volatile__ ("machhwo      17, 14, 15");
3482 }
3483
3484 static void test_machhws (void)
3485 {
3486     __asm__ __volatile__ ("machhws      17, 14, 15");
3487 }
3488
3489 static void test_machhwso (void)
3490 {
3491     __asm__ __volatile__ ("machhwso     17, 14, 15");
3492 }
3493
3494 static void test_machhwsu (void)
3495 {
3496     __asm__ __volatile__ ("machhwsu     17, 14, 15");
3497 }
3498
3499 static void test_machhwsuo (void)
3500 {
3501     __asm__ __volatile__ ("machhwsuo    17, 14, 15");
3502 }
3503
3504 static void test_machhwu (void)
3505 {
3506     __asm__ __volatile__ ("machhwu      17, 14, 15");
3507 }
3508
3509 static void test_machhwuo (void)
3510 {
3511     __asm__ __volatile__ ("machhwuo     17, 14, 15");
3512 }
3513
3514 static void test_maclhw (void)
3515 {
3516     __asm__ __volatile__ ("maclhw       17, 14, 15");
3517 }
3518
3519 static void test_maclhwo (void)
3520 {
3521     __asm__ __volatile__ ("maclhwo      17, 14, 15");
3522 }
3523
3524 static void test_maclhws (void)
3525 {
3526     __asm__ __volatile__ ("maclhws      17, 14, 15");
3527 }
3528
3529 static void test_maclhwso (void)
3530 {
3531     __asm__ __volatile__ ("maclhwso     17, 14, 15");
3532 }
3533
3534 static void test_maclhwsu (void)
3535 {
3536     __asm__ __volatile__ ("maclhwsu     17, 14, 15");
3537 }
3538
3539 static void test_maclhwsuo (void)
3540 {
3541     __asm__ __volatile__ ("maclhwsuo    17, 14, 15");
3542 }
3543
3544 static void test_maclhwu (void)
3545 {
3546     __asm__ __volatile__ ("maclhwu      17, 14, 15");
3547 }
3548
3549 static void test_maclhwuo (void)
3550 {
3551     __asm__ __volatile__ ("maclhwuo     17, 14, 15");
3552 }
3553
3554 static void test_mulchw (void)
3555 {
3556     __asm__ __volatile__ ("mulchw       17, 14, 15");
3557 }
3558
3559 static void test_mulchwu (void)
3560 {
3561     __asm__ __volatile__ ("mulchwu      17, 14, 15");
3562 }
3563
3564 static void test_mulhhw (void)
3565 {
3566     __asm__ __volatile__ ("mulhhw       17, 14, 15");
3567 }
3568
3569 static void test_mulhhwu (void)
3570 {
3571     __asm__ __volatile__ ("mulhhwu      17, 14, 15");
3572 }
3573
3574 static void test_mullhw (void)
3575 {
3576     __asm__ __volatile__ ("mullhw       17, 14, 15");
3577 }
3578
3579 static void test_mullhwu (void)
3580 {
3581     __asm__ __volatile__ ("mullhwu      17, 14, 15");
3582 }
3583
3584 static void test_nmacchw (void)
3585 {
3586     __asm__ __volatile__ ("nmacchw      17, 14, 15");
3587 }
3588
3589 static void test_nmacchwo (void)
3590 {
3591     __asm__ __volatile__ ("nmacchwo     17, 14, 15");
3592 }
3593
3594 static void test_nmacchws (void)
3595 {
3596     __asm__ __volatile__ ("nmacchws     17, 14, 15");
3597 }
3598
3599 static void test_nmacchwso (void)
3600 {
3601     __asm__ __volatile__ ("nmacchwso    17, 14, 15");
3602 }
3603
3604 static void test_nmachhw (void)
3605 {
3606     __asm__ __volatile__ ("nmachhw      17, 14, 15");
3607 }
3608
3609 static void test_nmachhwo (void)
3610 {
3611     __asm__ __volatile__ ("nmachhwo     17, 14, 15");
3612 }
3613
3614 static void test_nmachhws (void)
3615 {
3616     __asm__ __volatile__ ("nmachhws     17, 14, 15");
3617 }
3618
3619 static void test_nmachhwso (void)
3620 {
3621     __asm__ __volatile__ ("nmachhwso    17, 14, 15");
3622 }
3623
3624 static void test_nmaclhw (void)
3625 {
3626     __asm__ __volatile__ ("nmaclhw      17, 14, 15");
3627 }
3628
3629 static void test_nmaclhwo (void)
3630 {
3631     __asm__ __volatile__ ("nmaclhwo     17, 14, 15");
3632 }
3633
3634 static void test_nmaclhws (void)
3635 {
3636     __asm__ __volatile__ ("nmaclhws     17, 14, 15");
3637 }
3638
3639 static void test_nmaclhwso (void)
3640 {
3641     __asm__ __volatile__ ("nmaclhwso    17, 14, 15");
3642 }
3643
3644 static test_t tests_p4m_ops_two[] = {
3645     { &test_macchw          , "      macchw", },
3646     { &test_macchwo         , "     macchwo", },
3647     { &test_macchws         , "     macchws", },
3648     { &test_macchwso        , "    macchwso", },
3649     { &test_macchwsu        , "    macchwsu", },
3650     { &test_macchwsuo       , "   macchwsuo", },
3651     { &test_macchwu         , "     macchwu", },
3652     { &test_macchwuo        , "    macchwuo", },
3653     { &test_machhw          , "      machhw", },
3654     { &test_machhwo         , "     machhwo", },
3655     { &test_machhws         , "     machhws", },
3656     { &test_machhwso        , "    machhwso", },
3657     { &test_machhwsu        , "    machhwsu", },
3658     { &test_machhwsuo       , "   machhwsuo", },
3659     { &test_machhwu         , "     machhwu", },
3660     { &test_machhwuo        , "    machhwuo", },
3661     { &test_maclhw          , "      maclhw", },
3662     { &test_maclhwo         , "     maclhwo", },
3663     { &test_maclhws         , "     maclhws", },
3664     { &test_maclhwso        , "    maclhwso", },
3665     { &test_maclhwsu        , "    maclhwsu", },
3666     { &test_maclhwsuo       , "   maclhwsuo", },
3667     { &test_maclhwu         , "     maclhwu", },
3668     { &test_maclhwuo        , "    maclhwuo", },
3669     { &test_mulchw          , "      mulchw", },
3670     { &test_mulchwu         , "     mulchwu", },
3671     { &test_mulhhw          , "      mulhhw", },
3672     { &test_mulhhwu         , "     mulhhwu", },
3673     { &test_mullhw          , "      mullhw", },
3674     { &test_mullhwu         , "     mullhwu", },
3675     { &test_nmacchw         , "     nmacchw", },
3676     { &test_nmacchwo        , "    nmacchwo", },
3677     { &test_nmacchws        , "    nmacchws", },
3678     { &test_nmacchwso       , "   nmacchwso", },
3679     { &test_nmachhw         , "     nmachhw", },
3680     { &test_nmachhwo        , "    nmachhwo", },
3681     { &test_nmachhws        , "    nmachhws", },
3682     { &test_nmachhwso       , "   nmachhwso", },
3683     { &test_nmaclhw         , "     nmaclhw", },
3684     { &test_nmaclhwo        , "    nmaclhwo", },
3685     { &test_nmaclhws        , "    nmaclhws", },
3686     { &test_nmaclhwso       , "   nmaclhwso", },
3687     { NULL,                   NULL,           },
3688 };
3689 #endif /* defined (IS_PPC405) */
3690
3691 #if defined (IS_PPC405)
3692 static void test_macchw_ (void)
3693 {
3694     __asm__ __volatile__ ("macchw.      17, 14, 15");
3695 }
3696
3697 static void test_macchwo_ (void)
3698 {
3699     __asm__ __volatile__ ("macchwo.     17, 14, 15");
3700 }
3701
3702 static void test_macchws_ (void)
3703 {
3704     __asm__ __volatile__ ("macchws.     17, 14, 15");
3705 }
3706
3707 static void test_macchwso_ (void)
3708 {
3709     __asm__ __volatile__ ("macchwso.    17, 14, 15");
3710 }
3711
3712 static void test_macchwsu_ (void)
3713 {
3714     __asm__ __volatile__ ("macchwsu.    17, 14, 15");
3715 }
3716
3717 static void test_macchwsuo_ (void)
3718 {
3719     __asm__ __volatile__ ("macchwsuo.   17, 14, 15");
3720 }
3721
3722 static void test_macchwu_ (void)
3723 {
3724     __asm__ __volatile__ ("macchwu.     17, 14, 15");
3725 }
3726
3727 static void test_macchwuo_ (void)
3728 {
3729     __asm__ __volatile__ ("macchwuo.    17, 14, 15");
3730 }
3731
3732 static void test_machhw_ (void)
3733 {
3734     __asm__ __volatile__ ("machhw.      17, 14, 15");
3735 }
3736
3737 static void test_machhwo_ (void)
3738 {
3739     __asm__ __volatile__ ("machhwo.     17, 14, 15");
3740 }
3741
3742 static void test_machhws_ (void)
3743 {
3744     __asm__ __volatile__ ("machhws.     17, 14, 15");
3745 }
3746
3747 static void test_machhwso_ (void)
3748 {
3749     __asm__ __volatile__ ("machhwso.    17, 14, 15");
3750 }
3751
3752 static void test_machhwsu_ (void)
3753 {
3754     __asm__ __volatile__ ("machhwsu.    17, 14, 15");
3755 }
3756
3757 static void test_machhwsuo_ (void)
3758 {
3759     __asm__ __volatile__ ("machhwsuo.   17, 14, 15");
3760 }
3761
3762 static void test_machhwu_ (void)
3763 {
3764     __asm__ __volatile__ ("machhwu.     17, 14, 15");
3765 }
3766
3767 static void test_machhwuo_ (void)
3768 {
3769     __asm__ __volatile__ ("machhwuo.    17, 14, 15");
3770 }
3771
3772 static void test_maclhw_ (void)
3773 {
3774     __asm__ __volatile__ ("maclhw.      17, 14, 15");
3775 }
3776
3777 static void test_maclhwo_ (void)
3778 {
3779     __asm__ __volatile__ ("maclhwo.     17, 14, 15");
3780 }
3781
3782 static void test_maclhws_ (void)
3783 {
3784     __asm__ __volatile__ ("maclhws.     17, 14, 15");
3785 }
3786
3787 static void test_maclhwso_ (void)
3788 {
3789     __asm__ __volatile__ ("maclhwso.    17, 14, 15");
3790 }
3791
3792 static void test_maclhwsu_ (void)
3793 {
3794     __asm__ __volatile__ ("maclhwsu.    17, 14, 15");
3795 }
3796
3797 static void test_maclhwsuo_ (void)
3798 {
3799     __asm__ __volatile__ ("maclhwsuo.   17, 14, 15");
3800 }
3801
3802 static void test_maclhwu_ (void)
3803 {
3804     __asm__ __volatile__ ("maclhwu.     17, 14, 15");
3805 }
3806
3807 static void test_maclhwuo_ (void)
3808 {
3809     __asm__ __volatile__ ("maclhwuo.    17, 14, 15");
3810 }
3811
3812 static void test_mulchw_ (void)
3813 {
3814     __asm__ __volatile__ ("mulchw.      17, 14, 15");
3815 }
3816
3817 static void test_mulchwu_ (void)
3818 {
3819     __asm__ __volatile__ ("mulchwu.     17, 14, 15");
3820 }
3821
3822 static void test_mulhhw_ (void)
3823 {
3824     __asm__ __volatile__ ("mulhhw.      17, 14, 15");
3825 }
3826
3827 static void test_mulhhwu_ (void)
3828 {
3829     __asm__ __volatile__ ("mulhhwu.     17, 14, 15");
3830 }
3831
3832 static void test_mullhw_ (void)
3833 {
3834     __asm__ __volatile__ ("mullhw.      17, 14, 15");
3835 }
3836
3837 static void test_mullhwu_ (void)
3838 {
3839     __asm__ __volatile__ ("mullhwu.     17, 14, 15");
3840 }
3841
3842 static void test_nmacchw_ (void)
3843 {
3844     __asm__ __volatile__ ("nmacchw.     17, 14, 15");
3845 }
3846
3847 static void test_nmacchwo_ (void)
3848 {
3849     __asm__ __volatile__ ("nmacchwo.    17, 14, 15");
3850 }
3851
3852 static void test_nmacchws_ (void)
3853 {
3854     __asm__ __volatile__ ("nmacchws.    17, 14, 15");
3855 }
3856
3857 static void test_nmacchwso_ (void)
3858 {
3859     __asm__ __volatile__ ("nmacchwso.   17, 14, 15");
3860 }
3861
3862 static void test_nmachhw_ (void)
3863 {
3864     __asm__ __volatile__ ("nmachhw.     17, 14, 15");
3865 }
3866
3867 static void test_nmachhwo_ (void)
3868 {
3869     __asm__ __volatile__ ("nmachhwo.    17, 14, 15");
3870 }
3871
3872 static void test_nmachhws_ (void)
3873 {
3874     __asm__ __volatile__ ("nmachhws.    17, 14, 15");
3875 }
3876
3877 static void test_nmachhwso_ (void)
3878 {
3879     __asm__ __volatile__ ("nmachhwso.   17, 14, 15");
3880 }
3881
3882 static void test_nmaclhw_ (void)
3883 {
3884     __asm__ __volatile__ ("nmaclhw.     17, 14, 15");
3885 }
3886
3887 static void test_nmaclhwo_ (void)
3888 {
3889     __asm__ __volatile__ ("nmaclhwo.    17, 14, 15");
3890 }
3891
3892 static void test_nmaclhws_ (void)
3893 {
3894     __asm__ __volatile__ ("nmaclhws.    17, 14, 15");
3895 }
3896
3897 static void test_nmaclhwso_ (void)
3898 {
3899     __asm__ __volatile__ ("nmaclhwso.   17, 14, 15");
3900 }
3901
3902 static test_t tests_p4mc_ops_two[] = {
3903     { &test_macchw_         , "     macchw.", },
3904     { &test_macchwo_        , "    macchwo.", },
3905     { &test_macchws_        , "    macchws.", },
3906     { &test_macchwso_       , "   macchwso.", },
3907     { &test_macchwsu_       , "   macchwsu.", },
3908     { &test_macchwsuo_      , "  macchwsuo.", },
3909     { &test_macchwu_        , "    macchwu.", },
3910     { &test_macchwuo_       , "   macchwuo.", },
3911     { &test_machhw_         , "     machhw.", },
3912     { &test_machhwo_        , "    machhwo.", },
3913     { &test_machhws_        , "    machhws.", },
3914     { &test_machhwso_       , "   machhwso.", },
3915     { &test_machhwsu_       , "   machhwsu.", },
3916     { &test_machhwsuo_      , "  machhwsuo.", },
3917     { &test_machhwu_        , "    machhwu.", },
3918     { &test_machhwuo_       , "   machhwuo.", },
3919     { &test_maclhw_         , "     maclhw.", },
3920     { &test_maclhwo_        , "    maclhwo.", },
3921     { &test_maclhws_        , "    maclhws.", },
3922     { &test_maclhwso_       , "   maclhwso.", },
3923     { &test_maclhwsu_       , "   maclhwsu.", },
3924     { &test_maclhwsuo_      , "  maclhwsuo.", },
3925     { &test_maclhwu_        , "    maclhwu.", },
3926     { &test_maclhwuo_       , "   maclhwuo.", },
3927     { &test_mulchw_         , "     mulchw.", },
3928     { &test_mulchwu_        , "    mulchwu.", },
3929     { &test_mulhhw_         , "     mulhhw.", },
3930     { &test_mulhhwu_        , "    mulhhwu.", },
3931     { &test_mullhw_         , "     mullhw.", },
3932     { &test_mullhwu_        , "    mullhwu.", },
3933     { &test_nmacchw_        , "    nmacchw.", },
3934     { &test_nmacchwo_       , "   nmacchwo.", },
3935     { &test_nmacchws_       , "   nmacchws.", },
3936     { &test_nmacchwso_      , "  nmacchwso.", },
3937     { &test_nmachhw_        , "    nmachhw.", },
3938     { &test_nmachhwo_       , "   nmachhwo.", },
3939     { &test_nmachhws_       , "   nmachhws.", },
3940     { &test_nmachhwso_      , "  nmachhwso.", },
3941     { &test_nmaclhw_        , "    nmaclhw.", },
3942     { &test_nmaclhwo_       , "   nmaclhwo.", },
3943     { &test_nmaclhws_       , "   nmaclhws.", },
3944     { &test_nmaclhwso_      , "  nmaclhwso.", },
3945     { NULL,                   NULL,           },
3946 };
3947 #endif /* defined (IS_PPC405) */
3948
3949 static test_table_t all_tests[] = {
3950     {
3951         tests_ia_ops_two      ,
3952         "PPC integer arith insns with two args",
3953         0x00010102,
3954     },
3955     {
3956         tests_iar_ops_two     ,
3957         "PPC integer arith insns with two args with flags update",
3958         0x01010102,
3959     },
3960     {
3961         tests_iac_ops_two     ,
3962         "PPC integer arith insns with two args and carry",
3963         0x02010102,
3964     },
3965     {
3966         tests_iacr_ops_two    ,
3967         "PPC integer arith insns with two args and carry with flags update",
3968         0x03010102,
3969     },
3970     {
3971         tests_il_ops_two      ,
3972         "PPC integer logical insns with two args",
3973         0x00010202,
3974     },
3975     {
3976         tests_il_ops_two_sh      ,
3977         "PPC integer shift algebraic two args",
3978         0x00070202,
3979     },
3980     {
3981         tests_ilr_ops_two     ,
3982         "PPC integer logical insns with two args with flags update",
3983         0x01010202,
3984     },
3985     {
3986         tests_ilr_ops_two_sh     ,
3987         "PPC integer shift algebraic two args with flags update",
3988         0x01070202,
3989     },
3990     {
3991         tests_icr_ops_two     ,
3992         "PPC integer compare insns (two args)",
3993         0x01010304,
3994     },
3995     {
3996         tests_icr_ops_two_i16 ,
3997         "PPC integer compare with immediate insns (two args)",
3998         0x01010305,
3999     },
4000     {
4001         tests_ia_ops_two_i16  ,
4002         "PPC integer arith insns\n    with one register + one 16 bits immediate args",
4003         0x00010106,
4004     },
4005     {
4006         tests_iar_ops_two_i16 ,
4007         "PPC integer arith insns\n    with one register + one 16 bits immediate args with flags update",
4008         0x01010106,
4009     },
4010     {
4011         tests_il_ops_two_i16  ,
4012         "PPC integer logical insns\n    with one register + one 16 bits immediate args",
4013         0x00010206,
4014     },
4015     {
4016         tests_ilr_ops_two_i16 ,
4017         "PPC integer logical insns\n    with one register + one 16 bits immediate args with flags update",
4018         0x01010206,
4019     },
4020     {
4021         tests_crl_ops_two     ,
4022         "PPC condition register logical insns - two operands",
4023         0x01010202,
4024     },
4025     {
4026         tests_iac_ops_one     ,
4027         "PPC integer arith insns with one arg and carry",
4028         0x02010101,
4029     },
4030     {
4031         tests_iacr_ops_one    ,
4032         "PPC integer arith insns with one arg and carry with flags update",
4033         0x03010101,
4034     },
4035     {
4036         tests_il_ops_one      ,
4037         "PPC integer logical insns with one arg",
4038         0x00010201,
4039     },
4040     {
4041         tests_ilr_ops_one     ,
4042         "PPC integer logical insns with one arg with flags update",
4043         0x01010201,
4044     },
4045     {
4046         tests_il_ops_mfspr      ,
4047         "PPC mfspr instructions",
4048         0x00080207,
4049     },
4050     {
4051         tests_il_ops_spe      ,
4052         "PPC logical insns with special forms",
4053         0x00010207,
4054     },
4055     {
4056         tests_il_ops_spe_sh      ,
4057         "PPC shift algebraic with special forms",
4058         0x00070207,
4059     },
4060     {
4061         tests_ilr_ops_spe     ,
4062         "PPC logical insns with special forms with flags update",
4063         0x01010207,
4064     },
4065     {
4066         tests_ilr_ops_spe_sh     ,
4067         "PPC shift algebraic with special forms with flags update",
4068         0x01070207,
4069     },
4070     {
4071         tests_ild_ops_two_i16 ,
4072         "PPC integer load insns\n    with one register + one 16 bits immediate args with flags update",
4073         0x00010508,
4074     },
4075     {
4076         tests_ild_ops_two     ,
4077         "PPC integer load insns with two register args",
4078         0x00010509,
4079     },
4080     {
4081         tests_ist_ops_three_i16,
4082         "PPC integer store insns\n    with one register + one 16 bits immediate args with flags update",
4083         0x0001050a,
4084     },
4085     {
4086         tests_ist_ops_three   ,
4087         "PPC integer store insns with three register args",
4088         0x0001050b,
4089     },
4090     {
4091         tests_popcnt_ops_one   ,
4092         "PPC integer population count with one register args, no flags",
4093         0x00010601,
4094     },
4095 #if !defined (NO_FLOAT)
4096     {
4097         tests_fa_ops_three    ,
4098         "PPC floating point arith insns with three args",
4099         0x00020103,
4100     },
4101 #endif /* !defined (NO_FLOAT) */
4102 #if !defined (NO_FLOAT)
4103     {
4104         tests_far_ops_three    ,
4105         "PPC floating point arith insns\n    with three args with flags update",
4106         0x01020103,
4107     },
4108 #endif /* !defined (NO_FLOAT) */
4109 #if !defined (NO_FLOAT)
4110     {
4111         tests_fa_ops_two      ,
4112         "PPC floating point arith insns with two args",
4113         0x00020102,
4114     },
4115 #endif /* !defined (NO_FLOAT) */
4116 #if !defined (NO_FLOAT)
4117     {
4118         tests_far_ops_two     ,
4119         "PPC floating point arith insns\n    with two args with flags update",
4120         0x01020102,
4121     },
4122 #endif /* !defined (NO_FLOAT) */
4123 #if !defined (NO_FLOAT)
4124     {
4125         tests_fcr_ops_two     ,
4126         "PPC floating point compare insns (two args)",
4127         0x01020304,
4128     },
4129 #endif /* !defined (NO_FLOAT) */
4130 #if !defined (NO_FLOAT)
4131     {
4132         tests_fa_ops_one      ,
4133         "PPC floating point arith insns with one arg",
4134         0x00020101,
4135     },
4136 #endif /* !defined (NO_FLOAT) */
4137 #if !defined (NO_FLOAT)
4138     {
4139         tests_far_ops_one     ,
4140         "PPC floating point arith insns\n    with one arg with flags update",
4141         0x01020101,
4142     },
4143 #endif /* !defined (NO_FLOAT) */
4144 #if !defined (NO_FLOAT)
4145     {
4146         tests_fl_ops_spe      ,
4147         "PPC floating point status register manipulation insns",
4148         0x00020207,
4149     },
4150 #endif /* !defined (NO_FLOAT) */
4151 #if !defined (NO_FLOAT)
4152     {
4153         tests_flr_ops_spe     ,
4154         "PPC floating point status register manipulation insns\n  with flags update",
4155         0x01020207,
4156     },
4157 #endif /* !defined (NO_FLOAT) */
4158 #if !defined (NO_FLOAT)
4159     {
4160         tests_fld_ops_two_i16 ,
4161         "PPC float load insns\n    with one register + one 16 bits immediate args with flags update",
4162         0x00020508,
4163     },
4164 #endif /* !defined (NO_FLOAT) */
4165 #if !defined (NO_FLOAT)
4166     {
4167         tests_fld_ops_two     ,
4168         "PPC float load insns with two register args",
4169         0x00020509,
4170     },
4171 #endif /* !defined (NO_FLOAT) */
4172 #if !defined (NO_FLOAT)
4173     {
4174         tests_fst_ops_three_i16,
4175         "PPC float store insns\n    with one register + one 16 bits immediate args with flags update",
4176         0x0002050a,
4177     },
4178 #endif /* !defined (NO_FLOAT) */
4179 #if !defined (NO_FLOAT)
4180     {
4181         tests_fst_ops_three   ,
4182         "PPC float store insns with three register args",
4183         0x0002050b,
4184     },
4185 #endif /* !defined (NO_FLOAT) */
4186 #if defined (HAS_ALTIVEC)
4187     {
4188         tests_aa_ops_three    ,
4189         "PPC altivec integer arith insns with three args",
4190         0x00040103,
4191     },
4192 #endif /* defined (HAS_ALTIVEC) */
4193 #if defined (HAS_ALTIVEC)
4194     {
4195         tests_al_ops_three    ,
4196         "PPC altivec integer logical insns with three args",
4197         0x00040203,
4198     },
4199 #endif /* defined (HAS_ALTIVEC) */
4200 #if defined (HAS_ALTIVEC)
4201     {
4202         tests_aa_ops_two      ,
4203         "PPC altivec integer arith insns with two args",
4204         0x00040102,
4205     },
4206 #endif /* defined (HAS_ALTIVEC) */
4207 #if defined (HAS_ALTIVEC)
4208     {
4209         tests_al_ops_two      ,
4210         "PPC altivec integer logical insns with two args",
4211         0x00040202,
4212     },
4213 #endif /* defined (HAS_ALTIVEC) */
4214 #if defined (HAS_ALTIVEC)
4215     {
4216         tests_al_ops_one      ,
4217         "PPC altivec integer logical insns with one arg",
4218         0x00040201,
4219     },
4220 #endif /* defined (HAS_ALTIVEC) */
4221 #if defined (HAS_ALTIVEC)
4222     {
4223         tests_ac_ops_two      ,
4224         "Altivec integer compare insns",
4225         0x00040302,
4226     },
4227 #endif /* defined (HAS_ALTIVEC) */
4228 #if defined (HAS_ALTIVEC)
4229     {
4230         tests_acr_ops_two     ,
4231         "Altivec integer compare insns with flags update",
4232         0x01040302,
4233     },
4234 #endif /* defined (HAS_ALTIVEC) */
4235 #if defined (HAS_ALTIVEC)
4236     {
4237         tests_av_int_ops_spe  ,
4238         "Altivec integer special insns",
4239         0x00040207,
4240     },
4241 #endif /* defined (HAS_ALTIVEC) */
4242 #if defined (HAS_ALTIVEC)
4243     {
4244         tests_ald_ops_two     ,
4245         "Altivec load insns with two register args",
4246         0x00040509,
4247     },
4248 #endif /* defined (HAS_ALTIVEC) */
4249 #if defined (HAS_ALTIVEC)
4250     {
4251         tests_ast_ops_three   ,
4252         "Altivec store insns with three register args",
4253         0x0004050b,
4254     },
4255 #endif /* defined (HAS_ALTIVEC) */
4256 #if defined (HAS_ALTIVEC)
4257     {
4258         tests_afa_ops_two     ,
4259         "Altivec floating point arith insns with two args",
4260         0x00050102,
4261     },
4262 #endif /* defined (HAS_ALTIVEC) */
4263 #if defined (HAS_ALTIVEC)
4264     {
4265         tests_afa_ops_three   ,
4266         "Altivec floating point arith insns with three args",
4267         0x00050103,
4268     },
4269 #endif /* defined (HAS_ALTIVEC) */
4270 #if defined (HAS_ALTIVEC)
4271     {
4272         tests_afa_ops_one     ,
4273         "Altivec floating point arith insns with one arg",
4274         0x00050101,
4275     },
4276 #endif /* defined (HAS_ALTIVEC) */
4277 #if defined (HAS_ALTIVEC)
4278     {
4279         tests_afc_ops_two     ,
4280         "Altivec floating point compare insns",
4281         0x00050302,
4282     },
4283 #endif /* defined (HAS_ALTIVEC) */
4284 #if defined (HAS_ALTIVEC)
4285     {
4286         tests_afcr_ops_two    ,
4287         "Altivec floating point compare insns with flags update",
4288         0x01050302,
4289     },
4290 #endif /* defined (HAS_ALTIVEC) */
4291 #if defined (HAS_ALTIVEC)
4292     {
4293         tests_av_float_ops_spe,
4294         "Altivec float special insns",
4295         0x00050207,
4296     },
4297 #endif /* defined (HAS_ALTIVEC) */
4298     {
4299         tests_dcbt,
4300         "Miscellaneous test: Data cache insns",
4301         0x0006070C,
4302     },
4303 #if defined (IS_PPC405)
4304     {
4305         tests_p4m_ops_two     ,
4306         "PPC 405 mac insns with three args",
4307         0x00030102,
4308     },
4309 #endif /* defined (IS_PPC405) */
4310 #if defined (IS_PPC405)
4311     {
4312         tests_p4mc_ops_two    ,
4313         "PPC 405 mac insns with three args with flags update",
4314         0x01030102,
4315     },
4316 #endif /* defined (IS_PPC405) */
4317     { NULL,                   NULL,               0x00000000, },
4318 };
4319
4320 /* -------------- END #include "ops-ppc.c" -------------- */
4321
4322 static int verbose = 0;
4323 static int arg_list_size = 0;
4324
4325 static double *fargs = NULL;
4326 static int nb_fargs = 0;
4327 static int nb_normal_fargs = 0;
4328 static HWord_t *iargs = NULL;
4329 static int nb_iargs = 0;
4330 static uint16_t *ii16 = NULL;
4331 static int nb_ii16 = 0;
4332
4333 #if defined (HAS_ALTIVEC)
4334 static vector unsigned int* viargs = NULL;
4335 static int nb_viargs = 0;
4336 static vector float* vfargs = NULL;
4337 static int nb_vfargs = 0;
4338
4339 //#define TEST_VSCR_SAT
4340 #endif
4341
4342 static inline void register_farg (void *farg,
4343                                   int s, uint16_t _exp, uint64_t mant)
4344 {
4345    uint64_t tmp;
4346
4347    tmp = ((uint64_t)s << 63) | ((uint64_t)_exp << 52) | mant;
4348    *(uint64_t *)farg = tmp;
4349 #ifndef __powerpc64__
4350    AB_DPRINTF("%d %03x %013llx => %016llx %0e\n",
4351 #else
4352    AB_DPRINTF("%d %03x %013lx => %016lx %0e\n",
4353 #endif
4354               s, _exp, mant, *(uint64_t *)farg, *(double *)farg);
4355 }
4356
4357 static void build_fargs_table (void)
4358 {
4359    /* Double precision:
4360     * Sign goes from zero to one               (1 bit)
4361     * Exponent goes from 0 to ((1 << 12) - 1)  (11 bits)
4362     * Mantissa goes from 1 to ((1 << 52) - 1)  (52 bits)
4363     * + special values:
4364     * +0.0      : 0 0x000 0x0000000000000 => 0x0000000000000000
4365     * -0.0      : 1 0x000 0x0000000000000 => 0x8000000000000000
4366     * +infinity : 0 0x7FF 0x0000000000000 => 0x7FF0000000000000
4367     * -infinity : 1 0x7FF 0x0000000000000 => 0xFFF0000000000000
4368     * +QNaN     : 0 0x7FF 0x7FFFFFFFFFFFF => 0x7FF7FFFFFFFFFFFF
4369     * -QNaN     : 1 0x7FF 0x7FFFFFFFFFFFF => 0xFFF7FFFFFFFFFFFF
4370     * +SNaN     : 0 0x7FF 0x8000000000000 => 0x7FF8000000000000
4371     * -SNaN     : 1 0x7FF 0x8000000000000 => 0xFFF8000000000000
4372     * (8 values)
4373
4374     * Ref only:
4375     * Single precision
4376     * Sign:     1 bit
4377     * Exponent: 8 bits
4378     * Mantissa: 23 bits
4379     * +0.0      : 0 0x00 0x000000 => 0x00000000
4380     * -0.0      : 1 0x00 0x000000 => 0x80000000
4381     * +infinity : 0 0xFF 0x000000 => 0x7F800000
4382     * -infinity : 1 0xFF 0x000000 => 0xFF800000
4383     * +QNaN     : 0 0xFF 0x3FFFFF => 0x7FBFFFFF
4384     * -QNaN     : 1 0xFF 0x3FFFFF => 0xFFBFFFFF
4385     * +SNaN     : 0 0xFF 0x400000 => 0x7FC00000
4386     * -SNaN     : 1 0xFF 0x400000 => 0xFFC00000
4387     */
4388    uint64_t mant;
4389    uint16_t _exp, e0, e1;
4390    int s;
4391    int i=0;
4392
4393    /* Note: VEX isn't so hot with denormals, so don't bother
4394       testing them: set _exp > 0
4395    */
4396
4397    if ( arg_list_size == 1 ) {   // Large
4398       fargs = malloc(200 * sizeof(double));
4399       for (s=0; s<2; s++) {
4400          for (e0=0; e0<2; e0++) {
4401             for (e1=0x001; ; e1 = ((e1 + 1) << 2) + 6) {
4402                if (e1 >= 0x400)
4403                   e1 = 0x3fe;
4404                _exp = (e0 << 10) | e1;
4405                for (mant = 0x0000000000001ULL; mant < (1ULL << 52);
4406                     /* Add 'random' bits */
4407                     mant = ((mant + 0x4A6) << 13) + 0x359) {
4408                   register_farg(&fargs[i++], s, _exp, mant);
4409                }
4410                if (e1 == 0x3fe)
4411                   break;
4412             }
4413          }
4414       }
4415    } else {                      // Default
4416       fargs = malloc(16 * sizeof(double));
4417       for (s=0; s<2; s++) {                                // x2
4418 //       for (e0=0; e0<2; e0++) {
4419             for (e1=0x001; ; e1 = ((e1 + 1) << 13) + 7) {  // x2
4420 //          for (e1=0x001; ; e1 = ((e1 + 1) << 5) + 7) {   // x3
4421                if (e1 >= 0x400)
4422                   e1 = 0x3fe;
4423 //             _exp = (e0 << 10) | e1;
4424                _exp = e1;
4425                for (mant = 0x0000000000001ULL; mant < (1ULL << 52);
4426                     /* Add 'random' bits */
4427                     mant = ((mant + 0x4A6) << 29) + 0x359) {  // x2
4428                   register_farg(&fargs[i++], s, _exp, mant);
4429                }
4430                if (e1 == 0x3fe)
4431                   break;
4432             }
4433 //       }
4434       }
4435    }
4436
4437    /* To iterate over non-special values only */
4438    nb_normal_fargs = i;
4439
4440
4441    /* Special values */
4442    /* +0.0      : 0 0x000 0x0000000000000 */
4443    s = 0;
4444    _exp = 0x000;
4445    mant = 0x0000000000000ULL;
4446    register_farg(&fargs[i++], s, _exp, mant);
4447    /* -0.0      : 1 0x000 0x0000000000000 */
4448    s = 1;
4449    _exp = 0x000;
4450    mant = 0x0000000000000ULL;
4451    register_farg(&fargs[i++], s, _exp, mant);
4452    /* +infinity : 0 0x7FF 0x0000000000000  */
4453    s = 0;
4454    _exp = 0x7FF;
4455    mant = 0x0000000000000ULL;
4456    register_farg(&fargs[i++], s, _exp, mant);
4457    /* -infinity : 1 0x7FF 0x0000000000000 */
4458    s = 1;
4459    _exp = 0x7FF;
4460    mant = 0x0000000000000ULL;
4461    register_farg(&fargs[i++], s, _exp, mant);
4462    /* +QNaN     : 0 0x7FF 0x7FFFFFFFFFFFF */
4463    s = 0;
4464    _exp = 0x7FF;
4465    mant = 0x7FFFFFFFFFFFFULL;
4466    register_farg(&fargs[i++], s, _exp, mant);
4467    /* -QNaN     : 1 0x7FF 0x7FFFFFFFFFFFF */
4468    s = 1;
4469    _exp = 0x7FF;
4470    mant = 0x7FFFFFFFFFFFFULL;
4471    register_farg(&fargs[i++], s, _exp, mant);
4472    /* +SNaN     : 0 0x7FF 0x8000000000000 */
4473    s = 0;
4474    _exp = 0x7FF;
4475    mant = 0x8000000000000ULL;
4476    register_farg(&fargs[i++], s, _exp, mant);
4477    /* -SNaN     : 1 0x7FF 0x8000000000000 */
4478    s = 1;
4479    _exp = 0x7FF;
4480    mant = 0x8000000000000ULL;
4481    register_farg(&fargs[i++], s, _exp, mant);
4482    AB_DPRINTF("Registered %d fargs values\n", i);
4483
4484    nb_fargs = i;
4485 }
4486
4487 static void build_iargs_table (void)
4488 {
4489    uint64_t tmp;
4490    int i=0;
4491
4492 #ifndef __powerpc64__
4493    if (arg_list_size == 1) {                   // Large
4494       iargs = malloc(400 * sizeof(HWord_t));
4495       for (tmp=0; ; tmp = tmp + 1 + (tmp >> 1)) {
4496          if (tmp >= 0x100000000ULL)
4497             tmp = 0xFFFFFFFF;
4498          iargs[i++] = (HWord_t)tmp;
4499          AB_DPRINTF("val %08x\n", (HWord_t)tmp);
4500          if (tmp == 0xFFFFFFFF)
4501             break;
4502       }
4503    } else {                                    // Default
4504       iargs = malloc(10 * sizeof(HWord_t));
4505       // for (tmp = 0; ; tmp = 71*tmp + 1 + (tmp>>1)) {  // gives 8
4506       // for (tmp = 0; ; tmp = 100000*tmp + 1 + (tmp>>1)) {  // gives 4
4507       for (tmp=0; ; tmp = 999999*tmp + 999999) {  // gives 3
4508          if (tmp >= 0x100000000ULL)
4509             tmp = 0xFFFFFFFF;
4510          iargs[i++] = (HWord_t)tmp;
4511          AB_DPRINTF("val %08x\n", (HWord_t)tmp);
4512          if (tmp == 0xFFFFFFFF)
4513             break;
4514       }
4515    }
4516 #else
4517    if (arg_list_size == 1) {                   // Large
4518       iargs = malloc(800 * sizeof(HWord_t));
4519       for (tmp=0; ; tmp = 2*tmp + 1 + (tmp >> 2)) {
4520          if ((long)tmp < 0 )
4521             tmp = 0xFFFFFFFFFFFFFFFFULL;
4522          iargs[i++] = tmp;
4523          AB_DPRINTF("val %016lx\n", tmp);
4524          if (tmp == 0xFFFFFFFFFFFFFFFFULL)
4525             break;
4526       }
4527    } else {                                    // Default
4528       iargs = malloc(20 * sizeof(HWord_t));
4529       // for (tmp=0; ; tmp = 9999*tmp + 999999) {  // gives 6
4530       for (tmp = 0; ; tmp = 123456789*tmp + 123456789999) {  // gives 3
4531          if ((long)tmp < 0 )
4532             tmp = 0xFFFFFFFFFFFFFFFFULL;
4533          iargs[i++] = tmp;
4534          AB_DPRINTF("val %016lx\n", tmp);
4535          if (tmp == 0xFFFFFFFFFFFFFFFFULL)
4536             break;
4537       }
4538    }
4539 #endif // #ifndef __powerpc64__
4540
4541    AB_DPRINTF("Registered %d iargs values\n", i);
4542    nb_iargs = i;
4543 }
4544
4545 static void build_ii16_table (void)
4546 {
4547    uint32_t tmp;
4548    int i=0;
4549
4550    if (arg_list_size == 1) {                   // Large
4551       ii16 = malloc(200 * sizeof(uint32_t));
4552       for (tmp=0; ; tmp = tmp + 1 + (tmp >> 2)) {
4553          if (tmp >= 0x10000)
4554             tmp = 0xFFFF;
4555          ii16[i++] = tmp;
4556          AB_DPRINTF("val %04x\n", tmp);
4557          if (tmp == 0xFFFF)
4558             break;
4559       }
4560    } else {                                    // Default
4561       ii16 = malloc(10 * sizeof(uint32_t));
4562       for (tmp=0; ; tmp = 999*tmp + 999) {  // gives 3
4563          if (tmp >= 0x10000)
4564             tmp = 0xFFFF;
4565          ii16[i++] = tmp;
4566          AB_DPRINTF("val %04x\n", tmp);
4567          if (tmp == 0xFFFF)
4568             break;
4569       }
4570    }
4571    AB_DPRINTF("Registered %d ii16 values\n", i);
4572    nb_ii16 = i;
4573 }
4574
4575 #if defined (HAS_ALTIVEC)
4576 static void build_viargs_table (void)
4577 {
4578 #if !defined (ALTIVEC_ARGS_LARGE)
4579    unsigned int i=2;
4580    viargs = memalign16(i * sizeof(vector unsigned int));
4581    viargs[0] = (vector unsigned int) { 0x01020304,0x05060708,0x090A0B0C,0x0E0D0E0F };
4582    AB_DPRINTF_VEC32x4( viargs[0] );
4583    viargs[1] = (vector unsigned int) { 0xF1F2F3F4,0xF5F6F7F8,0xF9FAFBFC,0xFEFDFEFF };
4584    AB_DPRINTF_VEC32x4( viargs[1] );
4585 #else
4586    unsigned int i,j;
4587    // build from iargs table (large/default already set)
4588    viargs = malloc(nb_iargs * sizeof(vector unsigned int));
4589    for (i=0; i<nb_iargs; i++) {
4590       j = iargs[i];
4591       viargs[i] = (vector unsigned int){ j, j*2, j*3, j*4 };
4592       AB_DPRINTF_VEC32x4( viargs[i] );
4593    }
4594 #endif
4595
4596    AB_DPRINTF("Registered %d viargs values\n", i);
4597    nb_viargs = i;
4598 }
4599
4600 static inline void register_vfarg (vector float* vfarg,
4601                                   int s, uint8_t _exp, uint32_t mant)
4602 {
4603    uint32_t tmp;
4604    vector uint32_t* vfargI = (vector uint32_t*)vfarg;
4605
4606    tmp = ((uint64_t)s << 31) | ((uint64_t)_exp << 23) | mant;
4607    *vfargI = (vector uint32_t){ tmp,tmp,tmp,tmp };
4608    AB_DPRINTF("%d %02x %06x => %08x %0e\n",
4609               s, _exp, mant, *((uint32_t*)&tmp), *(float*)&tmp);
4610 }
4611
4612 static void build_vfargs_table (void)
4613 {
4614    /* Sign goes from zero to one
4615     * Exponent goes from 0 to ((1 << 9) - 1)
4616     * Mantissa goes from 1 to ((1 << 24) - 1)
4617     * + special values:
4618     * +0.0      : 0 0x00 0x000000            => 0x00000000
4619     * -0.0      : 1 0x00 0x000000            => 0x80000000
4620     * +infinity : 0 0xFF 0x000000            => 0x7F800000
4621     * -infinity : 1 0xFF 0x000000            => 0xFF800000
4622     * +SNaN     : 0 0xFF 0x7FFFFF (non-zero) => 0x7FFFFFFF
4623     * -SNaN     : 1 0xFF 0x7FFFFF (non-zero) => 0xFFFFFFFF
4624     * +QNaN     : 0 0xFF 0x3FFFFF (non-zero) => 0x7FBFFFFF
4625     * -QNaN     : 1 0xFF 0x3FFFFF (non-zero) => 0xFFBFFFFF
4626     * (8 values)
4627     */
4628    uint32_t mant;
4629    uint16_t _exp;
4630    int s;
4631    int i=0;
4632
4633
4634 #if !defined (ALTIVEC_ARGS_LARGE)
4635    nb_vfargs = 12;
4636    vfargs = memalign16(nb_vfargs * sizeof(vector float));
4637
4638    // 4 values:
4639    for (s=0; s<2; s++) {
4640       for (_exp=0x5; ; _exp += 0x9D ) {
4641          if (_exp > 0xDF)
4642             break;
4643          for (mant = 0x3FFFFF; mant < 0x7FFFFF;
4644               mant = /* random */ ((mant + 0x1A6) << 31) + 0x159) {
4645             register_vfarg(&vfargs[i++], s, (uint8_t)_exp, mant);
4646          }
4647       }
4648    }
4649 #else
4650    nb_vfargs = 50;
4651    vfargs = memalign16(nb_vfargs * sizeof(vector float));
4652
4653    for (s=0; s<2; s++) {
4654       for (_exp=0x0; ; _exp += 0x3F ) {
4655          //      for (_exp=0; ; _exp = ((_exp + 1) << 1) + 3) {
4656          if (_exp >= 0xFE)
4657             _exp = 0xFE;
4658          for (mant = 0x0; mant < 0x7FFFFF;
4659               mant = /* random */ ((mant + 0x4A6) << 5) + 0x359) {
4660             register_vfarg(&vfargs[i++], s, (uint8_t)_exp, mant);
4661          }
4662          if (_exp >= 0xFE)
4663             break;
4664       }
4665    }
4666 #endif
4667
4668    /* Special values */
4669    /* +0.0      : 0 0x00 0x000000 */
4670    s = 0;
4671    _exp = 0x00;
4672    mant = 0x000000;
4673    register_vfarg(&vfargs[i++], s, _exp, mant);
4674    /* -0.0      : 1 0x00 0x000000 */
4675    s = 1;
4676    _exp = 0x00;
4677    mant = 0x000000;
4678    register_vfarg(&vfargs[i++], s, _exp, mant);
4679
4680    /* +infinity : 0 0xFF 0x000000  */
4681    s = 0;
4682    _exp = 0xFF;
4683    mant = 0x000000;
4684    register_vfarg(&vfargs[i++], s, _exp, mant);
4685    /* -infinity : 1 0xFF 0x000000 */
4686    s = 1;
4687    _exp = 0xFF;
4688    mant = 0x000000;
4689    register_vfarg(&vfargs[i++], s, _exp, mant);
4690
4691    /* NaN: _exponent all 1s, non-zero fraction */
4692    /* SNaN is a NaN with the most significant fraction bit clear.*/
4693    /* +SNaN     : 0 0xFF 0x7FFFFF */
4694    s = 0;
4695    _exp = 0xFF;
4696    mant = 0x7FFFFF;
4697    register_vfarg(&vfargs[i++], s, _exp, mant);
4698    /* -SNaN     : 1 0xFF 0x7FFFFF */
4699    s = 1;
4700    _exp = 0xFF;
4701    mant = 0x7FFFFF;
4702    register_vfarg(&vfargs[i++], s, _exp, mant);
4703
4704    /* QNaN is a NaN with the most significant fraction bit set */
4705    /* +QNaN     : 0 0xFF 0x3F0000 */
4706    s = 0;
4707    _exp = 0xFF;
4708    mant = 0x3FFFFF;
4709    register_vfarg(&vfargs[i++], s, _exp, mant);
4710    /* -QNaN     : 1 0xFF 0x3F0000 */
4711    s = 1;
4712    _exp = 0xFF;
4713    mant = 0x3FFFFF;
4714    register_vfarg(&vfargs[i++], s, _exp, mant);
4715    AB_DPRINTF("Registered %d vfargs values\n", i);
4716
4717    assert(i <= nb_vfargs);
4718    nb_vfargs = i;
4719 }
4720 #endif
4721
4722 #if 0
4723 static void dump_iargs (void)
4724 {
4725    int i;
4726    for (i = 0; i < nb_iargs; i++) {
4727       printf("iarg %d: %08x %08x %08x\n", i, iargs[i],
4728              (unsigned int)&iargs[i], (unsigned int)iargs);
4729    }
4730 }
4731
4732 static void dump_iargs16 (void)
4733 {
4734    int i;
4735    for (i = 0; i < nb_ii16; i++) {
4736       printf("iarg16 %d: %08x %08x %08x\n", i, ii16[i],
4737              (unsigned int)&ii16[i], (unsigned int)ii16);
4738    }
4739 }
4740
4741 static void dump_vfargs (void)
4742 {
4743    vector float vf;
4744    float f;
4745    int i=0;
4746    for (i=0; i<nb_vfargs; i++) {
4747       vf = (vector float)vfargs[i];
4748       f  = ((float*)&vf)[0];
4749       printf("vfarg %3d: %24f : %08x\n", i, f, ((unsigned int*)&f)[0]);
4750    }
4751 }
4752 #endif
4753
4754 static void test_int_three_args (const char* name, test_func_t func,
4755                                  unused uint32_t test_flags)
4756 {
4757    volatile HWord_t res;
4758    volatile uint32_t flags, xer;
4759    int i, j, k;
4760
4761    for (i=0; i<nb_iargs; i++) {
4762       for (j=0; j<nb_iargs; j++) {
4763          for (k=0; k<nb_iargs; k++) {
4764             r14 = iargs[i];
4765             r15 = iargs[j];
4766             r16 = iargs[k];
4767
4768             SET_CR_XER_ZERO;
4769             (*func)();
4770             GET_CR_XER(flags,xer);
4771             res = r17;
4772
4773 #ifndef __powerpc64__
4774             printf("%s %08x, %08x, %08x => %08x (%08x %08x)\n",
4775 #else
4776             printf("%s %016llx, %016llx, %016llx => %016llx (%08x %08x)\n",
4777 #endif
4778                    name, iargs[i], iargs[j], iargs[k], res, flags, xer);
4779          }
4780          if (verbose) printf("\n");
4781       }
4782    }
4783 }
4784
4785 static void test_int_two_args (const char* name, test_func_t func,
4786                                uint32_t test_flags)
4787 {
4788    volatile HWord_t res;
4789    volatile uint32_t flags, xer, xer_orig;
4790    int i, j, is_div;
4791 #ifdef __powerpc64__
4792    int zap_hi32;
4793 #endif
4794
4795    // catches div, divwu, divo, divwu, divwuo, and . variants
4796    is_div = strstr(name, "divw") != NULL;
4797
4798 #ifdef __powerpc64__
4799    zap_hi32 = strstr(name, "mulhw") != NULL;
4800 #endif
4801
4802    xer_orig = 0x00000000;
4803  redo:
4804    for (i=0; i<nb_iargs; i++) {
4805       for (j=0; j<nb_iargs; j++) {
4806
4807          /* result of division by zero is implementation dependent.
4808             don't test it. */
4809          if (is_div && iargs[j] == 0)
4810             continue;
4811
4812          r14 = iargs[i];
4813          r15 = iargs[j];
4814
4815          SET_XER(xer_orig);
4816          SET_CR_ZERO;
4817          (*func)();
4818          GET_CR_XER(flags,xer);
4819          res = r17;
4820
4821 #ifndef __powerpc64__
4822          printf("%s %08x, %08x => %08x (%08x %08x)\n",
4823 #else
4824          if (zap_hi32) res &= 0xFFFFFFFFULL;
4825          printf("%s %016llx, %016llx => %016llx (%08x %08x)\n",
4826 #endif
4827                 name, iargs[i], iargs[j], res, flags, xer);
4828       }
4829       if (verbose) printf("\n");
4830    }
4831    if ((test_flags & PPC_XER_CA) && xer_orig == 0x00000000) {
4832       xer_orig = 0x20000000;
4833       goto redo;
4834    }
4835 }
4836
4837 static void test_int_one_arg (const char* name, test_func_t func,
4838                                uint32_t test_flags)
4839 {
4840    volatile HWord_t res;
4841    volatile uint32_t flags, xer, xer_orig;
4842    int i;
4843
4844    xer_orig = 0x00000000;
4845  redo:
4846    for (i=0; i<nb_iargs; i++) {
4847       r14 = iargs[i];
4848       SET_XER(xer_orig);
4849       SET_CR_ZERO;
4850       (*func)();
4851       res = r17;
4852       GET_CR_XER(flags,xer);
4853
4854 #ifndef __powerpc64__
4855       printf("%s %08x => %08x (%08x %08x)\n",
4856 #else
4857       printf("%s %016llx => %016llx (%08x %08x)\n",
4858 #endif
4859              name, iargs[i], res, flags, xer);
4860    }
4861    if ((test_flags & PPC_XER_CA) && xer_orig == 0x00000000) {
4862       xer_orig = 0x20000000;
4863       goto redo;
4864    }
4865 }
4866
4867 static inline void invalidate_icache ( void *ptr, int nbytes )
4868 {
4869    HWord_t startaddr = (HWord_t) ptr;
4870    HWord_t endaddr   = startaddr + nbytes;
4871    HWord_t cls       = 32; /*VG_(cache_line_size_ppc32);*/
4872    HWord_t addr;
4873
4874    startaddr &= ~(cls - 1);
4875    for (addr = startaddr; addr < endaddr; addr += cls)
4876       asm volatile("dcbst 0,%0" : : "r" (addr));
4877    asm volatile("sync");
4878    for (addr = startaddr; addr < endaddr; addr += cls)
4879       asm volatile("icbi 0,%0" : : "r" (addr));
4880    asm volatile("sync; isync");
4881 }
4882
4883 /* for god knows what reason, if this isn't inlined, the
4884    program segfaults. */
4885 static inline
4886 void _patch_op_imm (uint32_t *p_insn, uint16_t imm, int sh, int len)
4887 {
4888    uint32_t mask = ((1 << len) - 1) << sh;
4889    *p_insn = (*p_insn & ~mask) | ((imm<<sh) & mask);
4890 }
4891
4892 static inline
4893 void patch_op_imm (uint32_t* p_insn, uint16_t imm, int sh, int len)
4894 {
4895    _patch_op_imm(p_insn, imm, sh, len);
4896    invalidate_icache(p_insn, 4);
4897 }
4898
4899 static inline
4900 void patch_op_imm16 (uint32_t *p_insn, uint16_t imm)
4901 {
4902    patch_op_imm(p_insn, imm, 0, 16);
4903 }
4904
4905
4906 /* Copy the 2 insn function starting at p_func_F to func_buf[], and
4907    return a possibly different pointer, which, when called, runs the
4908    copy in func_buf[]. */
4909 static inline
4910 test_func_t init_function( test_func_t p_func_F, uint32_t func_buf[] )
4911 {
4912    uint32_t* p_func = (uint32_t*)p_func_F;
4913 #if !defined(__powerpc64__) || _CALL_ELF == 2
4914    func_buf[0] = p_func[0];
4915    func_buf[1] = p_func[1];
4916    return (test_func_t)&func_buf[0];
4917 #else
4918    /* p_func points to a function descriptor, the first word of which
4919       points to the real code.  Copy the code itself but not the
4920       descriptor, and just swizzle the descriptor's entry pointer. */
4921    uint64_t* descr = (uint64_t*)p_func;
4922    uint32_t* entry = (uint32_t*)(descr[0]);
4923    func_buf[0] = entry[0];
4924    func_buf[1] = entry[1];
4925    descr[0] = (uint64_t)&func_buf[0];
4926    return (test_func_t)descr;
4927 #endif // #ifndef __powerpc64__
4928 }
4929
4930
4931 static void test_int_one_reg_imm16 (const char* name,
4932                                     test_func_t func_IN,
4933                                     unused uint32_t test_flags)
4934 {
4935    volatile test_func_t func;
4936    uint32_t* func_buf = get_rwx_area();
4937    volatile HWord_t res;
4938    volatile uint32_t flags, xer;
4939    int i, j;
4940
4941    for (i=0; i<nb_iargs; i++) {
4942       for (j=0; j<nb_ii16; j++) {
4943          /* Patch up the instruction */
4944          func = init_function( func_IN, func_buf );
4945          patch_op_imm16(&func_buf[0], ii16[j]);
4946
4947          r14 = iargs[i];
4948
4949          SET_CR_XER_ZERO;
4950          (*func)();
4951          GET_CR_XER(flags,xer);
4952          res = r17;
4953
4954 #ifndef __powerpc64__
4955          printf("%s %08x, %08x => %08x (%08x %08x)\n",
4956 #else
4957          printf("%s %016llx, %08x => %016llx (%08x %08x)\n",
4958 #endif
4959                 name, iargs[i], ii16[j], res, flags, xer);
4960       }
4961       if (verbose) printf("\n");
4962    }
4963 }
4964
4965 /* Special test cases for:
4966  * rlwimi
4967  * rlwinm
4968  * rlwnm
4969  * srawi
4970  * mcrf
4971  * mcrfs
4972  * mcrxr_cb
4973  * mfcr_cb
4974  * mfspr_cb
4975  * mftb_cb
4976  * mtcrf_cb
4977  * mtspr_cb
4978
4979  __powerpc64__ only:
4980  * rldcl       rA,rS,SH,MB
4981  * rldcr       rA,rS,SH,ME
4982  * rldic       rA,rS,SH,MB
4983  * rldicl      rA,rS,SH,MB
4984  * rldicr      rA,rS,SH,ME
4985  * rldimi      rA,rS,SH,MB
4986  * sradi       rA,rS,SH
4987  */
4988
4989 static void rlwi_cb (const char* name, test_func_t func_IN,
4990                      unused uint32_t test_flags)
4991 {
4992    volatile test_func_t func;
4993    uint32_t* func_buf = get_rwx_area();
4994    volatile HWord_t res;
4995    volatile uint32_t flags, xer;
4996    int i, j, k, l, arg_step;
4997
4998    arg_step = (arg_list_size == 0) ? 31 : 3;
4999
5000    r17 = 0;  // rlwimi takes r17 as input: start with a clean slate.
5001
5002    for (i=0; i<nb_iargs; i++) {
5003       for (j=0; j<32; j+=arg_step) {
5004          for (k=0; k<32; k+=arg_step) {
5005             for (l=0; l<32; l+=arg_step) {
5006                /* Patch up the instruction */
5007                func = init_function( func_IN, func_buf );
5008                _patch_op_imm(&func_buf[0], j, 11, 5);
5009                _patch_op_imm(&func_buf[0], k, 6, 5);
5010                patch_op_imm(&func_buf[0], l, 1, 5);
5011
5012                r14 = iargs[i];
5013
5014                SET_CR_XER_ZERO;
5015                (*func)();
5016                GET_CR_XER(flags,xer);
5017                res = r17;
5018
5019 #ifndef __powerpc64__
5020                printf("%s %08x, %2d, %2d, %2d => %08x (%08x %08x)\n",
5021 #else
5022                printf("%s %016llx, %2d, %2d, %2d => %016llx (%08x %08x)\n",
5023 #endif
5024                       name, iargs[i], j, k, l, res, flags, xer);
5025             }
5026             if (verbose) printf("\n");
5027          }
5028       }
5029    }
5030 }
5031
5032 static void rlwnm_cb (const char* name, test_func_t func_IN,
5033                       unused uint32_t test_flags)
5034 {
5035    volatile test_func_t func;
5036    uint32_t* func_buf = get_rwx_area();
5037    volatile HWord_t res;
5038    volatile uint32_t flags, xer;
5039    int i, j, k, l, arg_step;
5040
5041    arg_step = (arg_list_size == 0) ? 31 : 3;
5042
5043    for (i=0; i<nb_iargs; i++) {
5044       for (j=0; j<nb_iargs; j++) {
5045          for (k=0; k<32; k+=arg_step) {
5046             for (l=0; l<32; l+=arg_step) {
5047                /* Patch up the instruction */
5048                func = init_function( func_IN, func_buf );
5049                _patch_op_imm(&func_buf[0], k, 6, 5);
5050                patch_op_imm(&func_buf[0], l, 1, 5);
5051
5052                r14 = iargs[i];
5053                r15 = iargs[j];
5054
5055                SET_CR_XER_ZERO;
5056                (*func)();
5057                GET_CR_XER(flags,xer);
5058                res = r17;
5059
5060 #ifndef __powerpc64__
5061                printf("%s %08x, %08x, %2d, %2d => %08x (%08x %08x)\n",
5062 #else
5063                printf("%s %016llx, %016llx, %2d, %2d => %016llx (%08x %08x)\n",
5064 #endif
5065                       name, iargs[i], iargs[j], k, l, res, flags, xer);
5066             }
5067             if (verbose) printf("\n");
5068          }
5069       }
5070    }
5071 }
5072
5073 static void srawi_cb (const char* name, test_func_t func_IN,
5074                       unused uint32_t test_flags)
5075 {
5076    volatile test_func_t func;
5077    uint32_t* func_buf = get_rwx_area();
5078    volatile HWord_t res;
5079    volatile uint32_t flags, xer;
5080    int i, j, arg_step;
5081
5082    arg_step = (arg_list_size == 0) ? 31 : 1;
5083
5084    for (i=0; i<nb_iargs; i++) {
5085       for (j=0; j<32; j+=arg_step) {
5086          /* Patch up the instruction */
5087          func = init_function( func_IN, func_buf );
5088          patch_op_imm(&func_buf[0], j, 11, 5);
5089
5090          r14 = iargs[i];
5091
5092          SET_CR_XER_ZERO;
5093          (*func)();
5094          GET_CR_XER(flags,xer);
5095          res = r17;
5096
5097 #ifndef __powerpc64__
5098          printf("%s %08x, %2d => %08x (%08x %08x)\n",
5099 #else
5100          printf("%s %016llx, %2d => %016llx (%08x %08x)\n",
5101 #endif
5102                 name, iargs[i], j, res, flags, xer);
5103       }
5104       if (verbose) printf("\n");
5105    }
5106 }
5107
5108 static void mcrf_cb (const char* name, test_func_t func_IN,
5109                       unused uint32_t test_flags)
5110 {
5111    volatile test_func_t func;
5112    uint32_t* func_buf = get_rwx_area();
5113    volatile uint32_t flags, xer;
5114    int i, j, k, arg_step;
5115
5116    arg_step = (arg_list_size == 0) ? 7 : 1;
5117
5118    for (i=0; i<nb_iargs; i++) {
5119       for (j=0; j<8; j+=arg_step) {
5120          for (k=0; k<8; k+=arg_step) {
5121             /* Patch up the instruction */
5122             func = init_function( func_IN, func_buf );
5123             _patch_op_imm(&func_buf[0], j, 23, 3);
5124             patch_op_imm(&func_buf[0], k, 18, 3);
5125
5126             r14 = iargs[i];
5127
5128             SET_CR(r14);
5129             SET_XER_ZERO;
5130             (*func)();
5131             GET_CR_XER(flags,xer);
5132
5133 #ifndef __powerpc64__
5134             printf("%s %d, %d (%08x) => (%08x %08x)\n",
5135 #else
5136             printf("%s %d, %d (%016llx) => (%08x %08x)\n",
5137 #endif
5138                    name, j, k, iargs[i], flags, xer);
5139          }
5140          if (verbose) printf("\n");
5141       }
5142    }
5143 }
5144
5145 static void mcrxr_cb (const char* name, test_func_t func_IN,
5146                       unused uint32_t test_flags)
5147 {
5148    volatile test_func_t func;
5149    uint32_t* func_buf = get_rwx_area();
5150    volatile uint32_t flags, xer;
5151    int i, j, k, arg_step;
5152
5153    arg_step = 1; //(arg_list_size == 0) ? 7 : 1;
5154
5155    for (i=0; i<16; i+=arg_step) {
5156       j = i << 28;
5157       for (k=0; k<8; k+=arg_step) {
5158          /* Patch up the instruction */
5159          func = init_function( func_IN, func_buf );
5160          patch_op_imm(&func_buf[0], k, 23, 3);
5161
5162          r14 = j;
5163
5164          SET_CR_ZERO;
5165          SET_XER(r14);
5166          (*func)();
5167          GET_CR_XER(flags,xer);
5168
5169          printf("%s %d (%08x) => (%08x %08x)\n",
5170                 name, k, j, flags, xer);
5171       }
5172       if (verbose) printf("\n");
5173    }
5174 }
5175
5176 static void mfcr_cb (const char* name, test_func_t func,
5177                      unused uint32_t test_flags)
5178 {
5179    volatile HWord_t res;
5180    volatile uint32_t flags, xer;
5181    int i;
5182
5183    for (i=0; i<nb_iargs; i++) {
5184       r14 = iargs[i];
5185
5186       /* Set up flags for test */
5187       SET_CR(r14);
5188       SET_XER_ZERO;
5189       (*func)();
5190       GET_CR_XER(flags,xer);
5191       res = r17;
5192
5193 #ifndef __powerpc64__
5194       printf("%s (%08x) => %08x (%08x %08x)\n",
5195 #else
5196       printf("%s (%016llx) => %016llx (%08x %08x)\n",
5197 #endif
5198              name, iargs[i], res, flags, xer);
5199    }
5200 }
5201
5202 // NOTE: Not using func: calling function kills lr
5203 static void mfspr_cb (const char* name, test_func_t func,
5204                       unused uint32_t test_flags)
5205 {
5206    //volatile uint32_t res, flags, xer, ctr, lr, tmpcr, tmpxer;
5207    volatile HWord_t res;
5208    int j, k;
5209    func = func; // just to stop compiler complaining
5210
5211    // mtxer followed by mfxer
5212    for (k=0; k<nb_iargs; k++) {
5213       j = iargs[k];
5214       __asm__ __volatile__(
5215          "mtxer %1\n"
5216          "\tmfxer %0"
5217          : /*out*/"=b"(res) : /*in*/"b"(j) : /*trashed*/"xer"
5218       );
5219       res &= 0xE000007F; /* rest of the bits are undefined */
5220
5221 #ifndef __powerpc64__
5222       printf("%s 1 (%08x) -> mtxer -> mfxer => %08x\n",
5223 #else
5224       printf("%s 1 (%08x) -> mtxer -> mfxer => %016llx\n",
5225 #endif
5226              name, j, res);
5227    }
5228
5229    // mtlr followed by mflr
5230    for (k=0; k<nb_iargs; k++) {
5231       j = iargs[k];
5232       __asm__ __volatile__(
5233          "mtlr %1\n"
5234          "\tmflr %0"
5235          : /*out*/"=b"(res) : /*in*/"b"(j) : /*trashed*/"lr"
5236       );
5237
5238 #ifndef __powerpc64__
5239       printf("%s 8 (%08x) ->  mtlr ->  mflr => %08x\n",
5240 #else
5241       printf("%s 8 (%08x) ->  mtlr ->  mflr => %016llx\n",
5242 #endif
5243              name, j, res);
5244    }
5245
5246    // mtctr followed by mfctr
5247    for (k=0; k<nb_iargs; k++) {
5248       j = iargs[k];
5249       __asm__ __volatile__(
5250          "mtctr %1\n"
5251          "\tmfctr %0"
5252          : /*out*/"=b"(res) : /*in*/"b"(j) : /*trashed*/"ctr"
5253       );
5254
5255 #ifndef __powerpc64__
5256       printf("%s 9 (%08x) -> mtctr -> mfctr => %08x\n",
5257 #else
5258       printf("%s 9 (%08x) -> mtctr -> mfctr => %016llx\n",
5259 #endif
5260              name, j, res);
5261    }
5262 }
5263
5264 static void mtcrf_cb (const char* name, test_func_t func_IN,
5265                       unused uint32_t test_flags)
5266 {
5267    volatile test_func_t func;
5268    uint32_t* func_buf = get_rwx_area();
5269    volatile uint32_t flags, xer;
5270    int i, j, arg_step;
5271
5272    arg_step = (arg_list_size == 0) ? 99 : 1;
5273
5274    for (i=0; i<nb_iargs; i++) {
5275       for (j=0; j<256; j+=arg_step) {
5276          /* Patch up the instruction */
5277          func = init_function( func_IN, func_buf );
5278          patch_op_imm(&func_buf[0], j, 12, 8);
5279
5280          r14 = iargs[i];
5281
5282          SET_CR_XER_ZERO;
5283          (*func)();
5284          GET_CR_XER(flags,xer);
5285
5286 #ifndef __powerpc64__
5287          printf("%s %3d, %08x => (%08x %08x)\n",
5288 #else
5289          printf("%s %3d, %016llx => (%08x %08x)\n",
5290 #endif
5291                 name, j, iargs[i], flags, xer);
5292       }
5293       if (verbose) printf("\n");
5294    }
5295 }
5296
5297 // NOTE: Not using func: calling function kills lr
5298 static void mtspr_cb (const char* name, test_func_t func,
5299                       unused uint32_t test_flags)
5300 {
5301 }
5302
5303 #ifdef __powerpc64__
5304 static void rldc_cb (const char* name, test_func_t func_IN,
5305                      unused uint32_t test_flags)
5306 {
5307    volatile test_func_t func;
5308    uint32_t* func_buf = get_rwx_area();
5309    volatile HWord_t res;
5310    volatile uint32_t flags, xer;
5311    int i, j, k, arg_step;
5312
5313    arg_step = (arg_list_size == 0) ? 7 : 3;
5314
5315    for (i=0; i<nb_iargs; i++) {
5316       for (j=0; j<nb_iargs; j++) {
5317          for (k=0; k<64; k+=arg_step) {
5318             /* Patch up the instruction */
5319             func = init_function( func_IN, func_buf );
5320             patch_op_imm(&func_buf[0], (((k & 0x1F)<<1) | ((k>>5)&1)), 5, 6);
5321
5322             r14 = iargs[i];
5323             r15 = iargs[j];
5324
5325             SET_CR_XER_ZERO;
5326             (*func)();
5327             GET_CR_XER(flags,xer);
5328             res = r17;
5329
5330             printf("%s %016llx, %016llx, %2d => %016llx (%08x %08x)\n",
5331                    name, iargs[i], iargs[j], k, res, flags, xer);
5332          }
5333          if (verbose) printf("\n");
5334       }
5335    }
5336 }
5337
5338 static void rldi_cb (const char* name, test_func_t func_IN,
5339                      unused uint32_t test_flags)
5340 {
5341    volatile test_func_t func;
5342    uint32_t* func_buf = get_rwx_area();
5343    volatile HWord_t res;
5344    volatile uint32_t flags, xer;
5345    int i, j, k, arg_step;
5346
5347    arg_step = (arg_list_size == 0) ? 7 : 3;
5348
5349    for (i=0; i<nb_iargs; i++) {
5350       for (j=0; j<64; j+=arg_step) {     // SH
5351          for (k=0; k<64; k+=arg_step) {  // MB|ME
5352             /* Patch up the instruction */
5353             func = init_function( func_IN, func_buf );
5354             _patch_op_imm(&func_buf[0], (j & 0x1F), 11, 5);
5355             _patch_op_imm(&func_buf[0], ((j>>5)&1), 1, 1);
5356             patch_op_imm(&func_buf[0], (((k & 0x1F)<<1) | ((k>>5)&1)), 5, 6);
5357
5358             r14 = iargs[i];
5359
5360             SET_CR_XER_ZERO;
5361             (*func)();
5362             GET_CR_XER(flags,xer);
5363             res = r17;
5364
5365             printf("%s %016llx, %2d, %2d => %016llx (%08x %08x)\n",
5366                    name, iargs[i], j, k, res, flags, xer);
5367          }
5368          if (verbose) printf("\n");
5369       }
5370    }
5371 }
5372
5373 static void sradi_cb (const char* name, test_func_t func_IN,
5374                       unused uint32_t test_flags)
5375 {
5376    volatile test_func_t func;
5377    uint32_t* func_buf = get_rwx_area();
5378    volatile HWord_t res;
5379    volatile uint32_t flags, xer;
5380    int i, j, arg_step;
5381
5382    arg_step = (arg_list_size == 0) ? 7 : 3;
5383
5384    for (i=0; i<nb_iargs; i++) {
5385       for (j=0; j<64; j+=arg_step) {     // SH
5386          /* Patch up the instruction */
5387          func = init_function( func_IN, func_buf );
5388          _patch_op_imm(&func_buf[0], (j & 0x1F), 11, 5);
5389          patch_op_imm(&func_buf[0], ((j>>5)&1), 1, 1);
5390
5391          r14 = iargs[i];
5392
5393          SET_CR_XER_ZERO;
5394          (*func)();
5395          GET_CR_XER(flags,xer);
5396          res = r17;
5397
5398          printf("%s %016llx, %2d => %016llx (%08x %08x)\n",
5399                 name, iargs[i], j, res, flags, xer);
5400       }
5401       if (verbose) printf("\n");
5402    }
5403 }
5404 #endif // #ifdef __powerpc64__
5405
5406
5407 typedef struct special_t special_t;
5408
5409 struct special_t {
5410    const char *name;
5411    void (*test_cb)(const char* name, test_func_t func,
5412                    unused uint32_t test_flags);
5413 };
5414
5415 static void test_special (special_t *table,
5416                           const char* name, test_func_t func,
5417                           unused uint32_t test_flags)
5418 {
5419    const char *tmp;
5420    int i;
5421
5422    for (tmp = name; isspace(*tmp); tmp++)
5423       continue;
5424    for (i=0; table[i].name != NULL; i++) {
5425 #if 0
5426       fprintf(stderr, "look for handler for '%s' (%s)\n", name,
5427               table[i].name);
5428 #endif
5429       if (strcmp(table[i].name, tmp) == 0) {
5430          (*table[i].test_cb)(name, func, test_flags);
5431          return;
5432       }
5433    }
5434    fprintf(stderr, "ERROR: no test found for op '%s'\n", name);
5435 }
5436
5437 static special_t special_int_ops[] = {
5438    {
5439       "rlwimi", /* One register + 3 5 bits immediate arguments */
5440       &rlwi_cb,
5441    },
5442    {
5443       "rlwimi.", /* One register + 3 5 bits immediate arguments */
5444       &rlwi_cb,
5445    },
5446    {
5447       "rlwinm", /* One register + 3 5 bits immediate arguments */
5448       &rlwi_cb,
5449    },
5450    {
5451       "rlwinm.", /* One register + 3 5 bits immediate arguments */
5452       &rlwi_cb,
5453    },
5454    {
5455       "rlwnm",  /* Two registers + 2 5 bits immediate arguments */
5456       &rlwnm_cb,
5457    },
5458    {
5459       "rlwnm.",  /* Two registers + 2 5 bits immediate arguments */
5460       &rlwnm_cb,
5461    },
5462    {
5463       "srawi",  /* One register + 1 5 bits immediate arguments */
5464       &srawi_cb,
5465    },
5466    {
5467       "srawi.",  /* One register + 1 5 bits immediate arguments */
5468       &srawi_cb,
5469    },
5470    {
5471       "mcrf",  /* 2 3 bits immediate arguments */
5472       &mcrf_cb,
5473    },
5474 #if 0
5475    {
5476       "mcrfs",  /* 2 3 bits immediate arguments */
5477       &mcrfs_cb,
5478    },
5479 #endif
5480    {
5481       "mcrxr",  /* 1 3 bits immediate argument */
5482       &mcrxr_cb,
5483    },
5484    {
5485       "mfcr",  /* No arguments */
5486       &mfcr_cb,
5487    },
5488    {
5489       "mfspr",  /* 1 10 bits immediate argument */
5490       &mfspr_cb,
5491    },
5492 #if 0
5493    {   // Move from time base
5494       "mftb",  /* 1 10 bits immediate arguments */
5495       &mftb_cb,
5496    },
5497 #endif
5498    {
5499       "mtcrf",  /* One register + 1 8 bits immediate arguments */
5500       &mtcrf_cb,
5501    },
5502    {
5503       "mtspr",  /* One register + 1 10 bits immediate arguments */
5504       &mtspr_cb,
5505    },
5506 #ifdef __powerpc64__
5507    {
5508       "rldcl",   /* Two registers + 1 6 bit immediate argument */
5509       &rldc_cb,
5510    },
5511    {
5512       "rldcl.",  /* Two registers + 1 6 bit immediate argument */
5513       &rldc_cb,
5514    },
5515    {
5516       "rldcr",   /* Two registers + 1 6 bit immediate argument */
5517       &rldc_cb,
5518    },
5519    {
5520       "rldcr.",  /* Two registers + 1 6 bit immediate argument */
5521       &rldc_cb,
5522    },
5523    {
5524       "rldic",   /* One register + 2 6 bit immediate arguments */
5525       &rldi_cb,
5526    },
5527    {
5528       "rldic.",  /* One register + 2 6 bit immediate arguments */
5529       &rldi_cb,
5530    },
5531    {
5532       "rldicl",  /* One register + 2 6 bit immediate arguments */
5533       &rldi_cb,
5534    },
5535    {
5536       "rldicl.", /* One register + 2 6 bit immediate arguments */
5537       &rldi_cb,
5538    },
5539    {
5540       "rldicr",  /* One register + 2 6 bit immediate arguments */
5541       &rldi_cb,
5542    },
5543    {
5544       "rldicr.", /* One register + 2 6 bit immediate arguments */
5545       &rldi_cb,
5546    },
5547    {
5548       "rldimi",  /* One register + 2 6 bit immediate arguments */
5549       &rldi_cb,
5550    },
5551    {
5552       "rldimi.", /* One register + 2 6 bit immediate arguments */
5553       &rldi_cb,
5554    },
5555    {
5556       "sradi",  /* One register + 1 6 bit immediate argument */
5557       &sradi_cb,
5558    },
5559    {
5560       "sradi.", /* One register + 1 6 bit immediate argument */
5561       &sradi_cb,
5562    },
5563 #endif // #ifdef __powerpc64__
5564    {
5565       NULL,
5566       NULL,
5567    },
5568 };
5569
5570 static void test_int_special (const char* name, test_func_t func,
5571                               uint32_t test_flags)
5572 {
5573    test_special(special_int_ops, name, func, test_flags);
5574 }
5575
5576
5577 static void test_int_ld_one_reg_imm16 (const char* name,
5578                                        test_func_t func_IN,
5579                                        unused uint32_t test_flags)
5580 {
5581    volatile test_func_t func;
5582    uint32_t* func_buf = get_rwx_area();
5583    volatile HWord_t res, base;
5584    volatile uint32_t flags, xer;
5585    int i, offs, shift_offset = 0;
5586
5587 #ifdef __powerpc64__
5588    if (strstr(name, "lwa") || strstr(name, "ld") || strstr(name, "ldu"))
5589       shift_offset = 1;
5590 #endif
5591
5592    // +ve d
5593    base = (HWord_t)&iargs[0];
5594    for (i=0; i<nb_iargs; i++) {
5595       offs = (i == 0) ? i : (i * sizeof(HWord_t)) - 1;
5596
5597       /* Patch up the instruction */
5598       func = init_function( func_IN, func_buf );
5599       if (shift_offset)
5600          patch_op_imm(&func_buf[0], offs>>2, 2, 14);
5601       else
5602          patch_op_imm16(&func_buf[0], offs);
5603
5604       r14 = base;
5605
5606       SET_CR_XER_ZERO;
5607       (*func)();
5608       GET_CR_XER(flags,xer);
5609       res = r17;
5610
5611 #ifndef __powerpc64__
5612       printf("%s %2d, (%08x) => %08x, %2d (%08x %08x)\n",
5613 #else
5614       printf("%s %3d, (%016llx) => %016llx, %3lld (%08x %08x)\n",
5615 #endif
5616              name, offs, iargs[i], res, r14-base, flags, xer);
5617    }
5618    if (verbose) printf("\n");
5619
5620    // -ve d
5621    base = (HWord_t)&iargs[nb_iargs-1];
5622    for (i = 0; i > -nb_iargs; i--) {
5623       offs = (i * sizeof(HWord_t)) + 1;
5624
5625       /* Patch up the instruction */
5626       func = init_function( func, func_buf );
5627       patch_op_imm16(&func_buf[0], offs);
5628
5629       r14 = base;
5630
5631       SET_CR_XER_ZERO;
5632       (*func)();
5633       GET_CR_XER(flags,xer);
5634       res = r17;
5635
5636 #ifndef __powerpc64__
5637       printf("%s %2d, (%08x) => %08x, %2d (%08x %08x)\n",
5638 #else
5639       printf("%s %3d, (%016llx) => %016llx, %3lld (%08x %08x)\n",
5640 #endif
5641              name, offs, iargs[nb_iargs-1 + i], res, r14-base, flags, xer);
5642    }
5643 }
5644
5645 static void test_int_ld_two_regs (const char* name,
5646                                   test_func_t func,
5647                                   unused uint32_t test_flags)
5648 {
5649    volatile HWord_t res, base;
5650    volatile uint32_t flags, xer;
5651    int i, offs;
5652
5653    // +ve d
5654    base = (HWord_t)&iargs[0];
5655    for (i=0; i<nb_iargs; i++) {
5656       offs = i * sizeof(HWord_t);
5657       r14 = base;
5658       r15 = offs;
5659
5660       SET_CR_XER_ZERO;
5661       (*func)();
5662       GET_CR_XER(flags,xer);
5663       res = r17;
5664
5665 #ifndef __powerpc64__
5666       printf("%s %d (%08x) => %08x, %d (%08x %08x)\n",
5667 #else
5668       printf("%s %3d, (%016llx) => %016llx, %2lld (%08x %08x)\n",
5669 #endif
5670              name, offs, iargs[i], res, r14-base, flags, xer);
5671    }
5672 }
5673
5674 static void test_int_st_two_regs_imm16 (const char* name,
5675                                         test_func_t func_IN,
5676                                         unused uint32_t test_flags)
5677 {
5678    volatile test_func_t func;
5679    uint32_t* func_buf = get_rwx_area();
5680    volatile uint32_t flags, xer;
5681    int i, offs, k;
5682    HWord_t *iargs_priv, base;
5683
5684    // private iargs table to store to
5685    iargs_priv = malloc(nb_iargs * sizeof(HWord_t));
5686
5687    // +ve d
5688    base = (HWord_t)&iargs_priv[0];
5689    for (i=0; i<nb_iargs; i++) {
5690       for (k=0; k<nb_iargs; k++)  // clear array
5691          iargs_priv[k] = 0;
5692
5693       offs = i * sizeof(HWord_t);
5694
5695       /* Patch up the instruction */
5696       func = init_function( func_IN, func_buf );
5697       patch_op_imm16(&func_buf[0], offs);
5698
5699       r14 = iargs[i];             // read from iargs
5700       r15 = base;                 // store to r15 + offs
5701
5702       SET_CR_XER_ZERO;
5703       (*func)();
5704       GET_CR_XER(flags,xer);
5705
5706 #ifndef __powerpc64__
5707       printf("%s %08x, %2d => %08x, %2d (%08x %08x)\n",
5708 #else
5709       printf("%s %016llx, %3d => %016llx, %3lld (%08x %08x)\n",
5710 #endif
5711              name, iargs[i], offs, iargs_priv[i], r15-base, flags, xer);
5712    }
5713    if (verbose) printf("\n");
5714
5715    // -ve d
5716    base = (HWord_t)&iargs_priv[nb_iargs-1];
5717    for (i = -nb_iargs+1; i<=0; i++) {
5718       for (k=0; k<nb_iargs; k++)  // clear array
5719          iargs_priv[k] = 0;
5720
5721       offs = i * sizeof(HWord_t);
5722
5723       /* Patch up the instruction */
5724       func = init_function( func, func_buf );
5725       patch_op_imm16(&func_buf[0], offs);
5726
5727       r14 = iargs[nb_iargs-1+i];  // read from iargs
5728       r15 = base;                 // store to r15 + offs
5729
5730       SET_CR_XER_ZERO;
5731       (*func)();
5732       GET_CR_XER(flags,xer);
5733
5734 #ifndef __powerpc64__
5735       printf("%s %08x, %2d => %08x, %2d (%08x %08x)\n",
5736 #else
5737       printf("%s %016llx, %3d => %016llx, %3lld (%08x %08x)\n",
5738 #endif
5739              name, iargs[nb_iargs-1+i], offs, iargs_priv[nb_iargs-1+i],
5740              r15-base, flags, xer);
5741    }
5742    free(iargs_priv);
5743 }
5744
5745 static void test_int_st_three_regs (const char* name,
5746                                     test_func_t func,
5747                                     unused uint32_t test_flags)
5748 {
5749    volatile uint32_t flags, xer;
5750    int i, offs, k;
5751    HWord_t *iargs_priv, base;
5752
5753    // private iargs table to store to
5754    iargs_priv = malloc(nb_iargs * sizeof(HWord_t));
5755
5756    base = (HWord_t)&iargs_priv[0];
5757    for (i=0; i<nb_iargs; i++) {
5758       for (k=0; k<nb_iargs; k++)  // clear array
5759          iargs_priv[k] = 0;
5760
5761       offs = i * sizeof(HWord_t);
5762       r14 = iargs[i];             // read from iargs
5763       r15 = base;                 // store to r15 + offs
5764       r16 = offs;
5765
5766       SET_CR_XER_ZERO;
5767       (*func)();
5768       GET_CR_XER(flags,xer);
5769
5770 #ifndef __powerpc64__
5771       printf("%s %08x, %d => %08x, %d (%08x %08x)\n",
5772 #else
5773       printf("%s %016llx, %3d => %016llx, %2lld (%08x %08x)\n",
5774 #endif
5775              name, iargs[i], offs, iargs_priv[i], r15-base, flags, xer);
5776    }
5777    free(iargs_priv);
5778 }
5779
5780
5781 /* Used in do_tests, indexed by flags->nb_args
5782    Elements correspond to enum test_flags::num args
5783 */
5784 static test_loop_t int_sh_algebraic[] = {
5785    &test_int_two_args,
5786    &test_int_special,
5787 };
5788
5789 static test_loop_t int_mfspr[] = {
5790    &test_int_special,
5791 };
5792
5793  static test_loop_t int_loops[] = {
5794    &test_int_one_arg,
5795    &test_int_two_args,
5796    &test_int_three_args,
5797    &test_int_two_args,
5798    &test_int_one_reg_imm16,
5799    &test_int_one_reg_imm16,
5800    &test_int_special,
5801    &test_int_ld_one_reg_imm16,
5802    &test_int_ld_two_regs,
5803    &test_int_st_two_regs_imm16,
5804    &test_int_st_three_regs,
5805 };
5806
5807 static void test_dcbt_ops (const char* name, test_func_t func,
5808                            unused uint32_t test_flags)
5809 {
5810    unsigned long * data = (unsigned long *)malloc(4096 * sizeof(unsigned long));
5811    HWord_t base;
5812
5813    base  = (HWord_t)data;
5814    size_t offs = 100 * sizeof(unsigned long);    // some arbitrary offset)
5815
5816    r17  = base;
5817    r14  = offs;
5818
5819    (*func)();
5820
5821    printf("%s with various hint values completes with no exceptions\n", name);
5822    free(data);
5823 }
5824
5825 static test_loop_t misc_loops[] = {
5826    &test_dcbt_ops,
5827 };
5828
5829 #if !defined (NO_FLOAT)
5830 static void test_float_three_args (const char* name, test_func_t func,
5831                                    unused uint32_t test_flags)
5832 {
5833    double res;
5834    uint64_t u0, u1, u2, ur;
5835    volatile uint32_t flags;
5836    int i, j, k;
5837
5838    /* Note: using nb_normal_fargs:
5839       - not testing special values for these insns
5840    */
5841    for (i=0; i<nb_normal_fargs; i+=3) {
5842       for (j=0; j<nb_normal_fargs; j+=5) {
5843          for (k=0; k<nb_normal_fargs; k+=7) {
5844             u0 = *(uint64_t *)(&fargs[i]);
5845             u1 = *(uint64_t *)(&fargs[j]);
5846             u2 = *(uint64_t *)(&fargs[k]);
5847             f14 = fargs[i];
5848             f15 = fargs[j];
5849             f16 = fargs[k];
5850
5851             SET_FPSCR_ZERO;
5852             SET_CR_XER_ZERO;
5853             (*func)();
5854             GET_CR(flags);
5855             res = f17;
5856             ur = *(uint64_t *)(&res);
5857
5858             /* Note: zapping the bottom byte of the result,
5859                as vex's accuracy isn't perfect */
5860             ur &= 0xFFFFFFFFFFFFFF00ULL;
5861
5862 #ifndef __powerpc64__
5863             printf("%s %016llx, %016llx, %016llx => %016llx",
5864 #else
5865             printf("%s %016llx, %016llx, %016llx => %016llx",
5866 #endif
5867                    name, u0, u1, u2, ur);
5868 #if defined TEST_FLOAT_FLAGS
5869             printf(" (%08x)", flags);
5870 #endif
5871             printf("\n");
5872          }
5873          if (verbose) printf("\n");
5874       }
5875    }
5876 }
5877
5878 static void test_float_two_args (const char* name, test_func_t func,
5879                                  unused uint32_t test_flags)
5880 {
5881    double res;
5882    uint64_t u0, u1, ur;
5883    volatile uint32_t flags;
5884    int i, j;
5885
5886    for (i=0; i<nb_fargs; i+=3) {
5887       for (j=0; j<nb_fargs; j+=5) {
5888          u0 = *(uint64_t *)(&fargs[i]);
5889          u1 = *(uint64_t *)(&fargs[j]);
5890          f14 = fargs[i];
5891          f15 = fargs[j];
5892
5893          SET_FPSCR_ZERO;
5894          SET_CR_XER_ZERO;
5895          (*func)();
5896          GET_CR(flags);
5897          res = f17;
5898          ur = *(uint64_t *)(&res);
5899
5900 #ifndef __powerpc64__
5901          printf("%s %016llx, %016llx => %016llx",
5902 #else
5903          printf("%s %016llx, %016llx => %016llx",
5904 #endif
5905                 name, u0, u1, ur);
5906 #if defined TEST_FLOAT_FLAGS
5907          printf(" (%08x)", flags);
5908 #endif
5909          printf("\n");
5910       }
5911       if (verbose) printf("\n");
5912    }
5913 }
5914
5915 static void test_float_one_arg (const char* name, test_func_t func,
5916                                 unused uint32_t test_flags)
5917 {
5918    double res;
5919    uint64_t u0, ur;
5920    volatile uint32_t flags;
5921    int i;
5922    unsigned zap_hi_32bits, zap_lo_44bits, zap_lo_47bits;
5923
5924    /* if we're testing fctiw or fctiwz, zap the hi 32bits,
5925       as they're undefined */
5926    zap_hi_32bits = strstr(name, " fctiw")    != NULL  ? 1 : 0;
5927    zap_lo_44bits = strstr(name, " fres")     != NULL  ? 1 : 0;
5928    zap_lo_47bits = strstr(name, " frsqrte")  != NULL  ? 1 : 0;
5929
5930    assert(zap_hi_32bits + zap_lo_44bits + zap_lo_47bits <= 1);
5931
5932    for (i=0; i<nb_fargs; i++) {
5933       u0 = *(uint64_t *)(&fargs[i]);
5934       f14 = fargs[i];
5935
5936        SET_FPSCR_ZERO;
5937        SET_CR_XER_ZERO;
5938        (*func)();
5939        GET_CR(flags);
5940        res = f17;
5941        ur = *(uint64_t *)(&res);
5942
5943        if (strstr(name, " frsqrte") !=  NULL)
5944           /* The 32-bit frsqrte instruction is the Floatig Reciprical Square
5945            * Root Estimate instruction.  The precision of the estimate will
5946            * vary from Proceesor implementation.  The approximation varies in
5947            * bottom two bytes of the 32-bit result.
5948            */
5949            ur &= 0xFFFF000000000000ULL;
5950
5951       if (zap_hi_32bits)
5952          ur &= 0x00000000FFFFFFFFULL;
5953       if (zap_lo_44bits)
5954          ur &= 0xFFFFF00000000000ULL;
5955       if (zap_lo_47bits)
5956          ur &= 0xFFFF800000000000ULL;
5957
5958 #ifndef __powerpc64__
5959       printf("%s %016llx => %016llx",
5960 #else
5961       printf("%s %016llx => %016llx",
5962 #endif
5963              name, u0, ur);
5964 #if defined TEST_FLOAT_FLAGS
5965       printf(" (%08x)", flags);
5966 #endif
5967       printf("\n");
5968     }
5969 }
5970
5971 /* Special test cases for:
5972  * mffs
5973  * mtfsb0
5974  * mtfsb1
5975  */
5976 static special_t special_float_ops[] = {
5977 #if 0
5978    {
5979       "mffs",   /* One 5 bits immediate argument */
5980       &mffs_cb,
5981    },
5982    {
5983       "mffs.",   /* One 5 bits immediate argument */
5984       &mffs_cb,
5985    },
5986    {
5987       "mtfsb0", /* One 5 bits immediate argument */
5988       &mffs_cb,
5989    },
5990    {
5991       "mtfsb0.", /* One 5 bits immediate argument */
5992       &mffs_cb,
5993    },
5994    {
5995       "mtfsb1", /* One 5 bits immediate argument */
5996       &mffs_cb,
5997    },
5998    {
5999       "mtfsb1.", /* One 5 bits immediate argument */
6000       &mffs_cb,
6001    },
6002    {
6003       "mtfsf",  /* One register + 1 8 bits immediate argument */
6004       &mtfsf_cb,
6005    },
6006    {
6007       "mtfsf.",  /* One register + 1 8 bits immediate argument */
6008       &mtfsf_cb,
6009    },
6010    {
6011       "mtfsfi", /* One 5 bits argument + 1 5 bits argument */
6012       &mtfsfi_cb,
6013    },
6014    {
6015       "mtfsfi.", /* One 5 bits argument + 1 5 bits argument */
6016       &mtfsfi_cb,
6017    },
6018 #endif
6019    {
6020       NULL,
6021       NULL,
6022    },
6023 };
6024
6025 static void test_float_special (const char* name, test_func_t func,
6026                                 uint32_t test_flags)
6027 {
6028    test_special(special_float_ops, name, func, test_flags);
6029 }
6030
6031
6032 static void test_float_ld_one_reg_imm16 (const char* name,
6033                                          test_func_t func_IN,
6034                                          unused uint32_t test_flags)
6035 {
6036    volatile test_func_t func;
6037    uint32_t* func_buf = get_rwx_area();
6038    HWord_t base;
6039    volatile uint32_t flags, xer;
6040    volatile double src, res;
6041    int i;
6042    uint16_t offs;
6043
6044    /* offset within [1-nb_fargs:nb_fargs] */
6045    for (i=1-nb_fargs; i<nb_fargs; i++) {
6046       offs = i * 8;      // offset = i * sizeof(double)
6047       if (i < 0) {
6048          src  = fargs[nb_fargs-1 + i];
6049          base = (HWord_t)&fargs[nb_fargs-1];
6050       } else {
6051          src = fargs[i];
6052          base = (HWord_t)&fargs[0];
6053       }
6054
6055       /* Patch up the instruction */
6056       func = init_function( func_IN, func_buf );
6057       patch_op_imm16(&func_buf[0], offs);
6058
6059       // load from fargs[idx] => r14 + offs
6060       r14 = base;
6061
6062       SET_CR_XER_ZERO;
6063       (*func)();
6064       GET_CR_XER(flags,xer);
6065       res = f17;
6066
6067 #ifndef __powerpc64__
6068       printf("%s %016llx, %4d => %016llx, %4d",
6069 #else
6070       printf("%s %016llx, %4d => %016llx, %4lld",
6071 #endif
6072              name, double_to_bits(src), offs,
6073              double_to_bits(res), r14-base);
6074 #if defined TEST_FLOAT_FLAGS
6075       printf(" (%08x %08x)", flags, xer);
6076 #endif
6077       printf("\n");
6078    }
6079    if (verbose) printf("\n");
6080 }
6081
6082 static void test_float_ld_two_regs (const char* name,
6083                                     test_func_t func,
6084                                     unused uint32_t test_flags)
6085 {
6086    volatile HWord_t base;
6087    volatile uint32_t flags, xer;
6088    volatile double src, res;
6089    int i, offs;
6090
6091    /* offset within [1-nb_fargs:nb_fargs] */
6092    for (i=1-nb_fargs; i<nb_fargs; i++) {
6093       offs = i * 8;                // offset = i * sizeof(double)
6094       if (i < 0) {                 // base reg = start of array
6095          src  = fargs[nb_fargs-1 + i];
6096          base = (HWord_t)&fargs[nb_fargs-1];
6097       } else {
6098          src  = fargs[i];
6099          base = (HWord_t)&fargs[0];
6100       }
6101
6102       r14 = base;
6103       r15 = offs;
6104
6105       SET_CR_XER_ZERO;
6106       (*func)();
6107       GET_CR_XER(flags,xer);
6108       res = f17;
6109
6110 #ifndef __powerpc64__
6111       printf("%s %016llx, %4d => %016llx, %4d",
6112 #else
6113       printf("%s %016llx, %4lld => %016llx, %4lld",
6114 #endif
6115              name, double_to_bits(src), r15/*offs*/,
6116              double_to_bits(res), r14-base);
6117 #if defined TEST_FLOAT_FLAGS
6118       printf(" (%08x %08x)", flags, xer);
6119 #endif
6120       printf("\n");
6121    }
6122 }
6123
6124 static void test_float_st_two_regs_imm16 (const char* name,
6125                                           test_func_t func_IN,
6126                                           unused uint32_t test_flags)
6127 {
6128    volatile test_func_t func;
6129    uint32_t* func_buf = get_rwx_area();
6130    HWord_t base;
6131    volatile uint32_t flags, xer;
6132    double src, *p_dst;
6133    int i, offs;
6134    double *fargs_priv;
6135    int nb_tmp_fargs = nb_fargs;
6136
6137
6138    /* if we're storing an fp single-precision, don't want nans
6139       - the vex implementation doesn't like them (yet)
6140       Note: This is actually a bigger problem: the vex implementation
6141       rounds these insns twice.  This leads to many rounding errors.
6142       For the small fargs set, however, this doesn't show up.
6143    */
6144    if (strstr(name, "stfs") != NULL)
6145       nb_tmp_fargs = nb_normal_fargs;
6146
6147
6148    // private fargs table to store to
6149    fargs_priv = malloc(nb_tmp_fargs * sizeof(double));
6150
6151    /* offset within [1-nb_tmp_fargs:nb_tmp_fargs] */
6152    for (i=1-nb_tmp_fargs; i<nb_tmp_fargs; i++) {
6153       offs = i * 8;    // offset = i * sizeof(double)
6154       if (i < 0) {
6155          src   =  fargs     [nb_tmp_fargs-1 + i];
6156          p_dst = &fargs_priv[nb_tmp_fargs-1 + i];
6157          base  = (HWord_t)&fargs_priv[nb_tmp_fargs-1];
6158       } else {
6159          src   =  fargs     [i];
6160          p_dst = &fargs_priv[i];
6161          base  = (HWord_t)&fargs_priv[0];
6162       }
6163       *p_dst = 0;  // clear dst
6164
6165       /* Patch up the instruction */
6166       func = init_function( func_IN, func_buf );
6167       patch_op_imm16(&func_buf[0], offs);
6168
6169       // read from fargs[idx] => f14
6170       // store to fargs_priv[idx] => r15 + offs
6171       f14 = src;
6172       r15 = base;
6173
6174       SET_CR_XER_ZERO;
6175       (*func)();
6176       GET_CR_XER(flags,xer);
6177
6178 #ifndef __powerpc64__
6179       printf("%s %016llx, %4d => %016llx, %4d",
6180 #else
6181       printf("%s %016llx, %4d => %016llx, %4lld",
6182 #endif
6183              name, double_to_bits(src), offs,
6184              double_to_bits(*p_dst), r15-base);
6185 #if defined TEST_FLOAT_FLAGS
6186       printf(" (%08x %08x)", flags, xer);
6187 #endif
6188       printf("\n");
6189    }
6190    free(fargs_priv);
6191 }
6192
6193 static void test_float_st_three_regs (const char* name,
6194                                       test_func_t func,
6195                                       unused uint32_t test_flags)
6196 {
6197    volatile HWord_t base;
6198    volatile uint32_t flags, xer;
6199    double src, *p_dst;
6200    int i, offs;
6201    double *fargs_priv;
6202    int nb_tmp_fargs = nb_fargs;
6203
6204
6205    /* if we're storing an fp single-precision, don't want nans
6206       - the vex implementation doesn't like them (yet)
6207       Note: This is actually a bigger problem: the vex implementation
6208       rounds these insns twice.  This leads to many rounding errors.
6209       For the small fargs set, however, this doesn't show up.
6210    */
6211    if (strstr(name, "stfs") != NULL)  // stfs(u)(x)
6212       nb_tmp_fargs = nb_normal_fargs;
6213
6214
6215    // private fargs table to store to
6216    fargs_priv = malloc(nb_tmp_fargs * sizeof(double));
6217
6218    //   /* offset within [1-nb_tmp_fargs:nb_tmp_fargs] */
6219    //   for (i=1-nb_tmp_fargs; i<nb_tmp_fargs; i++) {
6220    for (i=0; i<nb_tmp_fargs; i++) {
6221       offs = i * 8;    // offset = i * sizeof(double)
6222       if (i < 0) {
6223          src   =  fargs     [nb_tmp_fargs-1 + i];
6224          p_dst = &fargs_priv[nb_tmp_fargs-1 + i];
6225          base  = (HWord_t)&fargs_priv[nb_tmp_fargs-1];
6226       } else {
6227          src   =  fargs     [i];
6228          p_dst = &fargs_priv[i];
6229          base  = (HWord_t)&fargs_priv[0];
6230       }
6231       *p_dst = 0;  // clear dst
6232
6233       f14  = src;    // read from fargs
6234       r15  = base;   // store to r15 + offs
6235       r16  = offs;
6236
6237       SET_CR_XER_ZERO;
6238       (*func)();
6239       GET_CR_XER(flags,xer);
6240
6241 #ifndef __powerpc64__
6242       printf("%s %016llx, %4d => %016llx, %4d",
6243 #else
6244       printf("%s %016llx, %4lld => %016llx, %4lld",
6245 #endif
6246              name, double_to_bits(src), r16/*offs*/,
6247              double_to_bits(*p_dst), r15-base);
6248 #if defined TEST_FLOAT_FLAGS
6249       printf(" (%08x %08x)", flags, xer);
6250 #endif
6251       printf("\n");
6252
6253
6254 #if 0
6255       // print double precision result
6256 #ifndef __powerpc64__
6257       printf("%s %016llx (%014e), %4d => %016llx (%014e), %08x (%08x %08x)\n",
6258 #else
6259       printf("%s %016llx (%014e), %4d => %016llx (%014e), %08x (%08x %08x)\n",
6260 #endif
6261              name, double_to_bits(src), src, offs,
6262              double_to_bits(*p_dst), *p_dst, r15, flags, xer);
6263
6264       // print single precision result
6265 #ifndef __powerpc64__
6266       printf("%s %016llx (%014e), %4d => %08x (%f), %08x (%08x %08x)\n",
6267 #else
6268       printf("%s %016llx (%014e), %4d => %08x (%f), %08x (%08x %08x)\n",
6269 #endif
6270              name, double_to_bits(src), src, offs,
6271              (uint32_t)(double_to_bits(*p_dst) >> 32),
6272              bits_to_float( (uint32_t)(double_to_bits(*p_dst) >> 32) ),
6273              r15, flags, xer);
6274 #endif
6275    }
6276    free(fargs_priv);
6277 }
6278
6279
6280 /* Used in do_tests, indexed by flags->nb_args
6281    Elements correspond to enum test_flags::num args
6282 */
6283 static test_loop_t float_loops[] = {
6284    &test_float_one_arg,
6285    &test_float_two_args,
6286    &test_float_three_args,
6287    &test_float_two_args,
6288    NULL,
6289    NULL,
6290    &test_float_special,
6291    &test_float_ld_one_reg_imm16,
6292    &test_float_ld_two_regs,
6293    &test_float_st_two_regs_imm16,
6294    &test_float_st_three_regs,
6295 };
6296 #endif /* !defined (NO_FLOAT) */
6297
6298
6299 #if defined (HAS_ALTIVEC)
6300
6301 /* Ref: vector insns to test setting CR, VSCR:
6302          volatile vector unsigned int v1 =
6303             //            (vector unsigned int){ 0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF };
6304             (vector unsigned int){ 0x80808080,0x80808080,0x80808080,0x80808080 };
6305          volatile vector unsigned int v2 =
6306             //            (vector unsigned int){ 0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF };
6307             (vector unsigned int){ 0x01010101,0x01010101,0x01010101,0x01010101 };
6308          //__asm__ __volatile__ ("vcmpequw. 31,%0,%1" : : "v" (v1), "v" (v2));   // sets CR[6]
6309          //__asm__ __volatile__ ("vpkswss 31,%0,%1" : : "v" (v1), "v" (v2));     // sets VSCR[SAT]
6310          __asm__ __volatile__ ("vsubsbs 31,%0,%1" : : "v" (v1), "v" (v2));       // sets VSCR[SAT]
6311 */
6312
6313 //#define DEFAULT_VSCR 0x00010000
6314 #define DEFAULT_VSCR 0x0
6315
6316 static void test_av_int_one_arg (const char* name, test_func_t func,
6317                                  unused uint32_t test_flags)
6318 {
6319    volatile uint32_t flags, tmpcr;
6320    volatile vector unsigned int tmpvscr;
6321    volatile vector unsigned int vec_in, vec_out, vscr;
6322    unsigned int *src, *dst;
6323    int i;
6324 #if defined TEST_VSCR_SAT
6325    unsigned int* p_vscr;
6326 #endif
6327
6328    for (i=0; i<nb_viargs; i++) {
6329       /* Save flags */
6330       __asm__ __volatile__ ("mfcr   %0" : "=r"  (tmpcr));
6331       __asm__ __volatile__ ("mfvscr %0" : "=v" (tmpvscr));
6332
6333       vec_in  = (vector unsigned int)viargs[i];
6334       vec_out = (vector unsigned int){ 0,0,0,0 };
6335
6336       // reset VSCR and CR
6337       vscr = (vector unsigned int){ 0,0,0,DEFAULT_VSCR };
6338       flags = 0;
6339       __asm__ __volatile__ ("mtvscr %0" : : "v" (vscr) );
6340       __asm__ __volatile__ ("mtcr   %0" : : "r" (flags));
6341
6342       // load input -> r14
6343       __asm__ __volatile__ ("vor 14,%0,%0" : : "v" (vec_in));
6344
6345       // do stuff
6346       (*func)();
6347
6348       // retrieve output <- r17
6349       __asm__ __volatile__ ("vor %0,17,17" : "=v" (vec_out));
6350
6351       // get CR,VSCR flags
6352       __asm__ __volatile__ ("mfcr   %0" : "=r" (flags));
6353       __asm__ __volatile__ ("mfvscr %0" : "=v" (vscr));
6354
6355       /* Restore flags */
6356       __asm__ __volatile__ ("mtcr   %0" : : "r"  (tmpcr));
6357       __asm__ __volatile__ ("mtvscr %0" : : "v" (tmpvscr));
6358
6359       src = (unsigned int*)&vec_in;
6360       dst = (unsigned int*)&vec_out;
6361
6362       printf("%s: %08x %08x %08x %08x\n", name,
6363              src[0], src[1], src[2], src[3]);
6364       printf("%s:  => %08x %08x %08x %08x ", name,
6365              dst[0], dst[1], dst[2], dst[3]);
6366 #if defined TEST_VSCR_SAT
6367       p_vscr = (unsigned int*)&vscr;
6368       printf("(%08x, %08x)\n", flags, p_vscr[3]);
6369 #else
6370       printf("(%08x)\n", flags);
6371 #endif
6372    }
6373 }
6374
6375 static void test_av_int_two_args (const char* name, test_func_t func,
6376                                   unused uint32_t test_flags)
6377 {
6378    volatile uint32_t flags, tmpcr;
6379    volatile vector unsigned int tmpvscr;
6380    volatile vector unsigned int vec_in1, vec_in2, vec_out, vscr;
6381    unsigned int *src1, *src2, *dst;
6382    int i,j;
6383 #if defined TEST_VSCR_SAT
6384    unsigned int* p_vscr;
6385 #endif
6386
6387    for (i=0; i<nb_viargs; i++) {
6388       vec_in1 = (vector unsigned int)viargs[i];
6389       for (j=0; j<nb_viargs; j++) {
6390          vec_in2 = (vector unsigned int)viargs[j];
6391          vec_out = (vector unsigned int){ 0,0,0,0 };
6392
6393          /* Save flags */
6394          __asm__ __volatile__ ("mfcr   %0" : "=r"  (tmpcr));
6395          __asm__ __volatile__ ("mfvscr %0" : "=v" (tmpvscr));
6396
6397          // reset VSCR and CR
6398          vscr = (vector unsigned int){ 0,0,0,DEFAULT_VSCR };
6399          flags = 0;
6400          __asm__ __volatile__ ("mtvscr %0" : : "v" (vscr) );
6401          __asm__ __volatile__ ("mtcr   %0" : : "r" (flags));
6402
6403          // load inputs -> r14,r15
6404          __asm__ __volatile__ ("vor 14,%0,%0" : : "v" (vec_in1));
6405          __asm__ __volatile__ ("vor 15,%0,%0" : : "v" (vec_in2));
6406
6407          // do stuff
6408          (*func)();
6409
6410          // retrieve output <- r17
6411          __asm__ __volatile__ ("vor %0,17,17" : "=v" (vec_out));
6412
6413          // get CR,VSCR flags
6414          __asm__ __volatile__ ("mfcr   %0" : "=r" (flags));
6415          __asm__ __volatile__ ("mfvscr %0" : "=v" (vscr));
6416
6417          /* Restore flags */
6418          __asm__ __volatile__ ("mtcr   %0" : : "r"  (tmpcr));
6419          __asm__ __volatile__ ("mtvscr %0" : : "v" (tmpvscr));
6420
6421          src1 = (unsigned int*)&vec_in1;
6422          src2 = (unsigned int*)&vec_in2;
6423          dst  = (unsigned int*)&vec_out;
6424
6425          printf("%s: ", name);
6426          printf("%08x%08x%08x%08x, ", src1[0], src1[1], src1[2], src1[3]);
6427          printf("%08x%08x%08x%08x\n", src2[0], src2[1], src2[2], src2[3]);
6428          printf("%s:  => %08x %08x %08x %08x ", name,
6429                 dst[0], dst[1], dst[2], dst[3]);
6430 #if defined TEST_VSCR_SAT
6431          p_vscr = (unsigned int*)&vscr;
6432          printf("(%08x, %08x)\n", flags, p_vscr[3]);
6433 #else
6434          printf("(%08x)\n", flags);
6435 #endif
6436       }
6437       if (verbose) printf("\n");
6438    }
6439 }
6440
6441 static void test_av_int_three_args (const char* name, test_func_t func,
6442                                     unused uint32_t test_flags)
6443 {
6444    volatile uint32_t flags, tmpcr;
6445    volatile vector unsigned int tmpvscr;
6446    volatile vector unsigned int vec_in1, vec_in2, vec_in3, vec_out, vscr;
6447    unsigned int *src1, *src2, *src3, *dst;
6448    int i,j,k;
6449 #if defined TEST_VSCR_SAT
6450    unsigned int* p_vscr;
6451 #endif
6452
6453    for (i=0; i<nb_viargs; i++) {
6454       vec_in1 = (vector unsigned int)viargs[i];
6455       for (j=0; j<nb_viargs; j++) {
6456          vec_in2 = (vector unsigned int)viargs[j];
6457          for (k=0; k<nb_viargs; k++) {
6458             vec_in3 = (vector unsigned int)viargs[k];
6459             vec_out = (vector unsigned int){ 0,0,0,0 };
6460
6461             /* Save flags */
6462             __asm__ __volatile__ ("mfcr   %0" : "=r"  (tmpcr));
6463             __asm__ __volatile__ ("mfvscr %0" : "=v" (tmpvscr));
6464
6465             // reset VSCR and CR
6466             vscr = (vector unsigned int){ 0,0,0,DEFAULT_VSCR };
6467             flags = 0;
6468             __asm__ __volatile__ ("mtvscr %0" : : "v" (vscr) );
6469             __asm__ __volatile__ ("mtcr   %0" : : "r" (flags));
6470
6471             // load inputs -> r14,r15,r16
6472             __asm__ __volatile__ ("vor 14,%0,%0" : : "v" (vec_in1));
6473             __asm__ __volatile__ ("vor 15,%0,%0" : : "v" (vec_in2));
6474             __asm__ __volatile__ ("vor 16,%0,%0" : : "v" (vec_in3));
6475
6476             // do stuff
6477             (*func)();
6478
6479             // retrieve output <- r17
6480             __asm__ __volatile__ ("vor %0,17,17" : "=v" (vec_out));
6481
6482             // get CR,VSCR flags
6483             __asm__ __volatile__ ("mfcr   %0" : "=r" (flags));
6484             __asm__ __volatile__ ("mfvscr %0" : "=v" (vscr));
6485
6486             /* Restore flags */
6487             __asm__ __volatile__ ("mtcr   %0" : : "r"  (tmpcr));
6488             __asm__ __volatile__ ("mtvscr %0" : : "v" (tmpvscr));
6489
6490             src1 = (unsigned int*)&vec_in1;
6491             src2 = (unsigned int*)&vec_in2;
6492             src3 = (unsigned int*)&vec_in3;
6493             dst  = (unsigned int*)&vec_out;
6494
6495             printf("%s: %08x%08x%08x%08x, %08x%08x%08x%08x, %08x%08x%08x%08x\n", name,
6496                    src1[0], src1[1], src1[2], src1[3],
6497                    src2[0], src2[1], src2[2], src2[3],
6498                    src3[0], src3[1], src3[2], src3[3]);
6499
6500             printf("%s:  => %08x%08x%08x%08x ", name,
6501                    dst[0], dst[1], dst[2], dst[3]);
6502 #if defined TEST_VSCR_SAT
6503             p_vscr = (unsigned int*)&vscr;
6504             printf("(%08x, %08x)\n", flags, p_vscr[3]);
6505 #else
6506             printf("(%08x)\n", flags);
6507 #endif
6508          }
6509          if (verbose) printf("\n");
6510       }
6511    }
6512 }
6513
6514
6515 static void vs128_cb (const char* name, test_func_t func,
6516                       unused uint32_t test_flags)
6517 {
6518    volatile uint32_t flags, tmpcr;
6519    volatile vector unsigned int tmpvscr;
6520    volatile vector unsigned char vec_shft;
6521    volatile vector unsigned int vec_in1, vec_out, vscr;
6522    unsigned int *src1, *src2, *dst;
6523    int i,j;
6524 #if defined TEST_VSCR_SAT
6525    unsigned int* p_vscr;
6526 #endif
6527
6528    for (i=0; i<nb_viargs; i++) {
6529       vec_in1 = (vector unsigned int)viargs[i];
6530       for (j=0; j<8; j++) {
6531          /* low-order 3bits of every byte must be the same for the shift vector */
6532          vec_shft = (vector unsigned char) { j,j,j,j, j,j,j,j, j,j,j,j, j,j,j,j };
6533          vec_out  = (vector unsigned int){ 0,0,0,0 };
6534
6535          /* Save flags */
6536          __asm__ __volatile__ ("mfcr   %0" : "=r"  (tmpcr));
6537          __asm__ __volatile__ ("mfvscr %0" : "=v" (tmpvscr));
6538
6539          // reset VSCR and CR
6540          vscr = (vector unsigned int){ 0,0,0,DEFAULT_VSCR };
6541          flags = 0;
6542          __asm__ __volatile__ ("mtvscr %0" : : "v" (vscr) );
6543          __asm__ __volatile__ ("mtcr   %0" : : "r" (flags));
6544
6545          // load inputs -> r14,r15
6546          __asm__ __volatile__ ("vor 14,%0,%0" : : "v" (vec_in1));
6547          __asm__ __volatile__ ("vor 15,%0,%0" : : "v" (vec_shft));
6548
6549          // do stuff
6550          (*func)();
6551
6552          // retrieve output <- r17
6553          __asm__ __volatile__ ("vor %0,17,17" : "=v" (vec_out));
6554
6555          // get CR,VSCR flags
6556          __asm__ __volatile__ ("mfcr   %0" : "=r" (flags));
6557          __asm__ __volatile__ ("mfvscr %0" : "=v" (vscr));
6558
6559          /* Restore flags */
6560          __asm__ __volatile__ ("mtcr   %0" : : "r"  (tmpcr));
6561          __asm__ __volatile__ ("mtvscr %0" : : "v" (tmpvscr));
6562
6563          src1 = (unsigned int*)&vec_in1;
6564          src2 = (unsigned int*)&vec_shft;
6565          dst  = (unsigned int*)&vec_out;
6566
6567          printf("%s: ", name);
6568          printf("%08x%08x%08x%08x, ", src1[0], src1[1], src1[2], src1[3]);
6569          printf("%08x%08x%08x%08x\n", src2[0], src2[1], src2[2], src2[3]);
6570
6571          printf("%s:  => %08x %08x %08x %08x ", name,
6572                 dst[0], dst[1], dst[2], dst[3]);
6573 #if defined TEST_VSCR_SAT
6574          p_vscr = (unsigned int*)&vscr;
6575          printf("(%08x, %08x)\n", flags, p_vscr[3]);
6576 #else
6577          printf("(%08x)\n", flags);
6578 #endif
6579       }
6580       if (verbose) printf("\n");
6581    }
6582 }
6583
6584 static void vsplt_cb (const char* name, test_func_t func_IN,
6585                       unused uint32_t test_flags)
6586 {
6587    volatile test_func_t func;
6588    uint32_t* func_buf = get_rwx_area();
6589    volatile uint32_t flags, tmpcr;
6590    volatile vector unsigned int tmpvscr;
6591    volatile vector unsigned int vec_in1, vec_out, vscr;
6592    unsigned int *src1, *dst;
6593    int i,j;
6594 #if defined TEST_VSCR_SAT
6595    unsigned int* p_vscr;
6596 #endif
6597
6598    for (i=0; i<nb_viargs; i++) {
6599       vec_in1 = (vector unsigned int)viargs[i];
6600
6601       for (j=0; j<16; j+=3) {
6602          vec_out = (vector unsigned int){ 0,0,0,0 };
6603
6604          /* Patch up the instruction */
6605          func = init_function( func_IN, func_buf );
6606          patch_op_imm(&func_buf[0], j, 16, 5);
6607
6608          /* Save flags */
6609          __asm__ __volatile__ ("mfcr   %0" : "=r"  (tmpcr));
6610          __asm__ __volatile__ ("mfvscr %0" : "=v" (tmpvscr));
6611
6612          // reset VSCR and CR
6613          vscr = (vector unsigned int){ 0,0,0,DEFAULT_VSCR };
6614          flags = 0;
6615          __asm__ __volatile__ ("mtvscr %0" : : "v" (vscr) );
6616          __asm__ __volatile__ ("mtcr   %0" : : "r" (flags));
6617
6618          // load input -> r14
6619          __asm__ __volatile__ ("vor 14,%0,%0" : : "v" (vec_in1));
6620
6621          // do stuff
6622          (*func)();
6623
6624          // retrieve output <- r17
6625          __asm__ __volatile__ ("vor %0,17,17" : "=v" (vec_out));
6626
6627          // get CR,VSCR flags
6628          __asm__ __volatile__ ("mfcr   %0" : "=r" (flags));
6629          __asm__ __volatile__ ("mfvscr %0" : "=v" (vscr));
6630
6631          /* Restore flags */
6632          __asm__ __volatile__ ("mtcr   %0" : : "r"  (tmpcr));
6633          __asm__ __volatile__ ("mtvscr %0" : : "v" (tmpvscr));
6634
6635          src1 = (unsigned int*)&vec_in1;
6636          dst  = (unsigned int*)&vec_out;
6637
6638          printf("%s: ", name);
6639          printf("%08x %08x %08x %08x, %u\n", src1[0], src1[1], src1[2], src1[3], j);
6640
6641          printf("%s:  => %08x %08x %08x %08x ", name,
6642                 dst[0], dst[1], dst[2], dst[3]);
6643 #if defined TEST_VSCR_SAT
6644          p_vscr = (unsigned int*)&vscr;
6645          printf("(%08x, %08x)\n", flags, p_vscr[3]);
6646 #else
6647          printf("(%08x)\n", flags);
6648 #endif
6649       }
6650       if (verbose) printf("\n");
6651    }
6652 }
6653
6654 static void vspltis_cb (const char* name, test_func_t func_IN,
6655                       unused uint32_t test_flags)
6656 {
6657    volatile test_func_t func;
6658    uint32_t* func_buf = get_rwx_area();
6659    volatile uint32_t flags, tmpcr;
6660    volatile vector unsigned int tmpvscr;
6661    volatile vector unsigned int vec_out, vscr;
6662    unsigned int *dst;
6663    int i;
6664 #if defined TEST_VSCR_SAT
6665    unsigned int* p_vscr;
6666 #endif
6667
6668    for (i=0; i<32; i++) {
6669       vec_out = (vector unsigned int){ 0,0,0,0 };
6670
6671       /* Patch up the instruction */
6672       func = init_function( func_IN, func_buf );
6673       patch_op_imm(&func_buf[0], i, 16, 5);
6674
6675       /* Save flags */
6676       __asm__ __volatile__ ("mfcr   %0" : "=r"  (tmpcr));
6677       __asm__ __volatile__ ("mfvscr %0" : "=v" (tmpvscr));
6678
6679       // reset VSCR and CR
6680       vscr = (vector unsigned int){ 0,0,0,DEFAULT_VSCR };
6681       flags = 0;
6682       __asm__ __volatile__ ("mtvscr %0" : : "v" (vscr) );
6683       __asm__ __volatile__ ("mtcr   %0" : : "r" (flags));
6684
6685       // do stuff
6686       (*func)();
6687
6688       // retrieve output <- r17
6689       __asm__ __volatile__ ("vor %0,17,17" : "=v" (vec_out));
6690
6691       // get CR,VSCR flags
6692       __asm__ __volatile__ ("mfcr   %0" : "=r" (flags));
6693       __asm__ __volatile__ ("mfvscr %0" : "=v" (vscr));
6694
6695       /* Restore flags */
6696       __asm__ __volatile__ ("mtcr   %0" : : "r"  (tmpcr));
6697       __asm__ __volatile__ ("mtvscr %0" : : "v" (tmpvscr));
6698
6699       dst = (unsigned int*)&vec_out;
6700
6701       printf("%s: %2d => ", name, i);
6702       printf("%08x %08x %08x %08x ", dst[0], dst[1], dst[2], dst[3]);
6703 #if defined TEST_VSCR_SAT
6704       p_vscr = (unsigned int*)&vscr;
6705       printf("(%08x, %08x)\n", flags, p_vscr[3]);
6706 #else
6707       printf("(%08x)\n", flags);
6708 #endif
6709    }
6710 }
6711
6712 static void vsldoi_cb (const char* name, test_func_t func_IN,
6713                        unused uint32_t test_flags)
6714 {
6715    volatile test_func_t func;
6716    uint32_t* func_buf = get_rwx_area();
6717    volatile uint32_t flags, tmpcr;
6718    volatile vector unsigned int tmpvscr;
6719    volatile vector unsigned int vec_in1, vec_in2, vec_out, vscr;
6720    unsigned int *src1, *src2, *dst;
6721    int i,j,k;
6722 #if defined TEST_VSCR_SAT
6723    unsigned int* p_vscr;
6724 #endif
6725
6726    for (i=0; i<nb_viargs; i++) {
6727       vec_in1 = (vector unsigned int)viargs[i];
6728       for (j=0; j<nb_viargs; j++) {
6729          vec_in2 = (vector unsigned int)viargs[j];
6730          for (k=0; k<16; k+=14) {
6731             vec_out = (vector unsigned int){ 0,0,0,0 };
6732
6733             /* Patch up the instruction */
6734             func = init_function( func_IN, func_buf );
6735             patch_op_imm(&func_buf[0], k, 6, 4);
6736
6737             /* Save flags */
6738             __asm__ __volatile__ ("mfcr   %0" : "=r"  (tmpcr));
6739             __asm__ __volatile__ ("mfvscr %0" : "=v" (tmpvscr));
6740
6741             // reset VSCR and CR
6742             vscr = (vector unsigned int){ 0,0,0,DEFAULT_VSCR };
6743             flags = 0;
6744             __asm__ __volatile__ ("mtvscr %0" : : "v" (vscr) );
6745             __asm__ __volatile__ ("mtcr   %0" : : "r" (flags));
6746
6747             // load inputs -> r14,r15
6748             __asm__ __volatile__ ("vor 14,%0,%0" : : "v" (vec_in1));
6749             __asm__ __volatile__ ("vor 15,%0,%0" : : "v" (vec_in2));
6750
6751             // do stuff
6752             (*func)();
6753
6754             // retrieve output <- r17
6755             __asm__ __volatile__ ("vor %0,17,17" : "=v" (vec_out));
6756
6757             // get CR,VSCR flags
6758             __asm__ __volatile__ ("mfcr   %0" : "=r" (flags));
6759             __asm__ __volatile__ ("mfvscr %0" : "=v" (vscr));
6760
6761             /* Restore flags */
6762             __asm__ __volatile__ ("mtcr   %0" : : "r"  (tmpcr));
6763             __asm__ __volatile__ ("mtvscr %0" : : "v" (tmpvscr));
6764
6765             src1   = (unsigned int*)&vec_in1;
6766             src2   = (unsigned int*)&vec_in2;
6767             dst    = (unsigned int*)&vec_out;
6768
6769             printf("%s: ", name);
6770             printf("%08x%08x%08x%08x, %08x%08x%08x%08x, %u\n",
6771                    src1[0], src1[1], src1[2], src1[3],
6772                    src2[0], src2[1], src2[2], src2[3], k);
6773
6774             printf("%s:  => %08x %08x %08x %08x] ", name,
6775                    dst[0], dst[1], dst[2], dst[3]);
6776 #if defined TEST_VSCR_SAT
6777             p_vscr = (unsigned int*)&vscr;
6778             printf("(%08x, %08x)\n", flags, p_vscr[3]);
6779 #else
6780             printf("(%08x)\n", flags);
6781 #endif
6782          }
6783          if (verbose) printf("\n");
6784       }
6785    }
6786 }
6787
6788 /* lvsl, lvsr */
6789 static void lvs_cb (const char *name, test_func_t func,
6790                     unused uint32_t test_flags)
6791 {
6792    volatile uint32_t flags, tmpcr;
6793    volatile vector unsigned int tmpvscr;
6794    volatile vector unsigned int vec_out, vscr;
6795    unsigned shift;
6796    unsigned char * dst;
6797    int i, j;
6798 #if defined TEST_VSCR_SAT
6799    unsigned int* p_vscr;
6800 #endif
6801
6802    for (i=-1; i<17; i++) {
6803       vec_out = (vector unsigned int){ 0,0,0,0 };
6804
6805       // make sure start address is 16 aligned - use viargs[0]
6806       HWord_t * r15_in_ptr = (HWord_t *)&viargs[0];
6807       r15 = *r15_in_ptr;
6808       r14 = i;
6809
6810       /* Save flags */
6811       __asm__ __volatile__ ("mfcr   %0" : "=r"  (tmpcr));
6812       __asm__ __volatile__ ("mfvscr %0" : "=v" (tmpvscr));
6813
6814       // reset VSCR and CR
6815       vscr = (vector unsigned int){ 0,0,0,DEFAULT_VSCR };
6816       flags = 0;
6817       __asm__ __volatile__ ("mtvscr %0" : : "v" (vscr) );
6818       __asm__ __volatile__ ("mtcr   %0" : : "r" (flags));
6819
6820       // do stuff
6821       (*func)();
6822
6823       // retrieve output <- r17
6824       __asm__ __volatile__ ("vor %0,17,17" : "=v" (vec_out));
6825
6826       // get CR,VSCR flags
6827       __asm__ __volatile__ ("mfcr   %0" : "=r" (flags));
6828       __asm__ __volatile__ ("mfvscr %0" : "=v" (vscr));
6829
6830       /* Restore flags */
6831       __asm__ __volatile__ ("mtcr   %0" : : "r"  (tmpcr));
6832       __asm__ __volatile__ ("mtvscr %0" : : "v" (tmpvscr));
6833
6834       dst = (unsigned char*)&vec_out;
6835
6836       shift = ((unsigned int)i + *r15_in_ptr) & 0xf;
6837       printf("%s %x, %3d", name, shift, 0);
6838       printf(" => 0x");
6839       for (j = 0; j < 16; j++) {
6840          printf("%02x", dst[j]);
6841          if (j == 7)
6842             printf(" 0x");
6843       }
6844
6845       printf(" (%08x)\n", flags);
6846    }
6847    if (verbose) printf("\n");
6848 }
6849
6850 static special_t special_av_int_ops[] = {
6851    {
6852       "vsr", /* Two registers arguments */
6853       &vs128_cb,
6854    },
6855    {
6856       "vsl", /* Two registers arguments */
6857       &vs128_cb,
6858    },
6859    {
6860       "vspltb", /* One reg, one 5-bit uimm arguments */
6861       &vsplt_cb,
6862    },
6863    {
6864       "vsplth", /* One reg, one 5-bit uimm arguments */
6865       &vsplt_cb,
6866    },
6867    {
6868       "vspltw", /* One reg, one 5-bit uimm arguments */
6869       &vsplt_cb,
6870    },
6871    {
6872       "vspltisb", /* One reg, one 5-bit uimm arguments */
6873       &vspltis_cb,
6874    },
6875    {
6876       "vspltish", /* One reg, one 5-bit uimm arguments */
6877       &vspltis_cb,
6878    },
6879    {
6880       "vspltisw", /* One reg, one 5-bit uimm arguments */
6881       &vspltis_cb,
6882    },
6883    {
6884       "vsldoi", /* Two regs, one 4-bit uimm arguments */
6885       &vsldoi_cb,
6886    },
6887    {
6888       "lvsl", /* Two regs */
6889       &lvs_cb,
6890    },
6891    {
6892       "lvsr", /* Two regs */
6893       &lvs_cb,
6894    },
6895    {
6896       NULL,
6897       NULL,
6898    },
6899 };
6900
6901 static void test_av_int_special (const char* name, test_func_t func,
6902                                  uint32_t test_flags)
6903 {
6904    test_special(special_av_int_ops, name, func, test_flags);
6905 }
6906
6907 static void test_av_int_ld_two_regs (const char *name,
6908                                   test_func_t func,
6909                                   unused uint32_t test_flags)
6910 {
6911    volatile uint32_t flags, tmpcr;
6912    volatile vector unsigned int tmpvscr;
6913    volatile vector unsigned int vec_in, vec_out, vscr;
6914    unsigned int *src, *dst;
6915    int i,j, k, do_mask;
6916
6917    do_mask = 0;
6918    if (strstr(name, "lvebx") != NULL) do_mask = 1;
6919    if (strstr(name, "lvehx") != NULL) do_mask = 2;
6920    if (strstr(name, "lvewx") != NULL) do_mask = 4;
6921
6922    for (i=0; i<nb_viargs; i++) {
6923       for (j=0; j<16; j+=7) {
6924          vec_out = (vector unsigned int){ 0,0,0,0 };
6925
6926          // load from viargs array + some dis-alignment
6927          r15 = (HWord_t)&viargs[0];
6928          r14 = i*16 + j;
6929
6930          /* Save flags */
6931          __asm__ __volatile__ ("mfcr   %0" : "=r"  (tmpcr));
6932          __asm__ __volatile__ ("mfvscr %0" : "=v" (tmpvscr));
6933
6934          // reset VSCR and CR
6935          vscr = (vector unsigned int){ 0,0,0,DEFAULT_VSCR };
6936          flags = 0;
6937          __asm__ __volatile__ ("mtvscr %0" : : "v" (vscr) );
6938          __asm__ __volatile__ ("mtcr   %0" : : "r" (flags));
6939
6940          // do stuff
6941          (*func)();
6942
6943          // retrieve output <- r17
6944          __asm__ __volatile__ ("vor %0,17,17" : "=v" (vec_out));
6945
6946          // get CR,VSCR flags
6947          __asm__ __volatile__ ("mfcr   %0" : "=r" (flags));
6948          __asm__ __volatile__ ("mfvscr %0" : "=v" (vscr));
6949
6950          /* Restore flags */
6951          __asm__ __volatile__ ("mtcr   %0" : : "r"  (tmpcr));
6952          __asm__ __volatile__ ("mtvscr %0" : : "v" (tmpvscr));
6953
6954          vec_in = (vector unsigned int)viargs[i];
6955          src = (unsigned int*)&vec_in;
6956          dst = (unsigned int*)&vec_out;
6957
6958          /* For lvebx/lvehx/lvewx, as per the documentation, all of
6959             the dest reg except the loaded bits are undefined
6960             afterwards.  And different CPUs really do produce
6961             different results.  So mask out bits of the result that
6962             are undefined so as to make the test work reliably. */
6963          if (do_mask == 1) {
6964             char* p = (char*)dst;
6965             for (k = 0; k < 16; k++)
6966                if (k != j)
6967                   p[k] = (char)0;
6968          }
6969          if (do_mask == 2) {
6970             short* p = (short*)dst;
6971             for (k = 0; k < 8; k++)
6972                if (k != (j>>1))
6973                   p[k] = (short)0;
6974          }
6975          if (do_mask == 4) {
6976             int* p = (int*)dst;
6977             for (k = 0; k < 4; k++)
6978                if (k != (j>>2))
6979                   p[k] = (int)0;
6980          }
6981
6982          printf("%s %3d, %08x %08x %08x %08x", name, j, src[0], src[1], src[2], src[3]);
6983          printf(" => %08x %08x %08x %08x ", dst[0], dst[1], dst[2], dst[3]);
6984          printf("(%08x)\n", flags);
6985       }
6986       if (verbose) printf("\n");
6987    }
6988 }
6989
6990
6991 static void test_av_int_st_three_regs (const char *name,
6992                                        test_func_t func,
6993                                        unused uint32_t test_flags)
6994 {
6995    volatile uint32_t flags, tmpcr;
6996    volatile vector unsigned int tmpvscr;
6997    volatile vector unsigned int vec_in, vec_out, vscr;
6998    unsigned int *src, *dst;
6999    int i,j;
7000    vector unsigned int* viargs_priv;
7001
7002    // private viargs table to store to
7003    viargs_priv = memalign16(nb_viargs * sizeof(vector unsigned int));
7004    for (i=0; i<nb_viargs; i++)
7005       viargs_priv[i] = (vector unsigned int) { 0,0,0,0 };
7006
7007    for (i=0; i<nb_viargs; i++) {
7008       for (j=0; j<16; j+=7) {
7009          // read from viargs
7010          vec_in = (vector unsigned int)viargs[i];
7011
7012          // store to viargs_priv[0] + some dis-alignment
7013          r16 = (HWord_t)&viargs_priv[0];
7014          r15 = i*16 + j;
7015
7016          /* Save flags */
7017          __asm__ __volatile__ ("mfcr   %0" : "=r"  (tmpcr));
7018          __asm__ __volatile__ ("mfvscr %0" : "=v" (tmpvscr));
7019
7020          // reset VSCR and CR
7021          vscr = (vector unsigned int){ 0,0,0,DEFAULT_VSCR };
7022          flags = 0;
7023          __asm__ __volatile__ ("mtvscr %0" : : "v" (vscr) );
7024          __asm__ __volatile__ ("mtcr   %0" : : "r" (flags));
7025
7026          // load inputs -> r14
7027          __asm__ __volatile__ ("vor 14,%0,%0" : : "v" (vec_in));
7028
7029          // do stuff
7030          (*func)();
7031
7032          // Output stored in viargs_priv
7033
7034          // get CR,VSCR flags
7035          __asm__ __volatile__ ("mfcr   %0" : "=r" (flags));
7036          __asm__ __volatile__ ("mfvscr %0" : "=v" (vscr));
7037
7038          /* Restore flags */
7039          __asm__ __volatile__ ("mtcr   %0" : : "r"  (tmpcr));
7040          __asm__ __volatile__ ("mtvscr %0" : : "v" (tmpvscr));
7041
7042          vec_out = (vector unsigned int)viargs_priv[i];
7043          src = (unsigned int*)&vec_in;
7044          dst = (unsigned int*)&vec_out;
7045
7046          printf("%s %3d, %08x %08x %08x %08x", name, j, src[0], src[1], src[2], src[3]);
7047          printf(" => %08x %08x %08x %08x ", dst[0], dst[1], dst[2], dst[3]);
7048          printf("(%08x)\n", flags);
7049       }
7050       if (verbose) printf("\n");
7051    }
7052 }
7053
7054 /* Used in do_tests, indexed by flags->nb_args
7055    Elements correspond to enum test_flags::num args
7056 */
7057 static test_loop_t altivec_int_loops[] = {
7058    &test_av_int_one_arg,
7059    &test_av_int_two_args,
7060    &test_av_int_three_args,
7061    &test_av_int_two_args,
7062    NULL,
7063    NULL,
7064    &test_av_int_special,
7065    NULL,
7066    &test_av_int_ld_two_regs,
7067    NULL,
7068    test_av_int_st_three_regs,
7069 };
7070
7071
7072 static void test_av_float_one_arg (const char* name, test_func_t func,
7073                                    unused uint32_t test_flags)
7074 {
7075    volatile uint32_t flags, tmpcr;
7076    volatile vector unsigned int tmpvscr;
7077    volatile vector float vec_in, vec_out;
7078    volatile vector unsigned int vscr;
7079    unsigned int *src, *dst;
7080    int i;
7081 #if defined TEST_VSCR_SAT
7082    unsigned int* p_vscr;
7083 #endif
7084
7085    /* if we're doing an estimation operation, arrange to zap the
7086       bottom 10-bits of the result as it's basically garbage, and differs
7087       between cpus */
7088    unsigned int mask
7089       = (strstr(name,"vrsqrtefp") != NULL ||
7090          strstr(name,    "vrefp") != NULL)
7091            ? 0xFFFFC000 : 0xFFFFFFFF;
7092
7093    for (i=0; i<nb_vfargs; i++) {
7094       vec_in  = (vector float)vfargs[i];
7095       vec_out = (vector float){ 0.0, 0.0, 0.0, 0.0 };
7096
7097       /* Save flags */
7098       __asm__ __volatile__ ("mfcr   %0" : "=r"  (tmpcr));
7099       __asm__ __volatile__ ("mfvscr %0" : "=v" (tmpvscr));
7100
7101       // reset VSCR and CR
7102       vscr = (vector unsigned int){ 0,0,0,DEFAULT_VSCR };
7103       flags = 0;
7104       __asm__ __volatile__ ("mtvscr %0" : : "v" (vscr) );
7105       __asm__ __volatile__ ("mtcr   %0" : : "r" (flags));
7106
7107       // load input -> r14
7108       __asm__ __volatile__ ("vor 14,%0,%0" : : "v" (vec_in));
7109
7110       // do stuff
7111       (*func)();
7112
7113       // retrieve output <- r17
7114       __asm__ __volatile__ ("vor %0,17,17" : "=v" (vec_out));
7115
7116       // get CR,VSCR flags
7117       __asm__ __volatile__ ("mfcr   %0" : "=r" (flags));
7118       __asm__ __volatile__ ("mfvscr %0" : "=v" (vscr));
7119
7120       /* Restore flags */
7121       __asm__ __volatile__ ("mtcr   %0" : : "r"  (tmpcr));
7122       __asm__ __volatile__ ("mtvscr %0" : : "v" (tmpvscr));
7123
7124       src = (unsigned int*)&vec_in;
7125       dst = (unsigned int*)&vec_out;
7126
7127       printf("%s: %08x %08x %08x %08x\n", name,
7128              src[0], src[1], src[2], src[3]);
7129       printf("%s:  => %08x %08x %08x %08x ", name,
7130              dst[0] & mask, dst[1] & mask, dst[2] & mask, dst[3] & mask);
7131 #if defined TEST_VSCR_SAT
7132       p_vscr = (unsigned int*)&vscr;
7133       printf("(%08x, %08x)\n", flags, p_vscr[3]);
7134 #else
7135       printf("(%08x)\n", flags);
7136 #endif
7137    }
7138 }
7139
7140 static void test_av_float_two_args (const char* name, test_func_t func,
7141                                     unused uint32_t test_flags)
7142 {
7143    volatile uint32_t flags, tmpcr;
7144    volatile vector unsigned int tmpvscr;
7145    volatile vector float vec_in1, vec_in2, vec_out;
7146    volatile vector unsigned int vscr;
7147    unsigned int *src1, *src2, *dst;
7148    int i,j;
7149 #if defined TEST_VSCR_SAT
7150    unsigned int* p_vscr;
7151 #endif
7152
7153    for (i=0; i<nb_vfargs; i++) {
7154       for (j=0; j<nb_vfargs; j+=3) {
7155          vec_in1 = (vector float)vfargs[i];
7156          vec_in2 = (vector float)vfargs[j];
7157          vec_out = (vector float){ 0.0, 0.0, 0.0, 0.0 };
7158
7159          /* Save flags */
7160          __asm__ __volatile__ ("mfcr   %0" : "=r"  (tmpcr));
7161          __asm__ __volatile__ ("mfvscr %0" : "=v" (tmpvscr));
7162
7163          // reset VSCR and CR
7164          vscr = (vector unsigned int){ 0,0,0,DEFAULT_VSCR };
7165          flags = 0;
7166          __asm__ __volatile__ ("mtvscr %0" : : "v" (vscr) );
7167          __asm__ __volatile__ ("mtcr   %0" : : "r" (flags));
7168
7169          // load inputs -> r14,r15
7170          __asm__ __volatile__ ("vor 14,%0,%0" : : "v" (vec_in1));
7171          __asm__ __volatile__ ("vor 15,%0,%0" : : "v" (vec_in2));
7172
7173          // do stuff
7174          (*func)();
7175
7176          // retrieve output <- r17
7177          __asm__ __volatile__ ("vor %0,17,17" : "=v" (vec_out));
7178
7179          // get CR,VSCR flags
7180          __asm__ __volatile__ ("mfcr   %0" : "=r" (flags));
7181          __asm__ __volatile__ ("mfvscr %0" : "=v" (vscr));
7182
7183          /* Restore flags */
7184          __asm__ __volatile__ ("mtcr   %0" : : "r"  (tmpcr));
7185          __asm__ __volatile__ ("mtvscr %0" : : "v" (tmpvscr));
7186
7187          src1 = (unsigned int*)&vec_in1;
7188          src2 = (unsigned int*)&vec_in2;
7189          dst  = (unsigned int*)&vec_out;
7190
7191          printf("%s: %08x%08x%08x%08x, %08x%08x%08x%08x\n", name,
7192                 src1[0], src1[1], src1[2], src1[3],
7193                 src2[0], src2[1], src2[2], src2[3]);
7194          printf("%s:  => %08x %08x %08x %08x ", name,
7195                 dst[0], dst[1], dst[2], dst[3]);
7196 #if defined TEST_VSCR_SAT
7197          p_vscr = (unsigned int*)&vscr;
7198          printf("(%08x, %08x)\n", flags, p_vscr[3]);
7199 #else
7200          printf("(%08x)\n", flags);
7201 #endif
7202       }
7203       if (verbose) printf("\n");
7204    }
7205 }
7206
7207 static void test_av_float_three_args (const char* name, test_func_t func,
7208                                       unused uint32_t test_flags)
7209 {
7210    volatile uint32_t flags, tmpcr;
7211    volatile vector unsigned int tmpvscr;
7212    volatile vector float vec_in1, vec_in2, vec_in3, vec_out;
7213    volatile vector unsigned int vscr;
7214    unsigned int *src1, *src2, *src3, *dst;
7215    int i,j,k,n;
7216 #if defined TEST_VSCR_SAT
7217    unsigned int* p_vscr;
7218 #endif
7219
7220    for (i=0; i<nb_vfargs; i++) {
7221       for (j=0; j<nb_vfargs; j+=3) {
7222          for (k=0; k<nb_vfargs; k+=5) {
7223             vec_in1 = (vector float)vfargs[i];
7224             vec_in2 = (vector float)vfargs[j];
7225             vec_in3 = (vector float)vfargs[k];
7226             vec_out = (vector float){ 0.0, 0.0, 0.0, 0.0 };
7227
7228             /* Save flags */
7229             __asm__ __volatile__ ("mfcr   %0" : "=r"  (tmpcr));
7230             __asm__ __volatile__ ("mfvscr %0" : "=v" (tmpvscr));
7231
7232             // reset VSCR and CR
7233             vscr = (vector unsigned int){ 0,0,0,DEFAULT_VSCR };
7234             flags = 0;
7235             __asm__ __volatile__ ("mtvscr %0" : : "v" (vscr) );
7236             __asm__ __volatile__ ("mtcr   %0" : : "r" (flags));
7237
7238             // load inputs -> r14,r15,r16
7239             __asm__ __volatile__ ("vor 14,%0,%0" : : "v" (vec_in1));
7240             __asm__ __volatile__ ("vor 15,%0,%0" : : "v" (vec_in2));
7241             __asm__ __volatile__ ("vor 16,%0,%0" : : "v" (vec_in3));
7242
7243             // do stuff
7244             (*func)();
7245
7246             // retrieve output <- r17
7247             __asm__ __volatile__ ("vor %0,17,17" : "=v" (vec_out));
7248
7249             // get CR,VSCR flags
7250             __asm__ __volatile__ ("mfcr   %0" : "=r" (flags));
7251             __asm__ __volatile__ ("mfvscr %0" : "=v" (vscr));
7252
7253             /* Restore flags */
7254             __asm__ __volatile__ ("mtcr   %0" : : "r"  (tmpcr));
7255             __asm__ __volatile__ ("mtvscr %0" : : "v" (tmpvscr));
7256
7257             src1 = (unsigned int*)&vec_in1;
7258             src2 = (unsigned int*)&vec_in2;
7259             src3 = (unsigned int*)&vec_in3;
7260             dst  = (unsigned int*)&vec_out;
7261
7262             /* Valgrind emulation for vmaddfp and vnmsubfp generates negative
7263              * NAN.  Technically, NAN is not positive or negative so mask off
7264              * the sign bit to eliminate false errors.  The lower 22-bits of
7265              * the 23-bit significand are a don't care for a NAN.  Mask them off.
7266              *
7267              * Valgrind emulation is creating negative zero.  Mask off negative
7268              * from zero result.
7269              *
7270              * These are only an issue as we are printing the result in hex.
7271              *
7272              * The VEX emulation accuracy for the vmaddfp and vnmsubfp
7273              * instructions is off by a single bit in the least significant
7274              * bit position of the result.  Mask off the LSB.
7275              */
7276
7277              for (n=0; n<4; n++) {
7278                 /* NAN result*/
7279                 if (((dst[n] & 0x7F800000) == 0x7F800000) &&
7280                    ((dst[n] & 0x7FFFFF) != 0))
7281                    dst[n] &= 0x7FC00000;
7282
7283                 /* Negative zero result */
7284                 else if (dst[n] == 0x80000000)
7285                     dst[n] = 0x0;
7286
7287                 else
7288                     /* The actual result and the emulated result for the
7289                      * vmaddfp and vnmsubfp instructions sometimes differ
7290                      * in the least significant bit.  Mask off the bit.
7291                      */
7292                     dst[n] &= 0xFFFFFFFE;
7293                 }
7294
7295             printf("%s: %08x%08x%08x%08x, %08x%08x%08x%08x, %08x%08x%08x%08x\n", name,
7296                    src1[0], src1[1], src1[2], src1[3],
7297                    src2[0], src2[1], src2[2], src2[3],
7298                    src3[0], src3[1], src3[2], src3[3]);
7299             printf("%s:  => %08x %08x %08x %08x ", name,
7300                    dst[0], dst[1], dst[2], dst[3]);
7301 #if defined TEST_VSCR_SAT
7302             p_vscr = (unsigned int*)&vscr;
7303             printf("(%08x, %08x)\n", flags, p_vscr[3]);
7304 #else
7305             printf("(%08x)\n", flags);
7306 #endif
7307          }
7308          if (verbose) printf("\n");
7309       }
7310    }
7311 }
7312
7313 static void vcvt_cb (const char* name, test_func_t func_IN,
7314                      unused uint32_t test_flags)
7315 {
7316    volatile test_func_t func;
7317    uint32_t* func_buf = get_rwx_area();
7318    volatile uint32_t flags, tmpcr;
7319    volatile vector unsigned int tmpvscr;
7320    volatile vector unsigned int vec_in, vec_out, vscr;
7321    unsigned int *src, *dst;
7322    int i,j;
7323 #if defined TEST_VSCR_SAT
7324    unsigned int* p_vscr;
7325 #endif
7326
7327    for (i=0; i<nb_vfargs; i++) {
7328       vec_in = (vector unsigned int)vfargs[i];
7329
7330       for (j=0; j<32; j+=9) {
7331          vec_out = (vector unsigned int){ 0,0,0,0 };
7332
7333          /* Patch up the instruction */
7334          func = init_function( func_IN, func_buf );
7335          patch_op_imm(&func_buf[0], j, 16, 5);
7336
7337          /* Save flags */
7338          __asm__ __volatile__ ("mfcr   %0" : "=r"  (tmpcr));
7339          __asm__ __volatile__ ("mfvscr %0" : "=v" (tmpvscr));
7340
7341          // reset VSCR and CR
7342          vscr = (vector unsigned int){ 0,0,0,DEFAULT_VSCR };
7343          flags = 0;
7344          __asm__ __volatile__ ("mtvscr %0" : : "v" (vscr) );
7345          __asm__ __volatile__ ("mtcr   %0" : : "r" (flags));
7346
7347          // load input -> r14
7348          __asm__ __volatile__ ("vor 14,%0,%0" : : "v" (vec_in));
7349
7350          // do stuff
7351          (*func)();
7352
7353          // retrieve output <- r17
7354          __asm__ __volatile__ ("vor %0,17,17" : "=v" (vec_out));
7355
7356          // get CR,VSCR flags
7357          __asm__ __volatile__ ("mfcr   %0" : "=r" (flags));
7358          __asm__ __volatile__ ("mfvscr %0" : "=v" (vscr));
7359
7360          /* Restore flags */
7361          __asm__ __volatile__ ("mtcr   %0" : : "r"  (tmpcr));
7362          __asm__ __volatile__ ("mtvscr %0" : : "v" (tmpvscr));
7363
7364          src = (unsigned int*)&vec_in;
7365          dst = (unsigned int*)&vec_out;
7366
7367          printf("%s: %08x (%13e), %2u", name, src[0], *(float*)(&src[0]), j);
7368          printf(" => %08x (%13e) ", dst[0], *(float*)(&dst[0]));
7369 //         printf(" => %08x ", dst[0]);
7370 #if defined TEST_VSCR_SAT
7371             p_vscr = (unsigned int*)&vscr;
7372             printf("(%08x, %08x)\n", flags, p_vscr[3]);
7373 #else
7374             printf("(%08x)\n", flags);
7375 #endif
7376       }
7377       if (verbose) printf("\n");
7378    }
7379 }
7380
7381 static special_t special_av_float_ops[] = {
7382    {
7383       "vcfux", /* One reg, one 5-bit uimm argument */
7384       &vcvt_cb,
7385    },
7386    {
7387       "vcfsx", /* One reg, one 5-bit uimm argument */
7388       &vcvt_cb,
7389    },
7390    {
7391       "vctuxs", /* One reg, one 5-bit uimm argument */
7392       &vcvt_cb,
7393    },
7394    {
7395       "vcfux", /* One reg, one 5-bit uimm argument */
7396       &vcvt_cb,
7397    },
7398    {
7399       "vctsxs", /* One reg, one 5-bit uimm argument */
7400       &vcvt_cb,
7401    },
7402    {
7403       NULL,
7404       NULL,
7405    },
7406 };
7407
7408 static void test_av_float_special (const char* name, test_func_t func,
7409                                    uint32_t test_flags)
7410 {
7411    test_special(special_av_float_ops, name, func, test_flags);
7412 }
7413
7414 /* Used in do_tests, indexed by flags->nb_args
7415    Elements correspond to enum test_flags::num args
7416 */
7417 static test_loop_t altivec_float_loops[] = {
7418    &test_av_float_one_arg,
7419    &test_av_float_two_args,
7420    &test_av_float_three_args,
7421    &test_av_float_two_args,
7422    NULL,
7423    NULL,
7424    &test_av_float_special,
7425    NULL,
7426    NULL,
7427    NULL,
7428    NULL,
7429 };
7430
7431 #endif /* defined (HAS_ALTIVEC) */
7432
7433
7434 #if defined (IS_PPC405)
7435 static void test_ppc405 (const char* name, test_func_t func,
7436                          unused uint32_t test_flags)
7437 {
7438    volatile uint32_t res, flags, xer, tmpcr, tmpxer;
7439    int i, j, k;
7440
7441    for (i=0; i<nb_iargs; i++) {
7442       for (j=0; j<nb_iargs; j++) {
7443          for (k=0; k<nb_iargs; k++) {
7444             r14 = iargs[i];
7445             r15 = iargs[j];
7446             /* Beware: the third argument and the result
7447              * are in the same register
7448              */
7449             r17 = iargs[k];
7450
7451             /* Save flags */
7452             __asm__ __volatile__ ("mfcr 18");
7453             tmpcr = r18;
7454             __asm__ __volatile__ ("mfxer 18");
7455             tmpxer = r18;
7456
7457             /* Set up flags for test */
7458             r18 = 0;
7459             __asm__ __volatile__ ("mtcr 18");
7460             __asm__ __volatile__ ("mtxer 18");
7461             (*func)();
7462             __asm__ __volatile__ ("mfcr 18");
7463             flags = r18;
7464             __asm__ __volatile__ ("mfxer 18");
7465             xer = r18;
7466             res = r17;
7467
7468             /* Restore flags */
7469             r18 = tmpcr;
7470             __asm__ __volatile__ ("mtcr 18");
7471             r18 = tmpxer;
7472             __asm__ __volatile__ ("mtxer 18");
7473
7474             printf("%s %08x, %08x, %08x => %08x (%08x %08x)\n",
7475                    name, iargs[i], iargs[j], iargs[k], res, flags, xer);
7476          }
7477          if (verbose) printf("\n");
7478       }
7479    }
7480 }
7481 #endif /* defined (IS_PPC405) */
7482
7483 static int check_filter (char *filter)
7484 {
7485    char *c;
7486    int ret = 1;
7487
7488    if (filter != NULL) {
7489       c = strchr(filter, '*');
7490       if (c != NULL) {
7491          *c = '\0';
7492          ret = 0;
7493       }
7494    }
7495
7496    return ret;
7497 }
7498
7499 static int check_name (const char* name, const char *filter,
7500                        int exact)
7501 {
7502    int nlen, flen;
7503    int ret = 0;
7504
7505    if (filter != NULL) {
7506       for (; isspace(*name); name++)
7507          continue;
7508       FDPRINTF("Check '%s' againt '%s' (%s match)\n",
7509                name, filter, exact ? "exact" : "starting");
7510       nlen = strlen(name);
7511       flen = strlen(filter);
7512       if (exact) {
7513          if (nlen == flen && memcmp(name, filter, flen) == 0)
7514             ret = 1;
7515       } else {
7516          if (flen <= nlen && memcmp(name, filter, flen) == 0)
7517             ret = 1;
7518       }
7519    } else {
7520       ret = 1;
7521    }
7522    return ret;
7523 }
7524
7525
7526
7527 typedef struct insn_sel_flags_t_struct {
7528    int one_arg, two_args, three_args;
7529    int arith, logical, compare, ldst;
7530    int integer, floats, p405, altivec, faltivec, misc, sh_algebraic, mfspr;
7531    int cr;
7532 } insn_sel_flags_t;
7533
7534 static void do_tests ( insn_sel_flags_t seln_flags,
7535                        char *filter)
7536 {
7537 #if defined (IS_PPC405)
7538    test_loop_t tmpl;
7539 #endif
7540    test_loop_t *loop;
7541    test_t *tests;
7542    int nb_args, type, family;
7543    int i, j, n;
7544    int exact;
7545
7546    exact = check_filter(filter);
7547    n = 0;
7548    for (i=0; all_tests[i].name != NULL; i++) {
7549       nb_args = all_tests[i].flags & PPC_NB_ARGS;
7550       /* Check number of arguments */
7551       if ((nb_args == 1 && !seln_flags.one_arg) ||
7552           (nb_args == 2 && !seln_flags.two_args) ||
7553           (nb_args == 3 && !seln_flags.three_args))
7554          continue;
7555       /* Check instruction type */
7556       type = all_tests[i].flags & PPC_TYPE;
7557       if ((type == PPC_ARITH   && !seln_flags.arith) ||
7558           (type == PPC_LOGICAL && !seln_flags.logical) ||
7559           (type == PPC_COMPARE && !seln_flags.compare) ||
7560           (type == PPC_LDST && !seln_flags.ldst) ||
7561           (type == PPC_POPCNT && !seln_flags.arith))
7562          continue;
7563       /* Check instruction family */
7564       family = all_tests[i].flags & PPC_FAMILY;
7565       if ((family == PPC_INTEGER  && !seln_flags.integer) ||
7566           (family == PPC_FLOAT    && !seln_flags.floats) ||
7567           (family == PPC_405      && !seln_flags.p405) ||
7568           (family == PPC_ALTIVEC  && !seln_flags.altivec) ||
7569           (family == PPC_MISC  && !seln_flags.misc) ||
7570           (family == PPC_SH_ALGEBRAIC && !seln_flags.sh_algebraic) ||
7571           (family == PPC_MFSPR && !seln_flags.mfspr) ||
7572           (family == PPC_FALTIVEC && !seln_flags.faltivec))
7573          continue;
7574       /* Check flags update */
7575       if (((all_tests[i].flags & PPC_CR)  && seln_flags.cr == 0) ||
7576           (!(all_tests[i].flags & PPC_CR) && seln_flags.cr == 1))
7577          continue;
7578       /* All passed, do the tests */
7579       tests = all_tests[i].tests;
7580       /* Select the test loop */
7581       switch (family) {
7582       case PPC_INTEGER:
7583          loop = &int_loops[nb_args - 1];
7584          break;
7585       case PPC_SH_ALGEBRAIC:
7586          loop = &int_sh_algebraic[0];
7587          break;
7588       case PPC_MFSPR:
7589          loop = &int_mfspr[0];
7590          break;
7591       case PPC_MISC:
7592          loop = &misc_loops[0];
7593          break;
7594       case PPC_FLOAT:
7595 #if !defined (NO_FLOAT)
7596          loop = &float_loops[nb_args - 1];
7597          break;
7598 #else
7599          fprintf(stderr, "Sorry. "
7600                  "PPC floating point instructions tests "
7601                  "are disabled on your host\n");
7602 #endif /* !defined (NO_FLOAT) */
7603
7604       case PPC_405:
7605 #if defined (IS_PPC405)
7606          tmpl = &test_ppc405;
7607          loop = &tmpl;
7608          break;
7609 #else
7610          fprintf(stderr, "Sorry. "
7611                  "PPC405 instructions tests are disabled on your host\n");
7612          continue;
7613 #endif /* defined (IS_PPC405) */
7614       case PPC_ALTIVEC:
7615 #if defined (HAS_ALTIVEC)
7616          loop = &altivec_int_loops[nb_args - 1];
7617          break;
7618 #else
7619          fprintf(stderr, "Sorry. "
7620                  "Altivec instructions tests are disabled on your host\n");
7621          continue;
7622 #endif
7623       case PPC_FALTIVEC:
7624 #if defined (HAS_ALTIVEC)
7625          loop = &altivec_float_loops[nb_args - 1];
7626          break;
7627 #else
7628          fprintf(stderr, "Sorry. "
7629                  "Altivec float instructions tests "
7630                  "are disabled on your host\n");
7631 #endif
7632          continue;
7633       default:
7634          printf("ERROR: unknown insn family %08x\n", family);
7635          continue;
7636       }
7637       if (1 || verbose > 0)
7638          printf("%s:\n", all_tests[i].name);
7639       for (j=0; tests[j].name != NULL; j++) {
7640          if (check_name(tests[j].name, filter, exact)) {
7641             if (verbose > 1)
7642                printf("Test instruction %s\n", tests[j].name);
7643             (*loop)(tests[j].name, tests[j].func, all_tests[i].flags);
7644             printf("\n");
7645             n++;
7646          }
7647         }
7648       if (verbose) printf("\n");
7649    }
7650    printf("All done. Tested %d different instructions\n", n);
7651 }
7652
7653
7654 static void usage (void)
7655 {
7656 #if !defined (USAGE_SIMPLE)
7657    fprintf(stderr,
7658            "jm-insns [-1] [-2] [-3] [-*] [-t <type>] [-f <family>] [-u] "
7659            "[-n <filter>] [-r <test_rigour>] [-h]\n"
7660            "\t-1: test opcodes with one argument\n"
7661            "\t-2: test opcodes with two arguments\n"
7662            "\t-3: test opcodes with three arguments\n"
7663            "\t-*: launch test without checking the number of arguments\n"
7664            "\t-t: launch test for instructions of type <type>\n"
7665            "\t    recognized types:\n"
7666            "\t\tarith (or a)\n"
7667            "\t\tlogical (or l)\n"
7668            "\t\tcompare (or c)\n"
7669            "\t\tstoreload (or s)\n"
7670            "\t-f: launch test for instructions of family <family>\n"
7671            "\t    recognized families:\n"
7672            "\t\tinteger (or i)\n"
7673            "\t\tfloat (or f)\n"
7674            "\t\tppc405 (or mac)\n"
7675            "\t\taltivec (or a)\n"
7676            "\t-u: test instructions that update flags\n"
7677            "\t-n: filter instructions with <filter>\n"
7678            "\t    <filter> can be in two forms:\n"
7679            "\t\tname  : filter functions that exactly match <name>\n"
7680            "\t\tname* : filter functions that start with <name>\n"
7681            "\t-r: set size of arg tables to use to define <test_rigour>\n"
7682            "\t    recognized types:\n"
7683            "\t\tlarge (or l)\n"
7684            "\t\tsmall (or s) - default\n"
7685            "\t-v: verbose (-v -v for more)\n"
7686            "\t-h: print this help\n"
7687            );
7688 #else // #if !defined (USAGE_SIMPLE)
7689    fprintf(stderr,
7690            "Usage: jm-insns [OPTION]\n"
7691            "\t-i: test integer arithmetic instructions (default)\n"
7692            "\t-l: test integer logical instructions (default)\n"
7693            "\t-c: test integer compare instructions (default)\n"
7694            "\t-L: test integer load/store instructions (default)\n"
7695            "\t-f: test floating point instructions\n"
7696            "\t-a: test altivec instructions\n"
7697            "\t-m: test miscellaneous instructions\n"
7698            "\t-s: test shift algebraic (sraw, srawi, srad, sradi) instructions\n"
7699            "\t-M: test mfspr instructions\n"
7700            "\t-A: test all (int, fp, altivec) instructions\n"
7701            "\t-v: be verbose\n"
7702            "\t-h: display this help and exit\n"
7703            );
7704 #endif // #if !defined (USAGE_SIMPLE)
7705 }
7706
7707
7708
7709 int main (int argc, char **argv)
7710 {
7711 #if !defined (USAGE_SIMPLE)
7712 ////////////////////////////////////////////////////////////////////////
7713    unsigned char *tmp, *filter = NULL;
7714    insn_sel_flags_t flags;
7715    int c;
7716
7717    // check HWord_t really is a host word
7718    assert(sizeof(void*) == sizeof(HWord_t));
7719
7720    flags.one_arg    = 0;
7721    flags.two_args   = 0;
7722    flags.three_args = 0;
7723    flags.arith      = 0;
7724    flags.logical    = 0;
7725    flags.compare    = 0;
7726    flags.ldst       = 0;
7727    flags.integer    = 0;
7728    flags.floats     = 0;
7729    flags.p405       = 0;
7730    flags.altivec    = 0;
7731    flags.faltivec   = 0;
7732    flags.cr         = -1;
7733    flags.sh_algebraic = 0;
7734    flags.mfspr      = 0;
7735
7736    while ((c = getopt(argc, argv, "123t:f:n:r:uvh")) != -1) {
7737       switch (c) {
7738       case '1':
7739          flags.one_arg = 1;
7740          break;
7741       case '2':
7742          flags.two_args = 1;
7743          break;
7744       case '3':
7745          flags.three_args = 1;
7746          break;
7747       case 't':
7748          tmp = optarg;
7749          if (strcmp(tmp, "arith") == 0 || strcmp(tmp, "a") == 0) {
7750             flags.arith = 1;
7751          } else if (strcmp(tmp, "logical") == 0 || strcmp(tmp, "l") == 0) {
7752             flags.logical = 1;
7753          } else if (strcmp(tmp, "compare") == 0 || strcmp(tmp, "c") == 0) {
7754             flags.compare = 1;
7755          } else if (strcmp(tmp, "storeload") == 0 || strcmp(tmp, "s") == 0) {
7756             flags.ldst = 1;
7757          } else {
7758             goto bad_arg;
7759          }
7760          break;
7761       case 'f':
7762          tmp = optarg;
7763          if (strcmp(tmp, "integer") == 0 || strcmp(tmp, "i") == 0) {
7764             flags.integer = 1;
7765          } else if (strcmp(tmp, "float") == 0 || strcmp(tmp, "f") == 0) {
7766             flags.floats = 1;
7767          } else if (strcmp(tmp, "ppc405") == 0 || strcmp(tmp, "mac") == 0) {
7768             flags.p405 = 1;
7769          } else if (strcmp(tmp, "altivec") == 0 || strcmp(tmp, "a") == 0) {
7770             flags.altivec = 1;
7771             flags.faltivec = 1;
7772          } else {
7773             goto bad_arg;
7774          }
7775          break;
7776       case 'n':
7777          filter = optarg;
7778          break;
7779       case 'r':
7780          tmp = optarg;
7781          if (strcmp(tmp, "large") == 0 || strcmp(tmp, "l") == 0) {
7782             arg_list_size = 1;
7783          } else if (strcmp(tmp, "small") == 0 || strcmp(tmp, "s") == 0) {
7784             arg_list_size = 0;
7785          } else {
7786             goto bad_arg;
7787          }
7788          break;
7789
7790       case 'u':
7791          flags.cr = 1;
7792          break;
7793       case 'h':
7794          usage();
7795          return 0;
7796       case 'v':
7797          verbose++;
7798          break;
7799       default:
7800          usage();
7801          fprintf(stderr, "Unknown argument: '%c'\n", c);
7802          return 1;
7803       bad_arg:
7804          usage();
7805          fprintf(stderr, "Bad argument for '%c': '%s'\n", c, tmp);
7806          return 1;
7807       }
7808    }
7809    if (argc != optind) {
7810       usage();
7811       fprintf(stderr, "Bad number of arguments\n");
7812       return 1;
7813    }
7814
7815    // Default n_args
7816    if (flags.one_arg == 0 && flags.two_args == 0 && flags.three_args == 0) {
7817       flags.one_arg = 1;
7818       flags.two_args = 1;
7819       flags.three_args = 1;
7820    }
7821    // Default type
7822    if (flags.arith == 0 && flags.logical == 0 &&
7823        flags.compare == 0 && flags.ldst == 0) {
7824       flags.arith   = 1;
7825       flags.logical = 1;
7826       flags.compare = 1;
7827       flags.ldst    = 1;
7828    }
7829    // Default family
7830    if (flags.integer == 0 && flags.floats == 0 &&
7831        flags.p405 == 0 && flags.altivec == 0 && flags.faltivec == 0) {
7832       flags.integer  = 1;
7833       flags.floats   = 1;
7834       flags.p405     = 1;
7835       flags.altivec  = 1;
7836       flags.faltivec = 1;
7837       flags.algebraic = 1;
7838       flags.mfspr = 1;
7839    }
7840    // Default cr update
7841    if (flags.cr == -1)
7842       flags.cr = 2;       // both
7843
7844 #else // #if !defined (USAGE_SIMPLE)
7845 ////////////////////////////////////////////////////////////////////////
7846    /* Simple usage:
7847       ./jm-insns -i   => int arithmetic insns
7848       ./jm-insns -l   => int logical insns
7849       ./jm-insns -f   => fp  insns
7850       ./jm-insns -a   => av  insns
7851       ./jm-insns -m   => miscellaneous insns
7852       ./jm-insns -A   => int, fp and avinsns
7853    */
7854    char *filter = NULL;
7855    insn_sel_flags_t flags;
7856    int c;
7857
7858    // Args
7859    flags.one_arg    = 1;
7860    flags.two_args   = 1;
7861    flags.three_args = 1;
7862    // Type
7863    flags.arith      = 0;
7864    flags.logical    = 0;
7865    flags.compare    = 0;
7866    flags.ldst       = 0;
7867    // Family
7868    flags.integer    = 0;
7869    flags.floats     = 0;
7870    flags.misc       = 0;
7871    flags.p405       = 0;
7872    flags.altivec    = 0;
7873    flags.faltivec   = 0;
7874    flags.sh_algebraic = 0;
7875    flags.mfspr      = 0;
7876    // Flags
7877    flags.cr         = 2;
7878
7879    while ((c = getopt(argc, argv, "ilcLfmMsahvA")) != -1) {
7880       switch (c) {
7881       case 'i':
7882          flags.arith    = 1;
7883          flags.integer  = 1;
7884          break;
7885       case 's':
7886          flags.logical  = 1;
7887          flags.sh_algebraic = 1;
7888          break;
7889       case 'M':
7890          flags.logical  = 1;
7891          flags.mfspr = 1;
7892          break;
7893       case 'l':
7894          flags.logical  = 1;
7895          flags.integer  = 1;
7896          break;
7897       case 'c':
7898          flags.compare  = 1;
7899          flags.integer  = 1;
7900          break;
7901       case 'L':
7902          flags.ldst     = 1;
7903          flags.integer  = 1;
7904          break;
7905       case 'f':
7906          flags.arith  = 1;
7907          flags.logical  = 1;
7908          flags.compare  = 1;
7909          flags.ldst     = 1;
7910          flags.floats   = 1;
7911          break;
7912       case 'a':
7913          flags.arith    = 1;
7914          flags.logical  = 1;
7915          flags.compare  = 1;
7916          flags.ldst     = 1;
7917          flags.altivec  = 1;
7918          flags.faltivec = 1;
7919          break;
7920       case 'm':
7921          flags.arith    = 1;
7922          flags.logical  = 1;
7923          flags.compare  = 1;
7924          flags.ldst     = 1;
7925          flags.misc     = 1;
7926          break;
7927       case 'A':
7928          flags.arith    = 1;
7929          flags.logical  = 1;
7930          flags.compare  = 1;
7931          flags.ldst     = 1;
7932          flags.integer  = 1;
7933          flags.floats   = 1;
7934          flags.altivec  = 1;
7935          flags.faltivec = 1;
7936          break;
7937       case 'h':
7938          usage();
7939          return 0;
7940       case 'v':
7941          verbose++;
7942          break;
7943       default:
7944          usage();
7945          fprintf(stderr, "Unknown argument: '%c'\n", c);
7946          return 1;
7947       }
7948    }
7949
7950    arg_list_size = 0;
7951 #endif // #if !defined (USAGE_SIMPLE)
7952
7953
7954    build_iargs_table();
7955    build_fargs_table();
7956    build_ii16_table();
7957 #if defined (HAS_ALTIVEC)
7958    if (flags.altivec || flags.faltivec) {
7959       build_viargs_table();
7960       build_vfargs_table();
7961    }
7962 #endif
7963    // dump_iargs();
7964    // dump_iargs16();
7965    // dump_vfargs();
7966
7967    if (verbose > 1) {
7968       printf("\nInstruction Selection:\n");
7969       printf("  n_args: \n");
7970       printf("    one_arg    = %d\n", flags.one_arg);
7971       printf("    two_args   = %d\n", flags.two_args);
7972       printf("    three_args = %d\n", flags.three_args);
7973       printf("  type: \n");
7974       printf("    arith      = %d\n", flags.arith);
7975       printf("    logical    = %d\n", flags.logical);
7976       printf("    compare    = %d\n", flags.compare);
7977       printf("    ldst       = %d\n", flags.ldst);
7978       printf("  family: \n");
7979       printf("    integer    = %d\n", flags.integer);
7980       printf("    floats     = %d\n", flags.floats);
7981       printf("    p405       = %d\n", flags.p405);
7982       printf("    altivec    = %d\n", flags.altivec);
7983       printf("    faltivec   = %d\n", flags.faltivec);
7984       printf("    sh_algebraic = %d\n", flags.sh_algebraic);
7985       printf("    mfspr      = %d\n", flags.mfspr);
7986       printf("  cr update: \n");
7987       printf("    cr         = %d\n", flags.cr);
7988       printf("\n");
7989       printf("  num args: \n");
7990       printf("    iargs      - %d\n", nb_iargs);
7991       printf("    fargs      - %d\n", nb_fargs);
7992 #if defined (HAS_ALTIVEC)
7993       printf("    viargs     - %d\n", nb_viargs);
7994       printf("    vfargs     - %d\n", nb_vfargs);
7995 #endif
7996       printf("\n");
7997    }
7998
7999    do_tests( flags, filter );
8000
8001    return 0;
8002 }