none/tests/ppc64/Makefile.am

   1
   2 include $(top_srcdir)/Makefile.tool-tests.am
   3
   4 dist_noinst_SCRIPTS = filter_stderr
   5
   6 noinst_HEADERS = ppc64_helpers.h isa_3_1_helpers.h isa_3_1_register_defines.h
   7
   8 EXTRA_DIST = \
   9         jm-int.stderr.exp jm-int.stdout.exp jm-int.vgtest jm-int.stdout.exp-LE \
  10         jm-int.stdout.exp-LE-ISA3_0 \
  11         jm-int-sh_algebraic.stderr.exp jm-int-sh_algebraic.stdout.exp \
  12         jm-int-sh_algebraic.stdout.exp-LE \
  13         jm-int-sh_algebraic.stdout.exp-LE-ISA3_0 \
  14         jm-int-sh_algebraic.vgtest \
  15         jm-mfspr.stderr.exp jm-mfspr.stdout.exp jm-mfspr.stdout.exp-ALT \
  16         jm-mfspr.vgtest \
  17         jm-int_other.stderr.exp jm-int_other.stdout.exp jm-int_other.vgtest \
  18         jm-int_other.stdout.exp-LE \
  19         jm-fp.stderr.exp  jm-fp.stdout.exp  jm-fp.vgtest jm-fp.stdout.exp-LE jm-fp.stdout.exp-LE2 jm-fp.stdout.exp-BE2 \
  20         jm-vmx.stderr.exp jm-vmx.stdout.exp jm-vmx.stdout.exp_Minus_nan jm-vmx.stdout.exp-LE \
  21         jm-vmx.vgtest \
  22         jm-misc.stderr.exp jm-misc.stdout.exp jm-misc.vgtest \
  23         lsw.stderr.exp lsw.stdout.exp lsw.vgtest \
  24         std_reg_imm.vgtest std_reg_imm.stderr.exp std_reg_imm.stdout.exp std_reg_imm.stdout.exp-LE \
  25         round.stderr.exp round.stdout.exp round.vgtest \
  26         twi_tdi.stderr.exp twi_tdi.stdout.exp twi_tdi.vgtest \
  27         tw_td.stderr.exp tw_td.stdout.exp tw_td.vgtest \
  28         opcodes.h \
  29         power6_bcmp.stderr.exp power6_bcmp.stdout.exp power6_bcmp.vgtest \
  30         test_isa_2_06_part1.stderr.exp  test_isa_2_06_part1.stdout.exp  test_isa_2_06_part1.vgtest \
  31         test_isa_2_06_part1.stdout.exp-LE \
  32         test_isa_2_06_part2.stderr.exp  test_isa_2_06_part2.stdout.exp  test_isa_2_06_part2.vgtest \
  33         test_isa_2_06_part2-div.stderr.exp  test_isa_2_06_part2-div.stdout.exp \
  34         test_isa_2_06_part2-div.stdout.exp-LE-ISA3_0 test_isa_2_06_part2-div.vgtest \
  35         test_isa_2_06_part3.stderr.exp  test_isa_2_06_part3.stdout.exp  test_isa_2_06_part3.vgtest \
  36         test_isa_2_06_part3-div.stderr.exp  test_isa_2_06_part3-div.stdout.exp \
  37         test_isa_2_06_part3-div.stdout.exp-LE-ISA3_0  test_isa_2_06_part3-div.vgtest \
  38         test_dfp1.stderr.exp test_dfp1.stdout.exp test_dfp1.vgtest \
  39         test_dfp2.stderr.exp test_dfp2.stdout.exp test_dfp2.vgtest \
  40         test_dfp2.stdout.exp_Without_dcffix \
  41         test_dfp3.stderr.exp test_dfp3.stdout.exp test_dfp3.vgtest \
  42         test_dfp4.stderr.exp test_dfp4.stdout.exp test_dfp4.vgtest \
  43         test_dfp5.stderr.exp test_dfp5.stdout.exp test_dfp5.vgtest \
  44         jm_vec_isa_2_07.stderr.exp jm_vec_isa_2_07.stdout.exp jm_vec_isa_2_07.vgtest \
  45         jm_fp_isa_2_07.stderr.exp jm_fp_isa_2_07.stdout.exp jm_fp_isa_2_07.vgtest \
  46         jm_int_isa_2_07.stderr.exp jm_int_isa_2_07.vgtest \
  47         jm_int_isa_2_07.stdout.exp  jm_int_isa_2_07.stdout.exp-LE \
  48         test_isa_2_07_part2.stderr.exp test_isa_2_07_part2.stdout.exp test_isa_2_07_part2.vgtest \
  49         test_tm.stderr.exp test_tm.stdout.exp test_tm.vgtest \
  50         test_touch_tm.stderr.exp test_touch_tm.stdout.exp test_touch_tm.vgtest \
  51         ldst_multiple.stderr.exp ldst_multiple.stdout.exp ldst_multiple.vgtest \
  52         data-cache-instructions.stderr.exp data-cache-instructions.stdout.exp data-cache-instructions.vgtest \
  53         test_isa_3_0_altivec.stderr.exp  \
  54         test_isa_3_0_altivec.stdout.exp-LE test_isa_3_0_altivec.vgtest \
  55         test_isa_3_0_other.stderr.exp  \
  56         test_isa_3_0_other.stdout.exp-LE test_isa_3_0_other.vgtest \
  57         test_mod_instructions.stderr.exp test_mod_instructions.stdout.exp \
  58         test_mod_instructions.vgtest \
  59         test_isa_3_1_RT.vgtest test_isa_3_1_RT.stderr.exp test_isa_3_1_RT.stdout.exp \
  60         test_isa_3_1_XT.vgtest test_isa_3_1_XT.stderr.exp test_isa_3_1_XT.stdout.exp \
  61         test_isa_3_1_VRT.vgtest test_isa_3_1_VRT.stderr.exp test_isa_3_1_VRT.stdout.exp \
  62         test_isa_3_1_Misc.vgtest test_isa_3_1_Misc.stderr.exp test_isa_3_1_Misc.stdout.exp \
  63         test_isa_3_1_AT.vgtest test_isa_3_1_AT.stderr.exp test_isa_3_1_AT.stdout.exp \
  64         test_isa_3_1_R1_RT.vgtest test_isa_3_1_R1_RT.stderr.exp test_isa_3_1_R1_RT.stdout.exp \
  65         test_isa_3_1_R1_XT.vgtest test_isa_3_1_R1_XT.stderr.exp test_isa_3_1_R1_XT.stdout.exp \
  66         subnormal_test.stderr.exp  subnormal_test.stdout.exp \
  67         subnormal_test.vgtest test_darn_inst.stderr.exp \
  68         test_darn_inst.stdout.exp test_darn_inst.vgtest \
  69         scv_test.stderr.exp scv_test.stdout.exp scv_test.vgtest \
  70         test_copy_paste.stderr.exp test_copy_paste.stdout.exp \
  71         test_copy_paste.vgtest \
  72         test_mcrxrx.vgtest test_mcrxrx.stderr.exp test_mcrxrx.stdout.exp \
  73         test_lxvx_stxvx.vgtest test_lxvx_stxvx.stderr.exp \
  74         test_lxvx_stxvx.stdout.exp-p8  test_lxvx_stxvx.stdout.exp-p9
  75
  76 check_PROGRAMS = \
  77         allexec \
  78         jm-insns round \
  79         test_isa_2_06_part1 test_isa_2_06_part2 test_isa_2_06_part3 \
  80         test_dfp1 test_dfp2 test_dfp3 test_dfp4 test_dfp5 \
  81         test_isa_2_07_part1 test_isa_2_07_part2 \
  82         test_isa_3_0 test_mod_instructions \
  83         test_isa_3_1_RT test_isa_3_1_XT test_isa_3_1_VRT \
  84         test_isa_3_1_Misc test_isa_3_1_AT \
  85         test_isa_3_1_R1_RT test_isa_3_1_R1_XT \
  86         subnormal_test test_darn_inst test_copy_paste \
  87         test_tm test_touch_tm data-cache-instructions \
  88         std_reg_imm \
  89         twi_tdi tw_td power6_bcmp scv_test \
  90         test_mcrxrx test_lxvx_stxvx
  91
  92 # lmw, stmw, lswi, lswx, stswi, stswx compile (and run) only on big endian.
  93 if VGCONF_PLATFORMS_INCLUDE_PPC64BE_LINUX
  94 check_PROGRAMS += lsw ldst_multiple
  95 endif
  96
  97 AM_CFLAGS    += @FLAG_M64@
  98 AM_CXXFLAGS  += @FLAG_M64@
  99 AM_CCASFLAGS += @FLAG_M64@
 100
 101 allexec_CFLAGS          = $(AM_CFLAGS) @FLAG_W_NO_NONNULL@
 102
 103 scv_test_SOURCES = scv_test.c
 104 test_copy_paste_SOURCES = test_copy_paste.c
 105 test_mod_instructions_SOURCES = test_mod_instructions.c
 106 test_isa_3_0_SOURCES = test_isa_3_0.c
 107 test_isa_3_1_XT_SOURCES = test_isa_3_1_XT.c test_isa_3_1_common.c
 108 test_isa_3_1_RT_SOURCES = test_isa_3_1_RT.c test_isa_3_1_common.c
 109 test_isa_3_1_VRT_SOURCES = test_isa_3_1_VRT.c test_isa_3_1_common.c
 110 test_isa_3_1_Misc_SOURCES = test_isa_3_1_Misc.c test_isa_3_1_common.c
 111 test_isa_3_1_AT_SOURCES = test_isa_3_1_AT.c test_isa_3_1_common.c
 112 test_isa_3_1_R1_XT_SOURCES = test_isa_3_1_R1_XT.c test_isa_3_1_common.c
 113 test_isa_3_1_R1_RT_SOURCES = test_isa_3_1_R1_RT.c test_isa_3_1_common.c
 114 test_darn_inst_SOURCES = test_darn_inst.c
 115
 116 if HAS_ALTIVEC
 117 BUILD_FLAG_ALTIVEC = -maltivec
 118 ALTIVEC_FLAG = -DHAS_ALTIVEC
 119 else
 120 BUILD_FLAG_ALTIVEC =
 121 ALTIVEC_FLAG =
 122 endif
 123
 124 if HAS_VSX
 125 BUILD_FLAG_VSX = -mvsx
 126 VSX_FLAG = -DHAS_VSX
 127 else
 128 VSX_FLAG =
 129 BUILD_FLAG_VSX =
 130 endif
 131
 132 if HAS_DFP
 133 # The DFP test uses the Power7 dcffix instruction.
 134 BUILD_FLAGS_DFP = -mhard-dfp -mcpu=power7
 135 DFP_FLAG = -DHAS_DFP
 136 else
 137 BUILD_FLAGS_DFP =
 138 DFP_FLAG =
 139 endif
 140
 141 if HAS_ISA_2_06
 142 BUILD_FLAGS_ISA_2_06 = -mcpu=power7
 143 ISA_2_06_FLAG = -DHAS_ISA_2_06
 144 else
 145 BUILD_FLAGS_ISA_2_06 =
 146 ISA_2_06_FLAG =
 147 endif
 148
 149 if HAS_ISA_2_07
 150 BUILD_FLAGS_ISA_2_07 = -mcpu=power8
 151 ISA_2_07_FLAG = -DHAS_ISA_2_07
 152 else
 153 BUILD_FLAGS_ISA_2_07 =
 154 ISA_2_07_FLAG =
 155 endif
 156
 157 if SUPPORTS_HTM
 158 HTM_FLAG = -mhtm -DSUPPORTS_HTM
 159 else
 160 HTM_FLAG =
 161 endif
 162
 163 if HAS_ISA_3_00
 164 BUILD_FLAGS_ISA_3_00 = -mcpu=power9
 165 ISA_3_00_FLAG = -DHAS_ISA_3_00
 166 else
 167 BUILD_FLAGS_ISA_3_00 =
 168 ISA_3_00_FLAG =
 169 endif
 170
 171 if HAS_ISA_3_1
 172 BUILD_FLAGS_ISA_3_1 = -mcpu=power10
 173 ISA_3_1_FLAG = -DHAS_ISA_3_1
 174 else
 175 BUILD_FLAGS_ISA_3_1 =
 176 ISA_3_1_FLAG =
 177 endif
 178
 179 jm_insns_CFLAGS = $(AM_CFLAGS) -Wl,-z,norelro -Winline -Wall -O -g -mregnames \
 180                         @FLAG_M64@ $(ALTIVEC_FLAG) $(BUILD_FLAG_ALTIVEC)
 181
 182 test_isa_2_06_part1_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(VSX_FLAG) \
 183                         @FLAG_M64@ $(ALTIVEC_FLAG) $(BUILD_FLAG_VSX)
 184
 185 test_isa_2_06_part2_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(VSX_FLAG) \
 186                         @FLAG_M64@ $(ALTIVEC_FLAG) $(BUILD_FLAG_VSX)
 187
 188 test_isa_2_06_part3_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(VSX_FLAG) \
 189                         @FLAG_M64@ $(ALTIVEC_FLAG) $(BUILD_FLAG_VSX)
 190
 191 test_dfp1_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(DFP_FLAG) \
 192                         @FLAG_M64@ $(BUILD_FLAGS_DFP)
 193 test_dfp2_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(DFP_FLAG) \
 194                         @FLAG_M64@ $(BUILD_FLAGS_DFP)
 195 test_dfp3_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(DFP_FLAG) \
 196                         @FLAG_M64@ $(BUILD_FLAGS_DFP)
 197 test_dfp4_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(DFP_FLAG) \
 198                         @FLAG_M64@ $(BUILD_FLAGS_DFP)
 199 test_dfp5_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(DFP_FLAG) \
 200                         @FLAG_M64@ $(BUILD_FLAGS_DFP)
 201
 202 test_isa_2_07_part1_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(ISA_2_07_FLAG) \
 203                         @FLAG_M64@ $(BUILD_FLAGS_ISA_2_07)
 204 test_isa_2_07_part2_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(ISA_2_07_FLAG) \
 205                         @FLAG_M64@ $(BUILD_FLAGS_ISA_2_07)
 206
 207 test_tm_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(HTM_FLAG) $(ISA_2_07_FLAG) \
 208                         @FLAG_M64@ $(BUILD_FLAGS_ISA_2_07)
 209 test_touch_tm_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(HTM_FLAG) $(ISA_2_07_FLAG) \
 210                         @FLAG_M64@ $(BUILD_FLAGS_ISA_2_07)
 211
 212 test_isa_3_0_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(HTM_FLAG) $(ISA_3_00_FLAG) \
 213                         @FLAG_M64@ $(BUILD_FLAGS_ISA_3_00)
 214
 215 scv_test_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(HTM_FLAG) $(ISA_3_00_FLAG) \
 216                         @FLAG_M64@ $(BUILD_FLAGS_ISA_3_00)
 217
 218 test_mod_instructions_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(HTM_FLAG) $(ISA_3_00_FLAG) \
 219                         @FLAG_M64@ $(BUILD_FLAGS_ISA_3_00)
 220
 221 test_darn_inst_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(HTM_FLAG) $(ISA_3_00_FLAG) \
 222                         @FLAG_M64@ $(BUILD_FLAGS_ISA_3_00)
 223
 224 test_isa_3_1_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames  $(ISA_3_1_FLAG) \
 225                         @FLAG_M64@ $(BUILD_FLAGS_ISA_3_1)
 226 test_isa_3_1_RT_CFLAGS = $(test_isa_3_1_CFLAGS)
 227 test_isa_3_1_XT_CFLAGS = $(test_isa_3_1_CFLAGS)
 228 test_isa_3_1_VRT_CFLAGS = $(test_isa_3_1_CFLAGS)
 229 test_isa_3_1_Misc_CFLAGS = $(test_isa_3_1_CFLAGS)
 230 test_isa_3_1_AT_CFLAGS = $(test_isa_3_1_CFLAGS)
 231
 232 # The _R1_foo tests exercise pc-relative instructions, so require the bss and text sections
 233 # exist at known offsets with respect to each other.
 234 test_isa_3_1_R1_RT_CFLAGS = $(test_isa_3_1_CFLAGS) -Wl,-Tbss,0x20000 -Wl,-Ttext,0x40000
 235 test_isa_3_1_R1_XT_CFLAGS = $(test_isa_3_1_CFLAGS) -Wl,-Tbss,0x20000 -Wl,-Ttext,0x40000
 236
 237 subnormal_test_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(VSX_FLAG) $(ISA_2_06_FLAG) \
 238                         @FLAG_M64@ $(ALTIVEC_FLAG) $(BUILD_FLAG_VSX) $(BUILD_FLAGS_ISA_2_06)
 239
 240 test_copy_paste_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(HTM_FLAG) $(ISA_3_1_FLAG) \
 241                         @FLAG_M64@ $(BUILD_FLAGS_ISA_3_1)
 242
 243 test_mcrxrx_CFLAGS = $(AM_FLAGS) -Winline -Wall -O -g -mregnames @FLAG_M64@  $(ISA_3_00_FLAG)
 244
 245 #  ISA 2.06 and 2.07 the lxvx, stxvx instructions are nmemonics for the BE
 246 #  instructions lxvd2x and stxvd2x
 247 #  They are real endian aware instruction in ISA 3.0.
 248
 249 if HAS_ISA_3_00
 250 test_lxvx_stxvx_CFLAGS = $(AM_FLAGS) -Winline -Wall -O -g -mregnames \
 251         @FLAG_M64@  $(ISA_2_07_FLAG)  $(BUILD_FLAGS_ISA_3_00)
 252 else
 253   test_lxvx_stxvx_CFLAGS = $(AM_FLAGS) -Winline -Wall -O -g -mregnames \
 254         @FLAG_M64@  $(ISA_2_07_FLAG)   $(BUILD_FLAGS_ISA_2_07)
 255 endif
 256
 257 test_isa_2_06_part3_LDADD = -lm
 258 test_dfp1_LDADD = -lm
 259 test_dfp2_LDADD = -lm
 260 test_dfp3_LDADD = -lm
 261 test_dfp4_LDADD = -lm
 262 test_dfp5_LDADD = -lm
 263 test_isa_2_07_part1_LDADD = -lm
 264 test_isa_2_07_part2_LDADD = -lm
 265 test_tm_LDADD = -lm
 266 test_touch_tm_LDADD = -lm
 267 test_isa_3_0_LDADD = -lm
 268 test_mcrxrx_LDADD = -lm
 269 test_lxvx_stxvx_LDADD = -lm
 270